ia64/xen-unstable
changeset 17070:2c9d0eb5a855
[IA64] Handle nested dtlb miss in vmx_dirty_bit
Although I believe that tpa in vmx_dirty_bit never generate
a nested dtlb miss, this patch ensures the fault case.
Confirmed the additional code in this patch works fine
by means of a debugger.
Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
Although I believe that tpa in vmx_dirty_bit never generate
a nested dtlb miss, this patch ensures the fault case.
Confirmed the additional code in this patch works fine
by means of a debugger.
Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
author | Alex Williamson <alex.williamson@hp.com> |
---|---|
date | Fri Feb 15 10:34:00 2008 -0700 (2008-02-15) |
parents | 29faad225cbb |
children | c750c7177d63 |
files | xen/arch/ia64/vmx/vmx_ivt.S |
line diff
1.1 --- a/xen/arch/ia64/vmx/vmx_ivt.S Thu Feb 14 12:37:15 2008 -0700 1.2 +++ b/xen/arch/ia64/vmx/vmx_ivt.S Fri Feb 15 10:34:00 2008 -0700 1.3 @@ -410,6 +410,11 @@ END(vmx_alt_dtlb_miss) 1.4 // 0x1400 Entry 5 (size 64 bundles) Data nested TLB (6,45) 1.5 ENTRY(vmx_nested_dtlb_miss) 1.6 VMX_DBG_FAULT(5) 1.7 + mov r29=cr.ipsr 1.8 + mov b0=r30 1.9 + ;; 1.10 + tbit.z p6,p0=r29,IA64_PSR_VM_BIT 1.11 +(p6)br.sptk b0 // return to the continuation point 1.12 VMX_FAULT(5) 1.13 END(vmx_nested_dtlb_miss) 1.14 1.15 @@ -433,16 +438,42 @@ END(vmx_dkey_miss) 1.16 ///////////////////////////////////////////////////////////////////////////////////////// 1.17 // 0x2000 Entry 8 (size 64 bundles) Dirty-bit (54) 1.18 ENTRY(vmx_dirty_bit) 1.19 - mov r29=cr.ipsr 1.20 + VMX_DBG_FAULT(8) 1.21 + mov r28=cr.ipsr 1.22 mov r31=pr 1.23 ;; 1.24 mov r19=cr.ifa 1.25 - tbit.z p6,p0=r29,IA64_PSR_VM_BIT 1.26 -(p6)br.spnt.many vmx_fault_8 1.27 + tbit.z p6,p0=r28,IA64_PSR_VM_BIT 1.28 +(p6)br.spnt.few vmx_fault_8 1.29 + // Prepare for nested dtlb miss 1.30 + mov r22=b0 1.31 + dep.z r29=r28,IA64_PSR_VM_BIT,1 1.32 ;; 1.33 - tpa r19=r19 1.34 + mov cr.ipsr=r29 // ipsr.vm=0 1.35 + movl r30=dirty_bit_tpa_fail 1.36 + ;; 1.37 + tpa r19=r19 // possibly nested dtlb miss? 1.38 + mov cr.ipsr=r28 // ipsr.vm=1 1.39 br.sptk vmx_dispatch_shadow_fault 1.40 VMX_FAULT(8) 1.41 +dirty_bit_tpa_fail: 1.42 + // Resume & Retry 1.43 + mov cr.ipsr=r28 // ipsr.vm=1 1.44 + mov r17=cr.isr 1.45 + mov r23=r31 1.46 +// mov r22=b0 // b0 is clobbered in vmx_nested_dtlb_miss 1.47 + adds r16=IA64_VPD_BASE_OFFSET,r21 1.48 + ;; 1.49 + ld8 r18=[r16] 1.50 + ;; 1.51 + adds r19=VPD(VPSR),r18 1.52 + movl r20=__vsa_base 1.53 + ;; 1.54 + ld8 r19=[r19] 1.55 + ld8 r20=[r20] 1.56 + ;; 1.57 + br.sptk ia64_vmm_entry 1.58 + ;; 1.59 END(vmx_dirty_bit) 1.60 1.61 .org vmx_ia64_ivt+0x2400