ia64/xen-unstable

changeset 5904:2c67026ea29d

merge?
author cl349@firebug.cl.cam.ac.uk
date Wed Jul 27 16:57:37 2005 +0000 (2005-07-27)
parents 039c7fd6a4d2 01966dd718a8
children 598c92956925
files tools/python/xen/xend/XendDomain.py xen/arch/x86/time.c xen/include/asm-x86/fixmap.h xen/include/asm-x86/mach-summit/mach_mpparse.h
line diff
     2.1 --- a/xen/arch/x86/time.c	Wed Jul 27 16:57:01 2005 +0000
     2.2 +++ b/xen/arch/x86/time.c	Wed Jul 27 16:57:37 2005 +0000
     2.3 @@ -199,13 +199,13 @@ void calibrate_tsc_bp(void)
     2.4      outb(CALIBRATE_LATCH >> 8, PIT_CH2);
     2.5  
     2.6      tsc_calibrate_status = 1;
     2.7 -	wmb();
     2.8 +    wmb();
     2.9  
    2.10      while ( (inb(0x61) & 0x20) == 0 )
    2.11          continue;
    2.12  
    2.13      tsc_calibrate_status = 2;
    2.14 -	wmb();
    2.15 +    wmb();
    2.16  
    2.17      while ( atomic_read(&tsc_calibrate_gang) != 0 )
    2.18          mb();
    2.19 @@ -233,7 +233,6 @@ void calibrate_tsc_ap(void)
    2.20      atomic_dec(&tsc_calibrate_gang);
    2.21  }
    2.22  
    2.23 -
    2.24  /************************************************************
    2.25   * PLATFORM TIMER 1: PROGRAMMABLE INTERVAL TIMER (LEGACY PIT)
    2.26   */
    2.27 @@ -280,6 +279,8 @@ static int init_pit(void)
    2.28      platform_timer_stamp = pit_counter64;
    2.29      set_time_scale(&platform_timer_scale, CLOCK_TICK_RATE);
    2.30  
    2.31 +    printk("Platform timer is PIT\n");
    2.32 +
    2.33      return 1;
    2.34  }
    2.35  
    2.36 @@ -318,12 +319,12 @@ static int init_hpet(void)
    2.37  
    2.38      if ( (hpet_address == 0) && opt_hpet_force )
    2.39      {
    2.40 -		printk(KERN_WARNING "WARNING: Enabling HPET base manually!\n");
    2.41 +        printk(KERN_WARNING "WARNING: Enabling HPET base manually!\n");
    2.42          outl(0x800038a0, 0xcf8);
    2.43          outl(0xff000001, 0xcfc);
    2.44          outl(0x800038a0, 0xcf8);
    2.45          hpet_address = inl(0xcfc) & 0xfffffffe;
    2.46 -		printk(KERN_WARNING "WARNING: Enabled HPET at %#lx.\n", hpet_address);
    2.47 +        printk(KERN_WARNING "WARNING: Enabled HPET at %#lx.\n", hpet_address);
    2.48      }
    2.49  
    2.50      if ( hpet_address == 0 )
    2.51 @@ -383,6 +384,89 @@ static int init_hpet(void)
    2.52      hpet_overflow(NULL);
    2.53      platform_timer_stamp = hpet_counter64;
    2.54  
    2.55 +    printk("Platform timer is HPET\n");
    2.56 +
    2.57 +    return 1;
    2.58 +}
    2.59 +
    2.60 +/************************************************************
    2.61 + * PLATFORM TIMER 3: IBM 'CYCLONE' TIMER
    2.62 + */
    2.63 +
    2.64 +int use_cyclone;
    2.65 +
    2.66 +/*
    2.67 + * Although the counter is read via a 64-bit register, I believe it is actually
    2.68 + * a 40-bit counter. Since this will wrap, I read only the low 32 bits and
    2.69 + * periodically fold into a 64-bit software counter, just as for PIT and HPET.
    2.70 + */
    2.71 +#define CYCLONE_CBAR_ADDR   0xFEB00CD0
    2.72 +#define CYCLONE_PMCC_OFFSET 0x51A0
    2.73 +#define CYCLONE_MPMC_OFFSET 0x51D0
    2.74 +#define CYCLONE_MPCS_OFFSET 0x51A8
    2.75 +#define CYCLONE_TIMER_FREQ  100000000
    2.76 +
    2.77 +/* Protected by platform_timer_lock. */
    2.78 +static u64 cyclone_counter64;
    2.79 +static u32 cyclone_stamp;
    2.80 +static struct ac_timer cyclone_overflow_timer;
    2.81 +static volatile u32 *cyclone_timer; /* Cyclone MPMC0 register */
    2.82 +
    2.83 +static void cyclone_overflow(void *unused)
    2.84 +{
    2.85 +    u32 counter;
    2.86 +
    2.87 +    spin_lock(&platform_timer_lock);
    2.88 +    counter = *cyclone_timer;
    2.89 +    cyclone_counter64 += (u32)(counter - cyclone_stamp);
    2.90 +    cyclone_stamp = counter;
    2.91 +    spin_unlock(&platform_timer_lock);
    2.92 +
    2.93 +    set_ac_timer(&cyclone_overflow_timer, NOW() + MILLISECS(20000));
    2.94 +}
    2.95 +
    2.96 +static u64 read_cyclone_count(void)
    2.97 +{
    2.98 +    return cyclone_counter64 + (u32)(*cyclone_timer - cyclone_stamp);
    2.99 +}
   2.100 +
   2.101 +static volatile u32 *map_cyclone_reg(unsigned long regaddr)
   2.102 +{
   2.103 +    unsigned long pageaddr = regaddr &  PAGE_MASK;
   2.104 +    unsigned long offset   = regaddr & ~PAGE_MASK;
   2.105 +    set_fixmap_nocache(FIX_CYCLONE_TIMER, pageaddr);
   2.106 +    return (volatile u32 *)(fix_to_virt(FIX_CYCLONE_TIMER) + offset);
   2.107 +}
   2.108 +
   2.109 +static int init_cyclone(void)
   2.110 +{
   2.111 +    u32 base;
   2.112 +    
   2.113 +    if ( !use_cyclone )
   2.114 +        return 0;
   2.115 +
   2.116 +    /* Find base address. */
   2.117 +    base = *(map_cyclone_reg(CYCLONE_CBAR_ADDR));
   2.118 +    if ( base == 0 )
   2.119 +    {
   2.120 +        printk(KERN_ERR "Cyclone: Could not find valid CBAR value.\n");
   2.121 +        return 0;
   2.122 +    }
   2.123 + 
   2.124 +    /* Enable timer and map the counter register. */
   2.125 +    *(map_cyclone_reg(base + CYCLONE_PMCC_OFFSET)) = 1;
   2.126 +    *(map_cyclone_reg(base + CYCLONE_MPCS_OFFSET)) = 1;
   2.127 +    cyclone_timer = map_cyclone_reg(base + CYCLONE_MPMC_OFFSET);
   2.128 +
   2.129 +    read_platform_count = read_cyclone_count;
   2.130 +
   2.131 +    init_ac_timer(&cyclone_overflow_timer, cyclone_overflow, NULL, 0);
   2.132 +    cyclone_overflow(NULL);
   2.133 +    platform_timer_stamp = cyclone_counter64;
   2.134 +    set_time_scale(&platform_timer_scale, CYCLONE_TIMER_FREQ);
   2.135 +
   2.136 +    printk("Platform timer is IBM Cyclone\n");
   2.137 +
   2.138      return 1;
   2.139  }
   2.140  
   2.141 @@ -427,7 +511,7 @@ static void platform_time_calibration(vo
   2.142  
   2.143  static void init_platform_timer(void)
   2.144  {
   2.145 -    if ( !init_hpet() )
   2.146 +    if ( !init_cyclone() && !init_hpet() )
   2.147          BUG_ON(!init_pit());
   2.148  }
   2.149  
     3.1 --- a/xen/include/asm-x86/fixmap.h	Wed Jul 27 16:57:01 2005 +0000
     3.2 +++ b/xen/include/asm-x86/fixmap.h	Wed Jul 27 16:57:37 2005 +0000
     3.3 @@ -31,6 +31,7 @@ enum fixed_addresses {
     3.4      FIX_ACPI_BEGIN,
     3.5      FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
     3.6      FIX_HPET_BASE,
     3.7 +    FIX_CYCLONE_TIMER,
     3.8      __end_of_fixed_addresses
     3.9  };
    3.10  
     4.1 --- a/xen/include/asm-x86/mach-summit/mach_mpparse.h	Wed Jul 27 16:57:01 2005 +0000
     4.2 +++ b/xen/include/asm-x86/mach-summit/mach_mpparse.h	Wed Jul 27 16:57:37 2005 +0000
     4.3 @@ -30,7 +30,7 @@ static inline int mps_oem_check(struct m
     4.4  			(!strncmp(productid, "VIGIL SMP", 9) 
     4.5  			 || !strncmp(productid, "EXA", 3)
     4.6  			 || !strncmp(productid, "RUTHLESS SMP", 12))){
     4.7 -		/*use_cyclone = 1;*/ /*enable cyclone-timer*/
     4.8 +		use_cyclone = 1; /*enable cyclone-timer*/
     4.9  		setup_summit();
    4.10  		/*usb_early_handoff = 1;*/
    4.11  		return 1;
    4.12 @@ -44,7 +44,7 @@ static inline int acpi_madt_oem_check(ch
    4.13  	if (!strncmp(oem_id, "IBM", 3) &&
    4.14  	    (!strncmp(oem_table_id, "SERVIGIL", 8)
    4.15  	     || !strncmp(oem_table_id, "EXA", 3))){
    4.16 -		/*use_cyclone = 1;*/ /*enable cyclone-timer*/
    4.17 +		use_cyclone = 1; /*enable cyclone-timer*/
    4.18  		setup_summit();
    4.19  		/*usb_early_handoff = 1;*/
    4.20  		return 1;