ia64/xen-unstable

changeset 11823:2a9c0f4682ed

[IA64] Correctly not handle VHPT long format.

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
author awilliam@xenbuild.aw
date Wed Oct 18 22:07:06 2006 -0600 (2006-10-18)
parents aed7ef54fbfe
children ee7799388ab1
files xen/arch/ia64/vmx/vmx_process.c xen/arch/ia64/vmx/vtlb.c
line diff
     1.1 --- a/xen/arch/ia64/vmx/vmx_process.c	Wed Oct 18 22:06:49 2006 -0600
     1.2 +++ b/xen/arch/ia64/vmx/vmx_process.c	Wed Oct 18 22:07:06 2006 -0600
     1.3 @@ -269,10 +269,12 @@ vmx_hpw_miss(u64 vadr , u64 vec, REGS* r
     1.4      int type;
     1.5      u64 vhpt_adr, gppa, pteval, rr, itir;
     1.6      ISR misr;
     1.7 +    PTA vpta;
     1.8      thash_data_t *data;
     1.9      VCPU *v = current;
    1.10 +
    1.11      vpsr.val = VCPU(v, vpsr);
    1.12 -    misr.val=VMX(v,cr_isr);
    1.13 +    misr.val = VMX(v,cr_isr);
    1.14      
    1.15      if (vec == 1)
    1.16          type = ISIDE_TLB;
    1.17 @@ -283,7 +285,8 @@ vmx_hpw_miss(u64 vadr , u64 vec, REGS* r
    1.18  
    1.19      if(is_physical_mode(v)&&(!(vadr<<1>>62))){
    1.20          if(vec==2){
    1.21 -            if(v->domain!=dom0&&__gpfn_is_io(v->domain,(vadr<<1)>>(PAGE_SHIFT+1))){
    1.22 +            if (v->domain != dom0
    1.23 +                && __gpfn_is_io(v->domain, (vadr << 1) >> (PAGE_SHIFT + 1))) {
    1.24                  emulate_io_inst(v,((vadr<<1)>>1),4);   //  UC
    1.25                  return IA64_FAULT;
    1.26              }
    1.27 @@ -322,41 +325,55 @@ vmx_hpw_miss(u64 vadr , u64 vec, REGS* r
    1.28                  nested_dtlb(v);
    1.29                  return IA64_FAULT;
    1.30              }
    1.31 -        } else{
    1.32 -            vmx_vcpu_thash(v, vadr, &vhpt_adr);
    1.33 -            if(!guest_vhpt_lookup(vhpt_adr, &pteval)){
    1.34 -                if (!(pteval & _PAGE_P)) {
    1.35 -                    if (vpsr.ic) {
    1.36 -                        vcpu_set_isr(v, misr.val);
    1.37 -                        data_page_not_present(v, vadr);
    1.38 -                        return IA64_FAULT;
    1.39 -                    } else {
    1.40 -                        nested_dtlb(v);
    1.41 -                        return IA64_FAULT;
    1.42 -                    }
    1.43 -                }                     
    1.44 -                else if ((pteval & _PAGE_MA_MASK) != _PAGE_MA_ST) {
    1.45 -                    vcpu_get_rr(v, vadr, &rr);
    1.46 -                    itir = rr&(RR_RID_MASK | RR_PS_MASK);
    1.47 -                    thash_purge_and_insert(v, pteval, itir, vadr, DSIDE_TLB);
    1.48 -                    return IA64_NO_FAULT;
    1.49 -                } else if (vpsr.ic) {
    1.50 +        }
    1.51 +
    1.52 +        vmx_vcpu_get_pta(v, &vpta.val);
    1.53 +        if (vpta.vf) {
    1.54 +            /* Long format is not yet supported.  */
    1.55 +            if (vpsr.ic) {
    1.56 +                vcpu_set_isr(v, misr.val);
    1.57 +                dtlb_fault(v, vadr);
    1.58 +                return IA64_FAULT;
    1.59 +            } else {
    1.60 +                nested_dtlb(v);
    1.61 +                return IA64_FAULT;
    1.62 +            }
    1.63 +        }
    1.64 +
    1.65 +        vmx_vcpu_thash(v, vadr, &vhpt_adr);
    1.66 +        if (!guest_vhpt_lookup(vhpt_adr, &pteval)) {
    1.67 +            /* VHPT successfully read.  */
    1.68 +            if (!(pteval & _PAGE_P)) {
    1.69 +                if (vpsr.ic) {
    1.70                      vcpu_set_isr(v, misr.val);
    1.71 -                    dtlb_fault(v, vadr);
    1.72 +                    data_page_not_present(v, vadr);
    1.73                      return IA64_FAULT;
    1.74 -                }else{
    1.75 +                } else {
    1.76                      nested_dtlb(v);
    1.77                      return IA64_FAULT;
    1.78                  }
    1.79 +            } else if ((pteval & _PAGE_MA_MASK) != _PAGE_MA_ST) {
    1.80 +                vcpu_get_rr(v, vadr, &rr);
    1.81 +                itir = rr & (RR_RID_MASK | RR_PS_MASK);
    1.82 +                thash_purge_and_insert(v, pteval, itir, vadr, DSIDE_TLB);
    1.83 +                return IA64_NO_FAULT;
    1.84 +            } else if (vpsr.ic) {
    1.85 +                vcpu_set_isr(v, misr.val);
    1.86 +                dtlb_fault(v, vadr);
    1.87 +                return IA64_FAULT;
    1.88              }else{
    1.89 -                if(vpsr.ic){
    1.90 -                    vcpu_set_isr(v, misr.val);
    1.91 -                    dvhpt_fault(v, vadr);
    1.92 -                    return IA64_FAULT;
    1.93 -                }else{
    1.94 -                    nested_dtlb(v);
    1.95 -                    return IA64_FAULT;
    1.96 -                }
    1.97 +                nested_dtlb(v);
    1.98 +                return IA64_FAULT;
    1.99 +            }
   1.100 +        } else {
   1.101 +            /* Can't read VHPT.  */
   1.102 +            if (vpsr.ic) {
   1.103 +                vcpu_set_isr(v, misr.val);
   1.104 +                dvhpt_fault(v, vadr);
   1.105 +                return IA64_FAULT;
   1.106 +            } else {
   1.107 +                nested_dtlb(v);
   1.108 +                return IA64_FAULT;
   1.109              }
   1.110          }
   1.111      }else if(type == ISIDE_TLB){
   1.112 @@ -367,24 +384,34 @@ vmx_hpw_miss(u64 vadr , u64 vec, REGS* r
   1.113              vcpu_set_isr(v, misr.val);
   1.114              alt_itlb(v, vadr);
   1.115              return IA64_FAULT;
   1.116 -        } else{
   1.117 -            vmx_vcpu_thash(v, vadr, &vhpt_adr);
   1.118 -            if(!guest_vhpt_lookup(vhpt_adr, &pteval)){
   1.119 -                if (pteval & _PAGE_P){
   1.120 -                    vcpu_get_rr(v, vadr, &rr);
   1.121 -                    itir = rr&(RR_RID_MASK | RR_PS_MASK);
   1.122 -                    thash_purge_and_insert(v, pteval, itir, vadr, ISIDE_TLB);
   1.123 -                    return IA64_NO_FAULT;
   1.124 -                } else {
   1.125 -                    vcpu_set_isr(v, misr.val);
   1.126 -                    inst_page_not_present(v, vadr);
   1.127 -                    return IA64_FAULT;
   1.128 -                }
   1.129 -            }else{
   1.130 +        }
   1.131 +
   1.132 +        vmx_vcpu_get_pta(v, &vpta.val);
   1.133 +        if (vpta.vf) {
   1.134 +            /* Long format is not yet supported.  */
   1.135 +            vcpu_set_isr(v, misr.val);
   1.136 +            itlb_fault(v, vadr);
   1.137 +            return IA64_FAULT;
   1.138 +        }
   1.139 +
   1.140 +
   1.141 +        vmx_vcpu_thash(v, vadr, &vhpt_adr);
   1.142 +        if (!guest_vhpt_lookup(vhpt_adr, &pteval)) {
   1.143 +            /* VHPT successfully read.  */
   1.144 +            if (pteval & _PAGE_P) {
   1.145 +                vcpu_get_rr(v, vadr, &rr);
   1.146 +                itir = rr & (RR_RID_MASK | RR_PS_MASK);
   1.147 +                thash_purge_and_insert(v, pteval, itir, vadr, ISIDE_TLB);
   1.148 +                return IA64_NO_FAULT;
   1.149 +            } else {
   1.150                  vcpu_set_isr(v, misr.val);
   1.151 -                ivhpt_fault(v, vadr);
   1.152 +                inst_page_not_present(v, vadr);
   1.153                  return IA64_FAULT;
   1.154              }
   1.155 +        } else {
   1.156 +            vcpu_set_isr(v, misr.val);
   1.157 +            ivhpt_fault(v, vadr);
   1.158 +            return IA64_FAULT;
   1.159          }
   1.160      }
   1.161      return IA64_NO_FAULT;
     2.1 --- a/xen/arch/ia64/vmx/vtlb.c	Wed Oct 18 22:06:49 2006 -0600
     2.2 +++ b/xen/arch/ia64/vmx/vtlb.c	Wed Oct 18 22:07:06 2006 -0600
     2.3 @@ -218,7 +218,6 @@ u64 guest_vhpt_lookup(u64 iha, u64 *pte)
     2.4  {
     2.5      u64 ret;
     2.6      thash_data_t * data;
     2.7 -    PTA vpta;
     2.8  
     2.9      data = vhpt_lookup(iha);
    2.10      if (data == NULL) {
    2.11 @@ -227,13 +226,6 @@ u64 guest_vhpt_lookup(u64 iha, u64 *pte)
    2.12              thash_vhpt_insert(current, data->page_flags, data->itir ,iha);
    2.13      }
    2.14  
    2.15 -    /* VHPT long format is not read.  */
    2.16 -    vmx_vcpu_get_pta(current, &vpta.val);
    2.17 -    if (vpta.vf == 1) {
    2.18 -        *pte = 0;
    2.19 -        return 0;
    2.20 -    }
    2.21 -
    2.22      asm volatile ("rsm psr.ic|psr.i;;"
    2.23                    "srlz.d;;"
    2.24                    "ld8.s r9=[%1];;"