ia64/xen-unstable

changeset 5414:2814216d7f48

bitkeeper revision 1.1705.1.4 (42a93b72dCp-0yWsUC34zD8h-L-QLg)

Adding the VMCS encodings as per "Intel Virtualization Technology
Specification for the IA-32 Intel Architecture", and removing hard
coded values. Code cleanup & preparation for 64bit VMX guest support.

Signed-Off-By: Chengyuan Li <chengyuan.li@intel.com>
Signed-Off-By: Yunhong Jiang <hunhong.jiang@intel.com>
Signed-Off-By: Jun Nakajima <jun.nakajima@intel.com>
Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com>
author kaf24@firebug.cl.cam.ac.uk
date Fri Jun 10 07:04:18 2005 +0000 (2005-06-10)
parents 3185b74f6f7e
children 722921e57e2e
files xen/arch/x86/domain.c xen/arch/x86/vmx.c xen/arch/x86/vmx_io.c xen/arch/x86/vmx_platform.c xen/arch/x86/vmx_vmcs.c xen/arch/x86/x86_32/traps.c xen/include/asm-x86/vmx.h xen/include/asm-x86/vmx_vmcs.h
line diff
     1.1 --- a/xen/arch/x86/domain.c	Fri Jun 10 06:56:36 2005 +0000
     1.2 +++ b/xen/arch/x86/domain.c	Fri Jun 10 07:04:18 2005 +0000
     1.3 @@ -414,7 +414,7 @@ int arch_set_info_guest(
     1.4          /* Ensure real hardware interrupts are enabled. */
     1.5          v->arch.guest_context.user_regs.eflags |= EF_IE;
     1.6      } else {
     1.7 -        __vmwrite(GUEST_EFLAGS, v->arch.guest_context.user_regs.eflags);
     1.8 +        __vmwrite(GUEST_RFLAGS, v->arch.guest_context.user_regs.eflags);
     1.9          if (v->arch.guest_context.user_regs.eflags & EF_TF)
    1.10                  __vm_set_bit(EXCEPTION_BITMAP, EXCEPTION_BITMAP_DB);
    1.11          else 
     2.1 --- a/xen/arch/x86/vmx.c	Fri Jun 10 06:56:36 2005 +0000
     2.2 +++ b/xen/arch/x86/vmx.c	Fri Jun 10 07:04:18 2005 +0000
     2.3 @@ -114,8 +114,8 @@ static void inline __update_guest_eip(un
     2.4  {
     2.5      unsigned long current_eip;
     2.6  
     2.7 -    __vmread(GUEST_EIP, &current_eip);
     2.8 -    __vmwrite(GUEST_EIP, current_eip + inst_len);
     2.9 +    __vmread(GUEST_RIP, &current_eip);
    2.10 +    __vmwrite(GUEST_RIP, current_eip + inst_len);
    2.11  }
    2.12  
    2.13  
    2.14 @@ -128,7 +128,7 @@ static int vmx_do_page_fault(unsigned lo
    2.15  
    2.16  #if VMX_DEBUG
    2.17      {
    2.18 -        __vmread(GUEST_EIP, &eip);
    2.19 +        __vmread(GUEST_RIP, &eip);
    2.20          VMX_DBG_LOG(DBG_LEVEL_VMMU, 
    2.21                  "vmx_do_page_fault = 0x%lx, eip = %lx, error_code = %lx",
    2.22                  va, eip, (unsigned long)regs->error_code);
    2.23 @@ -152,7 +152,7 @@ static int vmx_do_page_fault(unsigned lo
    2.24  #if 0
    2.25      if ( !result )
    2.26      {
    2.27 -        __vmread(GUEST_EIP, &eip);
    2.28 +        __vmread(GUEST_RIP, &eip);
    2.29          printk("vmx pgfault to guest va=%p eip=%p\n", va, eip);
    2.30      }
    2.31  #endif
    2.32 @@ -180,7 +180,7 @@ static void vmx_do_general_protection_fa
    2.33      unsigned long eip, error_code;
    2.34      unsigned long intr_fields;
    2.35  
    2.36 -    __vmread(GUEST_EIP, &eip);
    2.37 +    __vmread(GUEST_RIP, &eip);
    2.38      __vmread(VM_EXIT_INTR_ERROR_CODE, &error_code);
    2.39  
    2.40      VMX_DBG_LOG(DBG_LEVEL_1,
    2.41 @@ -207,7 +207,7 @@ static void vmx_vmexit_do_cpuid(unsigned
    2.42      unsigned int eax, ebx, ecx, edx;
    2.43      unsigned long eip;
    2.44  
    2.45 -    __vmread(GUEST_EIP, &eip);
    2.46 +    __vmread(GUEST_RIP, &eip);
    2.47  
    2.48      VMX_DBG_LOG(DBG_LEVEL_1, 
    2.49                  "do_cpuid: (eax) %lx, (ebx) %lx, (ecx) %lx, (edx) %lx,"
    2.50 @@ -245,7 +245,7 @@ static void vmx_dr_access (unsigned long
    2.51      struct vcpu *v = current;
    2.52      unsigned long eip;
    2.53  
    2.54 -    __vmread(GUEST_EIP, &eip);
    2.55 +    __vmread(GUEST_RIP, &eip);
    2.56  
    2.57      reg = exit_qualification & DEBUG_REG_ACCESS_NUM;
    2.58  
    2.59 @@ -274,7 +274,7 @@ static void vmx_dr_access (unsigned long
    2.60              v->arch.guest_context.debugreg[reg] = *reg_p; 
    2.61          else {
    2.62              unsigned long value;
    2.63 -            __vmread(GUEST_ESP, &value);
    2.64 +            __vmread(GUEST_RSP, &value);
    2.65              v->arch.guest_context.debugreg[reg] = value;
    2.66          }
    2.67          break;
    2.68 @@ -282,7 +282,7 @@ static void vmx_dr_access (unsigned long
    2.69          if (reg != REG_ESP)
    2.70              *reg_p = v->arch.guest_context.debugreg[reg];
    2.71          else {
    2.72 -            __vmwrite(GUEST_ESP, v->arch.guest_context.debugreg[reg]);
    2.73 +            __vmwrite(GUEST_RSP, v->arch.guest_context.debugreg[reg]);
    2.74          }
    2.75          break;
    2.76      }
    2.77 @@ -297,7 +297,7 @@ static void vmx_vmexit_do_invlpg(unsigne
    2.78      unsigned long eip;
    2.79      struct vcpu *v = current;
    2.80  
    2.81 -    __vmread(GUEST_EIP, &eip);
    2.82 +    __vmread(GUEST_RIP, &eip);
    2.83  
    2.84      VMX_DBG_LOG(DBG_LEVEL_VMMU, "vmx_vmexit_do_invlpg: eip=%lx, va=%lx",
    2.85                  eip, va);
    2.86 @@ -368,9 +368,9 @@ static void vmx_io_instruction(struct cp
    2.87      unsigned long eip, cs, eflags;
    2.88      int vm86;
    2.89  
    2.90 -    __vmread(GUEST_EIP, &eip);
    2.91 +    __vmread(GUEST_RIP, &eip);
    2.92      __vmread(GUEST_CS_SELECTOR, &cs);
    2.93 -    __vmread(GUEST_EFLAGS, &eflags);
    2.94 +    __vmread(GUEST_RFLAGS, &eflags);
    2.95      vm86 = eflags & X86_EFLAGS_VM ? 1 : 0;
    2.96  
    2.97      VMX_DBG_LOG(DBG_LEVEL_1, 
    2.98 @@ -495,10 +495,10 @@ vmx_world_save(struct vcpu *d, struct vm
    2.99      int error = 0;
   2.100  
   2.101      error |= __vmread(INSTRUCTION_LEN, &inst_len);
   2.102 -    error |= __vmread(GUEST_EIP, &c->eip);
   2.103 +    error |= __vmread(GUEST_RIP, &c->eip);
   2.104      c->eip += inst_len; /* skip transition instruction */
   2.105 -    error |= __vmread(GUEST_ESP, &c->esp);
   2.106 -    error |= __vmread(GUEST_EFLAGS, &c->eflags);
   2.107 +    error |= __vmread(GUEST_RSP, &c->esp);
   2.108 +    error |= __vmread(GUEST_RFLAGS, &c->eflags);
   2.109  
   2.110      error |= __vmread(CR0_READ_SHADOW, &c->cr0);
   2.111      c->cr3 = d->arch.arch_vmx.cpu_cr3;
   2.112 @@ -559,9 +559,9 @@ vmx_world_restore(struct vcpu *d, struct
   2.113      unsigned long mfn, old_cr4;
   2.114      int error = 0;
   2.115  
   2.116 -    error |= __vmwrite(GUEST_EIP, c->eip);
   2.117 -    error |= __vmwrite(GUEST_ESP, c->esp);
   2.118 -    error |= __vmwrite(GUEST_EFLAGS, c->eflags);
   2.119 +    error |= __vmwrite(GUEST_RIP, c->eip);
   2.120 +    error |= __vmwrite(GUEST_RSP, c->esp);
   2.121 +    error |= __vmwrite(GUEST_RFLAGS, c->eflags);
   2.122  
   2.123      error |= __vmwrite(CR0_READ_SHADOW, c->cr0);
   2.124  
   2.125 @@ -783,25 +783,25 @@ static int vmx_set_cr0(unsigned long val
   2.126       * a partition disables the CR0.PE bit.
   2.127       */
   2.128      if ((value & X86_CR0_PE) == 0) {
   2.129 -	__vmread(GUEST_EIP, &eip);
   2.130 +	__vmread(GUEST_RIP, &eip);
   2.131  	VMX_DBG_LOG(DBG_LEVEL_1,
   2.132  	    "Disabling CR0.PE at %%eip 0x%lx\n", eip);
   2.133  	if (vmx_assist(d, VMX_ASSIST_INVOKE)) {
   2.134  	    set_bit(VMX_CPU_STATE_ASSIST_ENABLED, &d->arch.arch_vmx.cpu_state);
   2.135 -	    __vmread(GUEST_EIP, &eip);
   2.136 +	    __vmread(GUEST_RIP, &eip);
   2.137  	    VMX_DBG_LOG(DBG_LEVEL_1,
   2.138  		"Transfering control to vmxassist %%eip 0x%lx\n", eip);
   2.139  	    return 0; /* do not update eip! */
   2.140  	}
   2.141      } else if (test_bit(VMX_CPU_STATE_ASSIST_ENABLED,
   2.142  					&d->arch.arch_vmx.cpu_state)) {
   2.143 -	__vmread(GUEST_EIP, &eip);
   2.144 +	__vmread(GUEST_RIP, &eip);
   2.145  	VMX_DBG_LOG(DBG_LEVEL_1,
   2.146  	    "Enabling CR0.PE at %%eip 0x%lx\n", eip);
   2.147  	if (vmx_assist(d, VMX_ASSIST_RESTORE)) {
   2.148  	    clear_bit(VMX_CPU_STATE_ASSIST_ENABLED,
   2.149  					&d->arch.arch_vmx.cpu_state);
   2.150 -	    __vmread(GUEST_EIP, &eip);
   2.151 +	    __vmread(GUEST_RIP, &eip);
   2.152  	    VMX_DBG_LOG(DBG_LEVEL_1,
   2.153  		"Restoring to %%eip 0x%lx\n", eip);
   2.154  	    return 0; /* do not update eip! */
   2.155 @@ -832,7 +832,7 @@ static int mov_to_cr(int gp, int cr, str
   2.156          CASE_GET_REG(ESI, esi);
   2.157          CASE_GET_REG(EDI, edi);
   2.158      case REG_ESP:
   2.159 -        __vmread(GUEST_ESP, &value);
   2.160 +        __vmread(GUEST_RSP, &value);
   2.161          break;
   2.162      default:
   2.163          printk("invalid gp: %d\n", gp);
   2.164 @@ -953,7 +953,7 @@ static void mov_from_cr(int cr, int gp, 
   2.165          CASE_SET_REG(ESI, esi);
   2.166          CASE_SET_REG(EDI, edi);
   2.167      case REG_ESP:
   2.168 -        __vmwrite(GUEST_ESP, value);
   2.169 +        __vmwrite(GUEST_RSP, value);
   2.170          regs->esp = value;
   2.171          break;
   2.172      default:
   2.173 @@ -1025,7 +1025,7 @@ static inline void vmx_vmexit_do_hlt(voi
   2.174  {
   2.175  #if VMX_DEBUG
   2.176      unsigned long eip;
   2.177 -    __vmread(GUEST_EIP, &eip);
   2.178 +    __vmread(GUEST_RIP, &eip);
   2.179  #endif
   2.180      VMX_DBG_LOG(DBG_LEVEL_1, "vmx_vmexit_do_hlt:eip=%lx", eip);
   2.181      raise_softirq(SCHEDULE_SOFTIRQ);
   2.182 @@ -1035,7 +1035,7 @@ static inline void vmx_vmexit_do_mwait(v
   2.183  {
   2.184  #if VMX_DEBUG
   2.185      unsigned long eip;
   2.186 -    __vmread(GUEST_EIP, &eip);
   2.187 +    __vmread(GUEST_RIP, &eip);
   2.188  #endif
   2.189      VMX_DBG_LOG(DBG_LEVEL_1, "vmx_vmexit_do_mwait:eip=%lx", eip);
   2.190      raise_softirq(SCHEDULE_SOFTIRQ);
   2.191 @@ -1064,10 +1064,10 @@ static void vmx_print_line(const char c,
   2.192  void save_vmx_cpu_user_regs(struct cpu_user_regs *ctxt)
   2.193  {
   2.194      __vmread(GUEST_SS_SELECTOR, &ctxt->ss);
   2.195 -    __vmread(GUEST_ESP, &ctxt->esp);
   2.196 -    __vmread(GUEST_EFLAGS, &ctxt->eflags);
   2.197 +    __vmread(GUEST_RSP, &ctxt->esp);
   2.198 +    __vmread(GUEST_RFLAGS, &ctxt->eflags);
   2.199      __vmread(GUEST_CS_SELECTOR, &ctxt->cs);
   2.200 -    __vmread(GUEST_EIP, &ctxt->eip);
   2.201 +    __vmread(GUEST_RIP, &ctxt->eip);
   2.202  
   2.203      __vmread(GUEST_GS_SELECTOR, &ctxt->gs);
   2.204      __vmread(GUEST_FS_SELECTOR, &ctxt->fs);
   2.205 @@ -1079,10 +1079,10 @@ void save_vmx_cpu_user_regs(struct cpu_u
   2.206  void save_cpu_user_regs(struct cpu_user_regs *regs)
   2.207  {
   2.208      __vmread(GUEST_SS_SELECTOR, &regs->xss);
   2.209 -    __vmread(GUEST_ESP, &regs->esp);
   2.210 -    __vmread(GUEST_EFLAGS, &regs->eflags);
   2.211 +    __vmread(GUEST_RSP, &regs->esp);
   2.212 +    __vmread(GUEST_RFLAGS, &regs->eflags);
   2.213      __vmread(GUEST_CS_SELECTOR, &regs->xcs);
   2.214 -    __vmread(GUEST_EIP, &regs->eip);
   2.215 +    __vmread(GUEST_RIP, &regs->eip);
   2.216  
   2.217      __vmread(GUEST_GS_SELECTOR, &regs->xgs);
   2.218      __vmread(GUEST_FS_SELECTOR, &regs->xfs);
   2.219 @@ -1093,10 +1093,10 @@ void save_cpu_user_regs(struct cpu_user_
   2.220  void restore_cpu_user_regs(struct cpu_user_regs *regs)
   2.221  {
   2.222      __vmwrite(GUEST_SS_SELECTOR, regs->xss);
   2.223 -    __vmwrite(GUEST_ESP, regs->esp);
   2.224 -    __vmwrite(GUEST_EFLAGS, regs->eflags);
   2.225 +    __vmwrite(GUEST_RSP, regs->esp);
   2.226 +    __vmwrite(GUEST_RFLAGS, regs->eflags);
   2.227      __vmwrite(GUEST_CS_SELECTOR, regs->xcs);
   2.228 -    __vmwrite(GUEST_EIP, regs->eip);
   2.229 +    __vmwrite(GUEST_RIP, regs->eip);
   2.230  
   2.231      __vmwrite(GUEST_GS_SELECTOR, regs->xgs);
   2.232      __vmwrite(GUEST_FS_SELECTOR, regs->xfs);
   2.233 @@ -1142,7 +1142,7 @@ asmlinkage void vmx_vmexit_handler(struc
   2.234          return;
   2.235      }
   2.236  
   2.237 -    __vmread(GUEST_EIP, &eip);
   2.238 +    __vmread(GUEST_RIP, &eip);
   2.239      TRACE_3D(TRC_VMX_VMEXIT, v->domain->domain_id, eip, exit_reason);
   2.240  
   2.241      switch (exit_reason) {
   2.242 @@ -1296,7 +1296,7 @@ asmlinkage void vmx_vmexit_handler(struc
   2.243      }
   2.244      case EXIT_REASON_VMCALL:
   2.245          __get_instruction_length(inst_len);
   2.246 -        __vmread(GUEST_EIP, &eip);
   2.247 +        __vmread(GUEST_RIP, &eip);
   2.248          __vmread(EXIT_QUALIFICATION, &exit_qualification);
   2.249  
   2.250          vmx_print_line(regs.eax, v); /* provides the current domain */
   2.251 @@ -1304,7 +1304,7 @@ asmlinkage void vmx_vmexit_handler(struc
   2.252          break;
   2.253      case EXIT_REASON_CR_ACCESS:
   2.254      {
   2.255 -        __vmread(GUEST_EIP, &eip);
   2.256 +        __vmread(GUEST_RIP, &eip);
   2.257          __get_instruction_length(inst_len);
   2.258          __vmread(EXIT_QUALIFICATION, &exit_qualification);
   2.259  
   2.260 @@ -1331,7 +1331,7 @@ asmlinkage void vmx_vmexit_handler(struc
   2.261          __update_guest_eip(inst_len);
   2.262          break;
   2.263      case EXIT_REASON_MSR_WRITE:
   2.264 -        __vmread(GUEST_EIP, &eip);
   2.265 +        __vmread(GUEST_RIP, &eip);
   2.266          VMX_DBG_LOG(DBG_LEVEL_1, "MSR_WRITE: eip=%lx, eax=%lx, edx=%lx",
   2.267                  eip, (unsigned long)regs.eax, (unsigned long)regs.edx);
   2.268          /* just ignore this point */
     3.1 --- a/xen/arch/x86/vmx_io.c	Fri Jun 10 06:56:36 2005 +0000
     3.2 +++ b/xen/arch/x86/vmx_io.c	Fri Jun 10 07:04:18 2005 +0000
     3.3 @@ -42,10 +42,10 @@ static void load_cpu_user_regs(struct cp
     3.4       * Write the guest register value into VMCS
     3.5       */
     3.6      __vmwrite(GUEST_SS_SELECTOR, regs->ss);
     3.7 -    __vmwrite(GUEST_ESP, regs->esp);
     3.8 -    __vmwrite(GUEST_EFLAGS, regs->eflags);
     3.9 +    __vmwrite(GUEST_RSP, regs->esp);
    3.10 +    __vmwrite(GUEST_RFLAGS, regs->eflags);
    3.11      __vmwrite(GUEST_CS_SELECTOR, regs->cs);
    3.12 -    __vmwrite(GUEST_EIP, regs->eip);
    3.13 +    __vmwrite(GUEST_RIP, regs->eip);
    3.14  }
    3.15  
    3.16  static void set_reg_value (int size, int index, int seg, struct cpu_user_regs *regs, long value)
    3.17 @@ -439,7 +439,7 @@ void vmx_intr_assist(struct vcpu *d)
    3.18          return;
    3.19      }
    3.20  
    3.21 -    __vmread(GUEST_EFLAGS, &eflags);
    3.22 +    __vmread(GUEST_RFLAGS, &eflags);
    3.23      if (irq_masked(eflags)) {
    3.24          VMX_DBG_LOG(DBG_LEVEL_1, "guesting pending: %x, eflags: %lx",
    3.25                      highest_vector, eflags);
    3.26 @@ -479,7 +479,7 @@ void vmx_do_resume(struct vcpu *d)
    3.27          __vmwrite(GUEST_CR3, pagetable_get_paddr(d->domain->arch.phys_table));
    3.28  
    3.29      __vmwrite(HOST_CR3, pagetable_get_paddr(d->arch.monitor_table));
    3.30 -    __vmwrite(HOST_ESP, (unsigned long)get_stack_bottom());
    3.31 +    __vmwrite(HOST_RSP, (unsigned long)get_stack_bottom());
    3.32  
    3.33      if (event_pending(d)) {
    3.34          vmx_check_events(d);
     4.1 --- a/xen/arch/x86/vmx_platform.c	Fri Jun 10 06:56:36 2005 +0000
     4.2 +++ b/xen/arch/x86/vmx_platform.c	Fri Jun 10 07:04:18 2005 +0000
     4.3 @@ -52,12 +52,12 @@ static long get_reg_value(int size, int 
     4.4  void store_cpu_user_regs(struct cpu_user_regs *regs)
     4.5  {
     4.6      __vmread(GUEST_SS_SELECTOR, &regs->ss);
     4.7 -    __vmread(GUEST_ESP, &regs->esp);
     4.8 -    __vmread(GUEST_EFLAGS, &regs->eflags);
     4.9 +    __vmread(GUEST_RSP, &regs->esp);
    4.10 +    __vmread(GUEST_RFLAGS, &regs->eflags);
    4.11      __vmread(GUEST_CS_SELECTOR, &regs->cs);
    4.12      __vmread(GUEST_DS_SELECTOR, &regs->ds);
    4.13      __vmread(GUEST_ES_SELECTOR, &regs->es);
    4.14 -    __vmread(GUEST_EIP, &regs->eip);
    4.15 +    __vmread(GUEST_RIP, &regs->eip);
    4.16  }
    4.17  
    4.18  static long get_reg_value(int size, int index, int seg, struct cpu_user_regs *regs)
    4.19 @@ -238,7 +238,7 @@ static int vmx_decode(const unsigned cha
    4.20      unsigned long eflags;
    4.21      int index, vm86 = 0;
    4.22  
    4.23 -    __vmread(GUEST_EFLAGS, &eflags);
    4.24 +    __vmread(GUEST_RFLAGS, &eflags);
    4.25      if (eflags & X86_EFLAGS_VM)
    4.26  	vm86 = 1;
    4.27  
    4.28 @@ -551,10 +551,10 @@ void handle_mmio(unsigned long va, unsig
    4.29      mpci_p = &current->arch.arch_vmx.vmx_platform.mpci;
    4.30      inst_decoder_regs = mpci_p->inst_decoder_regs;
    4.31  
    4.32 -    __vmread(GUEST_EIP, &eip);
    4.33 +    __vmread(GUEST_RIP, &eip);
    4.34      __vmread(INSTRUCTION_LEN, &inst_len);
    4.35  
    4.36 -    __vmread(GUEST_EFLAGS, &eflags);
    4.37 +    __vmread(GUEST_RFLAGS, &eflags);
    4.38      vm86 = eflags & X86_EFLAGS_VM;
    4.39  
    4.40      if (vm86) {
    4.41 @@ -583,7 +583,7 @@ void handle_mmio(unsigned long va, unsig
    4.42      if (vmx_decode(check_prefix(inst, &mmio_inst), &mmio_inst) == DECODE_failure)
    4.43          domain_crash_synchronous();
    4.44  
    4.45 -    __vmwrite(GUEST_EIP, eip + inst_len);
    4.46 +    __vmwrite(GUEST_RIP, eip + inst_len);
    4.47      store_cpu_user_regs(inst_decoder_regs);
    4.48  
    4.49      // Only handle "mov" and "movs" instructions!
     5.1 --- a/xen/arch/x86/vmx_vmcs.c	Fri Jun 10 06:56:36 2005 +0000
     5.2 +++ b/xen/arch/x86/vmx_vmcs.c	Fri Jun 10 07:04:18 2005 +0000
     5.3 @@ -199,7 +199,7 @@ void vmx_do_launch(struct vcpu *v)
     5.4  
     5.5      __vmwrite(GUEST_CR3, pagetable_get_paddr(v->arch.guest_table));
     5.6      __vmwrite(HOST_CR3, pagetable_get_paddr(v->arch.monitor_table));
     5.7 -    __vmwrite(HOST_ESP, (unsigned long)get_stack_bottom());
     5.8 +    __vmwrite(HOST_RSP, (unsigned long)get_stack_bottom());
     5.9  
    5.10      v->arch.schedule_tail = arch_vmx_do_resume;
    5.11  }
    5.12 @@ -308,19 +308,19 @@ construct_init_vmcs_guest(struct cpu_use
    5.13      error |= __vmwrite(GUEST_GS_BASE, host_env->ds_base);
    5.14      error |= __vmwrite(GUEST_IDTR_BASE, host_env->idtr_base);
    5.15  
    5.16 -    error |= __vmwrite(GUEST_ESP, regs->esp);
    5.17 -    error |= __vmwrite(GUEST_EIP, regs->eip);
    5.18 +    error |= __vmwrite(GUEST_RSP, regs->esp);
    5.19 +    error |= __vmwrite(GUEST_RIP, regs->eip);
    5.20  
    5.21      eflags = regs->eflags & ~VMCS_EFLAGS_RESERVED_0; /* clear 0s */
    5.22      eflags |= VMCS_EFLAGS_RESERVED_1; /* set 1s */
    5.23  
    5.24 -    error |= __vmwrite(GUEST_EFLAGS, eflags);
    5.25 +    error |= __vmwrite(GUEST_RFLAGS, eflags);
    5.26  
    5.27      error |= __vmwrite(GUEST_INTERRUPTIBILITY_INFO, 0);
    5.28      __asm__ __volatile__ ("mov %%dr7, %0\n" : "=r" (dr7));
    5.29      error |= __vmwrite(GUEST_DR7, dr7);
    5.30 -    error |= __vmwrite(GUEST_VMCS0, 0xffffffff);
    5.31 -    error |= __vmwrite(GUEST_VMCS1, 0xffffffff);
    5.32 +    error |= __vmwrite(VMCS_LINK_POINTER, 0xffffffff);
    5.33 +    error |= __vmwrite(VMCS_LINK_POINTER_HIGH, 0xffffffff);
    5.34  
    5.35      return error;
    5.36  }
    5.37 @@ -362,7 +362,7 @@ static inline int construct_vmcs_host(st
    5.38      __asm__ __volatile__ ("mov %%cr4,%0" : "=r" (crn) : ); 
    5.39      host_env->cr4 = crn;
    5.40      error |= __vmwrite(HOST_CR4, crn);
    5.41 -    error |= __vmwrite(HOST_EIP, (unsigned long) vmx_asm_vmexit_handler);
    5.42 +    error |= __vmwrite(HOST_RIP, (unsigned long) vmx_asm_vmexit_handler);
    5.43  
    5.44      return error;
    5.45  }
     6.1 --- a/xen/arch/x86/x86_32/traps.c	Fri Jun 10 06:56:36 2005 +0000
     6.2 +++ b/xen/arch/x86/x86_32/traps.c	Fri Jun 10 07:04:18 2005 +0000
     6.3 @@ -21,9 +21,9 @@ void show_registers(struct cpu_user_regs
     6.4  
     6.5      if ( VMX_DOMAIN(current) && (regs->eflags == 0) )
     6.6      {
     6.7 -        __vmread(GUEST_EIP, &eip);
     6.8 -        __vmread(GUEST_ESP, &esp);
     6.9 -        __vmread(GUEST_EFLAGS, &eflags);
    6.10 +        __vmread(GUEST_RIP, &eip);
    6.11 +        __vmread(GUEST_RSP, &esp);
    6.12 +        __vmread(GUEST_RFLAGS, &eflags);
    6.13          __vmread(GUEST_SS_SELECTOR, &ss);
    6.14          __vmread(GUEST_DS_SELECTOR, &ds);
    6.15          __vmread(GUEST_ES_SELECTOR, &es);
     7.1 --- a/xen/include/asm-x86/vmx.h	Fri Jun 10 06:56:36 2005 +0000
     7.2 +++ b/xen/include/asm-x86/vmx.h	Fri Jun 10 07:04:18 2005 +0000
     7.3 @@ -41,11 +41,36 @@ extern unsigned int cpu_rev;
     7.4   * Need fill bits for SENTER
     7.5   */
     7.6  
     7.7 -#define MONITOR_PIN_BASED_EXEC_CONTROLS         0x0000001f      
     7.8 -#define MONITOR_CPU_BASED_EXEC_CONTROLS         0x0581e7f2
     7.9 -#define MONITOR_VM_EXIT_CONTROLS                0x0003edff
    7.10 -#define MONITOR_VM_ENTRY_CONTROLS               0x000011ff
    7.11 +#define MONITOR_PIN_BASED_EXEC_CONTROLS_RESERVED_VALUE         0x00000016
    7.12 +
    7.13 +#define MONITOR_PIN_BASED_EXEC_CONTROLS       \
    7.14 +    MONITOR_PIN_BASED_EXEC_CONTROLS_RESERVED_VALUE |   \
    7.15 +    PIN_BASED_EXT_INTR_MASK |   \
    7.16 +    PIN_BASED_NMI_EXITING
    7.17 +
    7.18 +#define MONITOR_CPU_BASED_EXEC_CONTROLS_RESERVED_VALUE         0x0401e172
    7.19  
    7.20 +#define MONITOR_CPU_BASED_EXEC_CONTROLS \
    7.21 +    MONITOR_CPU_BASED_EXEC_CONTROLS_RESERVED_VALUE |    \
    7.22 +    CPU_BASED_HLT_EXITING | \
    7.23 +    CPU_BASED_INVDPG_EXITING | \
    7.24 +    CPU_BASED_MWAIT_EXITING | \
    7.25 +    CPU_BASED_MOV_DR_EXITING | \
    7.26 +    CPU_BASED_UNCOND_IO_EXITING | \
    7.27 +    CPU_BASED_CR8_LOAD_EXITING | \
    7.28 +    CPU_BASED_CR8_STORE_EXITING
    7.29 +
    7.30 +#define MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE                0x0003edff
    7.31 +
    7.32 +#define VM_EXIT_CONTROLS_IA_32E_MODE		0x00000200
    7.33 +
    7.34 +#define MONITOR_VM_EXIT_CONTROLS                \
    7.35 +    MONITOR_VM_EXIT_CONTROLS_RESERVED_VALUE |\
    7.36 +    VM_EXIT_ACK_INTR_ON_EXIT
    7.37 +
    7.38 +#define VM_ENTRY_CONTROLS_RESERVED_VALUE        0x000011ff
    7.39 +#define VM_ENTRY_CONTROLS_IA_32E_MODE           0x00000200
    7.40 +#define MONITOR_VM_ENTRY_CONTROLS       VM_ENTRY_CONTROLS_RESERVED_VALUE 
    7.41  /*
    7.42   * Exit Reasons
    7.43   */
    7.44 @@ -91,7 +116,8 @@ extern unsigned int cpu_rev;
    7.45  #define TYPE_MOV_FROM_CR                (1 << 4)
    7.46  #define TYPE_CLTS                       (2 << 4)
    7.47  #define	TYPE_LMSW			(3 << 4)
    7.48 -#define CONTROL_REG_ACCESS_REG          0x700   /* 10:8, general purpose register */
    7.49 +#define CONTROL_REG_ACCESS_REG          0xf00   /* 10:8, general purpose register */
    7.50 +#define	LMSW_SOURCE_DATA		(0xFFFF << 16) /* 16:31 lmsw source */
    7.51  #define REG_EAX                         (0 << 8) 
    7.52  #define REG_ECX                         (1 << 8) 
    7.53  #define REG_EDX                         (2 << 8) 
    7.54 @@ -100,7 +126,14 @@ extern unsigned int cpu_rev;
    7.55  #define REG_EBP                         (5 << 8) 
    7.56  #define REG_ESI                         (6 << 8) 
    7.57  #define REG_EDI                         (7 << 8) 
    7.58 -#define	LMSW_SOURCE_DATA		(0xFFFF << 16) /* 16:31 lmsw source */
    7.59 +#define REG_R8                         (8 << 8)
    7.60 +#define REG_R9                         (9 << 8)
    7.61 +#define REG_R10                        (10 << 8)
    7.62 +#define REG_R11                        (11 << 8)
    7.63 +#define REG_R12                        (12 << 8)
    7.64 +#define REG_R13                        (13 << 8)
    7.65 +#define REG_R14                        (14 << 8)
    7.66 +#define REG_R15                        (15 << 8)
    7.67  
    7.68  /*
    7.69   * Exit Qualifications for MOV for Debug Register Access
    7.70 @@ -109,7 +142,7 @@ extern unsigned int cpu_rev;
    7.71  #define DEBUG_REG_ACCESS_TYPE           0x10    /* 4, direction of access */
    7.72  #define TYPE_MOV_TO_DR                  (0 << 4) 
    7.73  #define TYPE_MOV_FROM_DR                (1 << 4)
    7.74 -#define DEBUG_REG_ACCESS_REG            0x700   /* 11:8, general purpose register */
    7.75 +#define DEBUG_REG_ACCESS_REG            0xf00   /* 11:8, general purpose register */
    7.76   
    7.77  #define EXCEPTION_BITMAP_DE     (1 << 0)        /* Divide Error */
    7.78  #define EXCEPTION_BITMAP_DB     (1 << 1)        /* Debug */
     8.1 --- a/xen/include/asm-x86/vmx_vmcs.h	Fri Jun 10 06:56:36 2005 +0000
     8.2 +++ b/xen/include/asm-x86/vmx_vmcs.h	Fri Jun 10 07:04:18 2005 +0000
     8.3 @@ -29,11 +29,36 @@ extern void stop_vmx(void);
     8.4  
     8.5  void vmx_enter_scheduler(void);
     8.6  
     8.7 -#define	VMX_CPU_STATE_ASSIST_ENABLED	1
     8.8 +enum {
     8.9 +    VMX_CPU_STATE_PG_ENABLED=0,
    8.10 +    VMX_CPU_STATE_PAE_ENABLED,
    8.11 +    VMX_CPU_STATE_LME_ENABLED,
    8.12 +    VMX_CPU_STATE_LMA_ENABLED,
    8.13 +    VMX_CPU_STATE_ASSIST_ENABLED,
    8.14 +};
    8.15 +
    8.16 +#define VMX_LONG_GUEST(ed)    \
    8.17 +  (test_bit(VMX_CPU_STATE_LMA_ENABLED, &ed->arch.arch_vmx.cpu_state))
    8.18  
    8.19  struct vmcs_struct {
    8.20      u32 vmcs_revision_id;
    8.21 -    unsigned char data [0x1000 - sizeof (u32)];
    8.22 +    unsigned char data [0]; /* vmcs size is read from MSR */
    8.23 +};
    8.24 +
    8.25 +enum { 
    8.26 +    VMX_INDEX_MSR_LSTAR = 0,
    8.27 +    VMX_INDEX_MSR_STAR,
    8.28 +    VMX_INDEX_MSR_CSTAR,
    8.29 +    VMX_INDEX_MSR_SYSCALL_MASK,
    8.30 +    VMX_INDEX_MSR_EFER,
    8.31 +
    8.32 +    VMX_MSR_COUNT,
    8.33 +};
    8.34 +
    8.35 +struct msr_state{
    8.36 +    unsigned long flags;
    8.37 +    unsigned long msr_items[VMX_MSR_COUNT];
    8.38 +    unsigned long shadow_gs;
    8.39  };
    8.40  
    8.41  struct arch_vmx_struct {
    8.42 @@ -42,6 +67,7 @@ struct arch_vmx_struct {
    8.43      unsigned long           cpu_cr2; /* save CR2 */
    8.44      unsigned long           cpu_cr3;
    8.45      unsigned long           cpu_state;
    8.46 +    struct msr_state        msr_content;
    8.47      struct virutal_platform_def     vmx_platform; 
    8.48  };
    8.49  
    8.50 @@ -69,11 +95,34 @@ int  construct_vmcs(struct arch_vmx_stru
    8.51  #define VMCS_USE_HOST_ENV       1
    8.52  #define VMCS_USE_SEPARATE_ENV   0
    8.53  
    8.54 +/* this works for both 32bit & 64bit eflags filteration done in construct_init_vmcs_guest() */
    8.55  #define VMCS_EFLAGS_RESERVED_0          0xffc08028 /* bitmap for 0 */
    8.56  #define VMCS_EFLAGS_RESERVED_1          0x00000002 /* bitmap for 1 */
    8.57  
    8.58  extern int vmcs_version;
    8.59  
    8.60 +#define CPU_BASED_VIRTUAL_INTR_PENDING  0x00000004
    8.61 +#define CPU_BASED_USE_TSC_OFFSETING     0x00000008
    8.62 +#define CPU_BASED_HLT_EXITING           0x00000080
    8.63 +#define CPU_BASED_INVDPG_EXITING        0x00000200
    8.64 +#define CPU_BASED_MWAIT_EXITING         0x00000400
    8.65 +#define CPU_BASED_RDPMC_EXITING         0x00000800
    8.66 +#define CPU_BASED_RDTSC_EXITING         0x00001000
    8.67 +#define CPU_BASED_CR8_LOAD_EXITING      0x00080000
    8.68 +#define CPU_BASED_CR8_STORE_EXITING     0x00100000
    8.69 +#define CPU_BASED_TPR_SHADOW            0x00200000
    8.70 +#define CPU_BASED_MOV_DR_EXITING        0x00800000
    8.71 +#define CPU_BASED_UNCOND_IO_EXITING     0x01000000
    8.72 +#define CPU_BASED_ACTIVATE_IO_BITMAP    0x02000000
    8.73 +#define CPU_BASED_MONITOR_EXITING       0x20000000
    8.74 +#define CPU_BASED_PAUSE_EXITING         0x40000000
    8.75 +#define PIN_BASED_EXT_INTR_MASK 0x1
    8.76 +#define PIN_BASED_NMI_EXITING   0x8
    8.77 +
    8.78 +#define VM_EXIT_ACK_INTR_ON_EXIT        0x00008000
    8.79 +#define VM_EXIT_HOST_ADD_SPACE_SIZE     0x00000200
    8.80 +
    8.81 +
    8.82  /* VMCS Encordings */
    8.83  enum vmcs_field {
    8.84      GUEST_ES_SELECTOR               = 0x00000800,
    8.85 @@ -92,14 +141,23 @@ enum vmcs_field {
    8.86      HOST_GS_SELECTOR                = 0x00000c0a,
    8.87      HOST_TR_SELECTOR                = 0x00000c0c,
    8.88      IO_BITMAP_A                     = 0x00002000, 
    8.89 +    IO_BITMAP_A_HIGH                = 0x00002001, 
    8.90      IO_BITMAP_B                     = 0x00002002, 
    8.91 +    IO_BITMAP_B_HIGH                = 0x00002003, 
    8.92      VM_EXIT_MSR_STORE_ADDR          = 0x00002006,
    8.93 +    VM_EXIT_MSR_STORE_ADDR_HIGH     = 0x00002007,
    8.94      VM_EXIT_MSR_LOAD_ADDR           = 0x00002008,
    8.95 +    VM_EXIT_MSR_LOAD_ADDR_HIGH      = 0x00002009,
    8.96      VM_ENTRY_MSR_LOAD_ADDR          = 0x0000200a,
    8.97 +    VM_ENTRY_MSR_LOAD_ADDR_HIGH     = 0x0000200b,
    8.98      TSC_OFFSET                      = 0x00002010,
    8.99 -    GUEST_VMCS0                     = 0x00002800,
   8.100 -    GUEST_VMCS1                     = 0x00002801,
   8.101 +    TSC_OFFSET_HIGH                 = 0x00002011,
   8.102 +    VIRTUAL_APIC_PAGE_ADDR          = 0x00002012,
   8.103 +    VIRTUAL_APIC_PAGE_ADDR_HIGH     = 0x00002013,
   8.104 +    VMCS_LINK_POINTER               = 0x00002800,
   8.105 +    VMCS_LINK_POINTER_HIGH          = 0x00002801,
   8.106      GUEST_IA32_DEBUGCTL             = 0x00002802,
   8.107 +    GUEST_IA32_DEBUGCTL_HIGH        = 0x00002803,
   8.108      PIN_BASED_VM_EXEC_CONTROL       = 0x00004000,
   8.109      CPU_BASED_VM_EXEC_CONTROL       = 0x00004002,   
   8.110      EXCEPTION_BITMAP                = 0x00004004,
   8.111 @@ -113,12 +171,17 @@ enum vmcs_field {
   8.112      VM_ENTRY_MSR_LOAD_COUNT         = 0x00004014,
   8.113      VM_ENTRY_INTR_INFO_FIELD        = 0x00004016,
   8.114      VM_ENTRY_EXCEPTION_ERROR_CODE   = 0x00004018,
   8.115 +    VM_ENTRY_INSTRUCTION_LENGTH     = 0x0000401a,
   8.116 +    TPR_THRESHOLD                   = 0x0000401c,
   8.117 +    SECONDARY_VM_EXEC_CONTROL       = 0x0000401e,
   8.118 +    VM_INSTRUCTION_ERROR            = 0x00004400,
   8.119      VM_EXIT_REASON                  = 0x00004402,
   8.120      VM_EXIT_INTR_INFO               = 0x00004404,   
   8.121      VM_EXIT_INTR_ERROR_CODE         = 0x00004406,
   8.122      IDT_VECTORING_INFO_FIELD        = 0x00004408,
   8.123      IDT_VECTORING_ERROR_CODE        = 0x0000440a,
   8.124      INSTRUCTION_LEN                 = 0x0000440c,
   8.125 +    VMX_INSTRUCTION_INFO            = 0x0000440e,
   8.126      GUEST_ES_LIMIT                  = 0x00004800,
   8.127      GUEST_CS_LIMIT                  = 0x00004802,
   8.128      GUEST_SS_LIMIT                  = 0x00004804,
   8.129 @@ -138,14 +201,18 @@ enum vmcs_field {
   8.130      GUEST_LDTR_AR_BYTES             = 0x00004820,
   8.131      GUEST_TR_AR_BYTES               = 0x00004822,
   8.132      GUEST_INTERRUPTIBILITY_INFO     = 0x00004824,
   8.133 +    GUEST_SYSENTER_CS               = 0x0000482A,
   8.134 +    HOST_IA32_SYSENTER_CS           = 0x00004c00,
   8.135      CR0_GUEST_HOST_MASK             = 0x00006000,
   8.136      CR4_GUEST_HOST_MASK             = 0x00006002,
   8.137      CR0_READ_SHADOW                 = 0x00006004,
   8.138      CR4_READ_SHADOW                 = 0x00006006,
   8.139 -    CR3_TARGET_VALUES               = 0x00006008, 
   8.140 -    CR3_GUEST_HOST_MASK             = 0x00006208,
   8.141 +    CR3_TARGET_VALUE0               = 0x00006008, 
   8.142 +    CR3_TARGET_VALUE1               = 0x0000600a, 
   8.143 +    CR3_TARGET_VALUE2               = 0x0000600c, 
   8.144 +    CR3_TARGET_VALUE3               = 0x0000600e, 
   8.145      EXIT_QUALIFICATION              = 0x00006400,
   8.146 -    GUEST_LINEAR_ADDRESS	    = 0x0000640A,
   8.147 +    GUEST_LINEAR_ADDRESS            = 0x0000640a,
   8.148      GUEST_CR0                       = 0x00006800,
   8.149      GUEST_CR3                       = 0x00006802,
   8.150      GUEST_CR4                       = 0x00006804,
   8.151 @@ -160,10 +227,12 @@ enum vmcs_field {
   8.152      GUEST_GDTR_BASE                 = 0x00006816,    
   8.153      GUEST_IDTR_BASE                 = 0x00006818,
   8.154      GUEST_DR7                       = 0x0000681a,
   8.155 -    GUEST_ESP                       = 0x0000681c,
   8.156 -    GUEST_EIP                       = 0x0000681e,
   8.157 -    GUEST_EFLAGS                    = 0x00006820,
   8.158 +    GUEST_RSP                       = 0x0000681c,
   8.159 +    GUEST_RIP                       = 0x0000681e,
   8.160 +    GUEST_RFLAGS                    = 0x00006820,
   8.161      GUEST_PENDING_DBG_EXCEPTIONS    = 0x00006822,
   8.162 +    GUEST_SYSENTER_ESP              = 0x00006824,
   8.163 +    GUEST_SYSENTER_EIP              = 0x00006826,
   8.164      HOST_CR0                        = 0x00006c00,
   8.165      HOST_CR3                        = 0x00006c02,
   8.166      HOST_CR4                        = 0x00006c04,
   8.167 @@ -172,8 +241,10 @@ enum vmcs_field {
   8.168      HOST_TR_BASE                    = 0x00006c0a,
   8.169      HOST_GDTR_BASE                  = 0x00006c0c,
   8.170      HOST_IDTR_BASE                  = 0x00006c0e,
   8.171 -    HOST_ESP                        = 0x00006c14,
   8.172 -    HOST_EIP                        = 0x00006c16,
   8.173 +    HOST_IA32_SYSENTER_ESP          = 0x00006c10,
   8.174 +    HOST_IA32_SYSENTER_EIP          = 0x00006c12,
   8.175 +    HOST_RSP                        = 0x00006c14,
   8.176 +    HOST_RIP                        = 0x00006c16,
   8.177  };
   8.178  
   8.179  #define VMX_DEBUG 1