ia64/xen-unstable

changeset 9407:27050b1390cf

[IA64] Make sharedinfo and shared_archinfo adjacent

Move SHAREDINFO_ADDR and SHARED_ARCHINFO_ADDR to be adjacent, which
makes easier to access two areas by offset into same base.

Also remove duplicated XSI_ definitions in asm-offsets.c.

Signed-off-by: Kevin Tian <kevin.tian@intel.com>
author awilliam@xenbuild.aw
date Mon Mar 27 15:35:31 2006 -0700 (2006-03-27)
parents 0d4a846232cc
children 7e3cbc409676
files xen/arch/ia64/Makefile xen/arch/ia64/asm-offsets.c xen/arch/ia64/asm-xsi-offsets.c xen/arch/ia64/xen/domain.c xen/arch/ia64/xen/hyperprivop.S xen/include/asm-ia64/offsets.h xen/include/asm-ia64/xensystem.h
line diff
     1.1 --- a/xen/arch/ia64/Makefile	Mon Mar 27 15:34:02 2006 -0700
     1.2 +++ b/xen/arch/ia64/Makefile	Mon Mar 27 15:35:31 2006 -0700
     1.3 @@ -70,6 +70,8 @@ asm-xsi-offsets.s: asm-xsi-offsets.c $(H
     1.4  # Solve circular reference on asm-offsets.h
     1.5  	[ -f $(BASEDIR)/include/asm-ia64/asm-offsets.h ] \
     1.6  	 || echo "#define IA64_TASK_SIZE 0" > $(BASEDIR)/include/asm-ia64/asm-offsets.h
     1.7 +	[ -f $(BASEDIR)/include/asm-ia64/asm-xsi-offsets.h ] \
     1.8 +	 || touch $(BASEDIR)/include/asm-ia64/asm-xsi-offsets.h
     1.9  #Bad hack. Force asm-offsets.h out-of-date
    1.10  	 sleep 1
    1.11  	 touch $@
     2.1 --- a/xen/arch/ia64/asm-offsets.c	Mon Mar 27 15:34:02 2006 -0700
     2.2 +++ b/xen/arch/ia64/asm-offsets.c	Mon Mar 27 15:35:31 2006 -0700
     2.3 @@ -41,38 +41,6 @@ void foo(void)
     2.4  
     2.5  	BLANK();
     2.6  
     2.7 -	DEFINE(XSI_PSR_IC_OFS, offsetof(mapped_regs_t, interrupt_collection_enabled));
     2.8 -	DEFINE(XSI_PSR_IC, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, interrupt_collection_enabled)));
     2.9 -	DEFINE(XSI_PSR_I_OFS, offsetof(mapped_regs_t, interrupt_delivery_enabled));
    2.10 -	DEFINE(XSI_IIP_OFS, offsetof(mapped_regs_t, iip));
    2.11 -	DEFINE(XSI_IIP, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iip)));
    2.12 -	DEFINE(XSI_IFA_OFS, offsetof(mapped_regs_t, ifa));
    2.13 -	DEFINE(XSI_IFA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifa)));
    2.14 -	DEFINE(XSI_ITIR_OFS, offsetof(mapped_regs_t, itir));
    2.15 -	DEFINE(XSI_ITIR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, itir)));
    2.16 -
    2.17 -	DEFINE(XSI_IPSR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ipsr)));
    2.18 -	DEFINE(XSI_IPSR_OFS, offsetof(mapped_regs_t, ipsr));
    2.19 -	DEFINE(XSI_IFS_OFS, offsetof(mapped_regs_t, ifs));
    2.20 -	DEFINE(XSI_IFS, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifs)));
    2.21 -	DEFINE(XSI_ISR_OFS, offsetof(mapped_regs_t, isr));
    2.22 -	DEFINE(XSI_IIM_OFS, offsetof(mapped_regs_t, iim));
    2.23 -	DEFINE(XSI_BANKNUM_OFS, offsetof(mapped_regs_t, banknum));
    2.24 -	DEFINE(XSI_BANK0_OFS, offsetof(mapped_regs_t, bank0_regs[0]));
    2.25 -	DEFINE(XSI_BANK1_OFS, offsetof(mapped_regs_t, bank1_regs[0]));
    2.26 -	DEFINE(XSI_B0NATS_OFS, offsetof(mapped_regs_t, vbnat));
    2.27 -	DEFINE(XSI_B1NATS_OFS, offsetof(mapped_regs_t, vnat));
    2.28 -	DEFINE(XSI_RR0_OFS, offsetof(mapped_regs_t, rrs[0]));
    2.29 -	DEFINE(XSI_METAPHYS_OFS, offsetof(mapped_regs_t, metaphysical_mode));
    2.30 -	DEFINE(XSI_PRECOVER_IFS_OFS, offsetof(mapped_regs_t, precover_ifs));
    2.31 -	DEFINE(XSI_INCOMPL_REG_OFS, offsetof(mapped_regs_t, incomplete_regframe));
    2.32 -	DEFINE(XSI_PEND_OFS, offsetof(mapped_regs_t, pending_interruption));
    2.33 -	DEFINE(XSI_RR0_OFS, offsetof(mapped_regs_t, rrs[0]));
    2.34 -	DEFINE(XSI_IHA_OFS, offsetof(mapped_regs_t, iha));
    2.35 -	DEFINE(XSI_TPR_OFS, offsetof(mapped_regs_t, tpr));
    2.36 -	DEFINE(XSI_PTA_OFS, offsetof(mapped_regs_t, pta));
    2.37 -	DEFINE(XSI_ITV_OFS, offsetof(mapped_regs_t, itv));
    2.38 -	DEFINE(XSI_KR0_OFS, offsetof(mapped_regs_t, krs[0]));
    2.39  	DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct vcpu, arch._thread.ksp));
    2.40  	DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct vcpu, arch._thread.on_ustack));
    2.41  
     3.1 --- a/xen/arch/ia64/asm-xsi-offsets.c	Mon Mar 27 15:34:02 2006 -0700
     3.2 +++ b/xen/arch/ia64/asm-xsi-offsets.c	Mon Mar 27 15:35:31 2006 -0700
     3.3 @@ -47,60 +47,62 @@
     3.4  
     3.5  void foo(void)
     3.6  {
     3.7 +	/* First is shared info page, and then arch specific vcpu context */
     3.8 +	DEFINE(XSI_BASE, SHAREDINFO_ADDR);
     3.9  
    3.10 -	DEFINE(XSI_BASE, SHARED_ARCHINFO_ADDR);
    3.11 -
    3.12 -	DEFINE(XSI_PSR_I_OFS, offsetof(mapped_regs_t, interrupt_delivery_enabled));
    3.13 +	DEFINE(XSI_PSR_I_OFS, (XSI_OFS + offsetof(mapped_regs_t, interrupt_delivery_enabled)));
    3.14  	DEFINE(XSI_PSR_I, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, interrupt_delivery_enabled)));
    3.15  	DEFINE(XSI_IPSR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ipsr)));
    3.16 -	DEFINE(XSI_IPSR_OFS, offsetof(mapped_regs_t, ipsr));
    3.17 -	DEFINE(XSI_IIP_OFS, offsetof(mapped_regs_t, iip));
    3.18 +	DEFINE(XSI_IPSR_OFS, (XSI_OFS + offsetof(mapped_regs_t, ipsr)));
    3.19 +	DEFINE(XSI_IIP_OFS, (XSI_OFS + offsetof(mapped_regs_t, iip)));
    3.20  	DEFINE(XSI_IIP, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iip)));
    3.21 -	DEFINE(XSI_IFS_OFS, offsetof(mapped_regs_t, ifs));
    3.22 +	DEFINE(XSI_IFS_OFS, (XSI_OFS + offsetof(mapped_regs_t, ifs)));
    3.23  	DEFINE(XSI_IFS, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifs)));
    3.24 -	DEFINE(XSI_PRECOVER_IFS_OFS, offsetof(mapped_regs_t, precover_ifs));
    3.25 +	DEFINE(XSI_PRECOVER_IFS_OFS, (XSI_OFS + offsetof(mapped_regs_t, precover_ifs)));
    3.26  	DEFINE(XSI_PRECOVER_IFS, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, precover_ifs)));
    3.27 -	DEFINE(XSI_ISR_OFS, offsetof(mapped_regs_t, isr));
    3.28 +	DEFINE(XSI_ISR_OFS, (XSI_OFS + offsetof(mapped_regs_t, isr)));
    3.29  	DEFINE(XSI_ISR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, isr)));
    3.30 -	DEFINE(XSI_IFA_OFS, offsetof(mapped_regs_t, ifa));
    3.31 +	DEFINE(XSI_IFA_OFS, (XSI_OFS + offsetof(mapped_regs_t, ifa)));
    3.32  	DEFINE(XSI_IFA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifa)));
    3.33 -	DEFINE(XSI_IIPA_OFS, offsetof(mapped_regs_t, iipa));
    3.34 +	DEFINE(XSI_IIPA_OFS, (XSI_OFS + offsetof(mapped_regs_t, iipa)));
    3.35  	DEFINE(XSI_IIPA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iipa)));
    3.36 -	DEFINE(XSI_IIM_OFS, offsetof(mapped_regs_t, iim));
    3.37 +	DEFINE(XSI_IIM_OFS, (XSI_OFS + offsetof(mapped_regs_t, iim)));
    3.38  	DEFINE(XSI_IIM, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iim)));
    3.39 -	DEFINE(XSI_TPR_OFS, offsetof(mapped_regs_t, tpr));
    3.40 +	DEFINE(XSI_TPR_OFS, (XSI_OFS + offsetof(mapped_regs_t, tpr)));
    3.41  	DEFINE(XSI_TPR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, tpr)));
    3.42 -	DEFINE(XSI_IHA_OFS, offsetof(mapped_regs_t, iha));
    3.43 +	DEFINE(XSI_IHA_OFS, (XSI_OFS + offsetof(mapped_regs_t, iha)));
    3.44  	DEFINE(XSI_IHA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iha)));
    3.45 -	DEFINE(XSI_ITIR_OFS, offsetof(mapped_regs_t, itir));
    3.46 +	DEFINE(XSI_ITIR_OFS, (XSI_OFS + offsetof(mapped_regs_t, itir)));
    3.47  	DEFINE(XSI_ITIR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, itir)));
    3.48 -	DEFINE(XSI_ITV_OFS, offsetof(mapped_regs_t, itv));
    3.49 +	DEFINE(XSI_ITV_OFS, (XSI_OFS + offsetof(mapped_regs_t, itv)));
    3.50  	DEFINE(XSI_ITV, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, itv)));
    3.51 -	DEFINE(XSI_PTA_OFS, offsetof(mapped_regs_t, pta));
    3.52 +	DEFINE(XSI_PTA_OFS, (XSI_OFS + offsetof(mapped_regs_t, pta)));
    3.53  	DEFINE(XSI_PTA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, pta)));
    3.54 -	DEFINE(XSI_PSR_IC_OFS, offsetof(mapped_regs_t, interrupt_collection_enabled));
    3.55 +	DEFINE(XSI_PSR_IC_OFS, (XSI_OFS + offsetof(mapped_regs_t, interrupt_collection_enabled)));
    3.56  	DEFINE(XSI_PSR_IC, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, interrupt_collection_enabled)));
    3.57 -	DEFINE(XSI_PEND_OFS, offsetof(mapped_regs_t, pending_interruption));
    3.58 +	DEFINE(XSI_PEND_OFS, (XSI_OFS + offsetof(mapped_regs_t, pending_interruption)));
    3.59  	DEFINE(XSI_PEND, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, pending_interruption)));
    3.60 -	DEFINE(XSI_INCOMPL_REGFR_OFS, offsetof(mapped_regs_t, incomplete_regframe));
    3.61 +	DEFINE(XSI_INCOMPL_REGFR_OFS, (XSI_OFS + offsetof(mapped_regs_t, incomplete_regframe)));
    3.62  	DEFINE(XSI_INCOMPL_REGFR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, incomplete_regframe)));
    3.63 -	DEFINE(XSI_METAPHYS_OFS, offsetof(mapped_regs_t, metaphysical_mode));
    3.64 +	DEFINE(XSI_METAPHYS_OFS, (XSI_OFS + offsetof(mapped_regs_t, metaphysical_mode)));
    3.65  	DEFINE(XSI_METAPHYS, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, metaphysical_mode)));
    3.66  
    3.67 -	DEFINE(XSI_BANKNUM_OFS, offsetof(mapped_regs_t, banknum));
    3.68 +	DEFINE(XSI_BANKNUM_OFS, (XSI_OFS + offsetof(mapped_regs_t, banknum)));
    3.69  	DEFINE(XSI_BANKNUM, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, banknum)));
    3.70  
    3.71 -	DEFINE(XSI_BANK0_R16_OFS, offsetof(mapped_regs_t, bank0_regs[0]));
    3.72 +	DEFINE(XSI_BANK0_R16_OFS, (XSI_OFS + offsetof(mapped_regs_t, bank0_regs[0])));
    3.73  	DEFINE(XSI_BANK0_R16, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, bank0_regs[0])));
    3.74 -	DEFINE(XSI_BANK1_R16_OFS, offsetof(mapped_regs_t, bank1_regs[0]));
    3.75 +	DEFINE(XSI_BANK1_R16_OFS, (XSI_OFS + offsetof(mapped_regs_t, bank1_regs[0])));
    3.76  	DEFINE(XSI_BANK1_R16, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, bank1_regs[0])));
    3.77 -	DEFINE(XSI_RR0_OFS, offsetof(mapped_regs_t, rrs[0]));
    3.78 +	DEFINE(XSI_B0NATS_OFS, (XSI_OFS + offsetof(mapped_regs_t, vbnat)));
    3.79 +	DEFINE(XSI_B1NATS_OFS, (XSI_OFS + offsetof(mapped_regs_t, vnat)));
    3.80 +	DEFINE(XSI_RR0_OFS, (XSI_OFS + offsetof(mapped_regs_t, rrs[0])));
    3.81  	DEFINE(XSI_RR0, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, rrs[0])));
    3.82 -	DEFINE(XSI_KR0_OFS, offsetof(mapped_regs_t, krs[0]));
    3.83 +	DEFINE(XSI_KR0_OFS, (XSI_OFS + offsetof(mapped_regs_t, krs[0])));
    3.84  	DEFINE(XSI_KR0, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, krs[0])));
    3.85 -	DEFINE(XSI_PKR0_OFS, offsetof(mapped_regs_t, pkrs[0]));
    3.86 +	DEFINE(XSI_PKR0_OFS, (XSI_OFS + offsetof(mapped_regs_t, pkrs[0])));
    3.87  	DEFINE(XSI_PKR0, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, pkrs[0])));
    3.88 -	DEFINE(XSI_TMP0_OFS, offsetof(mapped_regs_t, tmp[0]));
    3.89 +	DEFINE(XSI_TMP0_OFS, (XSI_OFS + offsetof(mapped_regs_t, tmp[0])));
    3.90  	DEFINE(XSI_TMP0, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, tmp[0])));
    3.91  	
    3.92  }
     4.1 --- a/xen/arch/ia64/xen/domain.c	Mon Mar 27 15:34:02 2006 -0700
     4.2 +++ b/xen/arch/ia64/xen/domain.c	Mon Mar 27 15:35:31 2006 -0700
     4.3 @@ -38,7 +38,7 @@
     4.4  //#include <asm/page.h>
     4.5  #include <asm/pgalloc.h>
     4.6  
     4.7 -#include <asm/asm-offsets.h>  /* for IA64_THREAD_INFO_SIZE */
     4.8 +#include <asm/offsets.h>  /* for IA64_THREAD_INFO_SIZE */
     4.9  
    4.10  #include <asm/vcpu.h>   /* for function declarations */
    4.11  #include <public/arch-ia64.h>
     5.1 --- a/xen/arch/ia64/xen/hyperprivop.S	Mon Mar 27 15:34:02 2006 -0700
     5.2 +++ b/xen/arch/ia64/xen/hyperprivop.S	Mon Mar 27 15:35:31 2006 -0700
     5.3 @@ -287,7 +287,7 @@ ENTRY(hyper_ssm_i)
     5.4  	// set shared_mem ifs and incomplete_regframe to 0
     5.5  	cover ;;
     5.6  	mov r20=cr.ifs;;
     5.7 -	adds r21=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
     5.8 +	adds r21=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
     5.9  	st4 [r21]=r0 ;;
    5.10  	adds r21=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.11  	st8 [r21]=r0 ;;
    5.12 @@ -304,8 +304,8 @@ ENTRY(hyper_ssm_i)
    5.13  	mov cr.iip=r24;;
    5.14  	// OK, now all set to go except for switch to virtual bank0
    5.15  	mov r30=r2; mov r29=r3;;
    5.16 -	adds r2=XSI_BANK1_OFS-XSI_PSR_IC_OFS,r18;
    5.17 -	adds r3=(XSI_BANK1_OFS+8)-XSI_PSR_IC_OFS,r18;;
    5.18 +	adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
    5.19 +	adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
    5.20  	bsw.1;;
    5.21  	// FIXME?: ar.unat is not really handled correctly,
    5.22  	// but may not matter if the OS is NaT-clean
    5.23 @@ -460,7 +460,7 @@ GLOBAL_ENTRY(fast_tick_reflect)
    5.24  	// set shared_mem ifs and incomplete_regframe to 0
    5.25  	cover ;;
    5.26  	mov r20=cr.ifs;;
    5.27 -	adds r21=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.28 +	adds r21=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.29  	st4 [r21]=r0 ;;
    5.30  	adds r21=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.31  	st8 [r21]=r0 ;;
    5.32 @@ -478,8 +478,8 @@ GLOBAL_ENTRY(fast_tick_reflect)
    5.33  #ifdef HANDLE_AR_UNAT
    5.34  	mov r28=ar.unat;
    5.35  #endif
    5.36 -	adds r2=XSI_BANK1_OFS-XSI_PSR_IC_OFS,r18;
    5.37 -	adds r3=(XSI_BANK1_OFS+8)-XSI_PSR_IC_OFS,r18;;
    5.38 +	adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
    5.39 +	adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
    5.40  	bsw.1;;
    5.41  	.mem.offset 0,0; st8.spill [r2]=r16,16;
    5.42  	.mem.offset 8,0; st8.spill [r3]=r17,16 ;;
    5.43 @@ -633,7 +633,7 @@ ENTRY(fast_reflect)
    5.44  	// set shared_mem ifs and incomplete_regframe to 0
    5.45  	cover ;;
    5.46  	mov r24=cr.ifs;;
    5.47 -	adds r21=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.48 +	adds r21=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.49  	st4 [r21]=r0 ;;
    5.50  	adds r21=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.51  	st8 [r21]=r0 ;;
    5.52 @@ -654,8 +654,8 @@ ENTRY(fast_reflect)
    5.53  #ifdef HANDLE_AR_UNAT
    5.54  	mov r28=ar.unat;
    5.55  #endif
    5.56 -	adds r2=XSI_BANK1_OFS-XSI_PSR_IC_OFS,r18;
    5.57 -	adds r3=(XSI_BANK1_OFS+8)-XSI_PSR_IC_OFS,r18;;
    5.58 +	adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
    5.59 +	adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
    5.60  	bsw.1;;
    5.61  	.mem.offset 0,0; st8.spill [r2]=r16,16;
    5.62  	.mem.offset 8,0; st8.spill [r3]=r17,16 ;;
    5.63 @@ -1055,7 +1055,7 @@ 1:	// OK now, let's do an rfi.
    5.64  just_do_rfi:
    5.65  	// r18=&vpsr.i|vpsr.ic, r21==vpsr, r22=vcr.iip
    5.66  	mov cr.iip=r22;;
    5.67 -	adds r20=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.68 +	adds r20=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.69  	st4 [r20]=r0 ;;
    5.70  	adds r20=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.71  	ld8 r20=[r20];;
    5.72 @@ -1088,8 +1088,8 @@ just_do_rfi:
    5.73  	mov r30=r2; mov r29=r3;;
    5.74      mov r17=ar.unat;;
    5.75      adds r16=XSI_B1NATS_OFS-XSI_PSR_IC_OFS,r18
    5.76 -	adds r2=XSI_BANK1_OFS-XSI_PSR_IC_OFS,r18;
    5.77 -	adds r3=(XSI_BANK1_OFS+8)-XSI_PSR_IC_OFS,r18;;
    5.78 +	adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
    5.79 +	adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
    5.80      ld8 r16=[r16];;
    5.81      mov ar.unat=r16;;
    5.82  	bsw.1;;
    5.83 @@ -1296,7 +1296,7 @@ ENTRY(hyper_cover)
    5.84  	mov r25=cr.iip;;
    5.85  	// skip test for vpsr.ic.. it's a prerequisite for hyperprivops
    5.86  	cover ;;
    5.87 -	adds r20=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.88 +	adds r20=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;;
    5.89  	mov r30=cr.ifs;;
    5.90  	adds r22=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18
    5.91  	ld4 r21=[r20] ;;
     6.1 --- a/xen/include/asm-ia64/offsets.h	Mon Mar 27 15:34:02 2006 -0700
     6.2 +++ b/xen/include/asm-ia64/offsets.h	Mon Mar 27 15:35:31 2006 -0700
     6.3 @@ -1,2 +1,8 @@
     6.4  //dummy file to resolve non-arch-indep include
     6.5 +#ifndef __IA64_OFFSETS_H
     6.6 +#define __IA64_OFFSETS_H
     6.7 +
     6.8  #include <asm/asm-offsets.h>
     6.9 +#include <asm/asm-xsi-offsets.h>
    6.10 +
    6.11 +#endif /* __IA64_OFFSETS_H */
     7.1 --- a/xen/include/asm-ia64/xensystem.h	Mon Mar 27 15:34:02 2006 -0700
     7.2 +++ b/xen/include/asm-ia64/xensystem.h	Mon Mar 27 15:35:31 2006 -0700
     7.3 @@ -22,10 +22,11 @@
     7.4  #undef KERNEL_START
     7.5  #define KERNEL_START		 0xf000000004000000
     7.6  #undef PERCPU_ADDR
     7.7 -#define PERCPU_ADDR		 0xf100000000000000-PERCPU_PAGE_SIZE
     7.8  #define SHAREDINFO_ADDR		 0xf100000000000000
     7.9 +#define SHARED_ARCHINFO_ADDR	 (SHAREDINFO_ADDR + PAGE_SIZE)
    7.10 +#define PERCPU_ADDR		 (SHAREDINFO_ADDR - PERCPU_PAGE_SIZE)
    7.11 +#define XSI_OFS 		 (SHARED_ARCHINFO_ADDR - SHAREDINFO_ADDR)
    7.12  #define VHPT_ADDR		 0xf200000000000000
    7.13 -#define SHARED_ARCHINFO_ADDR	 0xf300000000000000
    7.14  #define XEN_END_ADDR		 0xf400000000000000
    7.15  
    7.16  #ifndef __ASSEMBLY__
    7.17 @@ -34,7 +35,6 @@
    7.18  #define IA64_HAS_EXTRA_STATE(t) 0
    7.19  
    7.20  #undef __switch_to
    7.21 -#if     1
    7.22  extern struct task_struct *vmx_ia64_switch_to (void *next_task);
    7.23  #define __switch_to(prev,next,last) do {	\
    7.24         ia64_save_fpu(prev->arch._thread.fph);	\
    7.25 @@ -57,19 +57,6 @@ extern struct task_struct *vmx_ia64_swit
    7.26      	   vcpu_set_next_timer(current);    		\
    7.27         }                                       \
    7.28  } while (0)
    7.29 -#else
    7.30 -#define __switch_to(prev,next,last) do {							 \
    7.31 -	ia64_save_fpu(prev->arch._thread.fph);							\
    7.32 -	ia64_load_fpu(next->arch._thread.fph);							\
    7.33 -	if (IA64_HAS_EXTRA_STATE(prev))								 \
    7.34 -		ia64_save_extra(prev);								 \
    7.35 -	if (IA64_HAS_EXTRA_STATE(next))								 \
    7.36 -		ia64_load_extra(next);								 \
    7.37 -	/*ia64_psr(ia64_task_regs(next))->dfh = !ia64_is_local_fpu_owner(next);*/			 \
    7.38 -	(last) = ia64_switch_to((next));							 \
    7.39 -	vcpu_set_next_timer(current);								\
    7.40 -} while (0)
    7.41 -#endif
    7.42  
    7.43  #undef switch_to
    7.44  // FIXME SMP... see system.h, does this need to be different?