ia64/xen-unstable

changeset 10809:21918b22746e

merge with xen-unstable.hg
author awilliam@xenbuild.aw
date Wed Jul 26 10:49:32 2006 -0600 (2006-07-26)
parents 4e7318b0c1e0 b4d5a36e380b
children 254c090854de
files tools/ioemu/console.c tools/ioemu/cpu-all.h tools/ioemu/exec-all.h tools/ioemu/hw/iommu.c tools/ioemu/hw/vga.c tools/ioemu/vl.c tools/ioemu/vl.h tools/ioemu/vnc.c
line diff
     1.1 --- a/README	Wed Jul 26 09:41:24 2006 -0600
     1.2 +++ b/README	Wed Jul 26 10:49:32 2006 -0600
     1.3 @@ -91,6 +91,7 @@ provided by your Linux distributor:
     1.4      * GNU Binutils
     1.5      * Development install of zlib (e.g., zlib-dev)
     1.6      * Development install of Python v2.3 or later (e.g., python-dev)
     1.7 +    * Development install of curses (e.g., libncurses-dev)
     1.8      * bridge-utils package (/sbin/brctl)
     1.9      * iproute package (/sbin/ip)
    1.10      * hotplug or udev
     2.1 --- a/docs/src/user.tex	Wed Jul 26 09:41:24 2006 -0600
     2.2 +++ b/docs/src/user.tex	Wed Jul 26 10:49:32 2006 -0600
     2.3 @@ -1374,8 +1374,136 @@ To configure a domU to receive a PCI dev
     2.4  %% There are two possible types of privileges: IO privileges and
     2.5  %% administration privileges.
     2.6  
     2.7 -
     2.8 -
     2.9 +\section{Support for virtual Trusted Platform Module (vTPM)}
    2.10 +\label{ss:vtpm}
    2.11 +
    2.12 +Paravirtualized domains can be given access to a virtualized version
    2.13 +of a TPM. This enables applications in these domains to use the services
    2.14 +of the TPM device for example through a TSS stack
    2.15 +\footnote{Trousers TSS stack: http://sourceforge.net/projects/trousers}.
    2.16 +The Xen source repository provides the necessary software components to
    2.17 +enable virtual TPM access. Support is provided through several
    2.18 +different pieces. First, a TPM emulator has been modified to provide TPM's
    2.19 +functionality for the virtual TPM subsystem. Second, a virtual TPM Manager
    2.20 +coordinates the virtual TPMs efforts, manages their creation, and provides
    2.21 +protected key storage using the TPM. Third, a device driver pair providing
    2.22 +a TPM front- and backend is available for XenLinux to deliver TPM commands
    2.23 +from the domain to the virtual TPM manager, which dispatches it to a
    2.24 +software TPM. Since the TPM Manager relies on a HW TPM for protected key
    2.25 +storage, therefore this subsystem requires a Linux-supported hardware TPM.
    2.26 +For development purposes, a TPM emulator is available for use on non-TPM
    2.27 +enabled platforms.
    2.28 +
    2.29 +\subsubsection{Compile-Time Setup}
    2.30 +To enable access to the virtual TPM, the virtual TPM backend driver must
    2.31 +be compiled for a privileged domain (e.g. domain 0). Using the XenLinux
    2.32 +configuration, the necessary driver can be selected in the Xen configuration
    2.33 +section. Unless the driver has been compiled into the kernel, its module
    2.34 +must be activated using the following command:
    2.35 +
    2.36 +\begin{verbatim}
    2.37 +modprobe tpmbk
    2.38 +\end{verbatim}
    2.39 +
    2.40 +Similarly, the TPM frontend driver must be compiled for the kernel trying
    2.41 +to use TPM functionality. Its driver can be selected in the kernel
    2.42 +configuration section Device Driver / Character Devices / TPM Devices.
    2.43 +Along with that the TPM driver for the built-in TPM must be selected.
    2.44 +If the virtual TPM driver has been compiled as module, it
    2.45 +must be activated using the following command:
    2.46 +
    2.47 +\begin{verbatim}
    2.48 +modprobe tpm_xenu
    2.49 +\end{verbatim}
    2.50 +
    2.51 +Furthermore, it is necessary to build the virtual TPM manager and software
    2.52 +TPM by making changes to entries in Xen build configuration files.
    2.53 +The following entry in the file Config.mk in the Xen root source
    2.54 +directory must be made:
    2.55 +
    2.56 +\begin{verbatim}
    2.57 +VTPM_TOOLS ?= y
    2.58 +\end{verbatim}
    2.59 +
    2.60 +After a build of the Xen tree and a reboot of the machine, the TPM backend
    2.61 +drive must be loaded. Once loaded, the virtual TPM manager daemon
    2.62 +must be started before TPM-enabled guest domains may be launched.
    2.63 +To enable being the destination of a virtual TPM Migration, the virtual TPM
    2.64 +migration daemon must also be loaded.
    2.65 +
    2.66 +\begin{verbatim}
    2.67 +vtpm_managerd
    2.68 +\end{verbatim}
    2.69 +\begin{verbatim}
    2.70 +vtpm_migratord
    2.71 +\end{verbatim}
    2.72 +
    2.73 +Once the VTPM manager is running, the VTPM can be accessed by loading the
    2.74 +front end driver in a guest domain.
    2.75 +
    2.76 +\subsubsection{Development and Testing TPM Emulator}
    2.77 +For development and testing on non-TPM enabled platforms, a TPM emulator
    2.78 +can be used in replacement of a platform TPM. First, the entry in the file
    2.79 +tools/vtpm/Rules.mk must look as follows:
    2.80 +
    2.81 +\begin{verbatim}
    2.82 +BUILD_EMULATOR = y
    2.83 +\end{verbatim}
    2.84 +
    2.85 +Second, the entry in the file tool/vtpm\_manager/Rules.mk must be uncommented
    2.86 +as follows:
    2.87 +
    2.88 +\begin{verbatim}
    2.89 +# TCS talks to fifo's rather than /dev/tpm. TPM Emulator assumed on fifos
    2.90 +CFLAGS += -DDUMMY_TPM
    2.91 +\end{verbatim}
    2.92 +
    2.93 +Before starting the virtual TPM Manager, start the emulator by executing
    2.94 +the following in dom0:
    2.95 +
    2.96 +\begin{verbatim}
    2.97 +tpm_emulator clear
    2.98 +\end{verbatim}
    2.99 +
   2.100 +\subsubsection{vTPM Frontend Configuration}
   2.101 +To provide TPM functionality to a user domain, a line must be added to
   2.102 +the virtual TPM configuration file using the following format:
   2.103 +
   2.104 +\begin{verbatim}
   2.105 +vtpm = ['instance=<instance number>, backend=<domain id>']
   2.106 +\end{verbatim}
   2.107 +
   2.108 +The { \it instance number} reflects the preferred virtual TPM instance
   2.109 +to associate with the domain. If the selected instance is
   2.110 +already associated with another domain, the system will automatically
   2.111 +select the next available instance. An instance number greater than
   2.112 +zero must be provided. It is possible to omit the instance
   2.113 +parameter from the configuration file.
   2.114 +
   2.115 +The {\it domain id} provides the ID of the domain where the
   2.116 +virtual TPM backend driver and virtual TPM are running in. It should
   2.117 +currently always be set to '0'.
   2.118 +
   2.119 +
   2.120 +Examples for valid vtpm entries in the configuration file are
   2.121 +
   2.122 +\begin{verbatim}
   2.123 + vtpm = ['instance=1, backend=0']
   2.124 +\end{verbatim}
   2.125 +and
   2.126 +\begin{verbatim}
   2.127 + vtpm = ['backend=0'].
   2.128 +\end{verbatim}
   2.129 +
   2.130 +\subsubsection{Using the virtual TPM}
   2.131 +
   2.132 +Access to TPM functionality is provided by the virtual TPM frontend driver.
   2.133 +Similar to existing hardware TPM drivers, this driver provides basic TPM
   2.134 +status information through the {\it sysfs} filesystem. In a Xen user domain
   2.135 +the sysfs entries can be found in /sys/devices/xen/vtpm-0.
   2.136 +
   2.137 +Commands can be sent to the virtual TPM instance using the character
   2.138 +device /dev/tpm0 (major 10, minor 224).
   2.139  
   2.140  % Chapter Storage and FileSytem Management
   2.141  \chapter{Storage and File System Management}
     3.1 --- a/linux-2.6-xen-sparse/arch/i386/kernel/time-xen.c	Wed Jul 26 09:41:24 2006 -0600
     3.2 +++ b/linux-2.6-xen-sparse/arch/i386/kernel/time-xen.c	Wed Jul 26 10:49:32 2006 -0600
     3.3 @@ -958,11 +958,17 @@ u64 jiffies_to_st(unsigned long j)
     3.4  	do {
     3.5  		seq = read_seqbegin(&xtime_lock);
     3.6  		delta = j - jiffies;
     3.7 -		/* NB. The next check can trigger in some wrap-around cases,
     3.8 -		 * but that's ok: we'll just end up with a shorter timeout. */
     3.9 -		if (delta < 1)
    3.10 -			delta = 1;
    3.11 -		st = processed_system_time + (delta * (u64)NS_PER_TICK);
    3.12 +		if (delta < 1) {
    3.13 +			/* Triggers in some wrap-around cases, but that's okay:
    3.14 +			 * we just end up with a shorter timeout. */
    3.15 +			st = processed_system_time + NS_PER_TICK;
    3.16 +		} else if (((unsigned long)delta >> (BITS_PER_LONG-3)) != 0) {
    3.17 +			/* Very long timeout means there is no pending timer.
    3.18 +			 * We indicate this to Xen by passing zero timeout. */
    3.19 +			st = 0;
    3.20 +		} else {
    3.21 +			st = processed_system_time + delta * (u64)NS_PER_TICK;
    3.22 +		}
    3.23  	} while (read_seqretry(&xtime_lock, seq));
    3.24  
    3.25  	return st;
    3.26 @@ -989,14 +995,15 @@ static void stop_hz_timer(void)
    3.27  
    3.28  	smp_mb();
    3.29  
    3.30 -	/* Leave ourselves in 'tick mode' if rcu or softirq or timer pending. */
    3.31 +	/* Leave ourselves in tick mode if rcu or softirq or timer pending. */
    3.32  	if (rcu_needs_cpu(cpu) || local_softirq_pending() ||
    3.33  	    (j = next_timer_interrupt(), time_before_eq(j, jiffies))) {
    3.34  		cpu_clear(cpu, nohz_cpu_mask);
    3.35  		j = jiffies + 1;
    3.36  	}
    3.37  
    3.38 -	BUG_ON(HYPERVISOR_set_timer_op(jiffies_to_st(j)) != 0);
    3.39 +	if (HYPERVISOR_set_timer_op(jiffies_to_st(j)) != 0)
    3.40 +		BUG();
    3.41  }
    3.42  
    3.43  static void start_hz_timer(void)
     4.1 --- a/linux-2.6-xen-sparse/arch/i386/mm/hypervisor.c	Wed Jul 26 09:41:24 2006 -0600
     4.2 +++ b/linux-2.6-xen-sparse/arch/i386/mm/hypervisor.c	Wed Jul 26 10:49:32 2006 -0600
     4.3 @@ -266,6 +266,7 @@ static void contiguous_bitmap_clear(
     4.4  /* Protected by balloon_lock. */
     4.5  #define MAX_CONTIG_ORDER 9 /* 2MB */
     4.6  static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
     4.7 +static multicall_entry_t cr_mcl[1<<MAX_CONTIG_ORDER];
     4.8  
     4.9  /* Ensure multi-page extents are contiguous in machine memory. */
    4.10  int xen_create_contiguous_region(
    4.11 @@ -310,12 +311,13 @@ int xen_create_contiguous_region(
    4.12  	/* 1. Zap current PTEs, remembering MFNs. */
    4.13  	for (i = 0; i < (1UL<<order); i++) {
    4.14  		in_frames[i] = pfn_to_mfn((__pa(vstart) >> PAGE_SHIFT) + i);
    4.15 -		if (HYPERVISOR_update_va_mapping(vstart + (i*PAGE_SIZE),
    4.16 -						 __pte_ma(0), 0))
    4.17 -			BUG();
    4.18 +		MULTI_update_va_mapping(cr_mcl + i, vstart + (i*PAGE_SIZE),
    4.19 +					__pte_ma(0), 0);
    4.20  		set_phys_to_machine((__pa(vstart)>>PAGE_SHIFT)+i,
    4.21  			INVALID_P2M_ENTRY);
    4.22  	}
    4.23 +	if (HYPERVISOR_multicall(cr_mcl, i))
    4.24 +		BUG();
    4.25  
    4.26  	/* 2. Get a new contiguous memory extent. */
    4.27  	out_frame = __pa(vstart) >> PAGE_SHIFT;
    4.28 @@ -343,15 +345,16 @@ int xen_create_contiguous_region(
    4.29  	/* 3. Map the new extent in place of old pages. */
    4.30  	for (i = 0; i < (1UL<<order); i++) {
    4.31  		frame = success ? (out_frame + i) : in_frames[i];
    4.32 -		if (HYPERVISOR_update_va_mapping(vstart + (i*PAGE_SIZE),
    4.33 -						 pfn_pte_ma(frame,
    4.34 -							    PAGE_KERNEL),
    4.35 -						 0))
    4.36 -			BUG();
    4.37 +		MULTI_update_va_mapping(cr_mcl + i, vstart + (i*PAGE_SIZE),
    4.38 +					pfn_pte_ma(frame, PAGE_KERNEL), 0);
    4.39  		set_phys_to_machine((__pa(vstart)>>PAGE_SHIFT)+i, frame);
    4.40  	}
    4.41  
    4.42 -	flush_tlb_all();
    4.43 +	cr_mcl[i - 1].args[MULTI_UVMFLAGS_INDEX] = order
    4.44 +						   ? UVMF_TLB_FLUSH|UVMF_ALL
    4.45 +						   : UVMF_INVLPG|UVMF_ALL;
    4.46 +	if (HYPERVISOR_multicall(cr_mcl, i))
    4.47 +		BUG();
    4.48  
    4.49  	if (success)
    4.50  		contiguous_bitmap_set(__pa(vstart) >> PAGE_SHIFT,
    4.51 @@ -402,13 +405,14 @@ void xen_destroy_contiguous_region(unsig
    4.52  
    4.53  	/* 2. Zap current PTEs. */
    4.54  	for (i = 0; i < (1UL<<order); i++) {
    4.55 -		if (HYPERVISOR_update_va_mapping(vstart + (i*PAGE_SIZE),
    4.56 -						 __pte_ma(0), 0))
    4.57 -			BUG();
    4.58 +		MULTI_update_va_mapping(cr_mcl + i, vstart + (i*PAGE_SIZE),
    4.59 +					__pte_ma(0), 0);
    4.60  		set_phys_to_machine((__pa(vstart)>>PAGE_SHIFT)+i,
    4.61  			INVALID_P2M_ENTRY);
    4.62  		out_frames[i] = (__pa(vstart) >> PAGE_SHIFT) + i;
    4.63  	}
    4.64 +	if (HYPERVISOR_multicall(cr_mcl, i))
    4.65 +		BUG();
    4.66  
    4.67  	/* 3. Do the exchange for non-contiguous MFNs. */
    4.68  	rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
    4.69 @@ -429,15 +433,16 @@ void xen_destroy_contiguous_region(unsig
    4.70  	/* 4. Map new pages in place of old pages. */
    4.71  	for (i = 0; i < (1UL<<order); i++) {
    4.72  		frame = success ? out_frames[i] : (in_frame + i);
    4.73 -		if (HYPERVISOR_update_va_mapping(vstart + (i*PAGE_SIZE),
    4.74 -						 pfn_pte_ma(frame,
    4.75 -							    PAGE_KERNEL),
    4.76 -						 0))
    4.77 -			BUG();
    4.78 +		MULTI_update_va_mapping(cr_mcl + i, vstart + (i*PAGE_SIZE),
    4.79 +					pfn_pte_ma(frame, PAGE_KERNEL), 0);
    4.80  		set_phys_to_machine((__pa(vstart)>>PAGE_SHIFT)+i, frame);
    4.81  	}
    4.82  
    4.83 -	flush_tlb_all();
    4.84 +	cr_mcl[i - 1].args[MULTI_UVMFLAGS_INDEX] = order
    4.85 +						   ? UVMF_TLB_FLUSH|UVMF_ALL
    4.86 +						   : UVMF_INVLPG|UVMF_ALL;
    4.87 +	if (HYPERVISOR_multicall(cr_mcl, i))
    4.88 +		BUG();
    4.89  
    4.90  	balloon_unlock(flags);
    4.91  }
     5.1 --- a/linux-2.6-xen-sparse/arch/x86_64/Kconfig	Wed Jul 26 09:41:24 2006 -0600
     5.2 +++ b/linux-2.6-xen-sparse/arch/x86_64/Kconfig	Wed Jul 26 10:49:32 2006 -0600
     5.3 @@ -330,7 +330,7 @@ config ARCH_DISCONTIGMEM_DEFAULT
     5.4  
     5.5  config ARCH_SPARSEMEM_ENABLE
     5.6  	def_bool y
     5.7 -	depends on (NUMA || EXPERIMENTAL)
     5.8 +	depends on (NUMA || EXPERIMENTAL) && !X86_64_XEN
     5.9  
    5.10  config ARCH_MEMORY_PROBE
    5.11  	def_bool y
     6.1 --- a/linux-2.6-xen-sparse/drivers/xen/netback/interface.c	Wed Jul 26 09:41:24 2006 -0600
     6.2 +++ b/linux-2.6-xen-sparse/drivers/xen/netback/interface.c	Wed Jul 26 10:49:32 2006 -0600
     6.3 @@ -76,6 +76,7 @@ static struct ethtool_ops network_ethtoo
     6.4  {
     6.5  	.get_tx_csum = ethtool_op_get_tx_csum,
     6.6  	.set_tx_csum = ethtool_op_set_tx_csum,
     6.7 +	.get_link = ethtool_op_get_link,
     6.8  };
     6.9  
    6.10  netif_t *netif_alloc(domid_t domid, unsigned int handle, u8 be_mac[ETH_ALEN])
     7.1 --- a/linux-2.6-xen-sparse/drivers/xen/netback/loopback.c	Wed Jul 26 09:41:24 2006 -0600
     7.2 +++ b/linux-2.6-xen-sparse/drivers/xen/netback/loopback.c	Wed Jul 26 10:49:32 2006 -0600
     7.3 @@ -129,6 +129,7 @@ static struct ethtool_ops network_ethtoo
     7.4  	.set_sg = ethtool_op_set_sg,
     7.5  	.get_tso = ethtool_op_get_tso,
     7.6  	.set_tso = ethtool_op_set_tso,
     7.7 +	.get_link = ethtool_op_get_link,
     7.8  };
     7.9  
    7.10  /*
     8.1 --- a/linux-2.6-xen-sparse/drivers/xen/netfront/netfront.c	Wed Jul 26 09:41:24 2006 -0600
     8.2 +++ b/linux-2.6-xen-sparse/drivers/xen/netfront/netfront.c	Wed Jul 26 10:49:32 2006 -0600
     8.3 @@ -1201,6 +1201,7 @@ static struct ethtool_ops network_ethtoo
     8.4  	.set_sg = xennet_set_sg,
     8.5  	.get_tso = ethtool_op_get_tso,
     8.6  	.set_tso = xennet_set_tso,
     8.7 +	.get_link = ethtool_op_get_link,
     8.8  };
     8.9  
    8.10  #ifdef CONFIG_SYSFS
     9.1 --- a/tools/ioemu/console.c	Wed Jul 26 09:41:24 2006 -0600
     9.2 +++ b/tools/ioemu/console.c	Wed Jul 26 10:49:32 2006 -0600
     9.3 @@ -954,11 +954,21 @@ int is_graphic_console(void)
     9.4      return !active_console->text_console;
     9.5  }
     9.6  
     9.7 +void set_color_table(DisplayState *ds) 
     9.8 +{
     9.9 +    int i, j;
    9.10 +    for(j = 0; j < 2; j++) {
    9.11 +	for(i = 0; i < 8; i++) {
    9.12 +	    color_table[j][i] =
    9.13 +		col_expand(ds, vga_get_color(ds, color_table_rgb[j][i]));
    9.14 +	}
    9.15 +    }
    9.16 +}
    9.17 +
    9.18  CharDriverState *text_console_init(DisplayState *ds)
    9.19  {
    9.20      CharDriverState *chr;
    9.21      TextConsole *s;
    9.22 -    int i,j;
    9.23      static int color_inited;
    9.24  
    9.25      chr = qemu_mallocz(sizeof(CharDriverState));
    9.26 @@ -976,12 +986,7 @@ CharDriverState *text_console_init(Displ
    9.27  
    9.28      if (!color_inited) {
    9.29          color_inited = 1;
    9.30 -        for(j = 0; j < 2; j++) {
    9.31 -            for(i = 0; i < 8; i++) {
    9.32 -                color_table[j][i] = col_expand(s->ds, 
    9.33 -                        vga_get_color(s->ds, color_table_rgb[j][i]));
    9.34 -            }
    9.35 -        }
    9.36 +        set_color_table(ds);
    9.37      }
    9.38      s->y_displayed = 0;
    9.39      s->y_base = 0;
    10.1 --- a/tools/ioemu/cpu-all.h	Wed Jul 26 09:41:24 2006 -0600
    10.2 +++ b/tools/ioemu/cpu-all.h	Wed Jul 26 10:49:32 2006 -0600
    10.3 @@ -835,6 +835,31 @@ static __inline__ void atomic_clear_bit(
    10.4                  :"=m" (*(volatile long *)addr)
    10.5                  :"dIr" (nr));
    10.6  }
    10.7 +#elif defined(__ia64__)
    10.8 +#include "ia64_intrinsic.h"
    10.9 +#define atomic_set_bit(nr, addr) ({					\
   10.10 +	typeof(*addr) bit, old, new;					\
   10.11 +	volatile typeof(*addr) *m;					\
   10.12 +									\
   10.13 +	m = (volatile typeof(*addr)*)(addr + nr / (8*sizeof(*addr)));	\
   10.14 +	bit = 1 << (nr % (8*sizeof(*addr)));				\
   10.15 +	do {								\
   10.16 +		old = *m;						\
   10.17 +		new = old | bit;					\
   10.18 +	} while (cmpxchg_acq(m, old, new) != old);			\
   10.19 +})
   10.20 +
   10.21 +#define atomic_clear_bit(nr, addr) ({					\
   10.22 +	typeof(*addr) bit, old, new;					\
   10.23 +	volatile typeof(*addr) *m;					\
   10.24 +									\
   10.25 +	m = (volatile typeof(*addr)*)(addr + nr / (8*sizeof(*addr)));	\
   10.26 +	bit = ~(1 << (nr % (8*sizeof(*addr))));				\
   10.27 +	do {								\
   10.28 +		old = *m;						\
   10.29 +		new = old & bit;					\
   10.30 +	} while (cmpxchg_acq(m, old, new) != old);			\
   10.31 +})
   10.32  #endif
   10.33  
   10.34  /* memory API */
    11.1 --- a/tools/ioemu/exec-all.h	Wed Jul 26 09:41:24 2006 -0600
    11.2 +++ b/tools/ioemu/exec-all.h	Wed Jul 26 10:49:32 2006 -0600
    11.3 @@ -391,6 +391,15 @@ static inline int testandset (int *p)
    11.4  }
    11.5  #endif
    11.6  
    11.7 +#ifdef __ia64__
    11.8 +#include "ia64_intrinsic.h"
    11.9 +static inline int testandset (int *p)
   11.10 +{
   11.11 +    uint32_t o = 0, n = 1;
   11.12 +    return (int)cmpxchg_acq(p, o, n);
   11.13 +}
   11.14 +#endif
   11.15 +
   11.16  #ifdef __s390__
   11.17  static inline int testandset (int *p)
   11.18  {
   11.19 @@ -462,12 +471,13 @@ static inline int testandset (int *p)
   11.20  }
   11.21  #endif
   11.22  
   11.23 -#ifdef __ia64
   11.24 -#include <ia64intrin.h>
   11.25 +#ifdef __ia64__
   11.26 +#include "ia64_intrinsic.h"
   11.27  
   11.28  static inline int testandset (int *p)
   11.29  {
   11.30 -    return __sync_lock_test_and_set (p, 1);
   11.31 +    uint32_t o = 0, n = 1;
   11.32 +    return (int)cmpxchg_acq(p, o, n);
   11.33  }
   11.34  #endif
   11.35  
    12.1 --- a/tools/ioemu/hw/iommu.c	Wed Jul 26 09:41:24 2006 -0600
    12.2 +++ b/tools/ioemu/hw/iommu.c	Wed Jul 26 10:49:32 2006 -0600
    12.3 @@ -82,7 +82,11 @@ do { printf("IOMMU: " fmt , ##args); } w
    12.4  #define IOPTE_VALID         0x00000002 /* IOPTE is valid */
    12.5  #define IOPTE_WAZ           0x00000001 /* Write as zeros */
    12.6  
    12.7 +#if defined(__i386__) || defined(__x86_64__)
    12.8  #define PAGE_SHIFT      12
    12.9 +#elif defined(__ia64__)
   12.10 +#define PAGE_SHIFT      14
   12.11 +#endif 
   12.12  #define PAGE_SIZE       (1 << PAGE_SHIFT)
   12.13  #define PAGE_MASK	(PAGE_SIZE - 1)
   12.14  
    13.1 --- a/tools/ioemu/hw/vga.c	Wed Jul 26 09:41:24 2006 -0600
    13.2 +++ b/tools/ioemu/hw/vga.c	Wed Jul 26 10:49:32 2006 -0600
    13.3 @@ -1392,7 +1392,8 @@ void check_sse2(void)
    13.4  static void vga_draw_graphic(VGAState *s, int full_update)
    13.5  {
    13.6      int y1, y, update, page_min, page_max, linesize, y_start, double_scan, mask;
    13.7 -    int width, height, shift_control, line_offset, page0, page1, bwidth;
    13.8 +    int width, height, shift_control, line_offset, bwidth;
    13.9 +    ram_addr_t page0, page1;
   13.10      int disp_width, multi_scan, multi_run;
   13.11      uint8_t *d;
   13.12      uint32_t v, addr1, addr;
   13.13 @@ -1772,6 +1773,136 @@ static void vga_map(PCIDevice *pci_dev, 
   13.14      }
   13.15  }
   13.16  
   13.17 +/* do the same job as vgabios before vgabios get ready - yeah */
   13.18 +void vga_bios_init(VGAState *s)
   13.19 +{
   13.20 +    uint8_t palette_model[192] = {
   13.21 +        0,   0,   0,   0,   0, 170,   0, 170,
   13.22 +	0,   0, 170, 170, 170,   0,   0, 170,
   13.23 +        0, 170, 170,  85,   0, 170, 170, 170,
   13.24 +       85,  85,  85,  85,  85, 255,  85, 255,
   13.25 +       85,  85, 255, 255, 255,  85,  85, 255, 
   13.26 +       85, 255, 255, 255,  85, 255, 255, 255,
   13.27 +        0,  21,   0,   0,  21,  42,   0,  63,
   13.28 +        0,   0,  63,  42,  42,  21,   0,  42,
   13.29 +       21,  42,  42,  63,   0,  42,  63,  42,
   13.30 +        0,  21,  21,   0,  21,  63,   0,  63, 
   13.31 +       21,   0,  63,  63,  42,  21,  21,  42,
   13.32 +       21,  63,  42,  63,  21,  42,  63,  63,
   13.33 +       21,   0,   0,  21,   0,  42,  21,  42,
   13.34 +        0,  21,  42,  42,  63,   0,   0,  63,
   13.35 +        0,  42,  63,  42,   0,  63,  42,  42,
   13.36 +       21,   0,  21,  21,   0,  63,  21,  42,
   13.37 +       21,  21,  42,  63,  63,   0,  21,  63,
   13.38 +        0,  63,  63,  42,  21,  63,  42,  63,
   13.39 +       21,  21,   0,  21,  21,  42,  21,  63,
   13.40 +        0,  21,  63,  42,  63,  21,   0,  63,
   13.41 +       21,  42,  63,  63,   0,  63,  63,  42,
   13.42 +       21,  21,  21,  21,  21,  63,  21,  63,
   13.43 +       21,  21,  63,  63,  63,  21,  21,  63,
   13.44 +       21,  63,  63,  63,  21,  63,  63,  63
   13.45 +    };
   13.46 +
   13.47 +    s->latch = 0; 
   13.48 +
   13.49 +    s->sr_index = 3; 
   13.50 +    s->sr[0] = 3;
   13.51 +    s->sr[1] = 0;
   13.52 +    s->sr[2] = 3;
   13.53 +    s->sr[3] = 0;
   13.54 +    s->sr[4] = 2;
   13.55 +    s->sr[5] = 0;
   13.56 +    s->sr[6] = 0;
   13.57 +    s->sr[7] = 0;
   13.58 +
   13.59 +    s->gr_index = 5; 
   13.60 +    s->gr[0] = 0;
   13.61 +    s->gr[1] = 0;
   13.62 +    s->gr[2] = 0;
   13.63 +    s->gr[3] = 0;
   13.64 +    s->gr[4] = 0;
   13.65 +    s->gr[5] = 16;
   13.66 +    s->gr[6] = 14;
   13.67 +    s->gr[7] = 15;
   13.68 +    s->gr[8] = 255;
   13.69 +
   13.70 +    /* changed by out 0x03c0 */
   13.71 +    s->ar_index = 32;
   13.72 +    s->ar[0] = 0;
   13.73 +    s->ar[1] = 1;
   13.74 +    s->ar[2] = 2;
   13.75 +    s->ar[3] = 3;
   13.76 +    s->ar[4] = 4;
   13.77 +    s->ar[5] = 5;
   13.78 +    s->ar[6] = 6;
   13.79 +    s->ar[7] = 7;
   13.80 +    s->ar[8] = 8;
   13.81 +    s->ar[9] = 9;
   13.82 +    s->ar[10] = 10;
   13.83 +    s->ar[11] = 11;
   13.84 +    s->ar[12] = 12;
   13.85 +    s->ar[13] = 13;
   13.86 +    s->ar[14] = 14;
   13.87 +    s->ar[15] = 15;
   13.88 +    s->ar[16] = 12;
   13.89 +    s->ar[17] = 0;
   13.90 +    s->ar[18] = 15;
   13.91 +    s->ar[19] = 8;
   13.92 +    s->ar[20] = 0;
   13.93 +
   13.94 +    s->ar_flip_flop = 1; 
   13.95 +
   13.96 +    s->cr_index = 15; 
   13.97 +    s->cr[0] = 95;
   13.98 +    s->cr[1] = 79;
   13.99 +    s->cr[2] = 80;
  13.100 +    s->cr[3] = 130;
  13.101 +    s->cr[4] = 85;
  13.102 +    s->cr[5] = 129;
  13.103 +    s->cr[6] = 191;
  13.104 +    s->cr[7] = 31;
  13.105 +    s->cr[8] = 0;
  13.106 +    s->cr[9] = 79;
  13.107 +    s->cr[10] = 14;
  13.108 +    s->cr[11] = 15;
  13.109 +    s->cr[12] = 0;
  13.110 +    s->cr[13] = 0;
  13.111 +    s->cr[14] = 5;
  13.112 +    s->cr[15] = 160;
  13.113 +    s->cr[16] = 156;
  13.114 +    s->cr[17] = 142;
  13.115 +    s->cr[18] = 143;
  13.116 +    s->cr[19] = 40;
  13.117 +    s->cr[20] = 31;
  13.118 +    s->cr[21] = 150;
  13.119 +    s->cr[22] = 185;
  13.120 +    s->cr[23] = 163;
  13.121 +    s->cr[24] = 255;
  13.122 +
  13.123 +    s->msr = 103; 
  13.124 +    s->fcr = 0; 
  13.125 +    s->st00 = 0; 
  13.126 +    s->st01 = 0; 
  13.127 +
  13.128 +    /* dac_* & palette will be initialized by os through out 0x03c8 &
  13.129 +     * out 0c03c9(1:3) */
  13.130 +    s->dac_state = 0; 
  13.131 +    s->dac_sub_index = 0; 
  13.132 +    s->dac_read_index = 0; 
  13.133 +    s->dac_write_index = 16; 
  13.134 +    s->dac_cache[0] = 255;
  13.135 +    s->dac_cache[1] = 255;
  13.136 +    s->dac_cache[2] = 255;
  13.137 +
  13.138 +    /* palette */
  13.139 +    memcpy(s->palette, palette_model, 192);
  13.140 +
  13.141 +    s->bank_offset = 0;
  13.142 +    s->graphic_mode = -1;
  13.143 +
  13.144 +    /* TODO: add vbe support if enabled */
  13.145 +}
  13.146 +
  13.147  /* when used on xen environment, the vga_ram_base is not used */
  13.148  void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, 
  13.149                       unsigned long vga_ram_offset, int vga_ram_size)
    14.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    14.2 +++ b/tools/ioemu/ia64_intrinsic.h	Wed Jul 26 10:49:32 2006 -0600
    14.3 @@ -0,0 +1,276 @@
    14.4 +#ifndef IA64_INTRINSIC_H
    14.5 +#define IA64_INTRINSIC_H
    14.6 +
    14.7 +/*
    14.8 + * Compiler-dependent Intrinsics
    14.9 + *
   14.10 + * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
   14.11 + * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
   14.12 + *
   14.13 + */
   14.14 +extern long ia64_cmpxchg_called_with_bad_pointer (void);
   14.15 +extern void ia64_bad_param_for_getreg (void);
   14.16 +#define ia64_cmpxchg(sem,ptr,o,n,s) ({					\
   14.17 +	uint64_t _o, _r;						\
   14.18 +	switch(s) {							\
   14.19 +		case 1: _o = (uint8_t)(long)(o); break;			\
   14.20 +		case 2: _o = (uint16_t)(long)(o); break;		\
   14.21 +		case 4: _o = (uint32_t)(long)(o); break;		\
   14.22 +		case 8: _o = (uint64_t)(long)(o); break;		\
   14.23 +		default: break;						\
   14.24 +	}								\
   14.25 +	switch(s) {							\
   14.26 +		case 1:							\
   14.27 +		_r = ia64_cmpxchg1_##sem((uint8_t*)ptr,n,_o); break;	\
   14.28 +		case 2:							\
   14.29 +		_r = ia64_cmpxchg2_##sem((uint16_t*)ptr,n,_o); break;	\
   14.30 +		case 4:							\
   14.31 +		_r = ia64_cmpxchg4_##sem((uint32_t*)ptr,n,_o); break;	\
   14.32 +		case 8:							\
   14.33 +		_r = ia64_cmpxchg8_##sem((uint64_t*)ptr,n,_o); break;	\
   14.34 +		default:						\
   14.35 +		_r = ia64_cmpxchg_called_with_bad_pointer(); break;	\
   14.36 +	}								\
   14.37 +	(__typeof__(o)) _r;						\
   14.38 +})
   14.39 +
   14.40 +#define cmpxchg_acq(ptr,o,n) ia64_cmpxchg(acq,ptr,o,n,sizeof(*ptr))
   14.41 +#define cmpxchg_rel(ptr,o,n) ia64_cmpxchg(rel,ptr,o,n,sizeof(*ptr))
   14.42 +
   14.43 +/*
   14.44 + * Register Names for getreg() and setreg().
   14.45 + *
   14.46 + * The "magic" numbers happen to match the values used by the Intel compiler's
   14.47 + * getreg()/setreg() intrinsics.
   14.48 + */
   14.49 +
   14.50 +/* Special Registers */
   14.51 +
   14.52 +#define _IA64_REG_IP		1016	/* getreg only */
   14.53 +#define _IA64_REG_PSR		1019
   14.54 +#define _IA64_REG_PSR_L		1019
   14.55 +
   14.56 +/* General Integer Registers */
   14.57 +
   14.58 +#define _IA64_REG_GP		1025	/* R1 */
   14.59 +#define _IA64_REG_R8		1032	/* R8 */
   14.60 +#define _IA64_REG_R9		1033	/* R9 */
   14.61 +#define _IA64_REG_SP		1036	/* R12 */
   14.62 +#define _IA64_REG_TP		1037	/* R13 */
   14.63 +
   14.64 +/* Application Registers */
   14.65 +
   14.66 +#define _IA64_REG_AR_KR0	3072
   14.67 +#define _IA64_REG_AR_KR1	3073
   14.68 +#define _IA64_REG_AR_KR2	3074
   14.69 +#define _IA64_REG_AR_KR3	3075
   14.70 +#define _IA64_REG_AR_KR4	3076
   14.71 +#define _IA64_REG_AR_KR5	3077
   14.72 +#define _IA64_REG_AR_KR6	3078
   14.73 +#define _IA64_REG_AR_KR7	3079
   14.74 +#define _IA64_REG_AR_RSC	3088
   14.75 +#define _IA64_REG_AR_BSP	3089
   14.76 +#define _IA64_REG_AR_BSPSTORE	3090
   14.77 +#define _IA64_REG_AR_RNAT	3091
   14.78 +#define _IA64_REG_AR_FCR	3093
   14.79 +#define _IA64_REG_AR_EFLAG	3096
   14.80 +#define _IA64_REG_AR_CSD	3097
   14.81 +#define _IA64_REG_AR_SSD	3098
   14.82 +#define _IA64_REG_AR_CFLAG	3099
   14.83 +#define _IA64_REG_AR_FSR	3100
   14.84 +#define _IA64_REG_AR_FIR	3101
   14.85 +#define _IA64_REG_AR_FDR	3102
   14.86 +#define _IA64_REG_AR_CCV	3104
   14.87 +#define _IA64_REG_AR_UNAT	3108
   14.88 +#define _IA64_REG_AR_FPSR	3112
   14.89 +#define _IA64_REG_AR_ITC	3116
   14.90 +#define _IA64_REG_AR_PFS	3136
   14.91 +#define _IA64_REG_AR_LC		3137
   14.92 +#define _IA64_REG_AR_EC		3138
   14.93 +
   14.94 +/* Control Registers */
   14.95 +
   14.96 +#define _IA64_REG_CR_DCR	4096
   14.97 +#define _IA64_REG_CR_ITM	4097
   14.98 +#define _IA64_REG_CR_IVA	4098
   14.99 +#define _IA64_REG_CR_PTA	4104
  14.100 +#define _IA64_REG_CR_IPSR	4112
  14.101 +#define _IA64_REG_CR_ISR	4113
  14.102 +#define _IA64_REG_CR_IIP	4115
  14.103 +#define _IA64_REG_CR_IFA	4116
  14.104 +#define _IA64_REG_CR_ITIR	4117
  14.105 +#define _IA64_REG_CR_IIPA	4118
  14.106 +#define _IA64_REG_CR_IFS	4119
  14.107 +#define _IA64_REG_CR_IIM	4120
  14.108 +#define _IA64_REG_CR_IHA	4121
  14.109 +#define _IA64_REG_CR_LID	4160
  14.110 +#define _IA64_REG_CR_IVR	4161	/* getreg only */
  14.111 +#define _IA64_REG_CR_TPR	4162
  14.112 +#define _IA64_REG_CR_EOI	4163
  14.113 +#define _IA64_REG_CR_IRR0	4164	/* getreg only */
  14.114 +#define _IA64_REG_CR_IRR1	4165	/* getreg only */
  14.115 +#define _IA64_REG_CR_IRR2	4166	/* getreg only */
  14.116 +#define _IA64_REG_CR_IRR3	4167	/* getreg only */
  14.117 +#define _IA64_REG_CR_ITV	4168
  14.118 +#define _IA64_REG_CR_PMV	4169
  14.119 +#define _IA64_REG_CR_CMCV	4170
  14.120 +#define _IA64_REG_CR_LRR0	4176
  14.121 +#define _IA64_REG_CR_LRR1	4177
  14.122 +
  14.123 +/* Indirect Registers for getindreg() and setindreg() */
  14.124 +
  14.125 +#define _IA64_REG_INDR_CPUID	9000	/* getindreg only */
  14.126 +#define _IA64_REG_INDR_DBR	9001
  14.127 +#define _IA64_REG_INDR_IBR	9002
  14.128 +#define _IA64_REG_INDR_PKR	9003
  14.129 +#define _IA64_REG_INDR_PMC	9004
  14.130 +#define _IA64_REG_INDR_PMD	9005
  14.131 +#define _IA64_REG_INDR_RR	9006
  14.132 +
  14.133 +#ifdef __INTEL_COMPILER
  14.134 +void  __fc(uint64_t *addr);
  14.135 +void  __synci(void);
  14.136 +void __isrlz(void);
  14.137 +void __dsrlz(void);
  14.138 +uint64_t __getReg(const int whichReg);
  14.139 +uint64_t _InterlockedCompareExchange8_rel(volatile uint8_t *dest, uint64_t xchg, uint64_t comp);
  14.140 +uint64_t _InterlockedCompareExchange8_acq(volatile uint8_t *dest, uint64_t xchg, uint64_t comp);
  14.141 +uint64_t _InterlockedCompareExchange16_rel(volatile uint16_t *dest, uint64_t xchg, uint64_t comp);
  14.142 +uint64_t _InterlockedCompareExchange16_acq(volatile uint16_t *dest, uint64_t xchg, uint64_t comp);
  14.143 +uint64_t _InterlockedCompareExchange_rel(volatile uint32_t *dest, uint64_t xchg, uint64_t comp);
  14.144 +uint64_t _InterlockedCompareExchange_acq(volatile uint32_t *dest, uint64_t xchg, uint64_t comp);
  14.145 +uint64_t _InterlockedCompareExchange64_rel(volatile uint64_t *dest, uint64_t xchg, uint64_t comp);
  14.146 +u64_t _InterlockedCompareExchange64_acq(volatile uint64_t *dest, uint64_t xchg, uint64_t comp);
  14.147 +
  14.148 +#define ia64_cmpxchg1_rel	_InterlockedCompareExchange8_rel
  14.149 +#define ia64_cmpxchg1_acq	_InterlockedCompareExchange8_acq
  14.150 +#define ia64_cmpxchg2_rel	_InterlockedCompareExchange16_rel
  14.151 +#define ia64_cmpxchg2_acq	_InterlockedCompareExchange16_acq
  14.152 +#define ia64_cmpxchg4_rel	_InterlockedCompareExchange_rel
  14.153 +#define ia64_cmpxchg4_acq	_InterlockedCompareExchange_acq
  14.154 +#define ia64_cmpxchg8_rel	_InterlockedCompareExchange64_rel
  14.155 +#define ia64_cmpxchg8_acq	_InterlockedCompareExchange64_acq
  14.156 +
  14.157 +#define ia64_srlz_d		__dsrlz
  14.158 +#define ia64_srlz_i		__isrlz
  14.159 +#define __ia64_fc 		__fc
  14.160 +#define ia64_sync_i		__synci
  14.161 +#define __ia64_getreg		__getReg
  14.162 +#else /* __INTEL_COMPILER */
  14.163 +#define ia64_cmpxchg1_acq(ptr, new, old)						\
  14.164 +({											\
  14.165 +	uint64_t ia64_intri_res;							\
  14.166 +	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  14.167 +	asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv":					\
  14.168 +			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  14.169 +	ia64_intri_res;									\
  14.170 +})
  14.171 +
  14.172 +#define ia64_cmpxchg1_rel(ptr, new, old)						\
  14.173 +({											\
  14.174 +	uint64_t ia64_intri_res;							\
  14.175 +	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  14.176 +	asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv":					\
  14.177 +			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  14.178 +	ia64_intri_res;									\
  14.179 +})
  14.180 +
  14.181 +#define ia64_cmpxchg2_acq(ptr, new, old)						\
  14.182 +({											\
  14.183 +	uint64_t ia64_intri_res;							\
  14.184 +	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  14.185 +	asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv":					\
  14.186 +			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  14.187 +	ia64_intri_res;									\
  14.188 +})
  14.189 +
  14.190 +#define ia64_cmpxchg2_rel(ptr, new, old)						\
  14.191 +({											\
  14.192 +	uint64_t ia64_intri_res;							\
  14.193 +	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  14.194 +											\
  14.195 +	asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv":					\
  14.196 +			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  14.197 +	ia64_intri_res;									\
  14.198 +})
  14.199 +
  14.200 +#define ia64_cmpxchg4_acq(ptr, new, old)						\
  14.201 +({											\
  14.202 +	uint64_t ia64_intri_res;							\
  14.203 +	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  14.204 +	asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv":					\
  14.205 +			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  14.206 +	ia64_intri_res;									\
  14.207 +})
  14.208 +
  14.209 +#define ia64_cmpxchg4_rel(ptr, new, old)						\
  14.210 +({											\
  14.211 +	uint64_t ia64_intri_res;							\
  14.212 +	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  14.213 +	asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv":					\
  14.214 +			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  14.215 +	ia64_intri_res;									\
  14.216 +})
  14.217 +
  14.218 +#define ia64_cmpxchg8_acq(ptr, new, old)						\
  14.219 +({											\
  14.220 +	uint64_t ia64_intri_res;							\
  14.221 +	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  14.222 +	asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv":					\
  14.223 +			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  14.224 +	ia64_intri_res;									\
  14.225 +})
  14.226 +
  14.227 +#define ia64_cmpxchg8_rel(ptr, new, old)						\
  14.228 +({											\
  14.229 +	uint64_t ia64_intri_res;							\
  14.230 +	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  14.231 +											\
  14.232 +	asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv":					\
  14.233 +			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  14.234 +	ia64_intri_res;									\
  14.235 +})
  14.236 +
  14.237 +#define ia64_srlz_i()	asm volatile (";; srlz.i ;;" ::: "memory")
  14.238 +#define ia64_srlz_d()	asm volatile (";; srlz.d" ::: "memory");
  14.239 +#define __ia64_fc(addr)	asm volatile ("fc %0" :: "r"(addr) : "memory")
  14.240 +#define ia64_sync_i()	asm volatile (";; sync.i" ::: "memory")
  14.241 +
  14.242 +register unsigned long ia64_r13 asm ("r13") __attribute_used__;
  14.243 +#define __ia64_getreg(regnum)							\
  14.244 +({										\
  14.245 +	uint64_t ia64_intri_res;							\
  14.246 +										\
  14.247 +	switch (regnum) {							\
  14.248 +	case _IA64_REG_GP:							\
  14.249 +		asm volatile ("mov %0=gp" : "=r"(ia64_intri_res));		\
  14.250 +		break;								\
  14.251 +	case _IA64_REG_IP:							\
  14.252 +		asm volatile ("mov %0=ip" : "=r"(ia64_intri_res));		\
  14.253 +		break;								\
  14.254 +	case _IA64_REG_PSR:							\
  14.255 +		asm volatile ("mov %0=psr" : "=r"(ia64_intri_res));		\
  14.256 +		break;								\
  14.257 +	case _IA64_REG_TP:	/* for current() */				\
  14.258 +		ia64_intri_res = ia64_r13;					\
  14.259 +		break;								\
  14.260 +	case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:				\
  14.261 +		asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res)		\
  14.262 +				      : "i"(regnum - _IA64_REG_AR_KR0));	\
  14.263 +		break;								\
  14.264 +	case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:				\
  14.265 +		asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res)		\
  14.266 +				      : "i" (regnum - _IA64_REG_CR_DCR));	\
  14.267 +		break;								\
  14.268 +	case _IA64_REG_SP:							\
  14.269 +		asm volatile ("mov %0=sp" : "=r" (ia64_intri_res));		\
  14.270 +		break;								\
  14.271 +	default:								\
  14.272 +		ia64_bad_param_for_getreg();					\
  14.273 +		break;								\
  14.274 +	}									\
  14.275 +	ia64_intri_res;								\
  14.276 +})
  14.277 +
  14.278 +#endif /* __INTEL_COMPILER */
  14.279 +#endif /* IA64_INTRINSIC_H */
    15.1 --- a/tools/ioemu/patches/domain-timeoffset	Wed Jul 26 09:41:24 2006 -0600
    15.2 +++ b/tools/ioemu/patches/domain-timeoffset	Wed Jul 26 10:49:32 2006 -0600
    15.3 @@ -1,7 +1,7 @@
    15.4  Index: ioemu/hw/mc146818rtc.c
    15.5  ===================================================================
    15.6 ---- ioemu.orig/hw/mc146818rtc.c	2006-07-14 15:55:55.450963213 +0100
    15.7 -+++ ioemu/hw/mc146818rtc.c	2006-07-14 15:56:02.195195680 +0100
    15.8 +--- ioemu.orig/hw/mc146818rtc.c	2006-07-26 15:17:35.110819901 +0100
    15.9 ++++ ioemu/hw/mc146818rtc.c	2006-07-26 15:17:40.292255496 +0100
   15.10  @@ -178,10 +178,27 @@
   15.11       }
   15.12   }
   15.13 @@ -46,8 +46,8 @@ Index: ioemu/hw/mc146818rtc.c
   15.14   static void rtc_copy_date(RTCState *s)
   15.15  Index: ioemu/hw/pc.c
   15.16  ===================================================================
   15.17 ---- ioemu.orig/hw/pc.c	2006-07-14 15:56:01.774243586 +0100
   15.18 -+++ ioemu/hw/pc.c	2006-07-14 15:56:02.196195566 +0100
   15.19 +--- ioemu.orig/hw/pc.c	2006-07-26 15:17:39.820306906 +0100
   15.20 ++++ ioemu/hw/pc.c	2006-07-26 15:17:40.293255388 +0100
   15.21  @@ -151,7 +151,7 @@
   15.22   }
   15.23   
   15.24 @@ -117,8 +117,8 @@ Index: ioemu/hw/pc.c
   15.25   QEMUMachine pc_machine = {
   15.26  Index: ioemu/vl.c
   15.27  ===================================================================
   15.28 ---- ioemu.orig/vl.c	2006-07-14 15:56:02.010216731 +0100
   15.29 -+++ ioemu/vl.c	2006-07-14 15:56:02.198195338 +0100
   15.30 +--- ioemu.orig/vl.c	2006-07-26 15:17:40.169268893 +0100
   15.31 ++++ ioemu/vl.c	2006-07-26 15:17:40.296255061 +0100
   15.32  @@ -164,6 +164,8 @@
   15.33   
   15.34   int xc_handle;
   15.35 @@ -162,7 +162,7 @@ Index: ioemu/vl.c
   15.36               }
   15.37           }
   15.38       }
   15.39 -@@ -5963,7 +5971,8 @@
   15.40 +@@ -5992,7 +6000,8 @@
   15.41   
   15.42       machine->init(ram_size, vga_ram_size, boot_device,
   15.43                     ds, fd_filename, snapshot,
   15.44 @@ -174,8 +174,8 @@ Index: ioemu/vl.c
   15.45       qemu_mod_timer(gui_timer, qemu_get_clock(rt_clock));
   15.46  Index: ioemu/vl.h
   15.47  ===================================================================
   15.48 ---- ioemu.orig/vl.h	2006-07-14 15:56:01.779243017 +0100
   15.49 -+++ ioemu/vl.h	2006-07-14 15:56:02.199195224 +0100
   15.50 +--- ioemu.orig/vl.h	2006-07-26 15:17:39.825306361 +0100
   15.51 ++++ ioemu/vl.h	2006-07-26 15:17:40.297254952 +0100
   15.52  @@ -556,7 +556,7 @@
   15.53                                    int boot_device,
   15.54                DisplayState *ds, const char **fd_filename, int snapshot,
    16.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    16.2 +++ b/tools/ioemu/patches/ioemu-ia64	Wed Jul 26 10:49:32 2006 -0600
    16.3 @@ -0,0 +1,471 @@
    16.4 +Index: ioemu/hw/iommu.c
    16.5 +===================================================================
    16.6 +--- ioemu.orig/hw/iommu.c	2006-07-14 13:43:45.000000000 +0100
    16.7 ++++ ioemu/hw/iommu.c	2006-07-26 13:34:50.039997837 +0100
    16.8 +@@ -82,7 +82,11 @@
    16.9 + #define IOPTE_VALID         0x00000002 /* IOPTE is valid */
   16.10 + #define IOPTE_WAZ           0x00000001 /* Write as zeros */
   16.11 + 
   16.12 ++#if defined(__i386__) || defined(__x86_64__)
   16.13 + #define PAGE_SHIFT      12
   16.14 ++#elif defined(__ia64__)
   16.15 ++#define PAGE_SHIFT      14
   16.16 ++#endif 
   16.17 + #define PAGE_SIZE       (1 << PAGE_SHIFT)
   16.18 + #define PAGE_MASK	(PAGE_SIZE - 1)
   16.19 + 
   16.20 +Index: ioemu/cpu-all.h
   16.21 +===================================================================
   16.22 +--- ioemu.orig/cpu-all.h	2006-07-26 13:33:45.946834283 +0100
   16.23 ++++ ioemu/cpu-all.h	2006-07-26 13:34:50.038997944 +0100
   16.24 +@@ -835,6 +835,31 @@
   16.25 +                 :"=m" (*(volatile long *)addr)
   16.26 +                 :"dIr" (nr));
   16.27 + }
   16.28 ++#elif defined(__ia64__)
   16.29 ++#include "ia64_intrinsic.h"
   16.30 ++#define atomic_set_bit(nr, addr) ({					\
   16.31 ++	typeof(*addr) bit, old, new;					\
   16.32 ++	volatile typeof(*addr) *m;					\
   16.33 ++									\
   16.34 ++	m = (volatile typeof(*addr)*)(addr + nr / (8*sizeof(*addr)));	\
   16.35 ++	bit = 1 << (nr % (8*sizeof(*addr)));				\
   16.36 ++	do {								\
   16.37 ++		old = *m;						\
   16.38 ++		new = old | bit;					\
   16.39 ++	} while (cmpxchg_acq(m, old, new) != old);			\
   16.40 ++})
   16.41 ++
   16.42 ++#define atomic_clear_bit(nr, addr) ({					\
   16.43 ++	typeof(*addr) bit, old, new;					\
   16.44 ++	volatile typeof(*addr) *m;					\
   16.45 ++									\
   16.46 ++	m = (volatile typeof(*addr)*)(addr + nr / (8*sizeof(*addr)));	\
   16.47 ++	bit = ~(1 << (nr % (8*sizeof(*addr))));				\
   16.48 ++	do {								\
   16.49 ++		old = *m;						\
   16.50 ++		new = old & bit;					\
   16.51 ++	} while (cmpxchg_acq(m, old, new) != old);			\
   16.52 ++})
   16.53 + #endif
   16.54 + 
   16.55 + /* memory API */
   16.56 +Index: ioemu/vl.c
   16.57 +===================================================================
   16.58 +--- ioemu.orig/vl.c	2006-07-26 13:33:45.996828953 +0100
   16.59 ++++ ioemu/vl.c	2006-07-26 13:34:50.044997304 +0100
   16.60 +@@ -5577,6 +5577,7 @@
   16.61 +         exit(-1);
   16.62 +     }
   16.63 + 
   16.64 ++#if defined(__i386__) || defined(__x86_64__)
   16.65 +     if (xc_get_pfn_list(xc_handle, domid, page_array, nr_pages) != nr_pages) {
   16.66 +         fprintf(logfile, "xc_get_pfn_list returned error %d\n", errno);
   16.67 +         exit(-1);
   16.68 +@@ -5597,6 +5598,34 @@
   16.69 +     fprintf(logfile, "shared page at pfn:%lx, mfn: %"PRIx64"\n", nr_pages - 1,
   16.70 +             (uint64_t)(page_array[nr_pages - 1]));
   16.71 + 
   16.72 ++#elif defined(__ia64__)
   16.73 ++    if (xc_ia64_get_pfn_list(xc_handle, domid,
   16.74 ++                             page_array, 0, nr_pages) != nr_pages) {
   16.75 ++        fprintf(logfile, "xc_ia64_get_pfn_list returned error %d\n", errno);
   16.76 ++        exit(-1);
   16.77 ++    }
   16.78 ++
   16.79 ++    phys_ram_base = xc_map_foreign_batch(xc_handle, domid,
   16.80 ++                                         PROT_READ|PROT_WRITE,
   16.81 ++                                         page_array, nr_pages);
   16.82 ++    if (phys_ram_base == 0) {
   16.83 ++        fprintf(logfile, "xc_map_foreign_batch returned error %d\n", errno);
   16.84 ++        exit(-1);
   16.85 ++    }
   16.86 ++
   16.87 ++    if (xc_ia64_get_pfn_list(xc_handle, domid, page_array,
   16.88 ++                             nr_pages + (GFW_SIZE >> PAGE_SHIFT), 1)!= 1){
   16.89 ++        fprintf(logfile, "xc_ia64_get_pfn_list returned error %d\n", errno);
   16.90 ++        exit(-1);
   16.91 ++    }
   16.92 ++
   16.93 ++    shared_page = xc_map_foreign_range(xc_handle, domid, PAGE_SIZE,
   16.94 ++                                       PROT_READ|PROT_WRITE,
   16.95 ++                                       page_array[0]);
   16.96 ++
   16.97 ++    fprintf(logfile, "shared page at pfn:%lx, mfn: %l016x\n",
   16.98 ++            IO_PAGE_START >> PAGE_SHIFT, page_array[0]);
   16.99 ++#endif
  16.100 + #else  /* !CONFIG_DM */
  16.101 + 
  16.102 + #ifdef CONFIG_SOFTMMU
  16.103 +Index: ioemu/target-i386-dm/exec-dm.c
  16.104 +===================================================================
  16.105 +--- ioemu.orig/target-i386-dm/exec-dm.c	2006-07-26 13:33:45.882841107 +0100
  16.106 ++++ ioemu/target-i386-dm/exec-dm.c	2006-07-26 13:34:50.040997731 +0100
  16.107 +@@ -340,6 +340,23 @@
  16.108 +     return io_mem_read[io_index >> IO_MEM_SHIFT];
  16.109 + }
  16.110 + 
  16.111 ++#ifdef __ia64__
  16.112 ++/* IA64 has seperate I/D cache, with coherence maintained by DMA controller.
  16.113 ++ * So to emulate right behavior that guest OS is assumed, we need to flush
  16.114 ++ * I/D cache here.
  16.115 ++ */
  16.116 ++static void sync_icache(unsigned long address, int len)
  16.117 ++{
  16.118 ++    int l;
  16.119 ++
  16.120 ++    for(l = 0; l < (len + 32); l += 32)
  16.121 ++        __ia64_fc(address + l);
  16.122 ++
  16.123 ++    ia64_sync_i();
  16.124 ++    ia64_srlz_i();
  16.125 ++}
  16.126 ++#endif 
  16.127 ++
  16.128 + /* physical memory access (slow version, mainly for debug) */
  16.129 + #if defined(CONFIG_USER_ONLY)
  16.130 + void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, 
  16.131 +@@ -455,6 +472,9 @@
  16.132 +                 ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) + 
  16.133 +                     (addr & ~TARGET_PAGE_MASK);
  16.134 +                 memcpy(buf, ptr, l);
  16.135 ++#ifdef __ia64__
  16.136 ++                sync_icache((unsigned long)ptr, l);
  16.137 ++#endif 
  16.138 +             }
  16.139 +         }
  16.140 +         len -= l;
  16.141 +Index: ioemu/exec-all.h
  16.142 +===================================================================
  16.143 +--- ioemu.orig/exec-all.h	2006-07-26 13:33:45.861843346 +0100
  16.144 ++++ ioemu/exec-all.h	2006-07-26 13:38:30.096491388 +0100
  16.145 +@@ -391,6 +391,15 @@
  16.146 + }
  16.147 + #endif
  16.148 + 
  16.149 ++#ifdef __ia64__
  16.150 ++#include "ia64_intrinsic.h"
  16.151 ++static inline int testandset (int *p)
  16.152 ++{
  16.153 ++    uint32_t o = 0, n = 1;
  16.154 ++    return (int)cmpxchg_acq(p, o, n);
  16.155 ++}
  16.156 ++#endif
  16.157 ++
  16.158 + #ifdef __s390__
  16.159 + static inline int testandset (int *p)
  16.160 + {
  16.161 +@@ -462,12 +471,13 @@
  16.162 + }
  16.163 + #endif
  16.164 + 
  16.165 +-#ifdef __ia64
  16.166 +-#include <ia64intrin.h>
  16.167 ++#ifdef __ia64__
  16.168 ++#include "ia64_intrinsic.h"
  16.169 + 
  16.170 + static inline int testandset (int *p)
  16.171 + {
  16.172 +-    return __sync_lock_test_and_set (p, 1);
  16.173 ++    uint32_t o = 0, n = 1;
  16.174 ++    return (int)cmpxchg_acq(p, o, n);
  16.175 + }
  16.176 + #endif
  16.177 + 
  16.178 +Index: ioemu/target-i386-dm/cpu.h
  16.179 +===================================================================
  16.180 +--- ioemu.orig/target-i386-dm/cpu.h	2006-07-26 13:33:45.882841107 +0100
  16.181 ++++ ioemu/target-i386-dm/cpu.h	2006-07-26 13:34:50.040997731 +0100
  16.182 +@@ -80,7 +80,11 @@
  16.183 + /* helper2.c */
  16.184 + int main_loop(void);
  16.185 + 
  16.186 ++#if defined(__i386__) || defined(__x86_64__)
  16.187 + #define TARGET_PAGE_BITS 12
  16.188 ++#elif defined(__ia64__)
  16.189 ++#define TARGET_PAGE_BITS 14
  16.190 ++#endif 
  16.191 + #include "cpu-all.h"
  16.192 + 
  16.193 + #endif /* CPU_I386_H */
  16.194 +Index: ioemu/ia64_intrinsic.h
  16.195 +===================================================================
  16.196 +--- /dev/null	1970-01-01 00:00:00.000000000 +0000
  16.197 ++++ ioemu/ia64_intrinsic.h	2006-07-26 13:34:50.038997944 +0100
  16.198 +@@ -0,0 +1,276 @@
  16.199 ++#ifndef IA64_INTRINSIC_H
  16.200 ++#define IA64_INTRINSIC_H
  16.201 ++
  16.202 ++/*
  16.203 ++ * Compiler-dependent Intrinsics
  16.204 ++ *
  16.205 ++ * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
  16.206 ++ * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
  16.207 ++ *
  16.208 ++ */
  16.209 ++extern long ia64_cmpxchg_called_with_bad_pointer (void);
  16.210 ++extern void ia64_bad_param_for_getreg (void);
  16.211 ++#define ia64_cmpxchg(sem,ptr,o,n,s) ({					\
  16.212 ++	uint64_t _o, _r;						\
  16.213 ++	switch(s) {							\
  16.214 ++		case 1: _o = (uint8_t)(long)(o); break;			\
  16.215 ++		case 2: _o = (uint16_t)(long)(o); break;		\
  16.216 ++		case 4: _o = (uint32_t)(long)(o); break;		\
  16.217 ++		case 8: _o = (uint64_t)(long)(o); break;		\
  16.218 ++		default: break;						\
  16.219 ++	}								\
  16.220 ++	switch(s) {							\
  16.221 ++		case 1:							\
  16.222 ++		_r = ia64_cmpxchg1_##sem((uint8_t*)ptr,n,_o); break;	\
  16.223 ++		case 2:							\
  16.224 ++		_r = ia64_cmpxchg2_##sem((uint16_t*)ptr,n,_o); break;	\
  16.225 ++		case 4:							\
  16.226 ++		_r = ia64_cmpxchg4_##sem((uint32_t*)ptr,n,_o); break;	\
  16.227 ++		case 8:							\
  16.228 ++		_r = ia64_cmpxchg8_##sem((uint64_t*)ptr,n,_o); break;	\
  16.229 ++		default:						\
  16.230 ++		_r = ia64_cmpxchg_called_with_bad_pointer(); break;	\
  16.231 ++	}								\
  16.232 ++	(__typeof__(o)) _r;						\
  16.233 ++})
  16.234 ++
  16.235 ++#define cmpxchg_acq(ptr,o,n) ia64_cmpxchg(acq,ptr,o,n,sizeof(*ptr))
  16.236 ++#define cmpxchg_rel(ptr,o,n) ia64_cmpxchg(rel,ptr,o,n,sizeof(*ptr))
  16.237 ++
  16.238 ++/*
  16.239 ++ * Register Names for getreg() and setreg().
  16.240 ++ *
  16.241 ++ * The "magic" numbers happen to match the values used by the Intel compiler's
  16.242 ++ * getreg()/setreg() intrinsics.
  16.243 ++ */
  16.244 ++
  16.245 ++/* Special Registers */
  16.246 ++
  16.247 ++#define _IA64_REG_IP		1016	/* getreg only */
  16.248 ++#define _IA64_REG_PSR		1019
  16.249 ++#define _IA64_REG_PSR_L		1019
  16.250 ++
  16.251 ++/* General Integer Registers */
  16.252 ++
  16.253 ++#define _IA64_REG_GP		1025	/* R1 */
  16.254 ++#define _IA64_REG_R8		1032	/* R8 */
  16.255 ++#define _IA64_REG_R9		1033	/* R9 */
  16.256 ++#define _IA64_REG_SP		1036	/* R12 */
  16.257 ++#define _IA64_REG_TP		1037	/* R13 */
  16.258 ++
  16.259 ++/* Application Registers */
  16.260 ++
  16.261 ++#define _IA64_REG_AR_KR0	3072
  16.262 ++#define _IA64_REG_AR_KR1	3073
  16.263 ++#define _IA64_REG_AR_KR2	3074
  16.264 ++#define _IA64_REG_AR_KR3	3075
  16.265 ++#define _IA64_REG_AR_KR4	3076
  16.266 ++#define _IA64_REG_AR_KR5	3077
  16.267 ++#define _IA64_REG_AR_KR6	3078
  16.268 ++#define _IA64_REG_AR_KR7	3079
  16.269 ++#define _IA64_REG_AR_RSC	3088
  16.270 ++#define _IA64_REG_AR_BSP	3089
  16.271 ++#define _IA64_REG_AR_BSPSTORE	3090
  16.272 ++#define _IA64_REG_AR_RNAT	3091
  16.273 ++#define _IA64_REG_AR_FCR	3093
  16.274 ++#define _IA64_REG_AR_EFLAG	3096
  16.275 ++#define _IA64_REG_AR_CSD	3097
  16.276 ++#define _IA64_REG_AR_SSD	3098
  16.277 ++#define _IA64_REG_AR_CFLAG	3099
  16.278 ++#define _IA64_REG_AR_FSR	3100
  16.279 ++#define _IA64_REG_AR_FIR	3101
  16.280 ++#define _IA64_REG_AR_FDR	3102
  16.281 ++#define _IA64_REG_AR_CCV	3104
  16.282 ++#define _IA64_REG_AR_UNAT	3108
  16.283 ++#define _IA64_REG_AR_FPSR	3112
  16.284 ++#define _IA64_REG_AR_ITC	3116
  16.285 ++#define _IA64_REG_AR_PFS	3136
  16.286 ++#define _IA64_REG_AR_LC		3137
  16.287 ++#define _IA64_REG_AR_EC		3138
  16.288 ++
  16.289 ++/* Control Registers */
  16.290 ++
  16.291 ++#define _IA64_REG_CR_DCR	4096
  16.292 ++#define _IA64_REG_CR_ITM	4097
  16.293 ++#define _IA64_REG_CR_IVA	4098
  16.294 ++#define _IA64_REG_CR_PTA	4104
  16.295 ++#define _IA64_REG_CR_IPSR	4112
  16.296 ++#define _IA64_REG_CR_ISR	4113
  16.297 ++#define _IA64_REG_CR_IIP	4115
  16.298 ++#define _IA64_REG_CR_IFA	4116
  16.299 ++#define _IA64_REG_CR_ITIR	4117
  16.300 ++#define _IA64_REG_CR_IIPA	4118
  16.301 ++#define _IA64_REG_CR_IFS	4119
  16.302 ++#define _IA64_REG_CR_IIM	4120
  16.303 ++#define _IA64_REG_CR_IHA	4121
  16.304 ++#define _IA64_REG_CR_LID	4160
  16.305 ++#define _IA64_REG_CR_IVR	4161	/* getreg only */
  16.306 ++#define _IA64_REG_CR_TPR	4162
  16.307 ++#define _IA64_REG_CR_EOI	4163
  16.308 ++#define _IA64_REG_CR_IRR0	4164	/* getreg only */
  16.309 ++#define _IA64_REG_CR_IRR1	4165	/* getreg only */
  16.310 ++#define _IA64_REG_CR_IRR2	4166	/* getreg only */
  16.311 ++#define _IA64_REG_CR_IRR3	4167	/* getreg only */
  16.312 ++#define _IA64_REG_CR_ITV	4168
  16.313 ++#define _IA64_REG_CR_PMV	4169
  16.314 ++#define _IA64_REG_CR_CMCV	4170
  16.315 ++#define _IA64_REG_CR_LRR0	4176
  16.316 ++#define _IA64_REG_CR_LRR1	4177
  16.317 ++
  16.318 ++/* Indirect Registers for getindreg() and setindreg() */
  16.319 ++
  16.320 ++#define _IA64_REG_INDR_CPUID	9000	/* getindreg only */
  16.321 ++#define _IA64_REG_INDR_DBR	9001
  16.322 ++#define _IA64_REG_INDR_IBR	9002
  16.323 ++#define _IA64_REG_INDR_PKR	9003
  16.324 ++#define _IA64_REG_INDR_PMC	9004
  16.325 ++#define _IA64_REG_INDR_PMD	9005
  16.326 ++#define _IA64_REG_INDR_RR	9006
  16.327 ++
  16.328 ++#ifdef __INTEL_COMPILER
  16.329 ++void  __fc(uint64_t *addr);
  16.330 ++void  __synci(void);
  16.331 ++void __isrlz(void);
  16.332 ++void __dsrlz(void);
  16.333 ++uint64_t __getReg(const int whichReg);
  16.334 ++uint64_t _InterlockedCompareExchange8_rel(volatile uint8_t *dest, uint64_t xchg, uint64_t comp);
  16.335 ++uint64_t _InterlockedCompareExchange8_acq(volatile uint8_t *dest, uint64_t xchg, uint64_t comp);
  16.336 ++uint64_t _InterlockedCompareExchange16_rel(volatile uint16_t *dest, uint64_t xchg, uint64_t comp);
  16.337 ++uint64_t _InterlockedCompareExchange16_acq(volatile uint16_t *dest, uint64_t xchg, uint64_t comp);
  16.338 ++uint64_t _InterlockedCompareExchange_rel(volatile uint32_t *dest, uint64_t xchg, uint64_t comp);
  16.339 ++uint64_t _InterlockedCompareExchange_acq(volatile uint32_t *dest, uint64_t xchg, uint64_t comp);
  16.340 ++uint64_t _InterlockedCompareExchange64_rel(volatile uint64_t *dest, uint64_t xchg, uint64_t comp);
  16.341 ++u64_t _InterlockedCompareExchange64_acq(volatile uint64_t *dest, uint64_t xchg, uint64_t comp);
  16.342 ++
  16.343 ++#define ia64_cmpxchg1_rel	_InterlockedCompareExchange8_rel
  16.344 ++#define ia64_cmpxchg1_acq	_InterlockedCompareExchange8_acq
  16.345 ++#define ia64_cmpxchg2_rel	_InterlockedCompareExchange16_rel
  16.346 ++#define ia64_cmpxchg2_acq	_InterlockedCompareExchange16_acq
  16.347 ++#define ia64_cmpxchg4_rel	_InterlockedCompareExchange_rel
  16.348 ++#define ia64_cmpxchg4_acq	_InterlockedCompareExchange_acq
  16.349 ++#define ia64_cmpxchg8_rel	_InterlockedCompareExchange64_rel
  16.350 ++#define ia64_cmpxchg8_acq	_InterlockedCompareExchange64_acq
  16.351 ++
  16.352 ++#define ia64_srlz_d		__dsrlz
  16.353 ++#define ia64_srlz_i		__isrlz
  16.354 ++#define __ia64_fc 		__fc
  16.355 ++#define ia64_sync_i		__synci
  16.356 ++#define __ia64_getreg		__getReg
  16.357 ++#else /* __INTEL_COMPILER */
  16.358 ++#define ia64_cmpxchg1_acq(ptr, new, old)						\
  16.359 ++({											\
  16.360 ++	uint64_t ia64_intri_res;							\
  16.361 ++	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  16.362 ++	asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv":					\
  16.363 ++			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  16.364 ++	ia64_intri_res;									\
  16.365 ++})
  16.366 ++
  16.367 ++#define ia64_cmpxchg1_rel(ptr, new, old)						\
  16.368 ++({											\
  16.369 ++	uint64_t ia64_intri_res;							\
  16.370 ++	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  16.371 ++	asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv":					\
  16.372 ++			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  16.373 ++	ia64_intri_res;									\
  16.374 ++})
  16.375 ++
  16.376 ++#define ia64_cmpxchg2_acq(ptr, new, old)						\
  16.377 ++({											\
  16.378 ++	uint64_t ia64_intri_res;							\
  16.379 ++	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  16.380 ++	asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv":					\
  16.381 ++			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  16.382 ++	ia64_intri_res;									\
  16.383 ++})
  16.384 ++
  16.385 ++#define ia64_cmpxchg2_rel(ptr, new, old)						\
  16.386 ++({											\
  16.387 ++	uint64_t ia64_intri_res;							\
  16.388 ++	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  16.389 ++											\
  16.390 ++	asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv":					\
  16.391 ++			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  16.392 ++	ia64_intri_res;									\
  16.393 ++})
  16.394 ++
  16.395 ++#define ia64_cmpxchg4_acq(ptr, new, old)						\
  16.396 ++({											\
  16.397 ++	uint64_t ia64_intri_res;							\
  16.398 ++	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  16.399 ++	asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv":					\
  16.400 ++			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  16.401 ++	ia64_intri_res;									\
  16.402 ++})
  16.403 ++
  16.404 ++#define ia64_cmpxchg4_rel(ptr, new, old)						\
  16.405 ++({											\
  16.406 ++	uint64_t ia64_intri_res;							\
  16.407 ++	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  16.408 ++	asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv":					\
  16.409 ++			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  16.410 ++	ia64_intri_res;									\
  16.411 ++})
  16.412 ++
  16.413 ++#define ia64_cmpxchg8_acq(ptr, new, old)						\
  16.414 ++({											\
  16.415 ++	uint64_t ia64_intri_res;							\
  16.416 ++	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  16.417 ++	asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv":					\
  16.418 ++			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  16.419 ++	ia64_intri_res;									\
  16.420 ++})
  16.421 ++
  16.422 ++#define ia64_cmpxchg8_rel(ptr, new, old)						\
  16.423 ++({											\
  16.424 ++	uint64_t ia64_intri_res;							\
  16.425 ++	asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));					\
  16.426 ++											\
  16.427 ++	asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv":					\
  16.428 ++			      "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory");	\
  16.429 ++	ia64_intri_res;									\
  16.430 ++})
  16.431 ++
  16.432 ++#define ia64_srlz_i()	asm volatile (";; srlz.i ;;" ::: "memory")
  16.433 ++#define ia64_srlz_d()	asm volatile (";; srlz.d" ::: "memory");
  16.434 ++#define __ia64_fc(addr)	asm volatile ("fc %0" :: "r"(addr) : "memory")
  16.435 ++#define ia64_sync_i()	asm volatile (";; sync.i" ::: "memory")
  16.436 ++
  16.437 ++register unsigned long ia64_r13 asm ("r13") __attribute_used__;
  16.438 ++#define __ia64_getreg(regnum)							\
  16.439 ++({										\
  16.440 ++	uint64_t ia64_intri_res;							\
  16.441 ++										\
  16.442 ++	switch (regnum) {							\
  16.443 ++	case _IA64_REG_GP:							\
  16.444 ++		asm volatile ("mov %0=gp" : "=r"(ia64_intri_res));		\
  16.445 ++		break;								\
  16.446 ++	case _IA64_REG_IP:							\
  16.447 ++		asm volatile ("mov %0=ip" : "=r"(ia64_intri_res));		\
  16.448 ++		break;								\
  16.449 ++	case _IA64_REG_PSR:							\
  16.450 ++		asm volatile ("mov %0=psr" : "=r"(ia64_intri_res));		\
  16.451 ++		break;								\
  16.452 ++	case _IA64_REG_TP:	/* for current() */				\
  16.453 ++		ia64_intri_res = ia64_r13;					\
  16.454 ++		break;								\
  16.455 ++	case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:				\
  16.456 ++		asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res)		\
  16.457 ++				      : "i"(regnum - _IA64_REG_AR_KR0));	\
  16.458 ++		break;								\
  16.459 ++	case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:				\
  16.460 ++		asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res)		\
  16.461 ++				      : "i" (regnum - _IA64_REG_CR_DCR));	\
  16.462 ++		break;								\
  16.463 ++	case _IA64_REG_SP:							\
  16.464 ++		asm volatile ("mov %0=sp" : "=r" (ia64_intri_res));		\
  16.465 ++		break;								\
  16.466 ++	default:								\
  16.467 ++		ia64_bad_param_for_getreg();					\
  16.468 ++		break;								\
  16.469 ++	}									\
  16.470 ++	ia64_intri_res;								\
  16.471 ++})
  16.472 ++
  16.473 ++#endif /* __INTEL_COMPILER */
  16.474 ++#endif /* IA64_INTRINSIC_H */
    17.1 --- a/tools/ioemu/patches/qemu-64bit	Wed Jul 26 09:41:24 2006 -0600
    17.2 +++ b/tools/ioemu/patches/qemu-64bit	Wed Jul 26 10:49:32 2006 -0600
    17.3 @@ -1,7 +1,8 @@
    17.4 -diff -r 2b3e57b3e1ec cpu-all.h
    17.5 ---- a/cpu-all.h	Mon Jun 26 15:16:39 2006 +0100
    17.6 -+++ b/cpu-all.h	Mon Jun 26 15:16:44 2006 +0100
    17.7 -@@ -822,7 +822,7 @@ int cpu_inl(CPUState *env, int addr);
    17.8 +Index: ioemu/cpu-all.h
    17.9 +===================================================================
   17.10 +--- ioemu.orig/cpu-all.h	2006-07-26 13:19:49.515051864 +0100
   17.11 ++++ ioemu/cpu-all.h	2006-07-26 13:19:49.563046860 +0100
   17.12 +@@ -822,7 +822,7 @@
   17.13   
   17.14   /* memory API */
   17.15   
   17.16 @@ -10,10 +11,11 @@ diff -r 2b3e57b3e1ec cpu-all.h
   17.17   extern int phys_ram_fd;
   17.18   extern uint8_t *phys_ram_base;
   17.19   extern uint8_t *phys_ram_dirty;
   17.20 -diff -r 2b3e57b3e1ec hw/pc.c
   17.21 ---- a/hw/pc.c	Mon Jun 26 15:16:39 2006 +0100
   17.22 -+++ b/hw/pc.c	Mon Jun 26 15:16:44 2006 +0100
   17.23 -@@ -147,7 +147,7 @@ static void cmos_init_hd(int type_ofs, i
   17.24 +Index: ioemu/hw/pc.c
   17.25 +===================================================================
   17.26 +--- ioemu.orig/hw/pc.c	2006-07-26 13:19:49.516051760 +0100
   17.27 ++++ ioemu/hw/pc.c	2006-07-26 13:19:49.564046755 +0100
   17.28 +@@ -147,7 +147,7 @@
   17.29   }
   17.30   
   17.31   /* hd_table must contain 4 block drivers */
   17.32 @@ -22,7 +24,7 @@ diff -r 2b3e57b3e1ec hw/pc.c
   17.33   {
   17.34       RTCState *s = rtc_state;
   17.35       int val;
   17.36 -@@ -604,7 +604,7 @@ static void pc_init_ne2k_isa(NICInfo *nd
   17.37 +@@ -604,7 +604,7 @@
   17.38   }
   17.39   
   17.40   /* PC hardware initialisation */
   17.41 @@ -31,7 +33,7 @@ diff -r 2b3e57b3e1ec hw/pc.c
   17.42                        DisplayState *ds, const char **fd_filename, int snapshot,
   17.43                        const char *kernel_filename, const char *kernel_cmdline,
   17.44                        const char *initrd_filename,
   17.45 -@@ -853,7 +853,7 @@ static void pc_init1(int ram_size, int v
   17.46 +@@ -853,7 +853,7 @@
   17.47       }
   17.48   }
   17.49   
   17.50 @@ -40,7 +42,7 @@ diff -r 2b3e57b3e1ec hw/pc.c
   17.51                           DisplayState *ds, const char **fd_filename, 
   17.52                           int snapshot, 
   17.53                           const char *kernel_filename, 
   17.54 -@@ -866,7 +866,7 @@ static void pc_init_pci(int ram_size, in
   17.55 +@@ -866,7 +866,7 @@
   17.56                initrd_filename, 1);
   17.57   }
   17.58   
   17.59 @@ -49,10 +51,11 @@ diff -r 2b3e57b3e1ec hw/pc.c
   17.60                           DisplayState *ds, const char **fd_filename, 
   17.61                           int snapshot, 
   17.62                           const char *kernel_filename, 
   17.63 -diff -r 2b3e57b3e1ec vl.c
   17.64 ---- a/vl.c	Mon Jun 26 15:16:39 2006 +0100
   17.65 -+++ b/vl.c	Mon Jun 26 15:16:44 2006 +0100
   17.66 -@@ -123,7 +123,7 @@ const char* keyboard_layout = NULL;
   17.67 +Index: ioemu/vl.c
   17.68 +===================================================================
   17.69 +--- ioemu.orig/vl.c	2006-07-26 13:19:49.552048007 +0100
   17.70 ++++ ioemu/vl.c	2006-07-26 13:19:49.566046547 +0100
   17.71 +@@ -123,7 +123,7 @@
   17.72   const char* keyboard_layout = NULL;
   17.73   int64_t ticks_per_sec;
   17.74   int boot_device = 'c';
   17.75 @@ -61,7 +64,7 @@ diff -r 2b3e57b3e1ec vl.c
   17.76   int pit_min_timer_count = 0;
   17.77   int nb_nics;
   17.78   NICInfo nd_table[MAX_NICS];
   17.79 -@@ -5320,7 +5320,7 @@ int main(int argc, char **argv)
   17.80 +@@ -5320,7 +5320,7 @@
   17.81                   help();
   17.82                   break;
   17.83               case QEMU_OPTION_m:
   17.84 @@ -70,10 +73,11 @@ diff -r 2b3e57b3e1ec vl.c
   17.85                   if (ram_size <= 0)
   17.86                       help();
   17.87                   if (ram_size > PHYS_RAM_MAX_SIZE) {
   17.88 -diff -r 2b3e57b3e1ec vl.h
   17.89 ---- a/vl.h	Mon Jun 26 15:16:39 2006 +0100
   17.90 -+++ b/vl.h	Mon Jun 26 15:16:44 2006 +0100
   17.91 -@@ -138,7 +138,7 @@ extern int xc_handle;
   17.92 +Index: ioemu/vl.h
   17.93 +===================================================================
   17.94 +--- ioemu.orig/vl.h	2006-07-26 13:19:49.552048007 +0100
   17.95 ++++ ioemu/vl.h	2006-07-26 13:19:49.567046443 +0100
   17.96 +@@ -138,7 +138,7 @@
   17.97   extern int xc_handle;
   17.98   extern int domid;
   17.99   
  17.100 @@ -82,7 +86,7 @@ diff -r 2b3e57b3e1ec vl.h
  17.101   extern int bios_size;
  17.102   extern int rtc_utc;
  17.103   extern int cirrus_vga_enabled;
  17.104 -@@ -542,7 +542,7 @@ int qcow_compress_cluster(BlockDriverSta
  17.105 +@@ -542,7 +542,7 @@
  17.106   
  17.107   #ifndef QEMU_TOOL
  17.108   
  17.109 @@ -91,3 +95,17 @@ diff -r 2b3e57b3e1ec vl.h
  17.110                                    int boot_device,
  17.111                DisplayState *ds, const char **fd_filename, int snapshot,
  17.112                const char *kernel_filename, const char *kernel_cmdline,
  17.113 +Index: ioemu/hw/vga.c
  17.114 +===================================================================
  17.115 +--- ioemu.orig/hw/vga.c	2006-07-26 13:19:49.549048319 +0100
  17.116 ++++ ioemu/hw/vga.c	2006-07-26 13:20:17.956085603 +0100
  17.117 +@@ -1293,7 +1293,8 @@
  17.118 + static void vga_draw_graphic(VGAState *s, int full_update)
  17.119 + {
  17.120 +     int y1, y, update, page_min, page_max, linesize, y_start, double_scan, mask;
  17.121 +-    int width, height, shift_control, line_offset, page0, page1, bwidth;
  17.122 ++    int width, height, shift_control, line_offset, bwidth;
  17.123 ++    ram_addr_t page0, page1;
  17.124 +     int disp_width, multi_scan, multi_run;
  17.125 +     uint8_t *d;
  17.126 +     uint32_t v, addr1, addr;
    18.1 --- a/tools/ioemu/patches/qemu-bugfixes	Wed Jul 26 09:41:24 2006 -0600
    18.2 +++ b/tools/ioemu/patches/qemu-bugfixes	Wed Jul 26 10:49:32 2006 -0600
    18.3 @@ -1,7 +1,8 @@
    18.4 -diff -r d76fb4ee3e48 console.c
    18.5 ---- a/console.c	Mon Jun 26 15:16:44 2006 +0100
    18.6 -+++ b/console.c	Mon Jun 26 15:47:43 2006 +0100
    18.7 -@@ -449,7 +449,7 @@ static void text_console_resize(TextCons
    18.8 +Index: ioemu/console.c
    18.9 +===================================================================
   18.10 +--- ioemu.orig/console.c	2006-07-26 13:39:11.999009495 +0100
   18.11 ++++ ioemu/console.c	2006-07-26 14:15:19.413719225 +0100
   18.12 +@@ -449,7 +449,7 @@
   18.13               c++;
   18.14           }
   18.15       }
   18.16 @@ -10,9 +11,47 @@ diff -r d76fb4ee3e48 console.c
   18.17       s->cells = cells;
   18.18   }
   18.19   
   18.20 -diff -r d76fb4ee3e48 usb-linux.c
   18.21 ---- a/usb-linux.c	Mon Jun 26 15:16:44 2006 +0100
   18.22 -+++ b/usb-linux.c	Mon Jun 26 15:47:43 2006 +0100
   18.23 +@@ -954,11 +954,21 @@
   18.24 +     return !active_console->text_console;
   18.25 + }
   18.26 + 
   18.27 ++void set_color_table(DisplayState *ds) 
   18.28 ++{
   18.29 ++    int i, j;
   18.30 ++    for(j = 0; j < 2; j++) {
   18.31 ++	for(i = 0; i < 8; i++) {
   18.32 ++	    color_table[j][i] =
   18.33 ++		col_expand(ds, vga_get_color(ds, color_table_rgb[j][i]));
   18.34 ++	}
   18.35 ++    }
   18.36 ++}
   18.37 ++
   18.38 + CharDriverState *text_console_init(DisplayState *ds)
   18.39 + {
   18.40 +     CharDriverState *chr;
   18.41 +     TextConsole *s;
   18.42 +-    int i,j;
   18.43 +     static int color_inited;
   18.44 + 
   18.45 +     chr = qemu_mallocz(sizeof(CharDriverState));
   18.46 +@@ -976,12 +986,7 @@
   18.47 + 
   18.48 +     if (!color_inited) {
   18.49 +         color_inited = 1;
   18.50 +-        for(j = 0; j < 2; j++) {
   18.51 +-            for(i = 0; i < 8; i++) {
   18.52 +-                color_table[j][i] = col_expand(s->ds, 
   18.53 +-                        vga_get_color(s->ds, color_table_rgb[j][i]));
   18.54 +-            }
   18.55 +-        }
   18.56 ++        set_color_table(ds);
   18.57 +     }
   18.58 +     s->y_displayed = 0;
   18.59 +     s->y_base = 0;
   18.60 +Index: ioemu/usb-linux.c
   18.61 +===================================================================
   18.62 +--- ioemu.orig/usb-linux.c	2006-07-26 13:39:11.999009495 +0100
   18.63 ++++ ioemu/usb-linux.c	2006-07-26 13:39:16.622514851 +0100
   18.64  @@ -26,6 +26,7 @@
   18.65   #if defined(__linux__)
   18.66   #include <dirent.h>
    19.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    19.2 +++ b/tools/ioemu/patches/qemu-init-vgabios	Wed Jul 26 10:49:32 2006 -0600
    19.3 @@ -0,0 +1,141 @@
    19.4 +Index: ioemu/hw/vga.c
    19.5 +===================================================================
    19.6 +--- ioemu.orig/hw/vga.c	2006-07-26 15:16:41.955609165 +0100
    19.7 ++++ ioemu/hw/vga.c	2006-07-26 15:17:16.910802283 +0100
    19.8 +@@ -1669,6 +1669,136 @@
    19.9 +     }
   19.10 + }
   19.11 + 
   19.12 ++/* do the same job as vgabios before vgabios get ready - yeah */
   19.13 ++void vga_bios_init(VGAState *s)
   19.14 ++{
   19.15 ++    uint8_t palette_model[192] = {
   19.16 ++        0,   0,   0,   0,   0, 170,   0, 170,
   19.17 ++	0,   0, 170, 170, 170,   0,   0, 170,
   19.18 ++        0, 170, 170,  85,   0, 170, 170, 170,
   19.19 ++       85,  85,  85,  85,  85, 255,  85, 255,
   19.20 ++       85,  85, 255, 255, 255,  85,  85, 255, 
   19.21 ++       85, 255, 255, 255,  85, 255, 255, 255,
   19.22 ++        0,  21,   0,   0,  21,  42,   0,  63,
   19.23 ++        0,   0,  63,  42,  42,  21,   0,  42,
   19.24 ++       21,  42,  42,  63,   0,  42,  63,  42,
   19.25 ++        0,  21,  21,   0,  21,  63,   0,  63, 
   19.26 ++       21,   0,  63,  63,  42,  21,  21,  42,
   19.27 ++       21,  63,  42,  63,  21,  42,  63,  63,
   19.28 ++       21,   0,   0,  21,   0,  42,  21,  42,
   19.29 ++        0,  21,  42,  42,  63,   0,   0,  63,
   19.30 ++        0,  42,  63,  42,   0,  63,  42,  42,
   19.31 ++       21,   0,  21,  21,   0,  63,  21,  42,
   19.32 ++       21,  21,  42,  63,  63,   0,  21,  63,
   19.33 ++        0,  63,  63,  42,  21,  63,  42,  63,
   19.34 ++       21,  21,   0,  21,  21,  42,  21,  63,
   19.35 ++        0,  21,  63,  42,  63,  21,   0,  63,
   19.36 ++       21,  42,  63,  63,   0,  63,  63,  42,
   19.37 ++       21,  21,  21,  21,  21,  63,  21,  63,
   19.38 ++       21,  21,  63,  63,  63,  21,  21,  63,
   19.39 ++       21,  63,  63,  63,  21,  63,  63,  63
   19.40 ++    };
   19.41 ++
   19.42 ++    s->latch = 0; 
   19.43 ++
   19.44 ++    s->sr_index = 3; 
   19.45 ++    s->sr[0] = 3;
   19.46 ++    s->sr[1] = 0;
   19.47 ++    s->sr[2] = 3;
   19.48 ++    s->sr[3] = 0;
   19.49 ++    s->sr[4] = 2;
   19.50 ++    s->sr[5] = 0;
   19.51 ++    s->sr[6] = 0;
   19.52 ++    s->sr[7] = 0;
   19.53 ++
   19.54 ++    s->gr_index = 5; 
   19.55 ++    s->gr[0] = 0;
   19.56 ++    s->gr[1] = 0;
   19.57 ++    s->gr[2] = 0;
   19.58 ++    s->gr[3] = 0;
   19.59 ++    s->gr[4] = 0;
   19.60 ++    s->gr[5] = 16;
   19.61 ++    s->gr[6] = 14;
   19.62 ++    s->gr[7] = 15;
   19.63 ++    s->gr[8] = 255;
   19.64 ++
   19.65 ++    /* changed by out 0x03c0 */
   19.66 ++    s->ar_index = 32;
   19.67 ++    s->ar[0] = 0;
   19.68 ++    s->ar[1] = 1;
   19.69 ++    s->ar[2] = 2;
   19.70 ++    s->ar[3] = 3;
   19.71 ++    s->ar[4] = 4;
   19.72 ++    s->ar[5] = 5;
   19.73 ++    s->ar[6] = 6;
   19.74 ++    s->ar[7] = 7;
   19.75 ++    s->ar[8] = 8;
   19.76 ++    s->ar[9] = 9;
   19.77 ++    s->ar[10] = 10;
   19.78 ++    s->ar[11] = 11;
   19.79 ++    s->ar[12] = 12;
   19.80 ++    s->ar[13] = 13;
   19.81 ++    s->ar[14] = 14;
   19.82 ++    s->ar[15] = 15;
   19.83 ++    s->ar[16] = 12;
   19.84 ++    s->ar[17] = 0;
   19.85 ++    s->ar[18] = 15;
   19.86 ++    s->ar[19] = 8;
   19.87 ++    s->ar[20] = 0;
   19.88 ++
   19.89 ++    s->ar_flip_flop = 1; 
   19.90 ++
   19.91 ++    s->cr_index = 15; 
   19.92 ++    s->cr[0] = 95;
   19.93 ++    s->cr[1] = 79;
   19.94 ++    s->cr[2] = 80;
   19.95 ++    s->cr[3] = 130;
   19.96 ++    s->cr[4] = 85;
   19.97 ++    s->cr[5] = 129;
   19.98 ++    s->cr[6] = 191;
   19.99 ++    s->cr[7] = 31;
  19.100 ++    s->cr[8] = 0;
  19.101 ++    s->cr[9] = 79;
  19.102 ++    s->cr[10] = 14;
  19.103 ++    s->cr[11] = 15;
  19.104 ++    s->cr[12] = 0;
  19.105 ++    s->cr[13] = 0;
  19.106 ++    s->cr[14] = 5;
  19.107 ++    s->cr[15] = 160;
  19.108 ++    s->cr[16] = 156;
  19.109 ++    s->cr[17] = 142;
  19.110 ++    s->cr[18] = 143;
  19.111 ++    s->cr[19] = 40;
  19.112 ++    s->cr[20] = 31;
  19.113 ++    s->cr[21] = 150;
  19.114 ++    s->cr[22] = 185;
  19.115 ++    s->cr[23] = 163;
  19.116 ++    s->cr[24] = 255;
  19.117 ++
  19.118 ++    s->msr = 103; 
  19.119 ++    s->fcr = 0; 
  19.120 ++    s->st00 = 0; 
  19.121 ++    s->st01 = 0; 
  19.122 ++
  19.123 ++    /* dac_* & palette will be initialized by os through out 0x03c8 &
  19.124 ++     * out 0c03c9(1:3) */
  19.125 ++    s->dac_state = 0; 
  19.126 ++    s->dac_sub_index = 0; 
  19.127 ++    s->dac_read_index = 0; 
  19.128 ++    s->dac_write_index = 16; 
  19.129 ++    s->dac_cache[0] = 255;
  19.130 ++    s->dac_cache[1] = 255;
  19.131 ++    s->dac_cache[2] = 255;
  19.132 ++
  19.133 ++    /* palette */
  19.134 ++    memcpy(s->palette, palette_model, 192);
  19.135 ++
  19.136 ++    s->bank_offset = 0;
  19.137 ++    s->graphic_mode = -1;
  19.138 ++
  19.139 ++    /* TODO: add vbe support if enabled */
  19.140 ++}
  19.141 ++
  19.142 + void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, 
  19.143 +                      unsigned long vga_ram_offset, int vga_ram_size)
  19.144 + {
    20.1 --- a/tools/ioemu/patches/qemu-target-i386-dm	Wed Jul 26 09:41:24 2006 -0600
    20.2 +++ b/tools/ioemu/patches/qemu-target-i386-dm	Wed Jul 26 10:49:32 2006 -0600
    20.3 @@ -1,7 +1,8 @@
    20.4 -diff -r 9af27fed6713 Makefile.target
    20.5 ---- a/Makefile.target	Wed Jun 21 17:46:33 2006 +0100
    20.6 -+++ b/Makefile.target	Mon Jun 26 15:59:21 2006 +0100
    20.7 -@@ -57,6 +57,8 @@ QEMU_SYSTEM=qemu-fast
    20.8 +Index: ioemu/Makefile.target
    20.9 +===================================================================
   20.10 +--- ioemu.orig/Makefile.target	2006-07-26 11:45:57.572129351 +0100
   20.11 ++++ ioemu/Makefile.target	2006-07-26 11:45:57.589127569 +0100
   20.12 +@@ -57,6 +57,8 @@
   20.13   QEMU_SYSTEM=qemu-fast
   20.14   endif
   20.15   
   20.16 @@ -10,7 +11,7 @@ diff -r 9af27fed6713 Makefile.target
   20.17   ifdef CONFIG_USER_ONLY
   20.18   PROGS=$(QEMU_USER)
   20.19   else
   20.20 -@@ -274,6 +276,9 @@ OBJS+=gdbstub.o
   20.21 +@@ -274,6 +276,9 @@
   20.22   OBJS+=gdbstub.o
   20.23   endif
   20.24   
   20.25 @@ -20,7 +21,7 @@ diff -r 9af27fed6713 Makefile.target
   20.26   all: $(PROGS)
   20.27   
   20.28   $(QEMU_USER): $(OBJS)
   20.29 -@@ -328,7 +333,7 @@ ifeq ($(TARGET_BASE_ARCH), i386)
   20.30 +@@ -328,7 +333,7 @@
   20.31   ifeq ($(TARGET_BASE_ARCH), i386)
   20.32   # Hardware support
   20.33   VL_OBJS+= ide.o pckbd.o ps2.o vga.o $(SOUND_HW) dma.o $(AUDIODRV)
   20.34 @@ -29,10 +30,11 @@ diff -r 9af27fed6713 Makefile.target
   20.35   VL_OBJS+= cirrus_vga.o mixeng.o apic.o parallel.o
   20.36   DEFINES += -DHAS_AUDIO
   20.37   endif
   20.38 -diff -r 9af27fed6713 configure
   20.39 ---- a/configure	Wed Jun 21 17:46:33 2006 +0100
   20.40 -+++ b/configure	Mon Jun 26 15:59:21 2006 +0100
   20.41 -@@ -359,6 +359,8 @@ if test -z "$target_list" ; then
   20.42 +Index: ioemu/configure
   20.43 +===================================================================
   20.44 +--- ioemu.orig/configure	2006-07-26 11:45:57.573129246 +0100
   20.45 ++++ ioemu/configure	2006-07-26 11:45:57.590127464 +0100
   20.46 +@@ -359,6 +359,8 @@
   20.47       if [ "$user" = "yes" ] ; then
   20.48           target_list="i386-user arm-user armeb-user sparc-user ppc-user mips-user mipsel-user $target_list"
   20.49       fi
   20.50 @@ -41,10 +43,11 @@ diff -r 9af27fed6713 configure
   20.51   else
   20.52       target_list=`echo "$target_list" | sed -e 's/,/ /g'`
   20.53   fi
   20.54 -diff -r 9af27fed6713 monitor.c
   20.55 ---- a/monitor.c	Wed Jun 21 17:46:33 2006 +0100
   20.56 -+++ b/monitor.c	Mon Jun 26 15:59:21 2006 +0100
   20.57 -@@ -1142,6 +1142,10 @@ static term_cmd_t info_cmds[] = {
   20.58 +Index: ioemu/monitor.c
   20.59 +===================================================================
   20.60 +--- ioemu.orig/monitor.c	2006-07-26 11:45:57.576128931 +0100
   20.61 ++++ ioemu/monitor.c	2006-07-26 11:45:57.591127359 +0100
   20.62 +@@ -1142,6 +1142,10 @@
   20.63         "", "show host USB devices", },
   20.64       { "profile", "", do_info_profile,
   20.65         "", "show profiling information", },
   20.66 @@ -55,9 +58,10 @@ diff -r 9af27fed6713 monitor.c
   20.67       { NULL, NULL, },
   20.68   };
   20.69   
   20.70 -diff -r 9af27fed6713 vl.c
   20.71 ---- a/vl.c	Wed Jun 21 17:46:33 2006 +0100
   20.72 -+++ b/vl.c	Mon Jun 26 15:59:21 2006 +0100
   20.73 +Index: ioemu/vl.c
   20.74 +===================================================================
   20.75 +--- ioemu.orig/vl.c	2006-07-26 11:45:57.579128617 +0100
   20.76 ++++ ioemu/vl.c	2006-07-26 11:45:57.593127149 +0100
   20.77  @@ -87,7 +87,7 @@
   20.78   
   20.79   #include "exec-all.h"
   20.80 @@ -67,7 +71,7 @@ diff -r 9af27fed6713 vl.c
   20.81   
   20.82   //#define DEBUG_UNUSED_IOPORT
   20.83   //#define DEBUG_IOPORT
   20.84 -@@ -4382,7 +4382,7 @@ typedef struct QEMUResetEntry {
   20.85 +@@ -4382,7 +4382,7 @@
   20.86   
   20.87   static QEMUResetEntry *first_reset_entry;
   20.88   static int reset_requested;
   20.89 @@ -76,7 +80,7 @@ diff -r 9af27fed6713 vl.c
   20.90   static int powerdown_requested;
   20.91   
   20.92   void qemu_register_reset(QEMUResetHandler *func, void *opaque)
   20.93 -@@ -4534,6 +4534,7 @@ void main_loop_wait(int timeout)
   20.94 +@@ -4534,6 +4534,7 @@
   20.95                       qemu_get_clock(rt_clock));
   20.96   }
   20.97   
   20.98 @@ -84,7 +88,7 @@ diff -r 9af27fed6713 vl.c
   20.99   static CPUState *cur_cpu;
  20.100   
  20.101   int main_loop(void)
  20.102 -@@ -4608,6 +4609,7 @@ int main_loop(void)
  20.103 +@@ -4608,6 +4609,7 @@
  20.104       cpu_disable_ticks();
  20.105       return ret;
  20.106   }
  20.107 @@ -92,9 +96,10 @@ diff -r 9af27fed6713 vl.c
  20.108   
  20.109   void help(void)
  20.110   {
  20.111 -diff -r 9af27fed6713 vl.h
  20.112 ---- a/vl.h	Wed Jun 21 17:46:33 2006 +0100
  20.113 -+++ b/vl.h	Mon Jun 26 15:59:21 2006 +0100
  20.114 +Index: ioemu/vl.h
  20.115 +===================================================================
  20.116 +--- ioemu.orig/vl.h	2006-07-26 11:45:39.289045710 +0100
  20.117 ++++ ioemu/vl.h	2006-07-26 11:45:57.594127044 +0100
  20.118  @@ -38,6 +38,8 @@
  20.119   #include <fcntl.h>
  20.120   #include <sys/stat.h>
  20.121 @@ -104,19 +109,19 @@ diff -r 9af27fed6713 vl.h
  20.122   
  20.123   #ifndef O_LARGEFILE
  20.124   #define O_LARGEFILE 0
  20.125 -@@ -130,6 +132,11 @@ void qemu_system_powerdown(void);
  20.126 - #endif
  20.127 +@@ -131,6 +133,11 @@
  20.128   
  20.129   void main_loop_wait(int timeout);
  20.130 -+
  20.131 + 
  20.132  +extern FILE *logfile;
  20.133  +
  20.134  +extern int xc_handle;
  20.135  +extern int domid;
  20.136 - 
  20.137 ++
  20.138   extern int ram_size;
  20.139   extern int bios_size;
  20.140 -@@ -814,6 +821,7 @@ uint32_t pic_intack_read(PicState2 *s);
  20.141 + extern int rtc_utc;
  20.142 +@@ -814,6 +821,7 @@
  20.143   uint32_t pic_intack_read(PicState2 *s);
  20.144   void pic_info(void);
  20.145   void irq_info(void);
  20.146 @@ -124,9 +129,10 @@ diff -r 9af27fed6713 vl.h
  20.147   
  20.148   /* APIC */
  20.149   typedef struct IOAPICState IOAPICState;
  20.150 -diff -r 9af27fed6713 target-i386-dm/cpu.h
  20.151 ---- /dev/null	Thu Jan 01 00:00:00 1970 +0000
  20.152 -+++ b/target-i386-dm/cpu.h	Mon Jun 26 15:59:21 2006 +0100
  20.153 +Index: ioemu/target-i386-dm/cpu.h
  20.154 +===================================================================
  20.155 +--- /dev/null	1970-01-01 00:00:00.000000000 +0000
  20.156 ++++ ioemu/target-i386-dm/cpu.h	2006-07-26 11:45:57.594127044 +0100
  20.157  @@ -0,0 +1,86 @@
  20.158  +/*
  20.159  + * i386 virtual CPU header
  20.160 @@ -214,9 +220,10 @@ diff -r 9af27fed6713 target-i386-dm/cpu.
  20.161  +#include "cpu-all.h"
  20.162  +
  20.163  +#endif /* CPU_I386_H */
  20.164 -diff -r 9af27fed6713 target-i386-dm/exec-dm.c
  20.165 ---- /dev/null	Thu Jan 01 00:00:00 1970 +0000
  20.166 -+++ b/target-i386-dm/exec-dm.c	Mon Jun 26 15:59:21 2006 +0100
  20.167 +Index: ioemu/target-i386-dm/exec-dm.c
  20.168 +===================================================================
  20.169 +--- /dev/null	1970-01-01 00:00:00.000000000 +0000
  20.170 ++++ ioemu/target-i386-dm/exec-dm.c	2006-07-26 11:46:01.059763730 +0100
  20.171  @@ -0,0 +1,512 @@
  20.172  +/*
  20.173  + *  virtual page mapping and translated block handling
  20.174 @@ -602,7 +609,7 @@ diff -r 9af27fed6713 target-i386-dm/exec
  20.175  +                start = mmio[i].start;
  20.176  +                end = mmio[i].start + mmio[i].size;
  20.177  +
  20.178 -+                if ((addr >= start) && (addr <= end)){
  20.179 ++                if ((addr >= start) && (addr < end)){
  20.180  +                        return (mmio[i].io_index >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
  20.181  +                }
  20.182  +        }
  20.183 @@ -730,9 +737,10 @@ diff -r 9af27fed6713 target-i386-dm/exec
  20.184  +
  20.185  +	return;
  20.186  +}
  20.187 -diff -r 9af27fed6713 target-i386-dm/helper2.c
  20.188 ---- /dev/null	Thu Jan 01 00:00:00 1970 +0000
  20.189 -+++ b/target-i386-dm/helper2.c	Mon Jun 26 15:59:21 2006 +0100
  20.190 +Index: ioemu/target-i386-dm/helper2.c
  20.191 +===================================================================
  20.192 +--- /dev/null	1970-01-01 00:00:00.000000000 +0000
  20.193 ++++ ioemu/target-i386-dm/helper2.c	2006-07-26 11:45:57.596126835 +0100
  20.194  @@ -0,0 +1,464 @@
  20.195  +/*
  20.196  + *  i386 helpers (without register variable usage)
  20.197 @@ -1198,9 +1206,10 @@ diff -r 9af27fed6713 target-i386-dm/help
  20.198  +    }
  20.199  +    return 0;
  20.200  +}
  20.201 -diff -r 9af27fed6713 target-i386-dm/i8259-dm.c
  20.202 ---- /dev/null	Thu Jan 01 00:00:00 1970 +0000
  20.203 -+++ b/target-i386-dm/i8259-dm.c	Mon Jun 26 15:59:21 2006 +0100
  20.204 +Index: ioemu/target-i386-dm/i8259-dm.c
  20.205 +===================================================================
  20.206 +--- /dev/null	1970-01-01 00:00:00.000000000 +0000
  20.207 ++++ ioemu/target-i386-dm/i8259-dm.c	2006-07-26 11:45:57.596126835 +0100
  20.208  @@ -0,0 +1,107 @@
  20.209  +/* Xen 8259 stub for interrupt controller emulation
  20.210  + * 
  20.211 @@ -1309,18 +1318,20 @@ diff -r 9af27fed6713 target-i386-dm/i825
  20.212  +                          void *alt_irq_opaque)
  20.213  +{
  20.214  +}
  20.215 -diff -r 9af27fed6713 target-i386-dm/qemu-dm.debug
  20.216 ---- /dev/null	Thu Jan 01 00:00:00 1970 +0000
  20.217 -+++ b/target-i386-dm/qemu-dm.debug	Mon Jun 26 15:59:21 2006 +0100
  20.218 +Index: ioemu/target-i386-dm/qemu-dm.debug
  20.219 +===================================================================
  20.220 +--- /dev/null	1970-01-01 00:00:00.000000000 +0000
  20.221 ++++ ioemu/target-i386-dm/qemu-dm.debug	2006-07-26 11:45:57.596126835 +0100
  20.222  @@ -0,0 +1,5 @@
  20.223  +#!/bin/sh
  20.224  +
  20.225  +echo $* > /tmp/args
  20.226  +echo $DISPLAY >> /tmp/args
  20.227  +exec /usr/lib/xen/bin/qemu-dm $*
  20.228 -diff -r 9af27fed6713 target-i386-dm/qemu-ifup
  20.229 ---- /dev/null	Thu Jan 01 00:00:00 1970 +0000
  20.230 -+++ b/target-i386-dm/qemu-ifup	Mon Jun 26 15:59:21 2006 +0100
  20.231 +Index: ioemu/target-i386-dm/qemu-ifup
  20.232 +===================================================================
  20.233 +--- /dev/null	1970-01-01 00:00:00.000000000 +0000
  20.234 ++++ ioemu/target-i386-dm/qemu-ifup	2006-07-26 11:45:57.597126730 +0100
  20.235  @@ -0,0 +1,10 @@
  20.236  +#!/bin/sh
  20.237  +
    21.1 --- a/tools/ioemu/patches/series	Wed Jul 26 09:41:24 2006 -0600
    21.2 +++ b/tools/ioemu/patches/series	Wed Jul 26 10:49:32 2006 -0600
    21.3 @@ -10,9 +10,11 @@ qemu-hvm-banner
    21.4  xen-domain-name
    21.5  xen-domid
    21.6  xen-mm
    21.7 +ioemu-ia64
    21.8  qemu-smp
    21.9  qemu-no-apic
   21.10  qemu-nobios
   21.11 +qemu-init-vgabios
   21.12  xen-network
   21.13  qemu-timer
   21.14  domain-reset
   21.15 @@ -31,3 +33,5 @@ acpi-poweroff-support
   21.16  vnc-cleanup
   21.17  vnc-fixes
   21.18  vnc-start-vncviewer
   21.19 +vnc-title-domain-name
   21.20 +vnc-access-monitor-vt
    22.1 --- a/tools/ioemu/patches/shadow-vram	Wed Jul 26 09:41:24 2006 -0600
    22.2 +++ b/tools/ioemu/patches/shadow-vram	Wed Jul 26 10:49:32 2006 -0600
    22.3 @@ -1,7 +1,8 @@
    22.4 -diff -r 0ef2ae12258c hw/vga.c
    22.5 ---- a/hw/vga.c	Mon Jun 26 16:07:22 2006 +0100
    22.6 -+++ b/hw/vga.c	Tue Jun 27 09:42:44 2006 +0100
    22.7 -@@ -1287,6 +1287,105 @@ void vga_invalidate_scanlines(VGAState *
    22.8 +Index: ioemu/hw/vga.c
    22.9 +===================================================================
   22.10 +--- ioemu.orig/hw/vga.c	2006-07-26 15:17:39.821306797 +0100
   22.11 ++++ ioemu/hw/vga.c	2006-07-26 15:17:40.017285449 +0100
   22.12 +@@ -1287,6 +1287,105 @@
   22.13       }
   22.14   }
   22.15   
   22.16 @@ -107,7 +108,7 @@ diff -r 0ef2ae12258c hw/vga.c
   22.17   /* 
   22.18    * graphic modes
   22.19    */
   22.20 -@@ -1381,6 +1480,11 @@ static void vga_draw_graphic(VGAState *s
   22.21 +@@ -1382,6 +1481,11 @@
   22.22       printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
   22.23              width, height, v, line_offset, s->cr[9], s->cr[0x17], s->line_compare, s->sr[0x01]);
   22.24   #endif
   22.25 @@ -119,7 +120,7 @@ diff -r 0ef2ae12258c hw/vga.c
   22.26       addr1 = (s->start_addr * 4);
   22.27       bwidth = width * 4;
   22.28       y_start = -1;
   22.29 -@@ -1699,6 +1803,14 @@ void vga_common_init(VGAState *s, Displa
   22.30 +@@ -1830,6 +1934,14 @@
   22.31   
   22.32       vga_reset(s);
   22.33   
   22.34 @@ -134,9 +135,10 @@ diff -r 0ef2ae12258c hw/vga.c
   22.35       s->vram_ptr = qemu_malloc(vga_ram_size);
   22.36       s->vram_offset = vga_ram_offset;
   22.37       s->vram_size = vga_ram_size;
   22.38 -diff -r 0ef2ae12258c hw/vga_int.h
   22.39 ---- a/hw/vga_int.h	Mon Jun 26 16:07:22 2006 +0100
   22.40 -+++ b/hw/vga_int.h	Tue Jun 27 09:42:44 2006 +0100
   22.41 +Index: ioemu/hw/vga_int.h
   22.42 +===================================================================
   22.43 +--- ioemu.orig/hw/vga_int.h	2006-07-26 15:17:39.822306688 +0100
   22.44 ++++ ioemu/hw/vga_int.h	2006-07-26 15:17:40.017285449 +0100
   22.45  @@ -76,6 +76,7 @@
   22.46   
   22.47   #define VGA_STATE_COMMON                                                \
    23.1 --- a/tools/ioemu/patches/shared-vram	Wed Jul 26 09:41:24 2006 -0600
    23.2 +++ b/tools/ioemu/patches/shared-vram	Wed Jul 26 10:49:32 2006 -0600
    23.3 @@ -1,6 +1,7 @@
    23.4 -diff -r 62e05863ec04 hw/cirrus_vga.c
    23.5 ---- a/hw/cirrus_vga.c	Mon Jun 26 15:18:40 2006 +0100
    23.6 -+++ b/hw/cirrus_vga.c	Mon Jun 26 15:19:40 2006 +0100
    23.7 +Index: ioemu/hw/cirrus_vga.c
    23.8 +===================================================================
    23.9 +--- ioemu.orig/hw/cirrus_vga.c	2006-07-26 15:17:35.230806831 +0100
   23.10 ++++ ioemu/hw/cirrus_vga.c	2006-07-26 15:17:39.819307015 +0100
   23.11  @@ -28,6 +28,9 @@
   23.12    */
   23.13   #include "vl.h"
   23.14 @@ -11,7 +12,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c
   23.15   
   23.16   /*
   23.17    * TODO:
   23.18 -@@ -231,6 +234,8 @@ typedef struct CirrusVGAState {
   23.19 +@@ -231,6 +234,8 @@
   23.20       int cirrus_linear_io_addr;
   23.21       int cirrus_linear_bitblt_io_addr;
   23.22       int cirrus_mmio_io_addr;
   23.23 @@ -20,7 +21,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c
   23.24       uint32_t cirrus_addr_mask;
   23.25       uint32_t linear_mmio_mask;
   23.26       uint8_t cirrus_shadow_gr0;
   23.27 -@@ -267,6 +272,8 @@ typedef struct CirrusVGAState {
   23.28 +@@ -267,6 +272,8 @@
   23.29       int last_hw_cursor_y_end;
   23.30       int real_vram_size; /* XXX: suppress that */
   23.31       CPUWriteMemoryFunc **cirrus_linear_write;
   23.32 @@ -29,7 +30,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c
   23.33   } CirrusVGAState;
   23.34   
   23.35   typedef struct PCICirrusVGAState {
   23.36 -@@ -276,6 +283,8 @@ typedef struct PCICirrusVGAState {
   23.37 +@@ -276,6 +283,8 @@
   23.38   
   23.39   static uint8_t rop_to_index[256];
   23.40       
   23.41 @@ -38,7 +39,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c
   23.42   /***************************************
   23.43    *
   23.44    *  prototypes.
   23.45 -@@ -2520,6 +2529,80 @@ static CPUWriteMemoryFunc *cirrus_linear
   23.46 +@@ -2520,6 +2529,80 @@
   23.47       cirrus_linear_bitblt_writel,
   23.48   };
   23.49   
   23.50 @@ -119,7 +120,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c
   23.51   /* Compute the memory access functions */
   23.52   static void cirrus_update_memory_access(CirrusVGAState *s)
   23.53   {
   23.54 -@@ -2538,11 +2621,39 @@ static void cirrus_update_memory_access(
   23.55 +@@ -2538,11 +2621,39 @@
   23.56           
   23.57   	mode = s->gr[0x05] & 0x7;
   23.58   	if (mode < 4 || mode > 5 || ((s->gr[0x0B] & 0x4) == 0)) {
   23.59 @@ -159,7 +160,7 @@ diff -r 62e05863ec04 hw/cirrus_vga.c
   23.60               s->cirrus_linear_write[0] = cirrus_linear_writeb;
   23.61               s->cirrus_linear_write[1] = cirrus_linear_writew;
   23.62               s->cirrus_linear_write[2] = cirrus_linear_writel;
   23.63 -@@ -3136,6 +3247,13 @@ static void cirrus_pci_lfb_map(PCIDevice
   23.64 +@@ -3136,6 +3247,13 @@
   23.65       /* XXX: add byte swapping apertures */
   23.66       cpu_register_physical_memory(addr, s->vram_size,
   23.67   				 s->cirrus_linear_io_addr);
   23.68 @@ -173,10 +174,11 @@ diff -r 62e05863ec04 hw/cirrus_vga.c
   23.69       cpu_register_physical_memory(addr + 0x1000000, 0x400000,
   23.70   				 s->cirrus_linear_bitblt_io_addr);
   23.71   }
   23.72 -diff -r 62e05863ec04 hw/pc.c
   23.73 ---- a/hw/pc.c	Mon Jun 26 15:18:40 2006 +0100
   23.74 -+++ b/hw/pc.c	Mon Jun 26 15:19:40 2006 +0100
   23.75 -@@ -783,14 +783,14 @@ static void pc_init1(uint64_t ram_size, 
   23.76 +Index: ioemu/hw/pc.c
   23.77 +===================================================================
   23.78 +--- ioemu.orig/hw/pc.c	2006-07-26 15:17:39.752314312 +0100
   23.79 ++++ ioemu/hw/pc.c	2006-07-26 15:17:39.820306906 +0100
   23.80 +@@ -783,14 +783,14 @@
   23.81       if (cirrus_vga_enabled) {
   23.82           if (pci_enabled) {
   23.83               pci_cirrus_vga_init(pci_bus, 
   23.84 @@ -194,18 +196,19 @@ diff -r 62e05863ec04 hw/pc.c
   23.85                          vga_ram_size, 0, 0);
   23.86       }
   23.87   
   23.88 -diff -r 62e05863ec04 hw/vga.c
   23.89 ---- a/hw/vga.c	Mon Jun 26 15:18:40 2006 +0100
   23.90 -+++ b/hw/vga.c	Mon Jun 26 15:19:40 2006 +0100
   23.91 -@@ -1668,6 +1668,7 @@ static void vga_map(PCIDevice *pci_dev, 
   23.92 -     }
   23.93 +Index: ioemu/hw/vga.c
   23.94 +===================================================================
   23.95 +--- ioemu.orig/hw/vga.c	2006-07-26 15:17:39.352357879 +0100
   23.96 ++++ ioemu/hw/vga.c	2006-07-26 15:17:39.821306797 +0100
   23.97 +@@ -1799,6 +1799,7 @@
   23.98 +     /* TODO: add vbe support if enabled */
   23.99   }
  23.100   
  23.101  +/* when used on xen environment, the vga_ram_base is not used */
  23.102   void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base, 
  23.103                        unsigned long vga_ram_offset, int vga_ram_size)
  23.104   {
  23.105 -@@ -1698,7 +1699,7 @@ void vga_common_init(VGAState *s, Displa
  23.106 +@@ -1829,7 +1830,7 @@
  23.107   
  23.108       vga_reset(s);
  23.109   
  23.110 @@ -214,12 +217,10 @@ diff -r 62e05863ec04 hw/vga.c
  23.111       s->vram_offset = vga_ram_offset;
  23.112       s->vram_size = vga_ram_size;
  23.113       s->ds = ds;
  23.114 -@@ -1808,6 +1809,31 @@ int vga_initialize(PCIBus *bus, DisplayS
  23.115 - #endif
  23.116 -     }
  23.117 +@@ -1941,6 +1942,31 @@
  23.118       return 0;
  23.119 -+}
  23.120 -+
  23.121 + }
  23.122 + 
  23.123  +void *vga_update_vram(VGAState *s, void *vga_ram_base, int vga_ram_size)
  23.124  +{
  23.125  +    uint8_t *old_pointer;
  23.126 @@ -243,27 +244,30 @@ diff -r 62e05863ec04 hw/vga.c
  23.127  +    s->vram_ptr = vga_ram_base;
  23.128  +
  23.129  +    return old_pointer;
  23.130 - }
  23.131 - 
  23.132 ++}
  23.133 ++
  23.134   /********************************************************/
  23.135 -diff -r 62e05863ec04 hw/vga_int.h
  23.136 ---- a/hw/vga_int.h	Mon Jun 26 15:18:40 2006 +0100
  23.137 -+++ b/hw/vga_int.h	Mon Jun 26 15:19:40 2006 +0100
  23.138 -@@ -166,5 +166,6 @@ void vga_draw_cursor_line_32(uint8_t *d1
  23.139 + /* vga screen dump */
  23.140 + 
  23.141 +Index: ioemu/hw/vga_int.h
  23.142 +===================================================================
  23.143 +--- ioemu.orig/hw/vga_int.h	2006-07-26 15:17:38.201483242 +0100
  23.144 ++++ ioemu/hw/vga_int.h	2006-07-26 15:17:39.822306688 +0100
  23.145 +@@ -166,5 +166,6 @@
  23.146                                unsigned int color0, unsigned int color1,
  23.147                                unsigned int color_xor);
  23.148   
  23.149  +void *vga_update_vram(VGAState *s, void *vga_ram_base, int vga_ram_size);
  23.150   extern const uint8_t sr_mask[8];
  23.151   extern const uint8_t gr_mask[16];
  23.152 -diff -r 62e05863ec04 vl.c
  23.153 ---- a/vl.c	Mon Jun 26 15:18:40 2006 +0100
  23.154 -+++ b/vl.c	Mon Jun 26 15:19:40 2006 +0100
  23.155 -@@ -5147,6 +5147,78 @@ static void select_soundhw (const char *
  23.156 - #endif
  23.157 +Index: ioemu/vl.c
  23.158 +===================================================================
  23.159 +--- ioemu.orig/vl.c	2006-07-26 15:17:39.755313985 +0100
  23.160 ++++ ioemu/vl.c	2006-07-26 15:17:39.824306470 +0100
  23.161 +@@ -5148,6 +5148,78 @@
  23.162   
  23.163   #define MAX_NET_CLIENTS 32
  23.164 -+
  23.165 + 
  23.166  +#include <xg_private.h>
  23.167  +
  23.168  +/* FIXME Flush the shadow page */
  23.169 @@ -335,13 +339,15 @@ diff -r 62e05863ec04 vl.c
  23.170  +
  23.171  +    return 0;
  23.172  +}
  23.173 - 
  23.174 ++
  23.175   int main(int argc, char **argv)
  23.176   {
  23.177 -diff -r 62e05863ec04 vl.h
  23.178 ---- a/vl.h	Mon Jun 26 15:18:40 2006 +0100
  23.179 -+++ b/vl.h	Mon Jun 26 15:19:40 2006 +0100
  23.180 -@@ -136,6 +136,13 @@ extern int reset_requested;
  23.181 + #ifdef CONFIG_GDBSTUB
  23.182 +Index: ioemu/vl.h
  23.183 +===================================================================
  23.184 +--- ioemu.orig/vl.h	2006-07-26 15:17:39.621328580 +0100
  23.185 ++++ ioemu/vl.h	2006-07-26 15:17:39.825306361 +0100
  23.186 +@@ -136,6 +136,13 @@
  23.187   
  23.188   void main_loop_wait(int timeout);
  23.189   
    24.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    24.2 +++ b/tools/ioemu/patches/vnc-access-monitor-vt	Wed Jul 26 10:49:32 2006 -0600
    24.3 @@ -0,0 +1,112 @@
    24.4 +Index: ioemu/vnc.c
    24.5 +===================================================================
    24.6 +--- ioemu.orig/vnc.c	2006-07-26 14:33:57.906165040 +0100
    24.7 ++++ ioemu/vnc.c	2006-07-26 14:44:09.972552689 +0100
    24.8 +@@ -32,6 +32,10 @@
    24.9 + #include "vnc_keysym.h"
   24.10 + #include "keymaps.c"
   24.11 + 
   24.12 ++#define XK_MISCELLANY
   24.13 ++#define XK_LATIN1
   24.14 ++#include <X11/keysymdef.h>
   24.15 ++
   24.16 + typedef struct Buffer
   24.17 + {
   24.18 +     size_t capacity;
   24.19 +@@ -64,6 +68,7 @@
   24.20 +     Buffer output;
   24.21 +     Buffer input;
   24.22 +     kbd_layout_t *kbd_layout;
   24.23 ++    int ctl_keys;               /* Ctrl+Alt starts calibration */
   24.24 + 
   24.25 +     VncReadEvent *read_handler;
   24.26 +     size_t read_handler_expect;
   24.27 +@@ -679,16 +684,80 @@
   24.28 + 
   24.29 + static void do_key_event(VncState *vs, int down, uint32_t sym)
   24.30 + {
   24.31 +-    int keycode;
   24.32 ++    sym &= 0xFFFF;
   24.33 + 
   24.34 +-    keycode = keysym2scancode(vs->kbd_layout, sym & 0xFFFF);
   24.35 ++    if (is_graphic_console()) {
   24.36 ++	int keycode;
   24.37 + 
   24.38 +-    if (keycode & 0x80)
   24.39 +-	kbd_put_keycode(0xe0);
   24.40 +-    if (down)
   24.41 +-	kbd_put_keycode(keycode & 0x7f);
   24.42 +-    else
   24.43 +-	kbd_put_keycode(keycode | 0x80);
   24.44 ++	keycode = keysym2scancode(vs->kbd_layout, sym);
   24.45 ++	if (keycode & 0x80)
   24.46 ++	    kbd_put_keycode(0xe0);
   24.47 ++	if (down)
   24.48 ++	    kbd_put_keycode(keycode & 0x7f);
   24.49 ++	else
   24.50 ++	    kbd_put_keycode(keycode | 0x80);
   24.51 ++    } else if (down) {
   24.52 ++	int qemu_keysym = 0;
   24.53 ++
   24.54 ++	if (sym <= 128) /* normal ascii */
   24.55 ++	    qemu_keysym = sym;
   24.56 ++	else {
   24.57 ++	    switch (sym) {
   24.58 ++	    case XK_Up: qemu_keysym = QEMU_KEY_UP; break;
   24.59 ++	    case XK_Down: qemu_keysym = QEMU_KEY_DOWN; break;
   24.60 ++	    case XK_Left: qemu_keysym = QEMU_KEY_LEFT; break;
   24.61 ++	    case XK_Right: qemu_keysym = QEMU_KEY_RIGHT; break;
   24.62 ++	    case XK_Home: qemu_keysym = QEMU_KEY_HOME; break;
   24.63 ++	    case XK_End: qemu_keysym = QEMU_KEY_END; break;
   24.64 ++	    case XK_Page_Up: qemu_keysym = QEMU_KEY_PAGEUP; break;
   24.65 ++	    case XK_Page_Down: qemu_keysym = QEMU_KEY_PAGEDOWN; break;
   24.66 ++	    case XK_BackSpace: qemu_keysym = QEMU_KEY_BACKSPACE; break;
   24.67 ++	    case XK_Delete: qemu_keysym = QEMU_KEY_DELETE; break;
   24.68 ++	    case XK_Return:
   24.69 ++	    case XK_Linefeed: qemu_keysym = sym; break;
   24.70 ++	    default: break;
   24.71 ++	    }
   24.72 ++	}
   24.73 ++	if (qemu_keysym != 0)
   24.74 ++	    kbd_put_keysym(qemu_keysym);
   24.75 ++    }
   24.76 ++
   24.77 ++    if (down) {
   24.78 ++	switch (sym) {
   24.79 ++	case XK_Control_L:
   24.80 ++	    vs->ctl_keys |= 1;
   24.81 ++	    break;
   24.82 ++
   24.83 ++	case XK_Alt_L:
   24.84 ++	    vs->ctl_keys |= 2;
   24.85 ++	    break;
   24.86 ++
   24.87 ++	default:
   24.88 ++	    break;
   24.89 ++	}
   24.90 ++    } else {
   24.91 ++	switch (sym) {
   24.92 ++	case XK_Control_L:
   24.93 ++	    vs->ctl_keys &= ~1;
   24.94 ++	    break;
   24.95 ++
   24.96 ++	case XK_Alt_L:
   24.97 ++	    vs->ctl_keys &= ~2;
   24.98 ++	    break;
   24.99 ++
  24.100 ++	case XK_1 ... XK_9:
  24.101 ++	    if ((vs->ctl_keys & 3) != 3)
  24.102 ++		break;
  24.103 ++
  24.104 ++	    console_select(sym - XK_1);
  24.105 ++	    if (is_graphic_console()) {
  24.106 ++		/* tell the vga console to redisplay itself */
  24.107 ++		vga_hw_invalidate();
  24.108 ++		vnc_dpy_update(vs->ds, 0, 0, vs->ds->width, vs->ds->height);
  24.109 ++	    }
  24.110 ++	    break;
  24.111 ++	}
  24.112 ++    }
  24.113 + }
  24.114 + 
  24.115 + static void key_event(VncState *vs, int down, uint32_t sym)
    25.1 --- a/tools/ioemu/patches/vnc-fixes	Wed Jul 26 09:41:24 2006 -0600
    25.2 +++ b/tools/ioemu/patches/vnc-fixes	Wed Jul 26 10:49:32 2006 -0600
    25.3 @@ -1,8 +1,8 @@
    25.4  Index: ioemu/vl.c
    25.5  ===================================================================
    25.6 ---- ioemu.orig/vl.c	2006-07-14 15:56:03.043099185 +0100
    25.7 -+++ ioemu/vl.c	2006-07-14 15:56:03.123090082 +0100
    25.8 -@@ -5974,8 +5974,10 @@
    25.9 +--- ioemu.orig/vl.c	2006-07-26 14:29:04.481598583 +0100
   25.10 ++++ ioemu/vl.c	2006-07-26 14:31:22.668325993 +0100
   25.11 +@@ -6003,8 +6003,10 @@
   25.12                     kernel_filename, kernel_cmdline, initrd_filename,
   25.13                     timeoffset);
   25.14   
   25.15 @@ -17,8 +17,8 @@ Index: ioemu/vl.c
   25.16       if (use_gdbstub) {
   25.17  Index: ioemu/vnc.c
   25.18  ===================================================================
   25.19 ---- ioemu.orig/vnc.c	2006-07-14 15:56:03.040099527 +0100
   25.20 -+++ ioemu/vnc.c	2006-07-14 15:56:03.124089968 +0100
   25.21 +--- ioemu.orig/vnc.c	2006-07-26 14:29:04.479598804 +0100
   25.22 ++++ ioemu/vnc.c	2006-07-26 14:31:22.669325883 +0100
   25.23  @@ -3,6 +3,7 @@
   25.24    * 
   25.25    * Copyright (C) 2006 Anthony Liguori <anthony@codemonkey.ws>
   25.26 @@ -112,7 +112,7 @@ Index: ioemu/vnc.c
   25.27   }
   25.28   
   25.29   static void vnc_framebuffer_update(VncState *vs, int x, int y, int w, int h,
   25.30 -@@ -109,11 +142,15 @@
   25.31 +@@ -109,16 +142,23 @@
   25.32   static void vnc_dpy_resize(DisplayState *ds, int w, int h)
   25.33   {
   25.34       VncState *vs = ds->opaque;
   25.35 @@ -129,7 +129,16 @@ Index: ioemu/vnc.c
   25.36   	fprintf(stderr, "vnc: memory allocation failed\n");
   25.37   	exit(1);
   25.38       }
   25.39 -@@ -131,6 +168,10 @@
   25.40 + 
   25.41 +-    ds->depth = vs->depth * 8;
   25.42 ++    if (ds->depth != vs->depth * 8) {
   25.43 ++        ds->depth = vs->depth * 8;
   25.44 ++        set_color_table(ds);
   25.45 ++    }
   25.46 +     ds->width = w;
   25.47 +     ds->height = h;
   25.48 +     ds->linesize = w * vs->depth;
   25.49 +@@ -131,6 +171,10 @@
   25.50   	vs->width = ds->width;
   25.51   	vs->height = ds->height;
   25.52       }
   25.53 @@ -140,7 +149,7 @@ Index: ioemu/vnc.c
   25.54   }
   25.55   
   25.56   static void send_framebuffer_update_raw(VncState *vs, int x, int y, int w, int h)
   25.57 -@@ -215,8 +256,20 @@
   25.58 +@@ -215,8 +259,20 @@
   25.59       int y = 0;
   25.60       int pitch = ds->linesize;
   25.61       VncState *vs = ds->opaque;
   25.62 @@ -162,7 +171,7 @@ Index: ioemu/vnc.c
   25.63   
   25.64       if (dst_y > src_y) {
   25.65   	y = h - 1;
   25.66 -@@ -238,31 +291,34 @@
   25.67 +@@ -238,31 +294,34 @@
   25.68   	old_row += pitch;
   25.69       }
   25.70   
   25.71 @@ -209,16 +218,16 @@ Index: ioemu/vnc.c
   25.72   {
   25.73       VncState *vs = opaque;
   25.74       int64_t now = qemu_get_clock(rt_clock);
   25.75 -@@ -274,11 +330,12 @@
   25.76 +@@ -274,11 +333,12 @@
   25.77   	uint64_t width_mask;
   25.78   	int n_rectangles;
   25.79   	int saved_offset;
   25.80  -	int has_dirty = 0;
   25.81 +-
   25.82 +-	width_mask = (1ULL << (vs->width / 16)) - 1;
   25.83  +	int maxx, maxy;
   25.84  +	int tile_bytes = vs->depth * DP2X(vs, 1);
   25.85   
   25.86 --	width_mask = (1ULL << (vs->width / 16)) - 1;
   25.87 --
   25.88  -	if (vs->width == 1024)
   25.89  +	if (vs->width != DP2X(vs, DIRTY_PIXEL_BITS))
   25.90  +	    width_mask = (1ULL << X2DP_UP(vs, vs->ds->width)) - 1;
   25.91 @@ -226,7 +235,7 @@ Index: ioemu/vnc.c
   25.92   	    width_mask = ~(0ULL);
   25.93   
   25.94   	/* Walk through the dirty map and eliminate tiles that
   25.95 -@@ -294,16 +351,18 @@
   25.96 +@@ -294,16 +354,18 @@
   25.97   		ptr = row;
   25.98   		old_ptr = old_row;
   25.99   
  25.100 @@ -253,7 +262,7 @@ Index: ioemu/vnc.c
  25.101   		}
  25.102   	    }
  25.103   
  25.104 -@@ -311,7 +370,8 @@
  25.105 +@@ -311,7 +373,8 @@
  25.106   	    old_row += vs->ds->linesize;
  25.107   	}
  25.108   
  25.109 @@ -263,7 +272,7 @@ Index: ioemu/vnc.c
  25.110   	    goto out;
  25.111   
  25.112   	/* Count rectangles */
  25.113 -@@ -321,40 +381,61 @@
  25.114 +@@ -321,40 +384,61 @@
  25.115   	saved_offset = vs->output.offset;
  25.116   	vnc_write_u16(vs, 0);
  25.117   
  25.118 @@ -337,7 +346,7 @@ Index: ioemu/vnc.c
  25.119   static void vnc_timer_init(VncState *vs)
  25.120   {
  25.121       if (vs->timer == NULL) {
  25.122 -@@ -365,8 +446,6 @@
  25.123 +@@ -365,8 +449,6 @@
  25.124   
  25.125   static void vnc_dpy_refresh(DisplayState *ds)
  25.126   {
  25.127 @@ -346,7 +355,7 @@ Index: ioemu/vnc.c
  25.128       vga_hw_update();
  25.129   }
  25.130   
  25.131 -@@ -402,7 +481,7 @@
  25.132 +@@ -402,7 +484,7 @@
  25.133   
  25.134   static void buffer_reset(Buffer *buffer)
  25.135   {
  25.136 @@ -355,7 +364,7 @@ Index: ioemu/vnc.c
  25.137   }
  25.138   
  25.139   static void buffer_append(Buffer *buffer, const void *data, size_t len)
  25.140 -@@ -443,12 +522,12 @@
  25.141 +@@ -443,12 +525,12 @@
  25.142       if (!ret)
  25.143   	return;
  25.144   
  25.145 @@ -371,7 +380,7 @@ Index: ioemu/vnc.c
  25.146   }
  25.147   
  25.148   static void vnc_read_when(VncState *vs, VncReadEvent *func, size_t expecting)
  25.149 -@@ -480,11 +559,11 @@
  25.150 +@@ -480,11 +562,11 @@
  25.151   	    return;
  25.152   
  25.153   	if (!ret) {
  25.154 @@ -386,7 +395,7 @@ Index: ioemu/vnc.c
  25.155       }
  25.156   }
  25.157   
  25.158 -@@ -492,9 +571,9 @@
  25.159 +@@ -492,9 +574,9 @@
  25.160   {
  25.161       buffer_reserve(&vs->output, len);
  25.162   
  25.163 @@ -399,7 +408,7 @@ Index: ioemu/vnc.c
  25.164   
  25.165       buffer_append(&vs->output, data, len);
  25.166   }
  25.167 -@@ -616,24 +695,25 @@
  25.168 +@@ -616,24 +698,25 @@
  25.169       do_key_event(vs, down, sym);
  25.170   }
  25.171   
  25.172 @@ -438,7 +447,7 @@ Index: ioemu/vnc.c
  25.173   }
  25.174   
  25.175   static void set_encodings(VncState *vs, int32_t *encodings, size_t n_encodings)
  25.176 -@@ -690,8 +770,6 @@
  25.177 +@@ -690,8 +773,6 @@
  25.178   	vnc_client_error(vs);
  25.179   
  25.180       vnc_dpy_resize(vs->ds, vs->ds->width, vs->ds->height);
  25.181 @@ -447,7 +456,7 @@ Index: ioemu/vnc.c
  25.182   
  25.183       vga_hw_invalidate();
  25.184       vga_hw_update();
  25.185 -@@ -848,11 +926,11 @@
  25.186 +@@ -848,11 +929,11 @@
  25.187   	vnc_write(vs, "RFB 003.003\n", 12);
  25.188   	vnc_flush(vs);
  25.189   	vnc_read_when(vs, protocol_version, 12);
  25.190 @@ -461,7 +470,7 @@ Index: ioemu/vnc.c
  25.191       }
  25.192   }
  25.193   
  25.194 -@@ -909,17 +987,15 @@
  25.195 +@@ -909,17 +990,15 @@
  25.196   	exit(1);
  25.197       }
  25.198   
  25.199 @@ -482,3 +491,15 @@ Index: ioemu/vnc.c
  25.200  -
  25.201       vnc_dpy_resize(vs->ds, 640, 400);
  25.202   }
  25.203 +Index: ioemu/vl.h
  25.204 +===================================================================
  25.205 +--- ioemu.orig/vl.h	2006-07-26 14:31:22.669325883 +0100
  25.206 ++++ ioemu/vl.h	2006-07-26 14:32:44.505279724 +0100
  25.207 +@@ -301,6 +301,7 @@
  25.208 + int is_graphic_console(void);
  25.209 + CharDriverState *text_console_init(DisplayState *ds);
  25.210 + void console_select(unsigned int index);
  25.211 ++void set_color_table(DisplayState *ds);
  25.212 + 
  25.213 + /* serial ports */
  25.214 + 
    26.1 --- a/tools/ioemu/patches/vnc-start-vncviewer	Wed Jul 26 09:41:24 2006 -0600
    26.2 +++ b/tools/ioemu/patches/vnc-start-vncviewer	Wed Jul 26 10:49:32 2006 -0600
    26.3 @@ -1,8 +1,8 @@
    26.4  Index: ioemu/vnc.c
    26.5  ===================================================================
    26.6 ---- ioemu.orig/vnc.c	2006-07-14 18:29:36.810169908 +0100
    26.7 -+++ ioemu/vnc.c	2006-07-14 18:30:17.437628819 +0100
    26.8 -@@ -999,3 +999,25 @@
    26.9 +--- ioemu.orig/vnc.c	2006-07-26 14:33:08.166663983 +0100
   26.10 ++++ ioemu/vnc.c	2006-07-26 14:33:08.225657462 +0100
   26.11 +@@ -1002,3 +1002,25 @@
   26.12   
   26.13       vnc_dpy_resize(vs->ds, 640, 400);
   26.14   }
   26.15 @@ -30,8 +30,8 @@ Index: ioemu/vnc.c
   26.16  +}
   26.17  Index: ioemu/vl.c
   26.18  ===================================================================
   26.19 ---- ioemu.orig/vl.c	2006-07-14 18:29:36.809170020 +0100
   26.20 -+++ ioemu/vl.c	2006-07-14 18:30:17.435629043 +0100
   26.21 +--- ioemu.orig/vl.c	2006-07-26 14:33:08.165664094 +0100
   26.22 ++++ ioemu/vl.c	2006-07-26 14:33:08.227657240 +0100
   26.23  @@ -121,6 +121,7 @@
   26.24   int bios_size;
   26.25   static DisplayState display_state;
   26.26 @@ -82,7 +82,7 @@ Index: ioemu/vl.c
   26.27               case QEMU_OPTION_domainname:
   26.28                   strncat(domain_name, optarg, sizeof(domain_name) - 20);
   26.29                   break;
   26.30 -@@ -5881,6 +5889,8 @@
   26.31 +@@ -5910,6 +5918,8 @@
   26.32           dumb_display_init(ds);
   26.33       } else if (vnc_display != -1) {
   26.34   	vnc_display_init(ds, vnc_display);
   26.35 @@ -93,9 +93,9 @@ Index: ioemu/vl.c
   26.36           sdl_display_init(ds, full_screen);
   26.37  Index: ioemu/vl.h
   26.38  ===================================================================
   26.39 ---- ioemu.orig/vl.h	2006-07-14 18:29:36.810169908 +0100
   26.40 -+++ ioemu/vl.h	2006-07-14 18:30:17.436628931 +0100
   26.41 -@@ -732,6 +732,7 @@
   26.42 +--- ioemu.orig/vl.h	2006-07-26 14:33:08.167663873 +0100
   26.43 ++++ ioemu/vl.h	2006-07-26 14:33:08.228657130 +0100
   26.44 +@@ -733,6 +733,7 @@
   26.45   
   26.46   /* vnc.c */
   26.47   void vnc_display_init(DisplayState *ds, int display);
    27.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    27.2 +++ b/tools/ioemu/patches/vnc-title-domain-name	Wed Jul 26 10:49:32 2006 -0600
    27.3 @@ -0,0 +1,25 @@
    27.4 +Index: ioemu/vnc.c
    27.5 +===================================================================
    27.6 +--- ioemu.orig/vnc.c	2006-07-26 14:23:52.426074956 +0100
    27.7 ++++ ioemu/vnc.c	2006-07-26 14:24:15.210558295 +0100
    27.8 +@@ -850,6 +850,7 @@
    27.9 + 
   27.10 + static int protocol_client_init(VncState *vs, char *data, size_t len)
   27.11 + {
   27.12 ++    size_t l;
   27.13 +     char pad[3] = { 0, 0, 0 };
   27.14 + 
   27.15 +     vs->width = vs->ds->width;
   27.16 +@@ -886,8 +887,10 @@
   27.17 + 	
   27.18 +     vnc_write(vs, pad, 3);           /* padding */
   27.19 + 
   27.20 +-    vnc_write_u32(vs, 4);        
   27.21 +-    vnc_write(vs, "QEMU", 4);
   27.22 ++    l = strlen(domain_name); 
   27.23 ++    vnc_write_u32(vs, l);        
   27.24 ++    vnc_write(vs, domain_name, l);
   27.25 ++
   27.26 +     vnc_flush(vs);
   27.27 + 
   27.28 +     vnc_read_when(vs, protocol_client_msg, 1);
    28.1 --- a/tools/ioemu/target-i386-dm/cpu.h	Wed Jul 26 09:41:24 2006 -0600
    28.2 +++ b/tools/ioemu/target-i386-dm/cpu.h	Wed Jul 26 10:49:32 2006 -0600
    28.3 @@ -80,7 +80,11 @@ int cpu_x86_inl(CPUX86State *env, int ad
    28.4  /* helper2.c */
    28.5  int main_loop(void);
    28.6  
    28.7 +#if defined(__i386__) || defined(__x86_64__)
    28.8  #define TARGET_PAGE_BITS 12
    28.9 +#elif defined(__ia64__)
   28.10 +#define TARGET_PAGE_BITS 14
   28.11 +#endif 
   28.12  #include "cpu-all.h"
   28.13  
   28.14  #endif /* CPU_I386_H */
    29.1 --- a/tools/ioemu/target-i386-dm/exec-dm.c	Wed Jul 26 09:41:24 2006 -0600
    29.2 +++ b/tools/ioemu/target-i386-dm/exec-dm.c	Wed Jul 26 10:49:32 2006 -0600
    29.3 @@ -340,6 +340,23 @@ CPUReadMemoryFunc **cpu_get_io_memory_re
    29.4      return io_mem_read[io_index >> IO_MEM_SHIFT];
    29.5  }
    29.6  
    29.7 +#ifdef __ia64__
    29.8 +/* IA64 has seperate I/D cache, with coherence maintained by DMA controller.
    29.9 + * So to emulate right behavior that guest OS is assumed, we need to flush
   29.10 + * I/D cache here.
   29.11 + */
   29.12 +static void sync_icache(unsigned long address, int len)
   29.13 +{
   29.14 +    int l;
   29.15 +
   29.16 +    for(l = 0; l < (len + 32); l += 32)
   29.17 +        __ia64_fc(address + l);
   29.18 +
   29.19 +    ia64_sync_i();
   29.20 +    ia64_srlz_i();
   29.21 +}
   29.22 +#endif 
   29.23 +
   29.24  /* physical memory access (slow version, mainly for debug) */
   29.25  #if defined(CONFIG_USER_ONLY)
   29.26  void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, 
   29.27 @@ -382,7 +399,7 @@ int iomem_index(target_phys_addr_t addr)
   29.28                  start = mmio[i].start;
   29.29                  end = mmio[i].start + mmio[i].size;
   29.30  
   29.31 -                if ((addr >= start) && (addr <= end)){
   29.32 +                if ((addr >= start) && (addr < end)){
   29.33                          return (mmio[i].io_index >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
   29.34                  }
   29.35          }
   29.36 @@ -455,6 +472,9 @@ void cpu_physical_memory_rw(target_phys_
   29.37                  ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) + 
   29.38                      (addr & ~TARGET_PAGE_MASK);
   29.39                  memcpy(buf, ptr, l);
   29.40 +#ifdef __ia64__
   29.41 +                sync_icache((unsigned long)ptr, l);
   29.42 +#endif 
   29.43              }
   29.44          }
   29.45          len -= l;
    30.1 --- a/tools/ioemu/vl.c	Wed Jul 26 09:41:24 2006 -0600
    30.2 +++ b/tools/ioemu/vl.c	Wed Jul 26 10:49:32 2006 -0600
    30.3 @@ -5754,6 +5754,7 @@ int main(int argc, char **argv)
    30.4          exit(-1);
    30.5      }
    30.6  
    30.7 +#if defined(__i386__) || defined(__x86_64__)
    30.8      if (xc_get_pfn_list(xc_handle, domid, page_array, nr_pages) != nr_pages) {
    30.9          fprintf(logfile, "xc_get_pfn_list returned error %d\n", errno);
   30.10          exit(-1);
   30.11 @@ -5774,6 +5775,34 @@ int main(int argc, char **argv)
   30.12      fprintf(logfile, "shared page at pfn:%lx, mfn: %"PRIx64"\n", nr_pages - 1,
   30.13              (uint64_t)(page_array[nr_pages - 1]));
   30.14  
   30.15 +#elif defined(__ia64__)
   30.16 +    if (xc_ia64_get_pfn_list(xc_handle, domid,
   30.17 +                             page_array, 0, nr_pages) != nr_pages) {
   30.18 +        fprintf(logfile, "xc_ia64_get_pfn_list returned error %d\n", errno);
   30.19 +        exit(-1);
   30.20 +    }
   30.21 +
   30.22 +    phys_ram_base = xc_map_foreign_batch(xc_handle, domid,
   30.23 +                                         PROT_READ|PROT_WRITE,
   30.24 +                                         page_array, nr_pages);
   30.25 +    if (phys_ram_base == 0) {
   30.26 +        fprintf(logfile, "xc_map_foreign_batch returned error %d\n", errno);
   30.27 +        exit(-1);
   30.28 +    }
   30.29 +
   30.30 +    if (xc_ia64_get_pfn_list(xc_handle, domid, page_array,
   30.31 +                             nr_pages + (GFW_SIZE >> PAGE_SHIFT), 1)!= 1){
   30.32 +        fprintf(logfile, "xc_ia64_get_pfn_list returned error %d\n", errno);
   30.33 +        exit(-1);
   30.34 +    }
   30.35 +
   30.36 +    shared_page = xc_map_foreign_range(xc_handle, domid, PAGE_SIZE,
   30.37 +                                       PROT_READ|PROT_WRITE,
   30.38 +                                       page_array[0]);
   30.39 +
   30.40 +    fprintf(logfile, "shared page at pfn:%lx, mfn: %l016x\n",
   30.41 +            IO_PAGE_START >> PAGE_SHIFT, page_array[0]);
   30.42 +#endif
   30.43  #else  /* !CONFIG_DM */
   30.44  
   30.45  #ifdef CONFIG_SOFTMMU
    31.1 --- a/tools/ioemu/vl.h	Wed Jul 26 09:41:24 2006 -0600
    31.2 +++ b/tools/ioemu/vl.h	Wed Jul 26 10:49:32 2006 -0600
    31.3 @@ -301,6 +301,7 @@ void vga_hw_screen_dump(const char *file
    31.4  int is_graphic_console(void);
    31.5  CharDriverState *text_console_init(DisplayState *ds);
    31.6  void console_select(unsigned int index);
    31.7 +void set_color_table(DisplayState *ds);
    31.8  
    31.9  /* serial ports */
   31.10  
    32.1 --- a/tools/ioemu/vnc.c	Wed Jul 26 09:41:24 2006 -0600
    32.2 +++ b/tools/ioemu/vnc.c	Wed Jul 26 10:49:32 2006 -0600
    32.3 @@ -32,6 +32,10 @@
    32.4  #include "vnc_keysym.h"
    32.5  #include "keymaps.c"
    32.6  
    32.7 +#define XK_MISCELLANY
    32.8 +#define XK_LATIN1
    32.9 +#include <X11/keysymdef.h>
   32.10 +
   32.11  typedef struct Buffer
   32.12  {
   32.13      size_t capacity;
   32.14 @@ -64,6 +68,7 @@ struct VncState
   32.15      Buffer output;
   32.16      Buffer input;
   32.17      kbd_layout_t *kbd_layout;
   32.18 +    int ctl_keys;               /* Ctrl+Alt starts calibration */
   32.19  
   32.20      VncReadEvent *read_handler;
   32.21      size_t read_handler_expect;
   32.22 @@ -155,7 +160,10 @@ static void vnc_dpy_resize(DisplayState 
   32.23  	exit(1);
   32.24      }
   32.25  
   32.26 -    ds->depth = vs->depth * 8;
   32.27 +    if (ds->depth != vs->depth * 8) {
   32.28 +        ds->depth = vs->depth * 8;
   32.29 +        set_color_table(ds);
   32.30 +    }
   32.31      ds->width = w;
   32.32      ds->height = h;
   32.33      ds->linesize = w * vs->depth;
   32.34 @@ -676,16 +684,80 @@ static void pointer_event(VncState *vs, 
   32.35  
   32.36  static void do_key_event(VncState *vs, int down, uint32_t sym)
   32.37  {
   32.38 -    int keycode;
   32.39 -
   32.40 -    keycode = keysym2scancode(vs->kbd_layout, sym & 0xFFFF);
   32.41 +    sym &= 0xFFFF;
   32.42  
   32.43 -    if (keycode & 0x80)
   32.44 -	kbd_put_keycode(0xe0);
   32.45 -    if (down)
   32.46 -	kbd_put_keycode(keycode & 0x7f);
   32.47 -    else
   32.48 -	kbd_put_keycode(keycode | 0x80);
   32.49 +    if (is_graphic_console()) {
   32.50 +	int keycode;
   32.51 +
   32.52 +	keycode = keysym2scancode(vs->kbd_layout, sym);
   32.53 +	if (keycode & 0x80)
   32.54 +	    kbd_put_keycode(0xe0);
   32.55 +	if (down)
   32.56 +	    kbd_put_keycode(keycode & 0x7f);
   32.57 +	else
   32.58 +	    kbd_put_keycode(keycode | 0x80);
   32.59 +    } else if (down) {
   32.60 +	int qemu_keysym = 0;
   32.61 +
   32.62 +	if (sym <= 128) /* normal ascii */
   32.63 +	    qemu_keysym = sym;
   32.64 +	else {
   32.65 +	    switch (sym) {
   32.66 +	    case XK_Up: qemu_keysym = QEMU_KEY_UP; break;
   32.67 +	    case XK_Down: qemu_keysym = QEMU_KEY_DOWN; break;
   32.68 +	    case XK_Left: qemu_keysym = QEMU_KEY_LEFT; break;
   32.69 +	    case XK_Right: qemu_keysym = QEMU_KEY_RIGHT; break;
   32.70 +	    case XK_Home: qemu_keysym = QEMU_KEY_HOME; break;
   32.71 +	    case XK_End: qemu_keysym = QEMU_KEY_END; break;
   32.72 +	    case XK_Page_Up: qemu_keysym = QEMU_KEY_PAGEUP; break;
   32.73 +	    case XK_Page_Down: qemu_keysym = QEMU_KEY_PAGEDOWN; break;
   32.74 +	    case XK_BackSpace: qemu_keysym = QEMU_KEY_BACKSPACE; break;
   32.75 +	    case XK_Delete: qemu_keysym = QEMU_KEY_DELETE; break;
   32.76 +	    case XK_Return:
   32.77 +	    case XK_Linefeed: qemu_keysym = sym; break;
   32.78 +	    default: break;
   32.79 +	    }
   32.80 +	}
   32.81 +	if (qemu_keysym != 0)
   32.82 +	    kbd_put_keysym(qemu_keysym);
   32.83 +    }
   32.84 +
   32.85 +    if (down) {
   32.86 +	switch (sym) {
   32.87 +	case XK_Control_L:
   32.88 +	    vs->ctl_keys |= 1;
   32.89 +	    break;
   32.90 +
   32.91 +	case XK_Alt_L:
   32.92 +	    vs->ctl_keys |= 2;
   32.93 +	    break;
   32.94 +
   32.95 +	default:
   32.96 +	    break;
   32.97 +	}
   32.98 +    } else {
   32.99 +	switch (sym) {
  32.100 +	case XK_Control_L:
  32.101 +	    vs->ctl_keys &= ~1;
  32.102 +	    break;
  32.103 +
  32.104 +	case XK_Alt_L:
  32.105 +	    vs->ctl_keys &= ~2;
  32.106 +	    break;
  32.107 +
  32.108 +	case XK_1 ... XK_9:
  32.109 +	    if ((vs->ctl_keys & 3) != 3)
  32.110 +		break;
  32.111 +
  32.112 +	    console_select(sym - XK_1);
  32.113 +	    if (is_graphic_console()) {
  32.114 +		/* tell the vga console to redisplay itself */
  32.115 +		vga_hw_invalidate();
  32.116 +		vnc_dpy_update(vs->ds, 0, 0, vs->ds->width, vs->ds->height);
  32.117 +	    }
  32.118 +	    break;
  32.119 +	}
  32.120 +    }
  32.121  }
  32.122  
  32.123  static void key_event(VncState *vs, int down, uint32_t sym)
  32.124 @@ -847,6 +919,7 @@ static int protocol_client_msg(VncState 
  32.125  
  32.126  static int protocol_client_init(VncState *vs, char *data, size_t len)
  32.127  {
  32.128 +    size_t l;
  32.129      char pad[3] = { 0, 0, 0 };
  32.130  
  32.131      vs->width = vs->ds->width;
  32.132 @@ -883,8 +956,10 @@ static int protocol_client_init(VncState
  32.133  	
  32.134      vnc_write(vs, pad, 3);           /* padding */
  32.135  
  32.136 -    vnc_write_u32(vs, 4);        
  32.137 -    vnc_write(vs, "QEMU", 4);
  32.138 +    l = strlen(domain_name); 
  32.139 +    vnc_write_u32(vs, l);        
  32.140 +    vnc_write(vs, domain_name, l);
  32.141 +
  32.142      vnc_flush(vs);
  32.143  
  32.144      vnc_read_when(vs, protocol_client_msg, 1);
    33.1 --- a/tools/xenstat/libxenstat/src/xenstat.c	Wed Jul 26 09:41:24 2006 -0600
    33.2 +++ b/tools/xenstat/libxenstat/src/xenstat.c	Wed Jul 26 10:49:32 2006 -0600
    33.3 @@ -20,7 +20,6 @@
    33.4  #include <stdio.h>
    33.5  #include <string.h>
    33.6  #include <unistd.h>
    33.7 -#include <linux/compiler.h>
    33.8  #include <fcntl.h>
    33.9  #include <dirent.h>
   33.10  #include <sys/types.h>
    34.1 --- a/xen/arch/x86/hvm/svm/svm.c	Wed Jul 26 09:41:24 2006 -0600
    34.2 +++ b/xen/arch/x86/hvm/svm/svm.c	Wed Jul 26 10:49:32 2006 -0600
    34.3 @@ -1766,7 +1766,7 @@ static int mov_to_cr(int gpreg, int cr, 
    34.4              if ( svm_pgbit_test(v) )
    34.5              {
    34.6                  /* The guest is a 32-bit PAE guest. */
    34.7 -#if CONFIG_PAGING_LEVELS >= 4
    34.8 +#if CONFIG_PAGING_LEVELS >= 3
    34.9                  unsigned long mfn, old_base_mfn;
   34.10  
   34.11                  if( !shadow_set_guest_paging_levels(v->domain, PAGING_L3) )
   34.12 @@ -1810,7 +1810,7 @@ static int mov_to_cr(int gpreg, int cr, 
   34.13              else
   34.14              {
   34.15                  /*  The guest is a 64 bit or 32-bit PAE guest. */
   34.16 -#if CONFIG_PAGING_LEVELS >= 4
   34.17 +#if CONFIG_PAGING_LEVELS >= 3
   34.18                  if ( (v->domain->arch.ops != NULL) &&
   34.19                          v->domain->arch.ops->guest_paging_levels == PAGING_L2)
   34.20                  {
    35.1 --- a/xen/arch/x86/mm.c	Wed Jul 26 09:41:24 2006 -0600
    35.2 +++ b/xen/arch/x86/mm.c	Wed Jul 26 10:49:32 2006 -0600
    35.3 @@ -3881,6 +3881,13 @@ void memguard_unguard_range(void *p, uns
    35.4  
    35.5  #endif
    35.6  
    35.7 +void memguard_guard_stack(void *p)
    35.8 +{
    35.9 +    BUILD_BUG_ON((DEBUG_STACK_SIZE + PAGE_SIZE) > STACK_SIZE);
   35.10 +    p = (void *)((unsigned long)p + STACK_SIZE - DEBUG_STACK_SIZE - PAGE_SIZE);
   35.11 +    memguard_guard_range(p, PAGE_SIZE);
   35.12 +}
   35.13 +
   35.14  /*
   35.15   * Local variables:
   35.16   * mode: C
    36.1 --- a/xen/arch/x86/shadow_public.c	Wed Jul 26 09:41:24 2006 -0600
    36.2 +++ b/xen/arch/x86/shadow_public.c	Wed Jul 26 10:49:32 2006 -0600
    36.3 @@ -398,7 +398,7 @@ static void alloc_monitor_pagetable(stru
    36.4      unsigned long m2mfn, m3mfn;
    36.5      l2_pgentry_t *mpl2e;
    36.6      l3_pgentry_t *mpl3e;
    36.7 -    struct page_info *m2mfn_info, *m3mfn_info, *page;
    36.8 +    struct page_info *m2mfn_info, *m3mfn_info;
    36.9      struct domain *d = v->domain;
   36.10      int i;
   36.11  
   36.12 @@ -411,40 +411,62 @@ static void alloc_monitor_pagetable(stru
   36.13      mpl3e = (l3_pgentry_t *) map_domain_page_global(m3mfn);
   36.14      memset(mpl3e, 0, L3_PAGETABLE_ENTRIES * sizeof(l3_pgentry_t));
   36.15  
   36.16 +    v->arch.monitor_table = pagetable_from_pfn(m3mfn);
   36.17 +    v->arch.monitor_vtable = (l2_pgentry_t *) mpl3e;
   36.18 +
   36.19      m2mfn_info = alloc_domheap_page(NULL);
   36.20      ASSERT( m2mfn_info );
   36.21  
   36.22      m2mfn = page_to_mfn(m2mfn_info);
   36.23      mpl2e = (l2_pgentry_t *) map_domain_page(m2mfn);
   36.24 -    memset(mpl2e, 0, L2_PAGETABLE_ENTRIES * sizeof(l2_pgentry_t));
   36.25 +    memset(mpl2e, 0, PAGE_SIZE);
   36.26 +
   36.27 +    /* Map L2 page into L3 */
   36.28 +    mpl3e[L3_PAGETABLE_ENTRIES - 1] = l3e_from_pfn(m2mfn, _PAGE_PRESENT);
   36.29  
   36.30      memcpy(&mpl2e[L2_PAGETABLE_FIRST_XEN_SLOT & (L2_PAGETABLE_ENTRIES-1)],
   36.31             &idle_pg_table_l2[L2_PAGETABLE_FIRST_XEN_SLOT],
   36.32             L2_PAGETABLE_XEN_SLOTS * sizeof(l2_pgentry_t));
   36.33 -    /*
   36.34 -     * Map L2 page into L3
   36.35 -     */
   36.36 -    mpl3e[L3_PAGETABLE_ENTRIES - 1] = l3e_from_pfn(m2mfn, _PAGE_PRESENT);
   36.37 -    page = l3e_get_page(mpl3e[L3_PAGETABLE_ENTRIES - 1]);
   36.38  
   36.39      for ( i = 0; i < PDPT_L2_ENTRIES; i++ )
   36.40          mpl2e[l2_table_offset(PERDOMAIN_VIRT_START) + i] =
   36.41              l2e_from_page(
   36.42 -                virt_to_page(d->arch.mm_perdomain_pt) + i, 
   36.43 +                virt_to_page(d->arch.mm_perdomain_pt) + i,
   36.44                  __PAGE_HYPERVISOR);
   36.45      for ( i = 0; i < (LINEARPT_MBYTES >> (L2_PAGETABLE_SHIFT - 20)); i++ )
   36.46          mpl2e[l2_table_offset(LINEAR_PT_VIRT_START) + i] =
   36.47              (l3e_get_flags(mpl3e[i]) & _PAGE_PRESENT) ?
   36.48              l2e_from_pfn(l3e_get_pfn(mpl3e[i]), __PAGE_HYPERVISOR) :
   36.49              l2e_empty();
   36.50 -    for ( i = 0; i < (MACHPHYS_MBYTES >> (L2_PAGETABLE_SHIFT - 20)); i++ )
   36.51 -        mpl2e[l2_table_offset(RO_MPT_VIRT_START) + i] = l2e_empty();
   36.52 -
   36.53 -    v->arch.monitor_table = pagetable_from_pfn(m3mfn);
   36.54 -    v->arch.monitor_vtable = (l2_pgentry_t *) mpl3e;
   36.55  
   36.56      if ( v->vcpu_id == 0 )
   36.57 +    {
   36.58 +        unsigned long m1mfn;
   36.59 +        l1_pgentry_t *mpl1e;
   36.60 +        struct page_info *m1mfn_info;
   36.61 +
   36.62 +        /*
   36.63 +         * 2 l2 slots are allocated here, so that 4M for p2m table,
   36.64 +         * with this we can guarantee PCI MMIO p2m entries, especially
   36.65 +         * Cirrus VGA, can be seen by all other vcpus.
   36.66 +         */
   36.67 +        for ( i = 0; i < 2; i++ )
   36.68 +        {
   36.69 +            m1mfn_info = alloc_domheap_page(NULL);
   36.70 +            ASSERT( m1mfn_info );
   36.71 +
   36.72 +            m1mfn = page_to_mfn(m1mfn_info);
   36.73 +            mpl1e = (l1_pgentry_t *) map_domain_page(m1mfn);
   36.74 +            memset(mpl1e, 0, PAGE_SIZE);
   36.75 +            unmap_domain_page(mpl1e);
   36.76 +
   36.77 +            /* Map L1 page into L2 */
   36.78 +            mpl2e[l2_table_offset(RO_MPT_VIRT_START) + i] =
   36.79 +                l2e_from_pfn(m1mfn, __PAGE_HYPERVISOR);
   36.80 +        }
   36.81 +
   36.82          alloc_p2m_table(d);
   36.83 +    }
   36.84      else
   36.85      {
   36.86          unsigned long mfn;
   36.87 @@ -468,14 +490,9 @@ static void alloc_monitor_pagetable(stru
   36.88  
   36.89              l2tab = map_domain_page(l3e_get_pfn(l3e));
   36.90  
   36.91 -            /*
   36.92 -             * Just one l2 slot is used here, so at most 2M for p2m table:
   36.93 -             *      ((4K * 512)/sizeof(unsigned long)) * 4K = 2G
   36.94 -             * should be OK on PAE xen, since Qemu DM can only map 1.5G VMX
   36.95 -             * guest memory.
   36.96 -             */
   36.97 -            mpl2e[l2_table_offset(RO_MPT_VIRT_START)] =
   36.98 -                l2tab[l2_table_offset(RO_MPT_VIRT_START)];
   36.99 +            for ( i = 0; i < (MACHPHYS_MBYTES >> (L2_PAGETABLE_SHIFT - 20)); i++ )
  36.100 +                mpl2e[l2_table_offset(RO_MPT_VIRT_START) + i] =
  36.101 +                    l2tab[l2_table_offset(RO_MPT_VIRT_START) + i];
  36.102  
  36.103              unmap_domain_page(l2tab);
  36.104              unmap_domain_page(l3tab);
    37.1 --- a/xen/arch/x86/traps.c	Wed Jul 26 09:41:24 2006 -0600
    37.2 +++ b/xen/arch/x86/traps.c	Wed Jul 26 10:49:32 2006 -0600
    37.3 @@ -279,11 +279,14 @@ void show_stack(struct cpu_user_regs *re
    37.4  void show_stack_overflow(unsigned long esp)
    37.5  {
    37.6  #ifdef MEMORY_GUARD
    37.7 -    unsigned long esp_top = get_stack_bottom() & PAGE_MASK;
    37.8 +    unsigned long esp_top;
    37.9      unsigned long *stack, addr;
   37.10  
   37.11 -    /* Trigger overflow trace if %esp is within 100 bytes of the guard page. */
   37.12 -    if ( ((esp - esp_top) > 100) && ((esp_top - esp) > 100) )
   37.13 +    esp_top = (esp | (STACK_SIZE - 1)) - DEBUG_STACK_SIZE;
   37.14 +
   37.15 +    /* Trigger overflow trace if %esp is within 512 bytes of the guard page. */
   37.16 +    if ( ((unsigned long)(esp - esp_top) > 512) &&
   37.17 +         ((unsigned long)(esp_top - esp) > 512) )
   37.18          return;
   37.19  
   37.20      if ( esp < esp_top )
    38.1 --- a/xen/arch/x86/x86_32/mm.c	Wed Jul 26 09:41:24 2006 -0600
    38.2 +++ b/xen/arch/x86/x86_32/mm.c	Wed Jul 26 10:49:32 2006 -0600
    38.3 @@ -345,11 +345,6 @@ int check_descriptor(struct desc_struct 
    38.4      return 0;
    38.5  }
    38.6  
    38.7 -void memguard_guard_stack(void *p)
    38.8 -{
    38.9 -    memguard_guard_range(p, PAGE_SIZE);
   38.10 -}
   38.11 -
   38.12  /*
   38.13   * Local variables:
   38.14   * mode: C
    39.1 --- a/xen/arch/x86/x86_32/traps.c	Wed Jul 26 09:41:24 2006 -0600
    39.2 +++ b/xen/arch/x86/x86_32/traps.c	Wed Jul 26 10:49:32 2006 -0600
    39.3 @@ -122,6 +122,7 @@ asmlinkage void do_double_fault(void)
    39.4  {
    39.5      struct tss_struct *tss = &doublefault_tss;
    39.6      unsigned int cpu = ((tss->back_link>>3)-__FIRST_TSS_ENTRY)>>1;
    39.7 +    char taint_str[TAINT_STRING_MAX_LEN];
    39.8  
    39.9      watchdog_disable();
   39.10  
   39.11 @@ -129,6 +130,9 @@ asmlinkage void do_double_fault(void)
   39.12  
   39.13      /* Find information saved during fault and dump it to the console. */
   39.14      tss = &init_tss[cpu];
   39.15 +    printk("*** DOUBLE FAULT: Xen-%d.%d%s    %s\n",
   39.16 +           XEN_VERSION, XEN_SUBVERSION, XEN_EXTRAVERSION,
   39.17 +           print_tainted(taint_str));
   39.18      printk("CPU:    %d\nEIP:    %04x:[<%08x>]",
   39.19             cpu, tss->cs, tss->eip);
   39.20      print_symbol(" %s\n", tss->eip);
    40.1 --- a/xen/arch/x86/x86_64/entry.S	Wed Jul 26 09:41:24 2006 -0600
    40.2 +++ b/xen/arch/x86/x86_64/entry.S	Wed Jul 26 10:49:32 2006 -0600
    40.3 @@ -471,8 +471,10 @@ ENTRY(spurious_interrupt_bug)
    40.4  	jmp   handle_exception
    40.5  
    40.6  ENTRY(double_fault)
    40.7 -        movl  $TRAP_double_fault,4(%rsp)
    40.8 -        jmp   handle_exception
    40.9 +        SAVE_ALL
   40.10 +        movq  %rsp,%rdi
   40.11 +        call  do_double_fault
   40.12 +        ud2
   40.13  
   40.14  ENTRY(nmi)
   40.15          pushq $0
   40.16 @@ -518,7 +520,7 @@ ENTRY(exception_table)
   40.17          .quad do_bounds
   40.18          .quad do_invalid_op
   40.19          .quad math_state_restore
   40.20 -        .quad do_double_fault
   40.21 +        .quad 0 # double_fault
   40.22          .quad do_coprocessor_segment_overrun
   40.23          .quad do_invalid_TSS
   40.24          .quad do_segment_not_present
    41.1 --- a/xen/arch/x86/x86_64/mm.c	Wed Jul 26 09:41:24 2006 -0600
    41.2 +++ b/xen/arch/x86/x86_64/mm.c	Wed Jul 26 10:49:32 2006 -0600
    41.3 @@ -323,12 +323,6 @@ int check_descriptor(struct desc_struct 
    41.4      return 0;
    41.5  }
    41.6  
    41.7 -void memguard_guard_stack(void *p)
    41.8 -{
    41.9 -    p = (void *)((unsigned long)p + PAGE_SIZE);
   41.10 -    memguard_guard_range(p, 2 * PAGE_SIZE);
   41.11 -}
   41.12 -
   41.13  /*
   41.14   * Local variables:
   41.15   * mode: C
    42.1 --- a/xen/arch/x86/x86_64/traps.c	Wed Jul 26 09:41:24 2006 -0600
    42.2 +++ b/xen/arch/x86/x86_64/traps.c	Wed Jul 26 10:49:32 2006 -0600
    42.3 @@ -116,16 +116,38 @@ void show_page_walk(unsigned long addr)
    42.4  asmlinkage void double_fault(void);
    42.5  asmlinkage void do_double_fault(struct cpu_user_regs *regs)
    42.6  {
    42.7 +    unsigned int cpu, tr;
    42.8 +    char taint_str[TAINT_STRING_MAX_LEN];
    42.9 +
   42.10 +    asm ( "str %0" : "=r" (tr) );
   42.11 +    cpu = ((tr >> 3) - __FIRST_TSS_ENTRY) >> 2;
   42.12 +
   42.13      watchdog_disable();
   42.14  
   42.15      console_force_unlock();
   42.16  
   42.17      /* Find information saved during fault and dump it to the console. */
   42.18 -    printk("************************************\n");
   42.19 -    show_registers(regs);
   42.20 +    printk("*** DOUBLE FAULT: Xen-%d.%d%s    %s\n",
   42.21 +           XEN_VERSION, XEN_SUBVERSION, XEN_EXTRAVERSION,
   42.22 +           print_tainted(taint_str));
   42.23 +    printk("CPU:    %d\nRIP:    %04x:[<%016lx>]",
   42.24 +           cpu, regs->cs, regs->rip);
   42.25 +    print_symbol(" %s", regs->rip);
   42.26 +    printk("\nRFLAGS: %016lx\n", regs->rflags);
   42.27 +    printk("rax: %016lx   rbx: %016lx   rcx: %016lx\n",
   42.28 +           regs->rax, regs->rbx, regs->rcx);
   42.29 +    printk("rdx: %016lx   rsi: %016lx   rdi: %016lx\n",
   42.30 +           regs->rdx, regs->rsi, regs->rdi);
   42.31 +    printk("rbp: %016lx   rsp: %016lx   r8:  %016lx\n",
   42.32 +           regs->rbp, regs->rsp, regs->r8);
   42.33 +    printk("r9:  %016lx   r10: %016lx   r11: %016lx\n",
   42.34 +           regs->r9,  regs->r10, regs->r11);
   42.35 +    printk("r12: %016lx   r13: %016lx   r14: %016lx\n",
   42.36 +           regs->r12, regs->r13, regs->r14);
   42.37 +    printk("r15: %016lx\n", regs->r15);
   42.38      show_stack_overflow(regs->rsp);
   42.39      printk("************************************\n");
   42.40 -    printk("CPU%d DOUBLE FAULT -- system shutdown\n", smp_processor_id());
   42.41 +    printk("CPU%d DOUBLE FAULT -- system shutdown\n", cpu);
   42.42      printk("System needs manual reset.\n");
   42.43      printk("************************************\n");
   42.44  
    43.1 --- a/xen/common/schedule.c	Wed Jul 26 09:41:24 2006 -0600
    43.2 +++ b/xen/common/schedule.c	Wed Jul 26 10:49:32 2006 -0600
    43.3 @@ -404,12 +404,15 @@ long do_set_timer_op(s_time_t timeout)
    43.4           * for timeouts wrapped negative, and for positive timeouts more than 
    43.5           * about 13 days in the future (2^50ns). The correct fix is to trigger 
    43.6           * an interrupt immediately (since Linux in fact has pending work to 
    43.7 -         * do in this situation).
    43.8 +         * do in this situation). However, older guests also set a long timeout
    43.9 +         * when they have *no* pending timers at all: setting an immediate
   43.10 +         * timeout in this case can burn a lot of CPU. We therefore go for a
   43.11 +         * reasonable middleground of triggering a timer event in 100ms.
   43.12           */
   43.13          DPRINTK("Warning: huge timeout set by domain %d (vcpu %d):"
   43.14                  " %"PRIx64"\n",
   43.15                  v->domain->domain_id, v->vcpu_id, (uint64_t)timeout);
   43.16 -        send_timer_event(v);
   43.17 +        set_timer(&v->timer, NOW() + MILLISECS(100));
   43.18      }
   43.19      else
   43.20      {
    44.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    44.2 +++ b/xen/include/asm-ia64/perfc_defn.h	Wed Jul 26 10:49:32 2006 -0600
    44.3 @@ -0,0 +1,1 @@
    44.4 +/* This file is empty.  */
    45.1 --- a/xen/include/asm-x86/config.h	Wed Jul 26 09:41:24 2006 -0600
    45.2 +++ b/xen/include/asm-x86/config.h	Wed Jul 26 10:49:32 2006 -0600
    45.3 @@ -67,16 +67,14 @@
    45.4  
    45.5  #ifndef NDEBUG
    45.6  #define MEMORY_GUARD
    45.7 -#ifdef __x86_64__
    45.8 -#define STACK_ORDER 2
    45.9 -#endif
   45.10  #endif
   45.11  
   45.12 -#ifndef STACK_ORDER
   45.13 -#define STACK_ORDER 1
   45.14 -#endif
   45.15 +#define STACK_ORDER 2
   45.16  #define STACK_SIZE  (PAGE_SIZE << STACK_ORDER)
   45.17  
   45.18 +/* Debug stack is restricted to 8kB by guard pages. */
   45.19 +#define DEBUG_STACK_SIZE 8192
   45.20 +
   45.21  #define MAX_DMADOM_PFN 0x7FFFFUL /* 31 addressable bits */
   45.22  
   45.23  #ifndef __ASSEMBLY__
    46.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    46.2 +++ b/xen/include/asm-x86/perfc_defn.h	Wed Jul 26 10:49:32 2006 -0600
    46.3 @@ -0,0 +1,147 @@
    46.4 +/* This file is legitimately included multiple times. */
    46.5 +/*#ifndef __XEN_PERFC_DEFN_H__*/
    46.6 +/*#define __XEN_PERFC_DEFN_H__*/
    46.7 +
    46.8 +#define PERFC_MAX_PT_UPDATES 64
    46.9 +#define PERFC_PT_UPDATES_BUCKET_SIZE 3
   46.10 +PERFCOUNTER_ARRAY(wpt_updates,          "writable pt updates",
   46.11 +                  PERFC_MAX_PT_UPDATES)
   46.12 +PERFCOUNTER_ARRAY(bpt_updates,          "batched pt updates",
   46.13 +                  PERFC_MAX_PT_UPDATES)
   46.14 +PERFCOUNTER_ARRAY(l1_entries_checked,   "l1 entries checked",
   46.15 +                  PERFC_MAX_PT_UPDATES)
   46.16 +PERFCOUNTER_ARRAY(shm_l2_updates,       "shadow mode L2 pt updates",
   46.17 +                  PERFC_MAX_PT_UPDATES)
   46.18 +PERFCOUNTER_ARRAY(shm_hl2_updates,      "shadow mode HL2 pt updates",
   46.19 +                  PERFC_MAX_PT_UPDATES)
   46.20 +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
   46.21 +PERFCOUNTER_ARRAY(shm_l3_updates,       "shadow mode L3 pt updates",
   46.22 +                  PERFC_MAX_PT_UPDATES)
   46.23 +PERFCOUNTER_ARRAY(shm_l4_updates,       "shadow mode L4 pt updates",
   46.24 +                  PERFC_MAX_PT_UPDATES)
   46.25 +#endif
   46.26 +PERFCOUNTER_ARRAY(snapshot_copies,      "entries copied per snapshot",
   46.27 +                  PERFC_MAX_PT_UPDATES)
   46.28 +
   46.29 +PERFCOUNTER_ARRAY(exceptions,           "exceptions", 32)
   46.30 +
   46.31 +#define VMX_PERF_EXIT_REASON_SIZE 44
   46.32 +#define VMX_PERF_VECTOR_SIZE 0x20
   46.33 +PERFCOUNTER_ARRAY(vmexits,              "vmexits", VMX_PERF_EXIT_REASON_SIZE)
   46.34 +PERFCOUNTER_ARRAY(cause_vector,         "cause vector", VMX_PERF_VECTOR_SIZE)
   46.35 +
   46.36 +#define SVM_PERF_EXIT_REASON_SIZE (1+136)
   46.37 +PERFCOUNTER_ARRAY(svmexits,             "SVMexits", SVM_PERF_EXIT_REASON_SIZE)
   46.38 +
   46.39 +PERFCOUNTER_CPU(seg_fixups,             "segmentation fixups")
   46.40 +
   46.41 +PERFCOUNTER_CPU(apic_timer,             "apic timer interrupts")
   46.42 +PERFCOUNTER_CPU(timer_max,           "timer max error (ns)")
   46.43 +
   46.44 +PERFCOUNTER_CPU(domain_page_tlb_flush,  "domain page tlb flushes")
   46.45 +
   46.46 +PERFCOUNTER_CPU(calls_to_mmu_update,    "calls_to_mmu_update")
   46.47 +PERFCOUNTER_CPU(num_page_updates,       "num_page_updates")
   46.48 +PERFCOUNTER_CPU(calls_to_update_va,     "calls_to_update_va_map")
   46.49 +PERFCOUNTER_CPU(page_faults,            "page faults")
   46.50 +PERFCOUNTER_CPU(copy_user_faults,       "copy_user faults")
   46.51 +
   46.52 +PERFCOUNTER_CPU(shadow_fault_calls,     "calls to shadow_fault")
   46.53 +PERFCOUNTER_CPU(shadow_fault_bail_pde_not_present,
   46.54 +                "sf bailed due to pde not present")
   46.55 +PERFCOUNTER_CPU(shadow_fault_bail_pte_not_present,
   46.56 +                "sf bailed due to pte not present")
   46.57 +PERFCOUNTER_CPU(shadow_fault_bail_ro_mapping,
   46.58 +                "sf bailed due to a ro mapping")
   46.59 +PERFCOUNTER_CPU(shadow_fault_fixed,     "sf fixed the pgfault")
   46.60 +PERFCOUNTER_CPU(write_fault_bail,       "sf bailed due to write_fault")
   46.61 +PERFCOUNTER_CPU(read_fault_bail,        "sf bailed due to read_fault")
   46.62 +
   46.63 +PERFCOUNTER_CPU(map_domain_page_count,  "map_domain_page count")
   46.64 +PERFCOUNTER_CPU(ptwr_emulations,        "writable pt emulations")
   46.65 +
   46.66 +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
   46.67 +PERFCOUNTER_CPU(shadow_l4_table_count,  "shadow_l4_table count")
   46.68 +PERFCOUNTER_CPU(shadow_l3_table_count,  "shadow_l3_table count")
   46.69 +#endif
   46.70 +PERFCOUNTER_CPU(shadow_l2_table_count,  "shadow_l2_table count")
   46.71 +PERFCOUNTER_CPU(shadow_l1_table_count,  "shadow_l1_table count")
   46.72 +PERFCOUNTER_CPU(unshadow_table_count,   "unshadow_table count")
   46.73 +PERFCOUNTER_CPU(shadow_fixup_count,     "shadow_fixup count")
   46.74 +PERFCOUNTER_CPU(shadow_update_va_fail1, "shadow_update_va_fail1")
   46.75 +PERFCOUNTER_CPU(shadow_update_va_fail2, "shadow_update_va_fail2")
   46.76 +
   46.77 +/* STATUS counters do not reset when 'P' is hit */
   46.78 +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
   46.79 +PERFSTATUS(shadow_l4_pages,             "current # shadow L4 pages")
   46.80 +PERFSTATUS(shadow_l3_pages,             "current # shadow L3 pages")
   46.81 +#endif
   46.82 +PERFSTATUS(shadow_l2_pages,             "current # shadow L2 pages")
   46.83 +PERFSTATUS(shadow_l1_pages,             "current # shadow L1 pages")
   46.84 +PERFSTATUS(hl2_table_pages,             "current # hl2 pages")
   46.85 +PERFSTATUS(snapshot_pages,              "current # fshadow snapshot pages")
   46.86 +PERFSTATUS(writable_pte_predictions,    "# writable pte predictions")
   46.87 +PERFSTATUS(free_l1_pages,               "current # free shadow L1 pages")
   46.88 +
   46.89 +PERFCOUNTER_CPU(check_pagetable,        "calls to check_pagetable")
   46.90 +PERFCOUNTER_CPU(check_all_pagetables,   "calls to check_all_pagetables")
   46.91 +
   46.92 +PERFCOUNTER_CPU(shadow_hl2_table_count, "shadow_hl2_table count")
   46.93 +PERFCOUNTER_CPU(shadow_set_l1e_force_map, "shadow_set_l1e forced to map l1")
   46.94 +PERFCOUNTER_CPU(shadow_set_l1e_unlinked, "shadow_set_l1e found unlinked l1")
   46.95 +PERFCOUNTER_CPU(shadow_set_l1e_fail,    "shadow_set_l1e failed (no sl1)")
   46.96 +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
   46.97 +PERFCOUNTER_CPU(shadow_set_l2e_force_map, "shadow_set_l2e forced to map l2")
   46.98 +PERFCOUNTER_CPU(shadow_set_l3e_force_map, "shadow_set_l3e forced to map l3")
   46.99 +#endif
  46.100 +PERFCOUNTER_CPU(shadow_invlpg_faults,   "shadow_invlpg's get_user faulted")
  46.101 +PERFCOUNTER_CPU(unshadow_l2_count,      "unpinned L2 count")
  46.102 +
  46.103 +PERFCOUNTER_CPU(shadow_status_shortcut, "fastpath miss on shadow cache")
  46.104 +PERFCOUNTER_CPU(shadow_status_calls,    "calls to shadow_status")
  46.105 +PERFCOUNTER_CPU(shadow_status_miss,     "missed shadow cache")
  46.106 +PERFCOUNTER_CPU(shadow_status_hit_head, "hits on head of bucket")
  46.107 +PERFCOUNTER_CPU(shadow_max_type,        "calls to shadow_max_type")
  46.108 +
  46.109 +PERFCOUNTER_CPU(shadow_sync_all,        "calls to shadow_sync_all")
  46.110 +PERFCOUNTER_CPU(shadow_sync_va,         "calls to shadow_sync_va")
  46.111 +PERFCOUNTER_CPU(resync_l1,              "resync L1 page")
  46.112 +PERFCOUNTER_CPU(resync_l2,              "resync L2 page")
  46.113 +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  46.114 +PERFCOUNTER_CPU(resync_l3,              "resync L3 page")
  46.115 +PERFCOUNTER_CPU(resync_l4,              "resync L4 page")
  46.116 +#endif
  46.117 +PERFCOUNTER_CPU(resync_hl2,             "resync HL2 page")
  46.118 +PERFCOUNTER_CPU(shadow_make_snapshot,   "snapshots created")
  46.119 +PERFCOUNTER_CPU(shadow_mark_mfn_out_of_sync_calls,
  46.120 +                "calls to shadow_mk_out_of_sync")
  46.121 +PERFCOUNTER_CPU(shadow_out_of_sync_calls, "calls to shadow_out_of_sync")
  46.122 +PERFCOUNTER_CPU(snapshot_entry_matches_calls, "calls to ss_entry_matches")
  46.123 +PERFCOUNTER_CPU(snapshot_entry_matches_true, "ss_entry_matches returns true")
  46.124 +
  46.125 +PERFCOUNTER_CPU(validate_pte_calls,     "calls to validate_pte_change")
  46.126 +PERFCOUNTER_CPU(validate_pte_changes1,  "validate_pte makes changes1")
  46.127 +PERFCOUNTER_CPU(validate_pte_changes2,  "validate_pte makes changes2")
  46.128 +PERFCOUNTER_CPU(validate_pte_changes3,  "validate_pte makes changes3")
  46.129 +PERFCOUNTER_CPU(validate_pte_changes4,  "validate_pte makes changes4")
  46.130 +PERFCOUNTER_CPU(validate_pde_calls,     "calls to validate_pde_change")
  46.131 +PERFCOUNTER_CPU(validate_pde_changes,   "validate_pde makes changes")
  46.132 +PERFCOUNTER_CPU(shadow_get_page_fail,   "shadow_get_page_from_l1e fails")
  46.133 +PERFCOUNTER_CPU(validate_hl2e_calls,    "calls to validate_hl2e_change")
  46.134 +PERFCOUNTER_CPU(validate_hl2e_changes,  "validate_hl2e makes changes")
  46.135 +#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  46.136 +PERFCOUNTER_CPU(validate_entry_changes,  "validate_entry changes")
  46.137 +#endif
  46.138 +PERFCOUNTER_CPU(exception_fixed,        "pre-exception fixed")
  46.139 +PERFCOUNTER_CPU(get_mfn_from_gpfn_foreign, "calls to get_mfn_from_gpfn_foreign")
  46.140 +PERFCOUNTER_CPU(remove_all_access,      "calls to remove_all_access")
  46.141 +PERFCOUNTER_CPU(remove_write_access,    "calls to remove_write_access")
  46.142 +PERFCOUNTER_CPU(remove_write_access_easy, "easy outs of remove_write_access")
  46.143 +PERFCOUNTER_CPU(remove_write_no_work,   "no work in remove_write_access")
  46.144 +PERFCOUNTER_CPU(remove_write_not_writable, "remove_write non-writable page")
  46.145 +PERFCOUNTER_CPU(remove_write_fast_exit, "remove_write hit predicted entry")
  46.146 +PERFCOUNTER_CPU(remove_write_predicted, "remove_write predict hit&exit")
  46.147 +PERFCOUNTER_CPU(remove_write_bad_prediction, "remove_write bad prediction")
  46.148 +PERFCOUNTER_CPU(update_hl2e_invlpg,     "update_hl2e calls invlpg")
  46.149 +
  46.150 +/*#endif*/ /* __XEN_PERFC_DEFN_H__ */
    47.1 --- a/xen/include/xen/perfc_defn.h	Wed Jul 26 09:41:24 2006 -0600
    47.2 +++ b/xen/include/xen/perfc_defn.h	Wed Jul 26 10:49:32 2006 -0600
    47.3 @@ -2,154 +2,18 @@
    47.4  /*#ifndef __XEN_PERFC_DEFN_H__*/
    47.5  /*#define __XEN_PERFC_DEFN_H__*/
    47.6  
    47.7 -#define PERFC_MAX_PT_UPDATES 64
    47.8 -#define PERFC_PT_UPDATES_BUCKET_SIZE 3
    47.9 -PERFCOUNTER_ARRAY(wpt_updates,          "writable pt updates",
   47.10 -                  PERFC_MAX_PT_UPDATES)
   47.11 -PERFCOUNTER_ARRAY(bpt_updates,          "batched pt updates",
   47.12 -                  PERFC_MAX_PT_UPDATES)
   47.13 -PERFCOUNTER_ARRAY(l1_entries_checked,   "l1 entries checked",
   47.14 -                  PERFC_MAX_PT_UPDATES)
   47.15 -PERFCOUNTER_ARRAY(shm_l2_updates,       "shadow mode L2 pt updates",
   47.16 -                  PERFC_MAX_PT_UPDATES)
   47.17 -PERFCOUNTER_ARRAY(shm_hl2_updates,      "shadow mode HL2 pt updates",
   47.18 -                  PERFC_MAX_PT_UPDATES)
   47.19 -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
   47.20 -PERFCOUNTER_ARRAY(shm_l3_updates,       "shadow mode L3 pt updates",
   47.21 -                  PERFC_MAX_PT_UPDATES)
   47.22 -PERFCOUNTER_ARRAY(shm_l4_updates,       "shadow mode L4 pt updates",
   47.23 -                  PERFC_MAX_PT_UPDATES)
   47.24 -#endif
   47.25 -PERFCOUNTER_ARRAY(snapshot_copies,      "entries copied per snapshot",
   47.26 -                  PERFC_MAX_PT_UPDATES)
   47.27 +#include <asm/perfc_defn.h>
   47.28  
   47.29  PERFCOUNTER_ARRAY(hypercalls,           "hypercalls", NR_hypercalls)
   47.30 -PERFCOUNTER_ARRAY(exceptions,           "exceptions", 32)
   47.31 -
   47.32 -#define VMX_PERF_EXIT_REASON_SIZE 44
   47.33 -#define VMX_PERF_VECTOR_SIZE 0x20
   47.34 -PERFCOUNTER_ARRAY(vmexits,              "vmexits", VMX_PERF_EXIT_REASON_SIZE)
   47.35 -PERFCOUNTER_ARRAY(cause_vector,         "cause vector", VMX_PERF_VECTOR_SIZE)
   47.36 -#define SVM_PERF_EXIT_REASON_SIZE (1+136)
   47.37 -PERFCOUNTER_ARRAY(svmexits,             "SVMexits", SVM_PERF_EXIT_REASON_SIZE)
   47.38 -
   47.39 -PERFCOUNTER_CPU(seg_fixups,             "segmentation fixups")
   47.40  
   47.41  PERFCOUNTER_CPU(irqs,                   "#interrupts")
   47.42  PERFCOUNTER_CPU(ipis,                   "#IPIs")
   47.43  PERFCOUNTER_CPU(irq_time,               "cycles spent in irq handler")
   47.44  
   47.45 -PERFCOUNTER_CPU(apic_timer,             "apic timer interrupts")
   47.46 -PERFCOUNTER_CPU(timer_max,           "timer max error (ns)")
   47.47  PERFCOUNTER_CPU(sched_irq,              "sched: timer")
   47.48  PERFCOUNTER_CPU(sched_run,              "sched: runs through scheduler")
   47.49  PERFCOUNTER_CPU(sched_ctx,              "sched: context switches")
   47.50  
   47.51 -PERFCOUNTER_CPU(domain_page_tlb_flush,  "domain page tlb flushes")
   47.52  PERFCOUNTER_CPU(need_flush_tlb_flush,   "PG_need_flush tlb flushes")
   47.53  
   47.54 -PERFCOUNTER_CPU(calls_to_mmu_update,    "calls_to_mmu_update")
   47.55 -PERFCOUNTER_CPU(num_page_updates,       "num_page_updates")
   47.56 -PERFCOUNTER_CPU(calls_to_update_va,     "calls_to_update_va_map")
   47.57 -PERFCOUNTER_CPU(page_faults,            "page faults")
   47.58 -PERFCOUNTER_CPU(copy_user_faults,       "copy_user faults")
   47.59 -
   47.60 -PERFCOUNTER_CPU(shadow_fault_calls,     "calls to shadow_fault")
   47.61 -PERFCOUNTER_CPU(shadow_fault_bail_pde_not_present,
   47.62 -                "sf bailed due to pde not present")
   47.63 -PERFCOUNTER_CPU(shadow_fault_bail_pte_not_present,
   47.64 -                "sf bailed due to pte not present")
   47.65 -PERFCOUNTER_CPU(shadow_fault_bail_ro_mapping,
   47.66 -                "sf bailed due to a ro mapping")
   47.67 -PERFCOUNTER_CPU(shadow_fault_fixed,     "sf fixed the pgfault")
   47.68 -PERFCOUNTER_CPU(write_fault_bail,       "sf bailed due to write_fault")
   47.69 -PERFCOUNTER_CPU(read_fault_bail,        "sf bailed due to read_fault")
   47.70 -
   47.71 -PERFCOUNTER_CPU(map_domain_page_count,  "map_domain_page count")
   47.72 -PERFCOUNTER_CPU(ptwr_emulations,        "writable pt emulations")
   47.73 -
   47.74 -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
   47.75 -PERFCOUNTER_CPU(shadow_l4_table_count,  "shadow_l4_table count")
   47.76 -PERFCOUNTER_CPU(shadow_l3_table_count,  "shadow_l3_table count")
   47.77 -#endif
   47.78 -PERFCOUNTER_CPU(shadow_l2_table_count,  "shadow_l2_table count")
   47.79 -PERFCOUNTER_CPU(shadow_l1_table_count,  "shadow_l1_table count")
   47.80 -PERFCOUNTER_CPU(unshadow_table_count,   "unshadow_table count")
   47.81 -PERFCOUNTER_CPU(shadow_fixup_count,     "shadow_fixup count")
   47.82 -PERFCOUNTER_CPU(shadow_update_va_fail1, "shadow_update_va_fail1")
   47.83 -PERFCOUNTER_CPU(shadow_update_va_fail2, "shadow_update_va_fail2")
   47.84 -
   47.85 -/* STATUS counters do not reset when 'P' is hit */
   47.86 -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
   47.87 -PERFSTATUS(shadow_l4_pages,             "current # shadow L4 pages")
   47.88 -PERFSTATUS(shadow_l3_pages,             "current # shadow L3 pages")
   47.89 -#endif
   47.90 -PERFSTATUS(shadow_l2_pages,             "current # shadow L2 pages")
   47.91 -PERFSTATUS(shadow_l1_pages,             "current # shadow L1 pages")
   47.92 -PERFSTATUS(hl2_table_pages,             "current # hl2 pages")
   47.93 -PERFSTATUS(snapshot_pages,              "current # fshadow snapshot pages")
   47.94 -PERFSTATUS(writable_pte_predictions,    "# writable pte predictions")
   47.95 -PERFSTATUS(free_l1_pages,               "current # free shadow L1 pages")
   47.96 -
   47.97 -PERFCOUNTER_CPU(check_pagetable,        "calls to check_pagetable")
   47.98 -PERFCOUNTER_CPU(check_all_pagetables,   "calls to check_all_pagetables")
   47.99 -
  47.100 -PERFCOUNTER_CPU(shadow_hl2_table_count, "shadow_hl2_table count")
  47.101 -PERFCOUNTER_CPU(shadow_set_l1e_force_map, "shadow_set_l1e forced to map l1")
  47.102 -PERFCOUNTER_CPU(shadow_set_l1e_unlinked, "shadow_set_l1e found unlinked l1")
  47.103 -PERFCOUNTER_CPU(shadow_set_l1e_fail,    "shadow_set_l1e failed (no sl1)")
  47.104 -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  47.105 -PERFCOUNTER_CPU(shadow_set_l2e_force_map, "shadow_set_l2e forced to map l2")
  47.106 -PERFCOUNTER_CPU(shadow_set_l3e_force_map, "shadow_set_l3e forced to map l3")
  47.107 -#endif
  47.108 -PERFCOUNTER_CPU(shadow_invlpg_faults,   "shadow_invlpg's get_user faulted")
  47.109 -PERFCOUNTER_CPU(unshadow_l2_count,      "unpinned L2 count")
  47.110 -
  47.111 -PERFCOUNTER_CPU(shadow_status_shortcut, "fastpath miss on shadow cache")
  47.112 -PERFCOUNTER_CPU(shadow_status_calls,    "calls to shadow_status")
  47.113 -PERFCOUNTER_CPU(shadow_status_miss,     "missed shadow cache")
  47.114 -PERFCOUNTER_CPU(shadow_status_hit_head, "hits on head of bucket")
  47.115 -PERFCOUNTER_CPU(shadow_max_type,        "calls to shadow_max_type")
  47.116 -
  47.117 -PERFCOUNTER_CPU(shadow_sync_all,        "calls to shadow_sync_all")
  47.118 -PERFCOUNTER_CPU(shadow_sync_va,         "calls to shadow_sync_va")
  47.119 -PERFCOUNTER_CPU(resync_l1,              "resync L1 page")
  47.120 -PERFCOUNTER_CPU(resync_l2,              "resync L2 page")
  47.121 -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  47.122 -PERFCOUNTER_CPU(resync_l3,              "resync L3 page")
  47.123 -PERFCOUNTER_CPU(resync_l4,              "resync L4 page")
  47.124 -#endif
  47.125 -PERFCOUNTER_CPU(resync_hl2,             "resync HL2 page")
  47.126 -PERFCOUNTER_CPU(shadow_make_snapshot,   "snapshots created")
  47.127 -PERFCOUNTER_CPU(shadow_mark_mfn_out_of_sync_calls,
  47.128 -                "calls to shadow_mk_out_of_sync")
  47.129 -PERFCOUNTER_CPU(shadow_out_of_sync_calls, "calls to shadow_out_of_sync")
  47.130 -PERFCOUNTER_CPU(snapshot_entry_matches_calls, "calls to ss_entry_matches")
  47.131 -PERFCOUNTER_CPU(snapshot_entry_matches_true, "ss_entry_matches returns true")
  47.132 -
  47.133 -PERFCOUNTER_CPU(validate_pte_calls,     "calls to validate_pte_change")
  47.134 -PERFCOUNTER_CPU(validate_pte_changes1,  "validate_pte makes changes1")
  47.135 -PERFCOUNTER_CPU(validate_pte_changes2,  "validate_pte makes changes2")
  47.136 -PERFCOUNTER_CPU(validate_pte_changes3,  "validate_pte makes changes3")
  47.137 -PERFCOUNTER_CPU(validate_pte_changes4,  "validate_pte makes changes4")
  47.138 -PERFCOUNTER_CPU(validate_pde_calls,     "calls to validate_pde_change")
  47.139 -PERFCOUNTER_CPU(validate_pde_changes,   "validate_pde makes changes")
  47.140 -PERFCOUNTER_CPU(shadow_get_page_fail,   "shadow_get_page_from_l1e fails")
  47.141 -PERFCOUNTER_CPU(validate_hl2e_calls,    "calls to validate_hl2e_change")
  47.142 -PERFCOUNTER_CPU(validate_hl2e_changes,  "validate_hl2e makes changes")
  47.143 -#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  47.144 -PERFCOUNTER_CPU(validate_entry_changes,  "validate_entry changes")
  47.145 -#endif
  47.146 -PERFCOUNTER_CPU(exception_fixed,        "pre-exception fixed")
  47.147 -PERFCOUNTER_CPU(get_mfn_from_gpfn_foreign, "calls to get_mfn_from_gpfn_foreign")
  47.148 -PERFCOUNTER_CPU(remove_all_access,      "calls to remove_all_access")
  47.149 -PERFCOUNTER_CPU(remove_write_access,    "calls to remove_write_access")
  47.150 -PERFCOUNTER_CPU(remove_write_access_easy, "easy outs of remove_write_access")
  47.151 -PERFCOUNTER_CPU(remove_write_no_work,   "no work in remove_write_access")
  47.152 -PERFCOUNTER_CPU(remove_write_not_writable, "remove_write non-writable page")
  47.153 -PERFCOUNTER_CPU(remove_write_fast_exit, "remove_write hit predicted entry")
  47.154 -PERFCOUNTER_CPU(remove_write_predicted, "remove_write predict hit&exit")
  47.155 -PERFCOUNTER_CPU(remove_write_bad_prediction, "remove_write bad prediction")
  47.156 -PERFCOUNTER_CPU(update_hl2e_invlpg,     "update_hl2e calls invlpg")
  47.157 -
  47.158  /*#endif*/ /* __XEN_PERFC_DEFN_H__ */