ia64/xen-unstable

changeset 11326:20bb80e54f21

[qemu patches] Update patches for changeset 11273:a1cff03ac7d7.

Signed-off-by: Christian Limpach <Christian.Limpach@xensource.com>
author Christian Limpach <Christian.Limpach@xensource.com>
date Mon Aug 28 22:44:31 2006 +0100 (2006-08-28)
parents a1cff03ac7d7
children a926e72e0491
files tools/ioemu/patches/qemu-pci tools/ioemu/patches/series
line diff
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/tools/ioemu/patches/qemu-pci	Mon Aug 28 22:44:31 2006 +0100
     1.3 @@ -0,0 +1,54 @@
     1.4 +diff -r d5eb5205ff35 tools/ioemu/hw/pci.c
     1.5 +--- a/tools/ioemu/hw/pci.c	Thu Aug 24 16:25:49 2006 +0100
     1.6 ++++ b/tools/ioemu/hw/pci.c	Fri Aug 25 11:00:03 2006 +0800
     1.7 +@@ -286,6 +286,7 @@ void pci_default_write_config(PCIDevice 
     1.8 +             case 0x0b:
     1.9 +             case 0x0e:
    1.10 +             case 0x10 ... 0x27: /* base */
    1.11 ++            case 0x2c ... 0x2f: /* subsystem vendor id, subsystem id */
    1.12 +             case 0x30 ... 0x33: /* rom */
    1.13 +             case 0x3d:
    1.14 +                 can_write = 0;
    1.15 +@@ -318,6 +319,18 @@ void pci_default_write_config(PCIDevice 
    1.16 +             break;
    1.17 +         }
    1.18 +         if (can_write) {
    1.19 ++            if( addr == 0x05 ) {
    1.20 ++                /* In Command Register, bits 15:11 are reserved */
    1.21 ++                val &= 0x07; 
    1.22 ++            } else if ( addr == 0x06 ) {
    1.23 ++                /* In Status Register, bits 6, 2:0 are reserved, */
    1.24 ++                /* and bits 7,5,4,3 are read only */
    1.25 ++                val = d->config[addr];
    1.26 ++            } else if ( addr == 0x07 ) {
    1.27 ++                /* In Status Register, bits 10,9 are reserved, */
    1.28 ++                val = (val & ~0x06) | (d->config[addr] & 0x06);
    1.29 ++            }
    1.30 ++
    1.31 +             d->config[addr] = val;
    1.32 +         }
    1.33 +         addr++;
    1.34 +diff -r d5eb5205ff35 tools/ioemu/hw/rtl8139.c
    1.35 +--- a/tools/ioemu/hw/rtl8139.c	Thu Aug 24 16:25:49 2006 +0100
    1.36 ++++ b/tools/ioemu/hw/rtl8139.c	Fri Aug 25 11:00:03 2006 +0800
    1.37 +@@ -3423,6 +3423,8 @@ void pci_rtl8139_init(PCIBus *bus, NICIn
    1.38 +     pci_conf[0x0e] = 0x00; /* header_type */
    1.39 +     pci_conf[0x3d] = 1;    /* interrupt pin 0 */
    1.40 +     pci_conf[0x34] = 0xdc;
    1.41 ++    pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID
    1.42 ++    pci_conf[0x2d] = pci_conf[0x01];
    1.43 + 
    1.44 +     s = &d->rtl8139;
    1.45 + 
    1.46 +diff -r d5eb5205ff35 tools/ioemu/hw/usb-uhci.c
    1.47 +--- a/tools/ioemu/hw/usb-uhci.c	Thu Aug 24 16:25:49 2006 +0100
    1.48 ++++ b/tools/ioemu/hw/usb-uhci.c	Fri Aug 25 11:00:03 2006 +0800
    1.49 +@@ -659,6 +659,8 @@ void usb_uhci_init(PCIBus *bus, int devf
    1.50 +     pci_conf[0x0e] = 0x00; // header_type
    1.51 +     pci_conf[0x3d] = 4; // interrupt pin 3
    1.52 +     pci_conf[0x60] = 0x10; // release number
    1.53 ++    pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID
    1.54 ++    pci_conf[0x2d] = pci_conf[0x01];
    1.55 +     
    1.56 +     for(i = 0; i < NB_PORTS; i++) {
    1.57 +         qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
     2.1 --- a/tools/ioemu/patches/series	Mon Aug 28 22:43:09 2006 +0100
     2.2 +++ b/tools/ioemu/patches/series	Mon Aug 28 22:44:31 2006 +0100
     2.3 @@ -44,3 +44,4 @@ qemu-daemonize
     2.4  xen-platform-device
     2.5  qemu-bootorder
     2.6  qemu-tunable-ide-write-cache
     2.7 +qemu-pci -p3