ia64/xen-unstable

changeset 11327:2097de87c920

[HVM] Don't assume that VMENTER causes a TLB flush, when validating
shadow pagetable updates.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
author tdeegan@york.uk.xensource.com
date Mon Aug 28 17:50:21 2006 +0100 (2006-08-28)
parents 68a1b61ecd28
children 9956c3a3bd84
files xen/arch/x86/mm/shadow/common.c
line diff
     1.1 --- a/xen/arch/x86/mm/shadow/common.c	Mon Aug 28 13:08:41 2006 +0100
     1.2 +++ b/xen/arch/x86/mm/shadow/common.c	Mon Aug 28 17:50:21 2006 +0100
     1.3 @@ -397,22 +397,14 @@ shadow_validate_guest_pt_write(struct vc
     1.4      ASSERT(shadow_lock_is_acquired(v->domain));
     1.5      rc = __shadow_validate_guest_entry(v, gmfn, entry, size);
     1.6      if ( rc & SHADOW_SET_FLUSH )
     1.7 -    {
     1.8 -        // Flush everyone except the local processor, which will flush when it
     1.9 -        // re-enters the HVM guest.
    1.10 -        //
    1.11 -        cpumask_t mask = d->domain_dirty_cpumask;
    1.12 -        cpu_clear(v->processor, mask);
    1.13 -        flush_tlb_mask(mask);
    1.14 -    }
    1.15 +        /* Need to flush TLBs to pick up shadow PT changes */
    1.16 +        flush_tlb_mask(d->domain_dirty_cpumask);
    1.17      if ( rc & SHADOW_SET_ERROR ) 
    1.18      {
    1.19          /* This page is probably not a pagetable any more: tear it out of the 
    1.20           * shadows, along with any tables that reference it */
    1.21          shadow_remove_all_shadows_and_parents(v, gmfn);
    1.22      }
    1.23 -    /* We ignore the other bits: since we are about to change CR3 on
    1.24 -     * VMENTER we don't need to do any extra TLB flushes. */ 
    1.25  }
    1.26  
    1.27