ia64/xen-unstable

changeset 13439:2056bc71fa55

[IA64] Let Xen handle identity mapping for xenolinux region 7

During kernel build in dom0, half of the resulting slow reflections
are alt DTLB misses. Since we know Linux identity maps region 7,
Xen can handle the miss itself. This reduces the system time component
of the kernel build by nearly 15%.

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
author awilliam@xenbuild2.aw
date Wed Jan 17 19:48:02 2007 -0700 (2007-01-17)
parents 43115ffc6635
children efaf9c2de07e
files xen/arch/ia64/xen/vcpu.c
line diff
     1.1 --- a/xen/arch/ia64/xen/vcpu.c	Tue Jan 16 12:01:03 2007 -0700
     1.2 +++ b/xen/arch/ia64/xen/vcpu.c	Wed Jan 17 19:48:02 2007 -0700
     1.3 @@ -1682,9 +1682,18 @@ IA64FAULT vcpu_translate(VCPU * vcpu, u6
     1.4  	// note: architecturally, iha is optionally set for alt faults but
     1.5  	// xenlinux depends on it so should document it as part of PV interface
     1.6  	vcpu_thash(vcpu, address, iha);
     1.7 -	if (!(rr & RR_VE_MASK) || !(pta & IA64_PTA_VE))
     1.8 +	if (!(rr & RR_VE_MASK) || !(pta & IA64_PTA_VE)) {
     1.9 +		REGS *regs = vcpu_regs(vcpu);
    1.10 +		// NOTE: This is specific code for linux kernel
    1.11 +		// We assume region 7 is identity mapped
    1.12 +		if (region == 7 && ia64_psr(regs)->cpl == 2) {
    1.13 +			pte.val = address & _PAGE_PPN_MASK;
    1.14 +			pte.val = pte.val | pgprot_val(PAGE_KERNEL);
    1.15 +			goto out;
    1.16 +		}
    1.17  		return is_data ? IA64_ALT_DATA_TLB_VECTOR :
    1.18  			IA64_ALT_INST_TLB_VECTOR;
    1.19 +	}
    1.20  
    1.21  	/* avoid recursively walking (short format) VHPT */
    1.22  	if (((address ^ pta) & ((itir_mask(pta) << 3) >> 3)) == 0)
    1.23 @@ -1704,6 +1713,7 @@ IA64FAULT vcpu_translate(VCPU * vcpu, u6
    1.24  		return is_data ? IA64_DATA_TLB_VECTOR : IA64_INST_TLB_VECTOR;
    1.25  
    1.26  	/* found mapping in guest VHPT! */
    1.27 +out:
    1.28  	*itir = rr & RR_PS_MASK;
    1.29  	*pteval = pte.val;
    1.30  	perfc_incrc(vhpt_translate);