ia64/xen-unstable

changeset 19397:1b27263038b5

xentrace: Add acpi pm tick output to idle tracing

The reason is that tsc stops and it causes the inaccuracy.
And later we can write some scripts based on this patch.

Signed-off-by: Guanqun Lu <guanqun.lu@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Mar 19 10:08:48 2009 +0000 (2009-03-19)
parents 4b2d8b1c395a
children fe949f9129b0
files tools/xentrace/formats xen/arch/x86/acpi/cpu_idle.c
line diff
     1.1 --- a/tools/xentrace/formats	Thu Mar 19 10:05:01 2009 +0000
     1.2 +++ b/tools/xentrace/formats	Thu Mar 19 10:08:48 2009 +0000
     1.3 @@ -118,5 +118,5 @@ 0x0040f00f  CPU%(cpu)d  %(tsc)d (+%(relt
     1.4  0x0040f10f  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  shadow_emulate_resync_only        [ gfn = 0x%(1)16x ]
     1.5  
     1.6  0x00801001  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  cpu_freq_change [ %(1)dMHz -> %(2)dMHz ]
     1.7 -0x00802001  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  cpu_idle_entry  [ C0 -> C%(1)d ]
     1.8 -0x00802002  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  cpu_idle_exit   [ C%(1)d -> C0 ]
     1.9 +0x00802001  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  cpu_idle_entry  [ C0 -> C%(1)d, acpi_pm_tick = %(2)d ]
    1.10 +0x00802002  CPU%(cpu)d  %(tsc)d (+%(reltsc)8d)  cpu_idle_exit   [ C%(1)d -> C0, acpi_pm_tick = %(2)d ]
     2.1 --- a/xen/arch/x86/acpi/cpu_idle.c	Thu Mar 19 10:05:01 2009 +0000
     2.2 +++ b/xen/arch/x86/acpi/cpu_idle.c	Thu Mar 19 10:08:48 2009 +0000
     2.3 @@ -245,16 +245,16 @@ static void acpi_processor_idle(void)
     2.4      case ACPI_STATE_C2:
     2.5          if ( cx->type == ACPI_STATE_C1 || local_apic_timer_c2_ok )
     2.6          {
     2.7 -            /* Trace cpu idle entry */
     2.8 -            TRACE_1D(TRC_PM_IDLE_ENTRY, cx->idx);
     2.9              /* Get start time (ticks) */
    2.10              t1 = inl(pmtmr_ioport);
    2.11 +            /* Trace cpu idle entry */
    2.12 +            TRACE_2D(TRC_PM_IDLE_ENTRY, cx->idx, t1);
    2.13              /* Invoke C2 */
    2.14              acpi_idle_do_entry(cx);
    2.15              /* Get end time (ticks) */
    2.16              t2 = inl(pmtmr_ioport);
    2.17              /* Trace cpu idle exit */
    2.18 -            TRACE_1D(TRC_PM_IDLE_EXIT, cx->idx);
    2.19 +            TRACE_2D(TRC_PM_IDLE_EXIT, cx->idx, t2);
    2.20  
    2.21              /* Re-enable interrupts */
    2.22              local_irq_enable();
    2.23 @@ -293,8 +293,6 @@ static void acpi_processor_idle(void)
    2.24              ACPI_FLUSH_CPU_CACHE();
    2.25          }
    2.26  
    2.27 -        /* Trace cpu idle entry */
    2.28 -        TRACE_1D(TRC_PM_IDLE_ENTRY, cx->idx);
    2.29          /*
    2.30           * Before invoking C3, be aware that TSC/APIC timer may be 
    2.31           * stopped by H/W. Without carefully handling of TSC/APIC stop issues,
    2.32 @@ -305,6 +303,8 @@ static void acpi_processor_idle(void)
    2.33  
    2.34          /* Get start time (ticks) */
    2.35          t1 = inl(pmtmr_ioport);
    2.36 +        /* Trace cpu idle entry */
    2.37 +        TRACE_2D(TRC_PM_IDLE_ENTRY, cx->idx, t1);
    2.38          /* Invoke C3 */
    2.39          acpi_idle_do_entry(cx);
    2.40          /* Get end time (ticks) */
    2.41 @@ -313,7 +313,7 @@ static void acpi_processor_idle(void)
    2.42          /* recovering TSC */
    2.43          cstate_restore_tsc();
    2.44          /* Trace cpu idle exit */
    2.45 -        TRACE_1D(TRC_PM_IDLE_EXIT, cx->idx);
    2.46 +        TRACE_2D(TRC_PM_IDLE_EXIT, cx->idx, t2);
    2.47  
    2.48          if ( power->flags.bm_check && power->flags.bm_control )
    2.49          {