1.1 --- a/xen/arch/ia64/vmx/mm.c	Wed Mar 01 08:29:00 2006 -0700
     1.2 +++ b/xen/arch/ia64/vmx/mm.c	Wed Mar 01 09:53:17 2006 -0700
     1.3 @@ -106,11 +106,11 @@ int vmx_do_mmu_update(mmu_update_t *ureq
     1.4      u64 mfn, gpfn;
     1.5      VCPU *vcpu;
     1.6      mmu_update_t req;
     1.7 -    ia64_rr rr;
     1.8 +    /* ia64_rr rr; */
     1.9      thash_cb_t *hcb;
    1.10 -    thash_data_t entry={0},*ovl;
    1.11 +    /* thash_data_t entry={0},*ovl; */
    1.12      vcpu = current;
    1.13 -    search_section_t sections;
    1.14 +    /* search_section_t sections; */
    1.15      hcb = vmx_vcpu_get_vtlb(vcpu);
    1.16      for ( i = 0; i < count; i++ )
    1.17      {

     2.1 --- a/xen/arch/ia64/vmx/vmmu.c	Wed Mar 01 08:29:00 2006 -0700
     2.2 +++ b/xen/arch/ia64/vmx/vmmu.c	Wed Mar 01 09:53:17 2006 -0700
     2.3 @@ -477,7 +477,7 @@ IA64FAULT vmx_vcpu_itr_i(VCPU *vcpu, UIN
     2.4      thash_cb_t  *hcb;
     2.5      search_section_t sections;
     2.6      ia64_rr vrr;
     2.7 -    u64 mfn,psr;
     2.8 +    /* u64 mfn,psr; */
     2.9  
    2.10      hcb = vmx_vcpu_get_vtlb(vcpu);
    2.11      data.page_flags=pte & ~PAGE_FLAGS_RV_MASK;
    2.12 @@ -527,7 +527,7 @@ IA64FAULT vmx_vcpu_itr_d(VCPU *vcpu, UIN
    2.13      thash_cb_t  *hcb;
    2.14      search_section_t sections;
    2.15      ia64_rr    vrr;
    2.16 -    u64 mfn,psr;
    2.17 +    /* u64 mfn,psr; */
    2.18  
    2.19      hcb = vmx_vcpu_get_vtlb(vcpu);
    2.20      data.page_flags=pte & ~PAGE_FLAGS_RV_MASK;

     3.1 --- a/xen/arch/ia64/vmx/vtlb.c	Wed Mar 01 08:29:00 2006 -0700
     3.2 +++ b/xen/arch/ia64/vmx/vtlb.c	Wed Mar 01 09:53:17 2006 -0700
     3.3 @@ -29,6 +29,7 @@
     3.4  #include <linux/interrupt.h>
     3.5  #include <asm/vmx_vcpu.h>
     3.6  #include <asm/vmmu.h>
     3.7 +#include <asm/tlbflush.h>
     3.8  #define  MAX_CCH_LENGTH     40
     3.9  
    3.10  thash_data_t *__alloc_chain(thash_cb_t *, thash_data_t *);
    3.11 @@ -52,7 +53,7 @@ static thash_data_t *cch_alloc(thash_cb_
    3.12  
    3.13      if ( (p = hcb->cch_freelist) != NULL ) {
    3.14          hcb->cch_freelist = p->next;
    3.15 -        return p;
    3.16 +        return (thash_data_t *)p;
    3.17      }else{
    3.18          return NULL;
    3.19      }
    3.20 @@ -295,7 +296,7 @@ int __tlb_to_vhpt(thash_cb_t *hcb,
    3.21              thash_data_t *tlb, u64 va,
    3.22              thash_data_t *vhpt)
    3.23  {
    3.24 -    u64 pages,mfn,padr,pte;
    3.25 +    u64 padr,pte;
    3.26  //    ia64_rr vrr;
    3.27      ASSERT ( hcb->ht == THASH_VHPT );
    3.28  //    vrr = (hcb->get_rr_fn)(hcb->vcpu,va);
    3.29 @@ -340,7 +341,7 @@ void thash_vhpt_insert(thash_cb_t *hcb, 
    3.30      //panic("Can't convert to machine VHPT entry\n");
    3.31      }
    3.32  
    3.33 -    hash_table = ia64_thash(va);
    3.34 +    hash_table = (thash_data_t *)ia64_thash(va);
    3.35      if( INVALID_VHPT(hash_table) ) {
    3.36          *hash_table = vhpt_entry;
    3.37          hash_table->next = 0;
    3.38 @@ -393,7 +394,7 @@ thash_data_t * vhpt_lookup(u64 va)
    3.39  {
    3.40      thash_data_t *hash;
    3.41      u64 tag;
    3.42 -    hash = ia64_thash(va);
    3.43 +    hash = (thash_data_t *)ia64_thash(va);
    3.44      tag = ia64_ttag(va);
    3.45      while(hash){
    3.46      	if(hash->etag == tag)
    3.47 @@ -456,7 +457,7 @@ static void vhpt_purge(thash_cb_t *hcb, 
    3.48      start = va & (-size);
    3.49      end = start + size;
    3.50      while(start < end){
    3.51 -    	hash_table = ia64_thash(start);
    3.52 +    	hash_table = (thash_data_t *)ia64_thash(start);
    3.53  	    tag = ia64_ttag(start);
    3.54      	if(hash_table->etag == tag ){
    3.55              __rem_hash_head(hcb, hash_table);
    3.56 @@ -566,10 +567,10 @@ thash_data_t *__alloc_chain(thash_cb_t *
    3.57  void vtlb_insert(thash_cb_t *hcb, thash_data_t *entry, u64 va)
    3.58  {
    3.59      thash_data_t    *hash_table, *cch;
    3.60 -    int flag;
    3.61 +    /* int flag; */
    3.62      ia64_rr vrr;
    3.63 -    u64 gppn;
    3.64 -    u64 ppns, ppne, tag;
    3.65 +    /* u64 gppn, ppns, ppne; */
    3.66 +    u64 tag;
    3.67      vrr=vmx_vcpu_rr(current, va);
    3.68      if (vrr.ps != entry->ps) {
    3.69  //        machine_tlb_insert(hcb->vcpu, entry);
    3.70 @@ -716,6 +717,7 @@ static thash_data_t *thash_rem_cch(thash
    3.71          return cch;
    3.72      }
    3.73  }
    3.74 + */
    3.75  
    3.76  /*
    3.77   * Purge one hash line (include the entry in hash table).
    3.78 @@ -950,9 +952,10 @@ void thash_purge_entries_ex(thash_cb_t *
    3.79              search_section_t p_sect,
    3.80              CACHE_LINE_TYPE cl)
    3.81  {
    3.82 +/*
    3.83      thash_data_t    *ovl;
    3.84  
    3.85 -/*    ovl = (hcb->find_overlap)(hcb, va, PSIZE(ps), rid, cl, p_sect);
    3.86 +    ovl = (hcb->find_overlap)(hcb, va, PSIZE(ps), rid, cl, p_sect);
    3.87      while ( ovl != NULL ) {
    3.88          (hcb->rem_hash)(hcb, ovl);
    3.89          ovl = (hcb->next_overlap)(hcb);
    3.90 @@ -968,7 +971,7 @@ void thash_purge_entries_ex(thash_cb_t *
    3.91   */
    3.92  void thash_purge_and_insert(thash_cb_t *hcb, thash_data_t *in, u64 va)
    3.93  {
    3.94 -    thash_data_t    *ovl;
    3.95 +    /* thash_data_t    *ovl; */
    3.96      search_section_t sections;
    3.97  
    3.98  #ifdef   XEN_DEBUGGER
    3.99 @@ -1040,9 +1043,10 @@ static void thash_purge_line(thash_cb_t 
   3.100  // TODO: add sections.
   3.101  void thash_purge_all(thash_cb_t *hcb)
   3.102  {
   3.103 -    thash_data_t    *hash_table, *entry;
   3.104 +    thash_data_t    *hash_table;
   3.105 +    /* thash_data_t    *entry; */
   3.106      thash_cb_t  *vhpt;
   3.107 -    u64 i, start, end;
   3.108 +    /* u64 i, start, end; */
   3.109  
   3.110  #ifdef  VTLB_DEBUG
   3.111  	extern u64  sanity_check;

     4.1 --- a/xen/include/asm-ia64/vmmu.h	Wed Mar 01 08:29:00 2006 -0700
     4.2 +++ b/xen/include/asm-ia64/vmmu.h	Wed Mar 01 09:53:17 2006 -0700
     4.3 @@ -31,10 +31,6 @@
     4.4  #define         VCPU_VHPT_SIZE           (1UL<<VCPU_VHPT_SHIFT)
     4.5  #define         VCPU_VHPT_ORDER          (VCPU_VHPT_SHIFT - PAGE_SHIFT)
     4.6  
     4.7 -#define         PTA_BASE_SHIFT          (15)
     4.8 -
     4.9 -
    4.10 -
    4.11  #ifndef __ASSEMBLY__
    4.12  
    4.13  #include <xen/config.h>
    4.14 @@ -384,6 +380,7 @@ extern ia64_rr vmmu_get_rr(struct vcpu *
    4.15  extern thash_cb_t *init_domain_tlb(struct vcpu *d);
    4.16  extern thash_data_t * vsa_thash(PTA vpta, u64 va, u64 vrr, u64 *tag);
    4.17  extern thash_data_t * vhpt_lookup(u64 va);
    4.18 +extern void machine_tlb_purge(u64 va, u64 ps);
    4.19  
    4.20  //#define   VTLB_DEBUG
    4.21  #ifdef   VTLB_DEBUG

     5.1 --- a/xen/include/asm-ia64/vmx_vcpu.h	Wed Mar 01 08:29:00 2006 -0700
     5.2 +++ b/xen/include/asm-ia64/vmx_vcpu.h	Wed Mar 01 09:53:17 2006 -0700
     5.3 @@ -120,6 +120,14 @@ extern void memwrite_p(VCPU *vcpu, u64 *
     5.4  extern void vcpu_load_kernel_regs(VCPU *vcpu);
     5.5  extern IA64FAULT vmx_vcpu_increment_iip(VCPU *vcpu);
     5.6  extern void vmx_switch_rr7(unsigned long ,shared_info_t*,void *,void *,void *);
     5.7 +
     5.8 +extern void dtlb_fault (VCPU *vcpu, u64 vadr);
     5.9 +extern void nested_dtlb (VCPU *vcpu);
    5.10 +extern void alt_dtlb (VCPU *vcpu, u64 vadr);
    5.11 +extern void dvhpt_fault (VCPU *vcpu, u64 vadr);
    5.12 +extern void dnat_page_consumption (VCPU *vcpu, uint64_t vadr);
    5.13 +extern void page_not_present(VCPU *vcpu, u64 vadr);
    5.14 +
    5.15  /**************************************************************************
    5.16   VCPU control register access routines
    5.17  **************************************************************************/