ia64/xen-unstable

changeset 18091:18a933a52874

[IA64] kexec: Move sal.h to asm-ia64/linux-xen/asm as it needs to be modified

A subsequent patch will modify sal.h, so it needs to be moved from
xen/include/asm-ia64/linux-xen/asm/sal.h to
xen/include/asm-ia64/linux/asm/sal.h and the relevant README.origin
files need to be updated accordingly.

Cc: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Simon Horman <horms@verge.net.au>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Tue Jul 22 12:15:02 2008 +0900 (2008-07-22)
parents 1e5d42cf61ec
children fb5cfb8b122e
files xen/arch/ia64/xen/xensetup.c xen/include/asm-ia64/linux-xen/asm/README.origin xen/include/asm-ia64/linux-xen/asm/sal.h xen/include/asm-ia64/linux/asm/README.origin xen/include/asm-ia64/linux/asm/sal.h
line diff
     1.1 --- a/xen/arch/ia64/xen/xensetup.c	Tue Jul 22 12:15:02 2008 +0900
     1.2 +++ b/xen/arch/ia64/xen/xensetup.c	Tue Jul 22 12:15:02 2008 +0900
     1.3 @@ -31,7 +31,7 @@
     1.4  #include <xen/rcupdate.h>
     1.5  #include <xsm/acm/acm_hooks.h>
     1.6  #include <asm/sn/simulator.h>
     1.7 -#include <linux/asm/sal.h>
     1.8 +#include <asm/sal.h>
     1.9  
    1.10  unsigned long xenheap_phys_end, total_pages;
    1.11  
     2.1 --- a/xen/include/asm-ia64/linux-xen/asm/README.origin	Tue Jul 22 12:15:02 2008 +0900
     2.2 +++ b/xen/include/asm-ia64/linux-xen/asm/README.origin	Tue Jul 22 12:15:02 2008 +0900
     2.3 @@ -20,6 +20,7 @@ pgalloc.h		-> linux/include/asm-ia64/pga
     2.4  pgtable.h		-> linux/include/asm-ia64/pgtable.h
     2.5  processor.h		-> linux/include/asm-ia64/processor.h
     2.6  ptrace.h		-> linux/include/asm-ia64/ptrace.h
     2.7 +sal.h			-> linux/include/asm-ia64/sal.h
     2.8  smp.h			-> linux/include/asm-ia64/smp.h
     2.9  spinlock.h		-> linux/include/asm-ia64/spinlock.h
    2.10  system.h		-> linux/include/asm-ia64/system.h
     3.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.2 +++ b/xen/include/asm-ia64/linux-xen/asm/sal.h	Tue Jul 22 12:15:02 2008 +0900
     3.3 @@ -0,0 +1,882 @@
     3.4 +#ifndef _ASM_IA64_SAL_H
     3.5 +#define _ASM_IA64_SAL_H
     3.6 +
     3.7 +/*
     3.8 + * System Abstraction Layer definitions.
     3.9 + *
    3.10 + * This is based on version 2.5 of the manual "IA-64 System
    3.11 + * Abstraction Layer".
    3.12 + *
    3.13 + * Copyright (C) 2001 Intel
    3.14 + * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
    3.15 + * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
    3.16 + * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
    3.17 + *	David Mosberger-Tang <davidm@hpl.hp.com>
    3.18 + * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
    3.19 + *
    3.20 + * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
    3.21 + *		    revision of the SAL spec.
    3.22 + * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
    3.23 + *                  revision of the SAL spec.
    3.24 + * 99/09/29 davidm	Updated for SAL 2.6.
    3.25 + * 00/03/29 cfleck      Updated SAL Error Logging info for processor (SAL 2.6)
    3.26 + *                      (plus examples of platform error info structures from smariset @ Intel)
    3.27 + */
    3.28 +
    3.29 +#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT		0
    3.30 +#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT	1
    3.31 +#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT	2
    3.32 +#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT	 	3
    3.33 +
    3.34 +#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK	  (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
    3.35 +#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
    3.36 +#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
    3.37 +#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT	  (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
    3.38 +
    3.39 +#ifndef __ASSEMBLY__
    3.40 +
    3.41 +#include <linux/bcd.h>
    3.42 +#include <linux/spinlock.h>
    3.43 +#include <linux/efi.h>
    3.44 +
    3.45 +#include <asm/pal.h>
    3.46 +#include <asm/system.h>
    3.47 +#include <asm/fpu.h>
    3.48 +
    3.49 +extern spinlock_t sal_lock;
    3.50 +
    3.51 +/* SAL spec _requires_ eight args for each call. */
    3.52 +#define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7)	\
    3.53 +	result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7)
    3.54 +
    3.55 +# define SAL_CALL(result,args...) do {				\
    3.56 +	unsigned long __ia64_sc_flags;				\
    3.57 +	struct ia64_fpreg __ia64_sc_fr[6];			\
    3.58 +	ia64_save_scratch_fpregs(__ia64_sc_fr);			\
    3.59 +	spin_lock_irqsave(&sal_lock, __ia64_sc_flags);		\
    3.60 +	__SAL_CALL(result, args);				\
    3.61 +	spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags);	\
    3.62 +	ia64_load_scratch_fpregs(__ia64_sc_fr);			\
    3.63 +} while (0)
    3.64 +
    3.65 +# define SAL_CALL_NOLOCK(result,args...) do {		\
    3.66 +	unsigned long __ia64_scn_flags;			\
    3.67 +	struct ia64_fpreg __ia64_scn_fr[6];		\
    3.68 +	ia64_save_scratch_fpregs(__ia64_scn_fr);	\
    3.69 +	local_irq_save(__ia64_scn_flags);		\
    3.70 +	__SAL_CALL(result, args);			\
    3.71 +	local_irq_restore(__ia64_scn_flags);		\
    3.72 +	ia64_load_scratch_fpregs(__ia64_scn_fr);	\
    3.73 +} while (0)
    3.74 +
    3.75 +# define SAL_CALL_REENTRANT(result,args...) do {	\
    3.76 +	struct ia64_fpreg __ia64_scs_fr[6];		\
    3.77 +	ia64_save_scratch_fpregs(__ia64_scs_fr);	\
    3.78 +	preempt_disable();				\
    3.79 +	__SAL_CALL(result, args);			\
    3.80 +	preempt_enable();				\
    3.81 +	ia64_load_scratch_fpregs(__ia64_scs_fr);	\
    3.82 +} while (0)
    3.83 +
    3.84 +#define SAL_SET_VECTORS			0x01000000
    3.85 +#define SAL_GET_STATE_INFO		0x01000001
    3.86 +#define SAL_GET_STATE_INFO_SIZE		0x01000002
    3.87 +#define SAL_CLEAR_STATE_INFO		0x01000003
    3.88 +#define SAL_MC_RENDEZ			0x01000004
    3.89 +#define SAL_MC_SET_PARAMS		0x01000005
    3.90 +#define SAL_REGISTER_PHYSICAL_ADDR	0x01000006
    3.91 +
    3.92 +#define SAL_CACHE_FLUSH			0x01000008
    3.93 +#define SAL_CACHE_INIT			0x01000009
    3.94 +#define SAL_PCI_CONFIG_READ		0x01000010
    3.95 +#define SAL_PCI_CONFIG_WRITE		0x01000011
    3.96 +#define SAL_FREQ_BASE			0x01000012
    3.97 +#define SAL_PHYSICAL_ID_INFO		0x01000013
    3.98 +
    3.99 +#define SAL_UPDATE_PAL			0x01000020
   3.100 +
   3.101 +struct ia64_sal_retval {
   3.102 +	/*
   3.103 +	 * A zero status value indicates call completed without error.
   3.104 +	 * A negative status value indicates reason of call failure.
   3.105 +	 * A positive status value indicates success but an
   3.106 +	 * informational value should be printed (e.g., "reboot for
   3.107 +	 * change to take effect").
   3.108 +	 */
   3.109 +	s64 status;
   3.110 +	u64 v0;
   3.111 +	u64 v1;
   3.112 +	u64 v2;
   3.113 +};
   3.114 +
   3.115 +typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
   3.116 +
   3.117 +enum {
   3.118 +	SAL_FREQ_BASE_PLATFORM = 0,
   3.119 +	SAL_FREQ_BASE_INTERVAL_TIMER = 1,
   3.120 +	SAL_FREQ_BASE_REALTIME_CLOCK = 2
   3.121 +};
   3.122 +
   3.123 +/*
   3.124 + * The SAL system table is followed by a variable number of variable
   3.125 + * length descriptors.  The structure of these descriptors follows
   3.126 + * below.
   3.127 + * The defininition follows SAL specs from July 2000
   3.128 + */
   3.129 +struct ia64_sal_systab {
   3.130 +	u8 signature[4];	/* should be "SST_" */
   3.131 +	u32 size;		/* size of this table in bytes */
   3.132 +	u8 sal_rev_minor;
   3.133 +	u8 sal_rev_major;
   3.134 +	u16 entry_count;	/* # of entries in variable portion */
   3.135 +	u8 checksum;
   3.136 +	u8 reserved1[7];
   3.137 +	u8 sal_a_rev_minor;
   3.138 +	u8 sal_a_rev_major;
   3.139 +	u8 sal_b_rev_minor;
   3.140 +	u8 sal_b_rev_major;
   3.141 +	/* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
   3.142 +	u8 oem_id[32];
   3.143 +	u8 product_id[32];	/* ASCII product id  */
   3.144 +	u8 reserved2[8];
   3.145 +};
   3.146 +
   3.147 +enum sal_systab_entry_type {
   3.148 +	SAL_DESC_ENTRY_POINT = 0,
   3.149 +	SAL_DESC_MEMORY = 1,
   3.150 +	SAL_DESC_PLATFORM_FEATURE = 2,
   3.151 +	SAL_DESC_TR = 3,
   3.152 +	SAL_DESC_PTC = 4,
   3.153 +	SAL_DESC_AP_WAKEUP = 5
   3.154 +};
   3.155 +
   3.156 +/*
   3.157 + * Entry type:	Size:
   3.158 + *	0	48
   3.159 + *	1	32
   3.160 + *	2	16
   3.161 + *	3	32
   3.162 + *	4	16
   3.163 + *	5	16
   3.164 + */
   3.165 +#define SAL_DESC_SIZE(type)	"\060\040\020\040\020\020"[(unsigned) type]
   3.166 +
   3.167 +typedef struct ia64_sal_desc_entry_point {
   3.168 +	u8 type;
   3.169 +	u8 reserved1[7];
   3.170 +	u64 pal_proc;
   3.171 +	u64 sal_proc;
   3.172 +	u64 gp;
   3.173 +	u8 reserved2[16];
   3.174 +}ia64_sal_desc_entry_point_t;
   3.175 +
   3.176 +typedef struct ia64_sal_desc_memory {
   3.177 +	u8 type;
   3.178 +	u8 used_by_sal;	/* needs to be mapped for SAL? */
   3.179 +	u8 mem_attr;		/* current memory attribute setting */
   3.180 +	u8 access_rights;	/* access rights set up by SAL */
   3.181 +	u8 mem_attr_mask;	/* mask of supported memory attributes */
   3.182 +	u8 reserved1;
   3.183 +	u8 mem_type;		/* memory type */
   3.184 +	u8 mem_usage;		/* memory usage */
   3.185 +	u64 addr;		/* physical address of memory */
   3.186 +	u32 length;	/* length (multiple of 4KB pages) */
   3.187 +	u32 reserved2;
   3.188 +	u8 oem_reserved[8];
   3.189 +} ia64_sal_desc_memory_t;
   3.190 +
   3.191 +typedef struct ia64_sal_desc_platform_feature {
   3.192 +	u8 type;
   3.193 +	u8 feature_mask;
   3.194 +	u8 reserved1[14];
   3.195 +} ia64_sal_desc_platform_feature_t;
   3.196 +
   3.197 +typedef struct ia64_sal_desc_tr {
   3.198 +	u8 type;
   3.199 +	u8 tr_type;		/* 0 == instruction, 1 == data */
   3.200 +	u8 regnum;		/* translation register number */
   3.201 +	u8 reserved1[5];
   3.202 +	u64 addr;		/* virtual address of area covered */
   3.203 +	u64 page_size;		/* encoded page size */
   3.204 +	u8 reserved2[8];
   3.205 +} ia64_sal_desc_tr_t;
   3.206 +
   3.207 +typedef struct ia64_sal_desc_ptc {
   3.208 +	u8 type;
   3.209 +	u8 reserved1[3];
   3.210 +	u32 num_domains;	/* # of coherence domains */
   3.211 +	u64 domain_info;	/* physical address of domain info table */
   3.212 +} ia64_sal_desc_ptc_t;
   3.213 +
   3.214 +typedef struct ia64_sal_ptc_domain_info {
   3.215 +	u64 proc_count;		/* number of processors in domain */
   3.216 +	u64 proc_list;		/* physical address of LID array */
   3.217 +} ia64_sal_ptc_domain_info_t;
   3.218 +
   3.219 +typedef struct ia64_sal_ptc_domain_proc_entry {
   3.220 +	u64 id  : 8;		/* id of processor */
   3.221 +	u64 eid : 8;		/* eid of processor */
   3.222 +} ia64_sal_ptc_domain_proc_entry_t;
   3.223 +
   3.224 +
   3.225 +#define IA64_SAL_AP_EXTERNAL_INT 0
   3.226 +
   3.227 +typedef struct ia64_sal_desc_ap_wakeup {
   3.228 +	u8 type;
   3.229 +	u8 mechanism;		/* 0 == external interrupt */
   3.230 +	u8 reserved1[6];
   3.231 +	u64 vector;		/* interrupt vector in range 0x10-0xff */
   3.232 +} ia64_sal_desc_ap_wakeup_t ;
   3.233 +
   3.234 +extern ia64_sal_handler ia64_sal;
   3.235 +extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
   3.236 +
   3.237 +extern unsigned short sal_revision;	/* supported SAL spec revision */
   3.238 +extern unsigned short sal_version;	/* SAL version; OEM dependent */
   3.239 +#define SAL_VERSION_CODE(major, minor) ((BIN2BCD(major) << 8) | BIN2BCD(minor))
   3.240 +
   3.241 +extern const char *ia64_sal_strerror (long status);
   3.242 +extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
   3.243 +
   3.244 +/* SAL information type encodings */
   3.245 +enum {
   3.246 +	SAL_INFO_TYPE_MCA  = 0,		/* Machine check abort information */
   3.247 +        SAL_INFO_TYPE_INIT = 1,		/* Init information */
   3.248 +        SAL_INFO_TYPE_CMC  = 2,		/* Corrected machine check information */
   3.249 +        SAL_INFO_TYPE_CPE  = 3		/* Corrected platform error information */
   3.250 +};
   3.251 +
   3.252 +/* Encodings for machine check parameter types */
   3.253 +enum {
   3.254 +	SAL_MC_PARAM_RENDEZ_INT    = 1,	/* Rendezvous interrupt */
   3.255 +	SAL_MC_PARAM_RENDEZ_WAKEUP = 2,	/* Wakeup */
   3.256 +	SAL_MC_PARAM_CPE_INT	   = 3	/* Corrected Platform Error Int */
   3.257 +};
   3.258 +
   3.259 +/* Encodings for rendezvous mechanisms */
   3.260 +enum {
   3.261 +	SAL_MC_PARAM_MECHANISM_INT = 1,	/* Use interrupt */
   3.262 +	SAL_MC_PARAM_MECHANISM_MEM = 2	/* Use memory synchronization variable*/
   3.263 +};
   3.264 +
   3.265 +/* Encodings for vectors which can be registered by the OS with SAL */
   3.266 +enum {
   3.267 +	SAL_VECTOR_OS_MCA	  = 0,
   3.268 +	SAL_VECTOR_OS_INIT	  = 1,
   3.269 +	SAL_VECTOR_OS_BOOT_RENDEZ = 2
   3.270 +};
   3.271 +
   3.272 +/* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
   3.273 +#define	SAL_MC_PARAM_RZ_ALWAYS		0x1
   3.274 +#define	SAL_MC_PARAM_BINIT_ESCALATE	0x10
   3.275 +
   3.276 +/*
   3.277 + * Definition of the SAL Error Log from the SAL spec
   3.278 + */
   3.279 +
   3.280 +/* SAL Error Record Section GUID Definitions */
   3.281 +#define SAL_PROC_DEV_ERR_SECT_GUID  \
   3.282 +    EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   3.283 +#define SAL_PLAT_MEM_DEV_ERR_SECT_GUID  \
   3.284 +    EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   3.285 +#define SAL_PLAT_SEL_DEV_ERR_SECT_GUID  \
   3.286 +    EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   3.287 +#define SAL_PLAT_PCI_BUS_ERR_SECT_GUID  \
   3.288 +    EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   3.289 +#define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID  \
   3.290 +    EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   3.291 +#define SAL_PLAT_PCI_COMP_ERR_SECT_GUID  \
   3.292 +    EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   3.293 +#define SAL_PLAT_SPECIFIC_ERR_SECT_GUID  \
   3.294 +    EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   3.295 +#define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID  \
   3.296 +    EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   3.297 +#define SAL_PLAT_BUS_ERR_SECT_GUID  \
   3.298 +    EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   3.299 +
   3.300 +#define MAX_CACHE_ERRORS	6
   3.301 +#define MAX_TLB_ERRORS		6
   3.302 +#define MAX_BUS_ERRORS		1
   3.303 +
   3.304 +/* Definition of version  according to SAL spec for logging purposes */
   3.305 +typedef struct sal_log_revision {
   3.306 +	u8 minor;		/* BCD (0..99) */
   3.307 +	u8 major;		/* BCD (0..99) */
   3.308 +} sal_log_revision_t;
   3.309 +
   3.310 +/* Definition of timestamp according to SAL spec for logging purposes */
   3.311 +typedef struct sal_log_timestamp {
   3.312 +	u8 slh_second;		/* Second (0..59) */
   3.313 +	u8 slh_minute;		/* Minute (0..59) */
   3.314 +	u8 slh_hour;		/* Hour (0..23) */
   3.315 +	u8 slh_reserved;
   3.316 +	u8 slh_day;		/* Day (1..31) */
   3.317 +	u8 slh_month;		/* Month (1..12) */
   3.318 +	u8 slh_year;		/* Year (00..99) */
   3.319 +	u8 slh_century;		/* Century (19, 20, 21, ...) */
   3.320 +} sal_log_timestamp_t;
   3.321 +
   3.322 +/* Definition of log record  header structures */
   3.323 +typedef struct sal_log_record_header {
   3.324 +	u64 id;				/* Unique monotonically increasing ID */
   3.325 +	sal_log_revision_t revision;	/* Major and Minor revision of header */
   3.326 +	u16 severity;			/* Error Severity */
   3.327 +	u32 len;			/* Length of this error log in bytes */
   3.328 +	sal_log_timestamp_t timestamp;	/* Timestamp */
   3.329 +	efi_guid_t platform_guid;	/* Unique OEM Platform ID */
   3.330 +} sal_log_record_header_t;
   3.331 +
   3.332 +#define sal_log_severity_recoverable	0
   3.333 +#define sal_log_severity_fatal		1
   3.334 +#define sal_log_severity_corrected	2
   3.335 +
   3.336 +/* Definition of log section header structures */
   3.337 +typedef struct sal_log_sec_header {
   3.338 +    efi_guid_t guid;			/* Unique Section ID */
   3.339 +    sal_log_revision_t revision;	/* Major and Minor revision of Section */
   3.340 +    u16 reserved;
   3.341 +    u32 len;				/* Section length */
   3.342 +} sal_log_section_hdr_t;
   3.343 +
   3.344 +typedef struct sal_log_mod_error_info {
   3.345 +	struct {
   3.346 +		u64 check_info              : 1,
   3.347 +		    requestor_identifier    : 1,
   3.348 +		    responder_identifier    : 1,
   3.349 +		    target_identifier       : 1,
   3.350 +		    precise_ip              : 1,
   3.351 +		    reserved                : 59;
   3.352 +	} valid;
   3.353 +	u64 check_info;
   3.354 +	u64 requestor_identifier;
   3.355 +	u64 responder_identifier;
   3.356 +	u64 target_identifier;
   3.357 +	u64 precise_ip;
   3.358 +} sal_log_mod_error_info_t;
   3.359 +
   3.360 +typedef struct sal_processor_static_info {
   3.361 +	struct {
   3.362 +		u64 minstate        : 1,
   3.363 +		    br              : 1,
   3.364 +		    cr              : 1,
   3.365 +		    ar              : 1,
   3.366 +		    rr              : 1,
   3.367 +		    fr              : 1,
   3.368 +		    reserved        : 58;
   3.369 +	} valid;
   3.370 +	pal_min_state_area_t min_state_area;
   3.371 +	u64 br[8];
   3.372 +	u64 cr[128];
   3.373 +	u64 ar[128];
   3.374 +	u64 rr[8];
   3.375 +	struct ia64_fpreg __attribute__ ((packed)) fr[128];
   3.376 +} sal_processor_static_info_t;
   3.377 +
   3.378 +struct sal_cpuid_info {
   3.379 +	u64 regs[5];
   3.380 +	u64 reserved;
   3.381 +};
   3.382 +
   3.383 +typedef struct sal_log_processor_info {
   3.384 +	sal_log_section_hdr_t header;
   3.385 +	struct {
   3.386 +		u64 proc_error_map      : 1,
   3.387 +		    proc_state_param    : 1,
   3.388 +		    proc_cr_lid         : 1,
   3.389 +		    psi_static_struct   : 1,
   3.390 +		    num_cache_check     : 4,
   3.391 +		    num_tlb_check       : 4,
   3.392 +		    num_bus_check       : 4,
   3.393 +		    num_reg_file_check  : 4,
   3.394 +		    num_ms_check        : 4,
   3.395 +		    cpuid_info          : 1,
   3.396 +		    reserved1           : 39;
   3.397 +	} valid;
   3.398 +	u64 proc_error_map;
   3.399 +	u64 proc_state_parameter;
   3.400 +	u64 proc_cr_lid;
   3.401 +	/*
   3.402 +	 * The rest of this structure consists of variable-length arrays, which can't be
   3.403 +	 * expressed in C.
   3.404 +	 */
   3.405 +	sal_log_mod_error_info_t info[0];
   3.406 +	/*
   3.407 +	 * This is what the rest looked like if C supported variable-length arrays:
   3.408 +	 *
   3.409 +	 * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
   3.410 +	 * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
   3.411 +	 * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
   3.412 +	 * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
   3.413 +	 * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
   3.414 +	 * struct sal_cpuid_info cpuid_info;
   3.415 +	 * sal_processor_static_info_t processor_static_info;
   3.416 +	 */
   3.417 +} sal_log_processor_info_t;
   3.418 +
   3.419 +/* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
   3.420 +#define SAL_LPI_PSI_INFO(l)									\
   3.421 +({	sal_log_processor_info_t *_l = (l);							\
   3.422 +	((sal_processor_static_info_t *)							\
   3.423 +	 ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check		\
   3.424 +				+ _l->valid.num_bus_check + _l->valid.num_reg_file_check	\
   3.425 +				+ _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t)	\
   3.426 +			       + sizeof(struct sal_cpuid_info))));				\
   3.427 +})
   3.428 +
   3.429 +/* platform error log structures */
   3.430 +
   3.431 +typedef struct sal_log_mem_dev_err_info {
   3.432 +	sal_log_section_hdr_t header;
   3.433 +	struct {
   3.434 +		u64 error_status    : 1,
   3.435 +		    physical_addr   : 1,
   3.436 +		    addr_mask       : 1,
   3.437 +		    node            : 1,
   3.438 +		    card            : 1,
   3.439 +		    module          : 1,
   3.440 +		    bank            : 1,
   3.441 +		    device          : 1,
   3.442 +		    row             : 1,
   3.443 +		    column          : 1,
   3.444 +		    bit_position    : 1,
   3.445 +		    requestor_id    : 1,
   3.446 +		    responder_id    : 1,
   3.447 +		    target_id       : 1,
   3.448 +		    bus_spec_data   : 1,
   3.449 +		    oem_id          : 1,
   3.450 +		    oem_data        : 1,
   3.451 +		    reserved        : 47;
   3.452 +	} valid;
   3.453 +	u64 error_status;
   3.454 +	u64 physical_addr;
   3.455 +	u64 addr_mask;
   3.456 +	u16 node;
   3.457 +	u16 card;
   3.458 +	u16 module;
   3.459 +	u16 bank;
   3.460 +	u16 device;
   3.461 +	u16 row;
   3.462 +	u16 column;
   3.463 +	u16 bit_position;
   3.464 +	u64 requestor_id;
   3.465 +	u64 responder_id;
   3.466 +	u64 target_id;
   3.467 +	u64 bus_spec_data;
   3.468 +	u8 oem_id[16];
   3.469 +	u8 oem_data[1];			/* Variable length data */
   3.470 +} sal_log_mem_dev_err_info_t;
   3.471 +
   3.472 +typedef struct sal_log_sel_dev_err_info {
   3.473 +	sal_log_section_hdr_t header;
   3.474 +	struct {
   3.475 +		u64 record_id       : 1,
   3.476 +		    record_type     : 1,
   3.477 +		    generator_id    : 1,
   3.478 +		    evm_rev         : 1,
   3.479 +		    sensor_type     : 1,
   3.480 +		    sensor_num      : 1,
   3.481 +		    event_dir       : 1,
   3.482 +		    event_data1     : 1,
   3.483 +		    event_data2     : 1,
   3.484 +		    event_data3     : 1,
   3.485 +		    reserved        : 54;
   3.486 +	} valid;
   3.487 +	u16 record_id;
   3.488 +	u8 record_type;
   3.489 +	u8 timestamp[4];
   3.490 +	u16 generator_id;
   3.491 +	u8 evm_rev;
   3.492 +	u8 sensor_type;
   3.493 +	u8 sensor_num;
   3.494 +	u8 event_dir;
   3.495 +	u8 event_data1;
   3.496 +	u8 event_data2;
   3.497 +	u8 event_data3;
   3.498 +} sal_log_sel_dev_err_info_t;
   3.499 +
   3.500 +typedef struct sal_log_pci_bus_err_info {
   3.501 +	sal_log_section_hdr_t header;
   3.502 +	struct {
   3.503 +		u64 err_status      : 1,
   3.504 +		    err_type        : 1,
   3.505 +		    bus_id          : 1,
   3.506 +		    bus_address     : 1,
   3.507 +		    bus_data        : 1,
   3.508 +		    bus_cmd         : 1,
   3.509 +		    requestor_id    : 1,
   3.510 +		    responder_id    : 1,
   3.511 +		    target_id       : 1,
   3.512 +		    oem_data        : 1,
   3.513 +		    reserved        : 54;
   3.514 +	} valid;
   3.515 +	u64 err_status;
   3.516 +	u16 err_type;
   3.517 +	u16 bus_id;
   3.518 +	u32 reserved;
   3.519 +	u64 bus_address;
   3.520 +	u64 bus_data;
   3.521 +	u64 bus_cmd;
   3.522 +	u64 requestor_id;
   3.523 +	u64 responder_id;
   3.524 +	u64 target_id;
   3.525 +	u8 oem_data[1];			/* Variable length data */
   3.526 +} sal_log_pci_bus_err_info_t;
   3.527 +
   3.528 +typedef struct sal_log_smbios_dev_err_info {
   3.529 +	sal_log_section_hdr_t header;
   3.530 +	struct {
   3.531 +		u64 event_type      : 1,
   3.532 +		    length          : 1,
   3.533 +		    time_stamp      : 1,
   3.534 +		    data            : 1,
   3.535 +		    reserved1       : 60;
   3.536 +	} valid;
   3.537 +	u8 event_type;
   3.538 +	u8 length;
   3.539 +	u8 time_stamp[6];
   3.540 +	u8 data[1];			/* data of variable length, length == slsmb_length */
   3.541 +} sal_log_smbios_dev_err_info_t;
   3.542 +
   3.543 +typedef struct sal_log_pci_comp_err_info {
   3.544 +	sal_log_section_hdr_t header;
   3.545 +	struct {
   3.546 +		u64 err_status      : 1,
   3.547 +		    comp_info       : 1,
   3.548 +		    num_mem_regs    : 1,
   3.549 +		    num_io_regs     : 1,
   3.550 +		    reg_data_pairs  : 1,
   3.551 +		    oem_data        : 1,
   3.552 +		    reserved        : 58;
   3.553 +	} valid;
   3.554 +	u64 err_status;
   3.555 +	struct {
   3.556 +		u16 vendor_id;
   3.557 +		u16 device_id;
   3.558 +		u8 class_code[3];
   3.559 +		u8 func_num;
   3.560 +		u8 dev_num;
   3.561 +		u8 bus_num;
   3.562 +		u8 seg_num;
   3.563 +		u8 reserved[5];
   3.564 +	} comp_info;
   3.565 +	u32 num_mem_regs;
   3.566 +	u32 num_io_regs;
   3.567 +	u64 reg_data_pairs[1];
   3.568 +	/*
   3.569 +	 * array of address/data register pairs is num_mem_regs + num_io_regs elements
   3.570 +	 * long.  Each array element consists of a u64 address followed by a u64 data
   3.571 +	 * value.  The oem_data array immediately follows the reg_data_pairs array
   3.572 +	 */
   3.573 +	u8 oem_data[1];			/* Variable length data */
   3.574 +} sal_log_pci_comp_err_info_t;
   3.575 +
   3.576 +typedef struct sal_log_plat_specific_err_info {
   3.577 +	sal_log_section_hdr_t header;
   3.578 +	struct {
   3.579 +		u64 err_status      : 1,
   3.580 +		    guid            : 1,
   3.581 +		    oem_data        : 1,
   3.582 +		    reserved        : 61;
   3.583 +	} valid;
   3.584 +	u64 err_status;
   3.585 +	efi_guid_t guid;
   3.586 +	u8 oem_data[1];			/* platform specific variable length data */
   3.587 +} sal_log_plat_specific_err_info_t;
   3.588 +
   3.589 +typedef struct sal_log_host_ctlr_err_info {
   3.590 +	sal_log_section_hdr_t header;
   3.591 +	struct {
   3.592 +		u64 err_status      : 1,
   3.593 +		    requestor_id    : 1,
   3.594 +		    responder_id    : 1,
   3.595 +		    target_id       : 1,
   3.596 +		    bus_spec_data   : 1,
   3.597 +		    oem_data        : 1,
   3.598 +		    reserved        : 58;
   3.599 +	} valid;
   3.600 +	u64 err_status;
   3.601 +	u64 requestor_id;
   3.602 +	u64 responder_id;
   3.603 +	u64 target_id;
   3.604 +	u64 bus_spec_data;
   3.605 +	u8 oem_data[1];			/* Variable length OEM data */
   3.606 +} sal_log_host_ctlr_err_info_t;
   3.607 +
   3.608 +typedef struct sal_log_plat_bus_err_info {
   3.609 +	sal_log_section_hdr_t header;
   3.610 +	struct {
   3.611 +		u64 err_status      : 1,
   3.612 +		    requestor_id    : 1,
   3.613 +		    responder_id    : 1,
   3.614 +		    target_id       : 1,
   3.615 +		    bus_spec_data   : 1,
   3.616 +		    oem_data        : 1,
   3.617 +		    reserved        : 58;
   3.618 +	} valid;
   3.619 +	u64 err_status;
   3.620 +	u64 requestor_id;
   3.621 +	u64 responder_id;
   3.622 +	u64 target_id;
   3.623 +	u64 bus_spec_data;
   3.624 +	u8 oem_data[1];			/* Variable length OEM data */
   3.625 +} sal_log_plat_bus_err_info_t;
   3.626 +
   3.627 +/* Overall platform error section structure */
   3.628 +typedef union sal_log_platform_err_info {
   3.629 +	sal_log_mem_dev_err_info_t mem_dev_err;
   3.630 +	sal_log_sel_dev_err_info_t sel_dev_err;
   3.631 +	sal_log_pci_bus_err_info_t pci_bus_err;
   3.632 +	sal_log_smbios_dev_err_info_t smbios_dev_err;
   3.633 +	sal_log_pci_comp_err_info_t pci_comp_err;
   3.634 +	sal_log_plat_specific_err_info_t plat_specific_err;
   3.635 +	sal_log_host_ctlr_err_info_t host_ctlr_err;
   3.636 +	sal_log_plat_bus_err_info_t plat_bus_err;
   3.637 +} sal_log_platform_err_info_t;
   3.638 +
   3.639 +/* SAL log over-all, multi-section error record structure (processor+platform) */
   3.640 +typedef struct err_rec {
   3.641 +	sal_log_record_header_t sal_elog_header;
   3.642 +	sal_log_processor_info_t proc_err;
   3.643 +	sal_log_platform_err_info_t plat_err;
   3.644 +	u8 oem_data_pad[1024];
   3.645 +} ia64_err_rec_t;
   3.646 +
   3.647 +/*
   3.648 + * Now define a couple of inline functions for improved type checking
   3.649 + * and convenience.
   3.650 + */
   3.651 +static inline long
   3.652 +ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
   3.653 +		    unsigned long *drift_info)
   3.654 +{
   3.655 +	struct ia64_sal_retval isrv;
   3.656 +
   3.657 +	SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0);
   3.658 +	*ticks_per_second = isrv.v0;
   3.659 +	*drift_info = isrv.v1;
   3.660 +	return isrv.status;
   3.661 +}
   3.662 +
   3.663 +extern s64 ia64_sal_cache_flush (u64 cache_type);
   3.664 +
   3.665 +/* Initialize all the processor and platform level instruction and data caches */
   3.666 +static inline s64
   3.667 +ia64_sal_cache_init (void)
   3.668 +{
   3.669 +	struct ia64_sal_retval isrv;
   3.670 +	SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
   3.671 +	return isrv.status;
   3.672 +}
   3.673 +
   3.674 +/*
   3.675 + * Clear the processor and platform information logged by SAL with respect to the machine
   3.676 + * state at the time of MCA's, INITs, CMCs, or CPEs.
   3.677 + */
   3.678 +static inline s64
   3.679 +ia64_sal_clear_state_info (u64 sal_info_type)
   3.680 +{
   3.681 +	struct ia64_sal_retval isrv;
   3.682 +	SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
   3.683 +	              0, 0, 0, 0, 0);
   3.684 +	return isrv.status;
   3.685 +}
   3.686 +
   3.687 +
   3.688 +/* Get the processor and platform information logged by SAL with respect to the machine
   3.689 + * state at the time of the MCAs, INITs, CMCs, or CPEs.
   3.690 + */
   3.691 +static inline u64
   3.692 +ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
   3.693 +{
   3.694 +	struct ia64_sal_retval isrv;
   3.695 +	SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
   3.696 +	              sal_info, 0, 0, 0, 0);
   3.697 +	if (isrv.status)
   3.698 +		return 0;
   3.699 +
   3.700 +	return isrv.v0;
   3.701 +}
   3.702 +
   3.703 +/*
   3.704 + * Get the maximum size of the information logged by SAL with respect to the machine state
   3.705 + * at the time of MCAs, INITs, CMCs, or CPEs.
   3.706 + */
   3.707 +static inline u64
   3.708 +ia64_sal_get_state_info_size (u64 sal_info_type)
   3.709 +{
   3.710 +	struct ia64_sal_retval isrv;
   3.711 +	SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
   3.712 +	              0, 0, 0, 0, 0);
   3.713 +	if (isrv.status)
   3.714 +		return 0;
   3.715 +	return isrv.v0;
   3.716 +}
   3.717 +
   3.718 +/*
   3.719 + * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
   3.720 + * the monarch processor.  Must not lock, because it will not return on any cpu until the
   3.721 + * monarch processor sends a wake up.
   3.722 + */
   3.723 +static inline s64
   3.724 +ia64_sal_mc_rendez (void)
   3.725 +{
   3.726 +	struct ia64_sal_retval isrv;
   3.727 +	SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
   3.728 +	return isrv.status;
   3.729 +}
   3.730 +
   3.731 +/*
   3.732 + * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
   3.733 + * the machine check rendezvous sequence as well as the mechanism to wake up the
   3.734 + * non-monarch processor at the end of machine check processing.
   3.735 + * Returns the complete ia64_sal_retval because some calls return more than just a status
   3.736 + * value.
   3.737 + */
   3.738 +static inline struct ia64_sal_retval
   3.739 +ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
   3.740 +{
   3.741 +	struct ia64_sal_retval isrv;
   3.742 +	SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
   3.743 +		 timeout, rz_always, 0, 0);
   3.744 +	return isrv;
   3.745 +}
   3.746 +
   3.747 +/* Read from PCI configuration space */
   3.748 +static inline s64
   3.749 +ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
   3.750 +{
   3.751 +	struct ia64_sal_retval isrv;
   3.752 +	SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
   3.753 +	if (value)
   3.754 +		*value = isrv.v0;
   3.755 +	return isrv.status;
   3.756 +}
   3.757 +
   3.758 +/* Write to PCI configuration space */
   3.759 +static inline s64
   3.760 +ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
   3.761 +{
   3.762 +	struct ia64_sal_retval isrv;
   3.763 +	SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
   3.764 +	         type, 0, 0, 0);
   3.765 +	return isrv.status;
   3.766 +}
   3.767 +
   3.768 +/*
   3.769 + * Register physical addresses of locations needed by SAL when SAL procedures are invoked
   3.770 + * in virtual mode.
   3.771 + */
   3.772 +static inline s64
   3.773 +ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
   3.774 +{
   3.775 +	struct ia64_sal_retval isrv;
   3.776 +	SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
   3.777 +	         0, 0, 0, 0, 0);
   3.778 +	return isrv.status;
   3.779 +}
   3.780 +
   3.781 +/*
   3.782 + * Register software dependent code locations within SAL. These locations are handlers or
   3.783 + * entry points where SAL will pass control for the specified event. These event handlers
   3.784 + * are for the bott rendezvous, MCAs and INIT scenarios.
   3.785 + */
   3.786 +static inline s64
   3.787 +ia64_sal_set_vectors (u64 vector_type,
   3.788 +		      u64 handler_addr1, u64 gp1, u64 handler_len1,
   3.789 +		      u64 handler_addr2, u64 gp2, u64 handler_len2)
   3.790 +{
   3.791 +	struct ia64_sal_retval isrv;
   3.792 +	SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
   3.793 +			handler_addr1, gp1, handler_len1,
   3.794 +			handler_addr2, gp2, handler_len2);
   3.795 +
   3.796 +	return isrv.status;
   3.797 +}
   3.798 +
   3.799 +/* Update the contents of PAL block in the non-volatile storage device */
   3.800 +static inline s64
   3.801 +ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
   3.802 +		     u64 *error_code, u64 *scratch_buf_size_needed)
   3.803 +{
   3.804 +	struct ia64_sal_retval isrv;
   3.805 +	SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
   3.806 +	         0, 0, 0, 0);
   3.807 +	if (error_code)
   3.808 +		*error_code = isrv.v0;
   3.809 +	if (scratch_buf_size_needed)
   3.810 +		*scratch_buf_size_needed = isrv.v1;
   3.811 +	return isrv.status;
   3.812 +}
   3.813 +
   3.814 +/* Get physical processor die mapping in the platform. */
   3.815 +static inline s64
   3.816 +ia64_sal_physical_id_info(u16 *splid)
   3.817 +{
   3.818 +	struct ia64_sal_retval isrv;
   3.819 +	SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
   3.820 +	if (splid)
   3.821 +		*splid = isrv.v0;
   3.822 +	return isrv.status;
   3.823 +}
   3.824 +
   3.825 +extern unsigned long sal_platform_features;
   3.826 +
   3.827 +extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
   3.828 +
   3.829 +struct sal_ret_values {
   3.830 +	long r8; long r9; long r10; long r11;
   3.831 +};
   3.832 +
   3.833 +#define IA64_SAL_OEMFUNC_MIN		0x02000000
   3.834 +#define IA64_SAL_OEMFUNC_MAX		0x03ffffff
   3.835 +
   3.836 +extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64,
   3.837 +			    u64, u64, u64);
   3.838 +extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64,
   3.839 +				   u64, u64, u64, u64, u64);
   3.840 +extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
   3.841 +				      u64, u64, u64, u64, u64);
   3.842 +#ifdef CONFIG_HOTPLUG_CPU
   3.843 +/*
   3.844 + * System Abstraction Layer Specification
   3.845 + * Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State.
   3.846 + * Note: region regs are stored first in head.S _start. Hence they must
   3.847 + * stay up front.
   3.848 + */
   3.849 +struct sal_to_os_boot {
   3.850 +	u64 rr[8];		/* Region Registers */
   3.851 +	u64	br[6];		/* br0: return addr into SAL boot rendez routine */
   3.852 +	u64 gr1;		/* SAL:GP */
   3.853 +	u64 gr12;		/* SAL:SP */
   3.854 +	u64 gr13;		/* SAL: Task Pointer */
   3.855 +	u64 fpsr;
   3.856 +	u64	pfs;
   3.857 +	u64 rnat;
   3.858 +	u64 unat;
   3.859 +	u64 bspstore;
   3.860 +	u64 dcr;		/* Default Control Register */
   3.861 +	u64 iva;
   3.862 +	u64 pta;
   3.863 +	u64 itv;
   3.864 +	u64 pmv;
   3.865 +	u64 cmcv;
   3.866 +	u64 lrr[2];
   3.867 +	u64 gr[4];
   3.868 +	u64 pr;			/* Predicate registers */
   3.869 +	u64 lc;			/* Loop Count */
   3.870 +	struct ia64_fpreg fp[20];
   3.871 +};
   3.872 +
   3.873 +/*
   3.874 + * Global array allocated for NR_CPUS at boot time
   3.875 + */
   3.876 +extern struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
   3.877 +
   3.878 +extern void ia64_jump_to_sal(struct sal_to_os_boot *);
   3.879 +#endif
   3.880 +
   3.881 +extern void ia64_sal_handler_init(void *entry_point, void *gpval);
   3.882 +
   3.883 +#endif /* __ASSEMBLY__ */
   3.884 +
   3.885 +#endif /* _ASM_IA64_SAL_H */
     4.1 --- a/xen/include/asm-ia64/linux/asm/README.origin	Tue Jul 22 12:15:02 2008 +0900
     4.2 +++ b/xen/include/asm-ia64/linux/asm/README.origin	Tue Jul 22 12:15:02 2008 +0900
     4.3 @@ -30,7 +30,6 @@ param.h			-> linux/include/asm-ia64/para
     4.4  patch.h			-> linux/include/asm-ia64/patch.h
     4.5  pci.h			-> linux/include/asm-ia64/pci.h
     4.6  rse.h			-> linux/include/asm-ia64/rse.h
     4.7 -sal.h			-> linux/include/asm-ia64/sal.h
     4.8  sections.h		-> linux/include/asm-ia64/sections.h
     4.9  setup.h			-> linux/include/asm-ia64/setup.h
    4.10  string.h		-> linux/include/asm-ia64/string.h
     5.1 --- a/xen/include/asm-ia64/linux/asm/sal.h	Tue Jul 22 12:15:02 2008 +0900
     5.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     5.3 @@ -1,882 +0,0 @@
     5.4 -#ifndef _ASM_IA64_SAL_H
     5.5 -#define _ASM_IA64_SAL_H
     5.6 -
     5.7 -/*
     5.8 - * System Abstraction Layer definitions.
     5.9 - *
    5.10 - * This is based on version 2.5 of the manual "IA-64 System
    5.11 - * Abstraction Layer".
    5.12 - *
    5.13 - * Copyright (C) 2001 Intel
    5.14 - * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
    5.15 - * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
    5.16 - * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
    5.17 - *	David Mosberger-Tang <davidm@hpl.hp.com>
    5.18 - * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
    5.19 - *
    5.20 - * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
    5.21 - *		    revision of the SAL spec.
    5.22 - * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
    5.23 - *                  revision of the SAL spec.
    5.24 - * 99/09/29 davidm	Updated for SAL 2.6.
    5.25 - * 00/03/29 cfleck      Updated SAL Error Logging info for processor (SAL 2.6)
    5.26 - *                      (plus examples of platform error info structures from smariset @ Intel)
    5.27 - */
    5.28 -
    5.29 -#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT		0
    5.30 -#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT	1
    5.31 -#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT	2
    5.32 -#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT	 	3
    5.33 -
    5.34 -#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK	  (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
    5.35 -#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
    5.36 -#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
    5.37 -#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT	  (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
    5.38 -
    5.39 -#ifndef __ASSEMBLY__
    5.40 -
    5.41 -#include <linux/bcd.h>
    5.42 -#include <linux/spinlock.h>
    5.43 -#include <linux/efi.h>
    5.44 -
    5.45 -#include <asm/pal.h>
    5.46 -#include <asm/system.h>
    5.47 -#include <asm/fpu.h>
    5.48 -
    5.49 -extern spinlock_t sal_lock;
    5.50 -
    5.51 -/* SAL spec _requires_ eight args for each call. */
    5.52 -#define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7)	\
    5.53 -	result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7)
    5.54 -
    5.55 -# define SAL_CALL(result,args...) do {				\
    5.56 -	unsigned long __ia64_sc_flags;				\
    5.57 -	struct ia64_fpreg __ia64_sc_fr[6];			\
    5.58 -	ia64_save_scratch_fpregs(__ia64_sc_fr);			\
    5.59 -	spin_lock_irqsave(&sal_lock, __ia64_sc_flags);		\
    5.60 -	__SAL_CALL(result, args);				\
    5.61 -	spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags);	\
    5.62 -	ia64_load_scratch_fpregs(__ia64_sc_fr);			\
    5.63 -} while (0)
    5.64 -
    5.65 -# define SAL_CALL_NOLOCK(result,args...) do {		\
    5.66 -	unsigned long __ia64_scn_flags;			\
    5.67 -	struct ia64_fpreg __ia64_scn_fr[6];		\
    5.68 -	ia64_save_scratch_fpregs(__ia64_scn_fr);	\
    5.69 -	local_irq_save(__ia64_scn_flags);		\
    5.70 -	__SAL_CALL(result, args);			\
    5.71 -	local_irq_restore(__ia64_scn_flags);		\
    5.72 -	ia64_load_scratch_fpregs(__ia64_scn_fr);	\
    5.73 -} while (0)
    5.74 -
    5.75 -# define SAL_CALL_REENTRANT(result,args...) do {	\
    5.76 -	struct ia64_fpreg __ia64_scs_fr[6];		\
    5.77 -	ia64_save_scratch_fpregs(__ia64_scs_fr);	\
    5.78 -	preempt_disable();				\
    5.79 -	__SAL_CALL(result, args);			\
    5.80 -	preempt_enable();				\
    5.81 -	ia64_load_scratch_fpregs(__ia64_scs_fr);	\
    5.82 -} while (0)
    5.83 -
    5.84 -#define SAL_SET_VECTORS			0x01000000
    5.85 -#define SAL_GET_STATE_INFO		0x01000001
    5.86 -#define SAL_GET_STATE_INFO_SIZE		0x01000002
    5.87 -#define SAL_CLEAR_STATE_INFO		0x01000003
    5.88 -#define SAL_MC_RENDEZ			0x01000004
    5.89 -#define SAL_MC_SET_PARAMS		0x01000005
    5.90 -#define SAL_REGISTER_PHYSICAL_ADDR	0x01000006
    5.91 -
    5.92 -#define SAL_CACHE_FLUSH			0x01000008
    5.93 -#define SAL_CACHE_INIT			0x01000009
    5.94 -#define SAL_PCI_CONFIG_READ		0x01000010
    5.95 -#define SAL_PCI_CONFIG_WRITE		0x01000011
    5.96 -#define SAL_FREQ_BASE			0x01000012
    5.97 -#define SAL_PHYSICAL_ID_INFO		0x01000013
    5.98 -
    5.99 -#define SAL_UPDATE_PAL			0x01000020
   5.100 -
   5.101 -struct ia64_sal_retval {
   5.102 -	/*
   5.103 -	 * A zero status value indicates call completed without error.
   5.104 -	 * A negative status value indicates reason of call failure.
   5.105 -	 * A positive status value indicates success but an
   5.106 -	 * informational value should be printed (e.g., "reboot for
   5.107 -	 * change to take effect").
   5.108 -	 */
   5.109 -	s64 status;
   5.110 -	u64 v0;
   5.111 -	u64 v1;
   5.112 -	u64 v2;
   5.113 -};
   5.114 -
   5.115 -typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
   5.116 -
   5.117 -enum {
   5.118 -	SAL_FREQ_BASE_PLATFORM = 0,
   5.119 -	SAL_FREQ_BASE_INTERVAL_TIMER = 1,
   5.120 -	SAL_FREQ_BASE_REALTIME_CLOCK = 2
   5.121 -};
   5.122 -
   5.123 -/*
   5.124 - * The SAL system table is followed by a variable number of variable
   5.125 - * length descriptors.  The structure of these descriptors follows
   5.126 - * below.
   5.127 - * The defininition follows SAL specs from July 2000
   5.128 - */
   5.129 -struct ia64_sal_systab {
   5.130 -	u8 signature[4];	/* should be "SST_" */
   5.131 -	u32 size;		/* size of this table in bytes */
   5.132 -	u8 sal_rev_minor;
   5.133 -	u8 sal_rev_major;
   5.134 -	u16 entry_count;	/* # of entries in variable portion */
   5.135 -	u8 checksum;
   5.136 -	u8 reserved1[7];
   5.137 -	u8 sal_a_rev_minor;
   5.138 -	u8 sal_a_rev_major;
   5.139 -	u8 sal_b_rev_minor;
   5.140 -	u8 sal_b_rev_major;
   5.141 -	/* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
   5.142 -	u8 oem_id[32];
   5.143 -	u8 product_id[32];	/* ASCII product id  */
   5.144 -	u8 reserved2[8];
   5.145 -};
   5.146 -
   5.147 -enum sal_systab_entry_type {
   5.148 -	SAL_DESC_ENTRY_POINT = 0,
   5.149 -	SAL_DESC_MEMORY = 1,
   5.150 -	SAL_DESC_PLATFORM_FEATURE = 2,
   5.151 -	SAL_DESC_TR = 3,
   5.152 -	SAL_DESC_PTC = 4,
   5.153 -	SAL_DESC_AP_WAKEUP = 5
   5.154 -};
   5.155 -
   5.156 -/*
   5.157 - * Entry type:	Size:
   5.158 - *	0	48
   5.159 - *	1	32
   5.160 - *	2	16
   5.161 - *	3	32
   5.162 - *	4	16
   5.163 - *	5	16
   5.164 - */
   5.165 -#define SAL_DESC_SIZE(type)	"\060\040\020\040\020\020"[(unsigned) type]
   5.166 -
   5.167 -typedef struct ia64_sal_desc_entry_point {
   5.168 -	u8 type;
   5.169 -	u8 reserved1[7];
   5.170 -	u64 pal_proc;
   5.171 -	u64 sal_proc;
   5.172 -	u64 gp;
   5.173 -	u8 reserved2[16];
   5.174 -}ia64_sal_desc_entry_point_t;
   5.175 -
   5.176 -typedef struct ia64_sal_desc_memory {
   5.177 -	u8 type;
   5.178 -	u8 used_by_sal;	/* needs to be mapped for SAL? */
   5.179 -	u8 mem_attr;		/* current memory attribute setting */
   5.180 -	u8 access_rights;	/* access rights set up by SAL */
   5.181 -	u8 mem_attr_mask;	/* mask of supported memory attributes */
   5.182 -	u8 reserved1;
   5.183 -	u8 mem_type;		/* memory type */
   5.184 -	u8 mem_usage;		/* memory usage */
   5.185 -	u64 addr;		/* physical address of memory */
   5.186 -	u32 length;	/* length (multiple of 4KB pages) */
   5.187 -	u32 reserved2;
   5.188 -	u8 oem_reserved[8];
   5.189 -} ia64_sal_desc_memory_t;
   5.190 -
   5.191 -typedef struct ia64_sal_desc_platform_feature {
   5.192 -	u8 type;
   5.193 -	u8 feature_mask;
   5.194 -	u8 reserved1[14];
   5.195 -} ia64_sal_desc_platform_feature_t;
   5.196 -
   5.197 -typedef struct ia64_sal_desc_tr {
   5.198 -	u8 type;
   5.199 -	u8 tr_type;		/* 0 == instruction, 1 == data */
   5.200 -	u8 regnum;		/* translation register number */
   5.201 -	u8 reserved1[5];
   5.202 -	u64 addr;		/* virtual address of area covered */
   5.203 -	u64 page_size;		/* encoded page size */
   5.204 -	u8 reserved2[8];
   5.205 -} ia64_sal_desc_tr_t;
   5.206 -
   5.207 -typedef struct ia64_sal_desc_ptc {
   5.208 -	u8 type;
   5.209 -	u8 reserved1[3];
   5.210 -	u32 num_domains;	/* # of coherence domains */
   5.211 -	u64 domain_info;	/* physical address of domain info table */
   5.212 -} ia64_sal_desc_ptc_t;
   5.213 -
   5.214 -typedef struct ia64_sal_ptc_domain_info {
   5.215 -	u64 proc_count;		/* number of processors in domain */
   5.216 -	u64 proc_list;		/* physical address of LID array */
   5.217 -} ia64_sal_ptc_domain_info_t;
   5.218 -
   5.219 -typedef struct ia64_sal_ptc_domain_proc_entry {
   5.220 -	u64 id  : 8;		/* id of processor */
   5.221 -	u64 eid : 8;		/* eid of processor */
   5.222 -} ia64_sal_ptc_domain_proc_entry_t;
   5.223 -
   5.224 -
   5.225 -#define IA64_SAL_AP_EXTERNAL_INT 0
   5.226 -
   5.227 -typedef struct ia64_sal_desc_ap_wakeup {
   5.228 -	u8 type;
   5.229 -	u8 mechanism;		/* 0 == external interrupt */
   5.230 -	u8 reserved1[6];
   5.231 -	u64 vector;		/* interrupt vector in range 0x10-0xff */
   5.232 -} ia64_sal_desc_ap_wakeup_t ;
   5.233 -
   5.234 -extern ia64_sal_handler ia64_sal;
   5.235 -extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
   5.236 -
   5.237 -extern unsigned short sal_revision;	/* supported SAL spec revision */
   5.238 -extern unsigned short sal_version;	/* SAL version; OEM dependent */
   5.239 -#define SAL_VERSION_CODE(major, minor) ((BIN2BCD(major) << 8) | BIN2BCD(minor))
   5.240 -
   5.241 -extern const char *ia64_sal_strerror (long status);
   5.242 -extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
   5.243 -
   5.244 -/* SAL information type encodings */
   5.245 -enum {
   5.246 -	SAL_INFO_TYPE_MCA  = 0,		/* Machine check abort information */
   5.247 -        SAL_INFO_TYPE_INIT = 1,		/* Init information */
   5.248 -        SAL_INFO_TYPE_CMC  = 2,		/* Corrected machine check information */
   5.249 -        SAL_INFO_TYPE_CPE  = 3		/* Corrected platform error information */
   5.250 -};
   5.251 -
   5.252 -/* Encodings for machine check parameter types */
   5.253 -enum {
   5.254 -	SAL_MC_PARAM_RENDEZ_INT    = 1,	/* Rendezvous interrupt */
   5.255 -	SAL_MC_PARAM_RENDEZ_WAKEUP = 2,	/* Wakeup */
   5.256 -	SAL_MC_PARAM_CPE_INT	   = 3	/* Corrected Platform Error Int */
   5.257 -};
   5.258 -
   5.259 -/* Encodings for rendezvous mechanisms */
   5.260 -enum {
   5.261 -	SAL_MC_PARAM_MECHANISM_INT = 1,	/* Use interrupt */
   5.262 -	SAL_MC_PARAM_MECHANISM_MEM = 2	/* Use memory synchronization variable*/
   5.263 -};
   5.264 -
   5.265 -/* Encodings for vectors which can be registered by the OS with SAL */
   5.266 -enum {
   5.267 -	SAL_VECTOR_OS_MCA	  = 0,
   5.268 -	SAL_VECTOR_OS_INIT	  = 1,
   5.269 -	SAL_VECTOR_OS_BOOT_RENDEZ = 2
   5.270 -};
   5.271 -
   5.272 -/* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
   5.273 -#define	SAL_MC_PARAM_RZ_ALWAYS		0x1
   5.274 -#define	SAL_MC_PARAM_BINIT_ESCALATE	0x10
   5.275 -
   5.276 -/*
   5.277 - * Definition of the SAL Error Log from the SAL spec
   5.278 - */
   5.279 -
   5.280 -/* SAL Error Record Section GUID Definitions */
   5.281 -#define SAL_PROC_DEV_ERR_SECT_GUID  \
   5.282 -    EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   5.283 -#define SAL_PLAT_MEM_DEV_ERR_SECT_GUID  \
   5.284 -    EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   5.285 -#define SAL_PLAT_SEL_DEV_ERR_SECT_GUID  \
   5.286 -    EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   5.287 -#define SAL_PLAT_PCI_BUS_ERR_SECT_GUID  \
   5.288 -    EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   5.289 -#define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID  \
   5.290 -    EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   5.291 -#define SAL_PLAT_PCI_COMP_ERR_SECT_GUID  \
   5.292 -    EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   5.293 -#define SAL_PLAT_SPECIFIC_ERR_SECT_GUID  \
   5.294 -    EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   5.295 -#define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID  \
   5.296 -    EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   5.297 -#define SAL_PLAT_BUS_ERR_SECT_GUID  \
   5.298 -    EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
   5.299 -
   5.300 -#define MAX_CACHE_ERRORS	6
   5.301 -#define MAX_TLB_ERRORS		6
   5.302 -#define MAX_BUS_ERRORS		1
   5.303 -
   5.304 -/* Definition of version  according to SAL spec for logging purposes */
   5.305 -typedef struct sal_log_revision {
   5.306 -	u8 minor;		/* BCD (0..99) */
   5.307 -	u8 major;		/* BCD (0..99) */
   5.308 -} sal_log_revision_t;
   5.309 -
   5.310 -/* Definition of timestamp according to SAL spec for logging purposes */
   5.311 -typedef struct sal_log_timestamp {
   5.312 -	u8 slh_second;		/* Second (0..59) */
   5.313 -	u8 slh_minute;		/* Minute (0..59) */
   5.314 -	u8 slh_hour;		/* Hour (0..23) */
   5.315 -	u8 slh_reserved;
   5.316 -	u8 slh_day;		/* Day (1..31) */
   5.317 -	u8 slh_month;		/* Month (1..12) */
   5.318 -	u8 slh_year;		/* Year (00..99) */
   5.319 -	u8 slh_century;		/* Century (19, 20, 21, ...) */
   5.320 -} sal_log_timestamp_t;
   5.321 -
   5.322 -/* Definition of log record  header structures */
   5.323 -typedef struct sal_log_record_header {
   5.324 -	u64 id;				/* Unique monotonically increasing ID */
   5.325 -	sal_log_revision_t revision;	/* Major and Minor revision of header */
   5.326 -	u16 severity;			/* Error Severity */
   5.327 -	u32 len;			/* Length of this error log in bytes */
   5.328 -	sal_log_timestamp_t timestamp;	/* Timestamp */
   5.329 -	efi_guid_t platform_guid;	/* Unique OEM Platform ID */
   5.330 -} sal_log_record_header_t;
   5.331 -
   5.332 -#define sal_log_severity_recoverable	0
   5.333 -#define sal_log_severity_fatal		1
   5.334 -#define sal_log_severity_corrected	2
   5.335 -
   5.336 -/* Definition of log section header structures */
   5.337 -typedef struct sal_log_sec_header {
   5.338 -    efi_guid_t guid;			/* Unique Section ID */
   5.339 -    sal_log_revision_t revision;	/* Major and Minor revision of Section */
   5.340 -    u16 reserved;
   5.341 -    u32 len;				/* Section length */
   5.342 -} sal_log_section_hdr_t;
   5.343 -
   5.344 -typedef struct sal_log_mod_error_info {
   5.345 -	struct {
   5.346 -		u64 check_info              : 1,
   5.347 -		    requestor_identifier    : 1,
   5.348 -		    responder_identifier    : 1,
   5.349 -		    target_identifier       : 1,
   5.350 -		    precise_ip              : 1,
   5.351 -		    reserved                : 59;
   5.352 -	} valid;
   5.353 -	u64 check_info;
   5.354 -	u64 requestor_identifier;
   5.355 -	u64 responder_identifier;
   5.356 -	u64 target_identifier;
   5.357 -	u64 precise_ip;
   5.358 -} sal_log_mod_error_info_t;
   5.359 -
   5.360 -typedef struct sal_processor_static_info {
   5.361 -	struct {
   5.362 -		u64 minstate        : 1,
   5.363 -		    br              : 1,
   5.364 -		    cr              : 1,
   5.365 -		    ar              : 1,
   5.366 -		    rr              : 1,
   5.367 -		    fr              : 1,
   5.368 -		    reserved        : 58;
   5.369 -	} valid;
   5.370 -	pal_min_state_area_t min_state_area;
   5.371 -	u64 br[8];
   5.372 -	u64 cr[128];
   5.373 -	u64 ar[128];
   5.374 -	u64 rr[8];
   5.375 -	struct ia64_fpreg __attribute__ ((packed)) fr[128];
   5.376 -} sal_processor_static_info_t;
   5.377 -
   5.378 -struct sal_cpuid_info {
   5.379 -	u64 regs[5];
   5.380 -	u64 reserved;
   5.381 -};
   5.382 -
   5.383 -typedef struct sal_log_processor_info {
   5.384 -	sal_log_section_hdr_t header;
   5.385 -	struct {
   5.386 -		u64 proc_error_map      : 1,
   5.387 -		    proc_state_param    : 1,
   5.388 -		    proc_cr_lid         : 1,
   5.389 -		    psi_static_struct   : 1,
   5.390 -		    num_cache_check     : 4,
   5.391 -		    num_tlb_check       : 4,
   5.392 -		    num_bus_check       : 4,
   5.393 -		    num_reg_file_check  : 4,
   5.394 -		    num_ms_check        : 4,
   5.395 -		    cpuid_info          : 1,
   5.396 -		    reserved1           : 39;
   5.397 -	} valid;
   5.398 -	u64 proc_error_map;
   5.399 -	u64 proc_state_parameter;
   5.400 -	u64 proc_cr_lid;
   5.401 -	/*
   5.402 -	 * The rest of this structure consists of variable-length arrays, which can't be
   5.403 -	 * expressed in C.
   5.404 -	 */
   5.405 -	sal_log_mod_error_info_t info[0];
   5.406 -	/*
   5.407 -	 * This is what the rest looked like if C supported variable-length arrays:
   5.408 -	 *
   5.409 -	 * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
   5.410 -	 * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
   5.411 -	 * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
   5.412 -	 * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
   5.413 -	 * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
   5.414 -	 * struct sal_cpuid_info cpuid_info;
   5.415 -	 * sal_processor_static_info_t processor_static_info;
   5.416 -	 */
   5.417 -} sal_log_processor_info_t;
   5.418 -
   5.419 -/* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
   5.420 -#define SAL_LPI_PSI_INFO(l)									\
   5.421 -({	sal_log_processor_info_t *_l = (l);							\
   5.422 -	((sal_processor_static_info_t *)							\
   5.423 -	 ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check		\
   5.424 -				+ _l->valid.num_bus_check + _l->valid.num_reg_file_check	\
   5.425 -				+ _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t)	\
   5.426 -			       + sizeof(struct sal_cpuid_info))));				\
   5.427 -})
   5.428 -
   5.429 -/* platform error log structures */
   5.430 -
   5.431 -typedef struct sal_log_mem_dev_err_info {
   5.432 -	sal_log_section_hdr_t header;
   5.433 -	struct {
   5.434 -		u64 error_status    : 1,
   5.435 -		    physical_addr   : 1,
   5.436 -		    addr_mask       : 1,
   5.437 -		    node            : 1,
   5.438 -		    card            : 1,
   5.439 -		    module          : 1,
   5.440 -		    bank            : 1,
   5.441 -		    device          : 1,
   5.442 -		    row             : 1,
   5.443 -		    column          : 1,
   5.444 -		    bit_position    : 1,
   5.445 -		    requestor_id    : 1,
   5.446 -		    responder_id    : 1,
   5.447 -		    target_id       : 1,
   5.448 -		    bus_spec_data   : 1,
   5.449 -		    oem_id          : 1,
   5.450 -		    oem_data        : 1,
   5.451 -		    reserved        : 47;
   5.452 -	} valid;
   5.453 -	u64 error_status;
   5.454 -	u64 physical_addr;
   5.455 -	u64 addr_mask;
   5.456 -	u16 node;
   5.457 -	u16 card;
   5.458 -	u16 module;
   5.459 -	u16 bank;
   5.460 -	u16 device;
   5.461 -	u16 row;
   5.462 -	u16 column;
   5.463 -	u16 bit_position;
   5.464 -	u64 requestor_id;
   5.465 -	u64 responder_id;
   5.466 -	u64 target_id;
   5.467 -	u64 bus_spec_data;
   5.468 -	u8 oem_id[16];
   5.469 -	u8 oem_data[1];			/* Variable length data */
   5.470 -} sal_log_mem_dev_err_info_t;
   5.471 -
   5.472 -typedef struct sal_log_sel_dev_err_info {
   5.473 -	sal_log_section_hdr_t header;
   5.474 -	struct {
   5.475 -		u64 record_id       : 1,
   5.476 -		    record_type     : 1,
   5.477 -		    generator_id    : 1,
   5.478 -		    evm_rev         : 1,
   5.479 -		    sensor_type     : 1,
   5.480 -		    sensor_num      : 1,
   5.481 -		    event_dir       : 1,
   5.482 -		    event_data1     : 1,
   5.483 -		    event_data2     : 1,
   5.484 -		    event_data3     : 1,
   5.485 -		    reserved        : 54;
   5.486 -	} valid;
   5.487 -	u16 record_id;
   5.488 -	u8 record_type;
   5.489 -	u8 timestamp[4];
   5.490 -	u16 generator_id;
   5.491 -	u8 evm_rev;
   5.492 -	u8 sensor_type;
   5.493 -	u8 sensor_num;
   5.494 -	u8 event_dir;
   5.495 -	u8 event_data1;
   5.496 -	u8 event_data2;
   5.497 -	u8 event_data3;
   5.498 -} sal_log_sel_dev_err_info_t;
   5.499 -
   5.500 -typedef struct sal_log_pci_bus_err_info {
   5.501 -	sal_log_section_hdr_t header;
   5.502 -	struct {
   5.503 -		u64 err_status      : 1,
   5.504 -		    err_type        : 1,
   5.505 -		    bus_id          : 1,
   5.506 -		    bus_address     : 1,
   5.507 -		    bus_data        : 1,
   5.508 -		    bus_cmd         : 1,
   5.509 -		    requestor_id    : 1,
   5.510 -		    responder_id    : 1,
   5.511 -		    target_id       : 1,
   5.512 -		    oem_data        : 1,
   5.513 -		    reserved        : 54;
   5.514 -	} valid;
   5.515 -	u64 err_status;
   5.516 -	u16 err_type;
   5.517 -	u16 bus_id;
   5.518 -	u32 reserved;
   5.519 -	u64 bus_address;
   5.520 -	u64 bus_data;
   5.521 -	u64 bus_cmd;
   5.522 -	u64 requestor_id;
   5.523 -	u64 responder_id;
   5.524 -	u64 target_id;
   5.525 -	u8 oem_data[1];			/* Variable length data */
   5.526 -} sal_log_pci_bus_err_info_t;
   5.527 -
   5.528 -typedef struct sal_log_smbios_dev_err_info {
   5.529 -	sal_log_section_hdr_t header;
   5.530 -	struct {
   5.531 -		u64 event_type      : 1,
   5.532 -		    length          : 1,
   5.533 -		    time_stamp      : 1,
   5.534 -		    data            : 1,
   5.535 -		    reserved1       : 60;
   5.536 -	} valid;
   5.537 -	u8 event_type;
   5.538 -	u8 length;
   5.539 -	u8 time_stamp[6];
   5.540 -	u8 data[1];			/* data of variable length, length == slsmb_length */
   5.541 -} sal_log_smbios_dev_err_info_t;
   5.542 -
   5.543 -typedef struct sal_log_pci_comp_err_info {
   5.544 -	sal_log_section_hdr_t header;
   5.545 -	struct {
   5.546 -		u64 err_status      : 1,
   5.547 -		    comp_info       : 1,
   5.548 -		    num_mem_regs    : 1,
   5.549 -		    num_io_regs     : 1,
   5.550 -		    reg_data_pairs  : 1,
   5.551 -		    oem_data        : 1,
   5.552 -		    reserved        : 58;
   5.553 -	} valid;
   5.554 -	u64 err_status;
   5.555 -	struct {
   5.556 -		u16 vendor_id;
   5.557 -		u16 device_id;
   5.558 -		u8 class_code[3];
   5.559 -		u8 func_num;
   5.560 -		u8 dev_num;
   5.561 -		u8 bus_num;
   5.562 -		u8 seg_num;
   5.563 -		u8 reserved[5];
   5.564 -	} comp_info;
   5.565 -	u32 num_mem_regs;
   5.566 -	u32 num_io_regs;
   5.567 -	u64 reg_data_pairs[1];
   5.568 -	/*
   5.569 -	 * array of address/data register pairs is num_mem_regs + num_io_regs elements
   5.570 -	 * long.  Each array element consists of a u64 address followed by a u64 data
   5.571 -	 * value.  The oem_data array immediately follows the reg_data_pairs array
   5.572 -	 */
   5.573 -	u8 oem_data[1];			/* Variable length data */
   5.574 -} sal_log_pci_comp_err_info_t;
   5.575 -
   5.576 -typedef struct sal_log_plat_specific_err_info {
   5.577 -	sal_log_section_hdr_t header;
   5.578 -	struct {
   5.579 -		u64 err_status      : 1,
   5.580 -		    guid            : 1,
   5.581 -		    oem_data        : 1,
   5.582 -		    reserved        : 61;
   5.583 -	} valid;
   5.584 -	u64 err_status;
   5.585 -	efi_guid_t guid;
   5.586 -	u8 oem_data[1];			/* platform specific variable length data */
   5.587 -} sal_log_plat_specific_err_info_t;
   5.588 -
   5.589 -typedef struct sal_log_host_ctlr_err_info {
   5.590 -	sal_log_section_hdr_t header;
   5.591 -	struct {
   5.592 -		u64 err_status      : 1,
   5.593 -		    requestor_id    : 1,
   5.594 -		    responder_id    : 1,
   5.595 -		    target_id       : 1,
   5.596 -		    bus_spec_data   : 1,
   5.597 -		    oem_data        : 1,
   5.598 -		    reserved        : 58;
   5.599 -	} valid;
   5.600 -	u64 err_status;
   5.601 -	u64 requestor_id;
   5.602 -	u64 responder_id;
   5.603 -	u64 target_id;
   5.604 -	u64 bus_spec_data;
   5.605 -	u8 oem_data[1];			/* Variable length OEM data */
   5.606 -} sal_log_host_ctlr_err_info_t;
   5.607 -
   5.608 -typedef struct sal_log_plat_bus_err_info {
   5.609 -	sal_log_section_hdr_t header;
   5.610 -	struct {
   5.611 -		u64 err_status      : 1,
   5.612 -		    requestor_id    : 1,
   5.613 -		    responder_id    : 1,
   5.614 -		    target_id       : 1,
   5.615 -		    bus_spec_data   : 1,
   5.616 -		    oem_data        : 1,
   5.617 -		    reserved        : 58;
   5.618 -	} valid;
   5.619 -	u64 err_status;
   5.620 -	u64 requestor_id;
   5.621 -	u64 responder_id;
   5.622 -	u64 target_id;
   5.623 -	u64 bus_spec_data;
   5.624 -	u8 oem_data[1];			/* Variable length OEM data */
   5.625 -} sal_log_plat_bus_err_info_t;
   5.626 -
   5.627 -/* Overall platform error section structure */
   5.628 -typedef union sal_log_platform_err_info {
   5.629 -	sal_log_mem_dev_err_info_t mem_dev_err;
   5.630 -	sal_log_sel_dev_err_info_t sel_dev_err;
   5.631 -	sal_log_pci_bus_err_info_t pci_bus_err;
   5.632 -	sal_log_smbios_dev_err_info_t smbios_dev_err;
   5.633 -	sal_log_pci_comp_err_info_t pci_comp_err;
   5.634 -	sal_log_plat_specific_err_info_t plat_specific_err;
   5.635 -	sal_log_host_ctlr_err_info_t host_ctlr_err;
   5.636 -	sal_log_plat_bus_err_info_t plat_bus_err;
   5.637 -} sal_log_platform_err_info_t;
   5.638 -
   5.639 -/* SAL log over-all, multi-section error record structure (processor+platform) */
   5.640 -typedef struct err_rec {
   5.641 -	sal_log_record_header_t sal_elog_header;
   5.642 -	sal_log_processor_info_t proc_err;
   5.643 -	sal_log_platform_err_info_t plat_err;
   5.644 -	u8 oem_data_pad[1024];
   5.645 -} ia64_err_rec_t;
   5.646 -
   5.647 -/*
   5.648 - * Now define a couple of inline functions for improved type checking
   5.649 - * and convenience.
   5.650 - */
   5.651 -static inline long
   5.652 -ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
   5.653 -		    unsigned long *drift_info)
   5.654 -{
   5.655 -	struct ia64_sal_retval isrv;
   5.656 -
   5.657 -	SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0);
   5.658 -	*ticks_per_second = isrv.v0;
   5.659 -	*drift_info = isrv.v1;
   5.660 -	return isrv.status;
   5.661 -}
   5.662 -
   5.663 -extern s64 ia64_sal_cache_flush (u64 cache_type);
   5.664 -
   5.665 -/* Initialize all the processor and platform level instruction and data caches */
   5.666 -static inline s64
   5.667 -ia64_sal_cache_init (void)
   5.668 -{
   5.669 -	struct ia64_sal_retval isrv;
   5.670 -	SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
   5.671 -	return isrv.status;
   5.672 -}
   5.673 -
   5.674 -/*
   5.675 - * Clear the processor and platform information logged by SAL with respect to the machine
   5.676 - * state at the time of MCA's, INITs, CMCs, or CPEs.
   5.677 - */
   5.678 -static inline s64
   5.679 -ia64_sal_clear_state_info (u64 sal_info_type)
   5.680 -{
   5.681 -	struct ia64_sal_retval isrv;
   5.682 -	SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
   5.683 -	              0, 0, 0, 0, 0);
   5.684 -	return isrv.status;
   5.685 -}
   5.686 -
   5.687 -
   5.688 -/* Get the processor and platform information logged by SAL with respect to the machine
   5.689 - * state at the time of the MCAs, INITs, CMCs, or CPEs.
   5.690 - */
   5.691 -static inline u64
   5.692 -ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
   5.693 -{
   5.694 -	struct ia64_sal_retval isrv;
   5.695 -	SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
   5.696 -	              sal_info, 0, 0, 0, 0);
   5.697 -	if (isrv.status)
   5.698 -		return 0;
   5.699 -
   5.700 -	return isrv.v0;
   5.701 -}
   5.702 -
   5.703 -/*
   5.704 - * Get the maximum size of the information logged by SAL with respect to the machine state
   5.705 - * at the time of MCAs, INITs, CMCs, or CPEs.
   5.706 - */
   5.707 -static inline u64
   5.708 -ia64_sal_get_state_info_size (u64 sal_info_type)
   5.709 -{
   5.710 -	struct ia64_sal_retval isrv;
   5.711 -	SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
   5.712 -	              0, 0, 0, 0, 0);
   5.713 -	if (isrv.status)
   5.714 -		return 0;
   5.715 -	return isrv.v0;
   5.716 -}
   5.717 -
   5.718 -/*
   5.719 - * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
   5.720 - * the monarch processor.  Must not lock, because it will not return on any cpu until the
   5.721 - * monarch processor sends a wake up.
   5.722 - */
   5.723 -static inline s64
   5.724 -ia64_sal_mc_rendez (void)
   5.725 -{
   5.726 -	struct ia64_sal_retval isrv;
   5.727 -	SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
   5.728 -	return isrv.status;
   5.729 -}
   5.730 -
   5.731 -/*
   5.732 - * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
   5.733 - * the machine check rendezvous sequence as well as the mechanism to wake up the
   5.734 - * non-monarch processor at the end of machine check processing.
   5.735 - * Returns the complete ia64_sal_retval because some calls return more than just a status
   5.736 - * value.
   5.737 - */
   5.738 -static inline struct ia64_sal_retval
   5.739 -ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
   5.740 -{
   5.741 -	struct ia64_sal_retval isrv;
   5.742 -	SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
   5.743 -		 timeout, rz_always, 0, 0);
   5.744 -	return isrv;
   5.745 -}
   5.746 -
   5.747 -/* Read from PCI configuration space */
   5.748 -static inline s64
   5.749 -ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value)
   5.750 -{
   5.751 -	struct ia64_sal_retval isrv;
   5.752 -	SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0);
   5.753 -	if (value)
   5.754 -		*value = isrv.v0;
   5.755 -	return isrv.status;
   5.756 -}
   5.757 -
   5.758 -/* Write to PCI configuration space */
   5.759 -static inline s64
   5.760 -ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value)
   5.761 -{
   5.762 -	struct ia64_sal_retval isrv;
   5.763 -	SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
   5.764 -	         type, 0, 0, 0);
   5.765 -	return isrv.status;
   5.766 -}
   5.767 -
   5.768 -/*
   5.769 - * Register physical addresses of locations needed by SAL when SAL procedures are invoked
   5.770 - * in virtual mode.
   5.771 - */
   5.772 -static inline s64
   5.773 -ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
   5.774 -{
   5.775 -	struct ia64_sal_retval isrv;
   5.776 -	SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
   5.777 -	         0, 0, 0, 0, 0);
   5.778 -	return isrv.status;
   5.779 -}
   5.780 -
   5.781 -/*
   5.782 - * Register software dependent code locations within SAL. These locations are handlers or
   5.783 - * entry points where SAL will pass control for the specified event. These event handlers
   5.784 - * are for the bott rendezvous, MCAs and INIT scenarios.
   5.785 - */
   5.786 -static inline s64
   5.787 -ia64_sal_set_vectors (u64 vector_type,
   5.788 -		      u64 handler_addr1, u64 gp1, u64 handler_len1,
   5.789 -		      u64 handler_addr2, u64 gp2, u64 handler_len2)
   5.790 -{
   5.791 -	struct ia64_sal_retval isrv;
   5.792 -	SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
   5.793 -			handler_addr1, gp1, handler_len1,
   5.794 -			handler_addr2, gp2, handler_len2);
   5.795 -
   5.796 -	return isrv.status;
   5.797 -}
   5.798 -
   5.799 -/* Update the contents of PAL block in the non-volatile storage device */
   5.800 -static inline s64
   5.801 -ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
   5.802 -		     u64 *error_code, u64 *scratch_buf_size_needed)
   5.803 -{
   5.804 -	struct ia64_sal_retval isrv;
   5.805 -	SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
   5.806 -	         0, 0, 0, 0);
   5.807 -	if (error_code)
   5.808 -		*error_code = isrv.v0;
   5.809 -	if (scratch_buf_size_needed)
   5.810 -		*scratch_buf_size_needed = isrv.v1;
   5.811 -	return isrv.status;
   5.812 -}
   5.813 -
   5.814 -/* Get physical processor die mapping in the platform. */
   5.815 -static inline s64
   5.816 -ia64_sal_physical_id_info(u16 *splid)
   5.817 -{
   5.818 -	struct ia64_sal_retval isrv;
   5.819 -	SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
   5.820 -	if (splid)
   5.821 -		*splid = isrv.v0;
   5.822 -	return isrv.status;
   5.823 -}
   5.824 -
   5.825 -extern unsigned long sal_platform_features;
   5.826 -
   5.827 -extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
   5.828 -
   5.829 -struct sal_ret_values {
   5.830 -	long r8; long r9; long r10; long r11;
   5.831 -};
   5.832 -
   5.833 -#define IA64_SAL_OEMFUNC_MIN		0x02000000
   5.834 -#define IA64_SAL_OEMFUNC_MAX		0x03ffffff
   5.835 -
   5.836 -extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64,
   5.837 -			    u64, u64, u64);
   5.838 -extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64,
   5.839 -				   u64, u64, u64, u64, u64);
   5.840 -extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
   5.841 -				      u64, u64, u64, u64, u64);
   5.842 -#ifdef CONFIG_HOTPLUG_CPU
   5.843 -/*
   5.844 - * System Abstraction Layer Specification
   5.845 - * Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State.
   5.846 - * Note: region regs are stored first in head.S _start. Hence they must
   5.847 - * stay up front.
   5.848 - */
   5.849 -struct sal_to_os_boot {
   5.850 -	u64 rr[8];		/* Region Registers */
   5.851 -	u64	br[6];		/* br0: return addr into SAL boot rendez routine */
   5.852 -	u64 gr1;		/* SAL:GP */
   5.853 -	u64 gr12;		/* SAL:SP */
   5.854 -	u64 gr13;		/* SAL: Task Pointer */
   5.855 -	u64 fpsr;
   5.856 -	u64	pfs;
   5.857 -	u64 rnat;
   5.858 -	u64 unat;
   5.859 -	u64 bspstore;
   5.860 -	u64 dcr;		/* Default Control Register */
   5.861 -	u64 iva;
   5.862 -	u64 pta;
   5.863 -	u64 itv;
   5.864 -	u64 pmv;
   5.865 -	u64 cmcv;
   5.866 -	u64 lrr[2];
   5.867 -	u64 gr[4];
   5.868 -	u64 pr;			/* Predicate registers */
   5.869 -	u64 lc;			/* Loop Count */
   5.870 -	struct ia64_fpreg fp[20];
   5.871 -};
   5.872 -
   5.873 -/*
   5.874 - * Global array allocated for NR_CPUS at boot time
   5.875 - */
   5.876 -extern struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
   5.877 -
   5.878 -extern void ia64_jump_to_sal(struct sal_to_os_boot *);
   5.879 -#endif
   5.880 -
   5.881 -extern void ia64_sal_handler_init(void *entry_point, void *gpval);
   5.882 -
   5.883 -#endif /* __ASSEMBLY__ */
   5.884 -
   5.885 -#endif /* _ASM_IA64_SAL_H */