ia64/xen-unstable

changeset 5470:11fc43f1fef2

bitkeeper revision 1.1709.1.15 (42b1cf6bRmJSwTLBy8EWehO-Ijc95g)

Move include definitions around
author djm@kirby.fc.hp.com
date Thu Jun 16 19:13:47 2005 +0000 (2005-06-16)
parents f97b4f909b4b
children cdc79b5d87d4
files .rootkeys xen/arch/ia64/patch/linux-2.6.11/ptrace.h xen/include/asm-ia64/domain.h xen/include/asm-ia64/vmx_ptrace.h xen/include/public/arch-ia64.h
line diff
     1.1 --- a/.rootkeys	Thu Jun 16 19:10:49 2005 +0000
     1.2 +++ b/.rootkeys	Thu Jun 16 19:13:47 2005 +0000
     1.3 @@ -1383,7 +1383,6 @@ 428b9f387tov0OtOEeF8fVWSR2v5Pg xen/inclu
     1.4  428b9f38is0zTsIm96_BKo4MLw0SzQ xen/include/asm-ia64/vmx_pal_vsa.h
     1.5  428b9f38iDqbugHUheJrcTCD7zlb4g xen/include/asm-ia64/vmx_phy_mode.h
     1.6  428b9f38grd_B0AGB1yp0Gi2befHaQ xen/include/asm-ia64/vmx_platform.h
     1.7 -428b9f38lm0ntDBusHggeQXkx1-1HQ xen/include/asm-ia64/vmx_ptrace.h
     1.8  428b9f38XgwHchZEpOzRtWfz0agFNQ xen/include/asm-ia64/vmx_vcpu.h
     1.9  428b9f38tDTTJbkoONcAB9ODP8CiVg xen/include/asm-ia64/vmx_vpd.h
    1.10  428b9f38_o0U5uJqmxZf_bqi6_PqVw xen/include/asm-ia64/vtm.h
     2.1 --- a/xen/arch/ia64/patch/linux-2.6.11/ptrace.h	Thu Jun 16 19:10:49 2005 +0000
     2.2 +++ b/xen/arch/ia64/patch/linux-2.6.11/ptrace.h	Thu Jun 16 19:13:47 2005 +0000
     2.3 @@ -4,9 +4,9 @@
     2.4    * (because the memory stack pointer MUST ALWAYS be aligned this way)
     2.5    *
     2.6    */
     2.7 -+#ifdef CONFIG_VTI
     2.8 -+#include "vmx_ptrace.h"
     2.9 -+#else  //CONFIG_VTI
    2.10 ++#ifdef XEN
    2.11 ++#include <public/arch-ia64.h>
    2.12 ++#else
    2.13   struct pt_regs {
    2.14   	/* The following registers are saved by SAVE_MIN: */
    2.15   	unsigned long b6;		/* scratch */
    2.16 @@ -14,7 +14,7 @@
    2.17   	struct ia64_fpreg f10;		/* scratch */
    2.18   	struct ia64_fpreg f11;		/* scratch */
    2.19   };
    2.20 -+#endif // CONFIG_VTI
    2.21 ++#endif
    2.22   
    2.23   /*
    2.24    * This structure contains the addition registers that need to
     3.1 --- a/xen/include/asm-ia64/domain.h	Thu Jun 16 19:10:49 2005 +0000
     3.2 +++ b/xen/include/asm-ia64/domain.h	Thu Jun 16 19:13:47 2005 +0000
     3.3 @@ -2,6 +2,7 @@
     3.4  #define __ASM_DOMAIN_H__
     3.5  
     3.6  #include <linux/thread_info.h>
     3.7 +#include <asm/tlb.h>
     3.8  #ifdef CONFIG_VTI
     3.9  #include <asm/vmx_vpd.h>
    3.10  #include <asm/vmmu.h>
     4.1 --- a/xen/include/asm-ia64/vmx_ptrace.h	Thu Jun 16 19:10:49 2005 +0000
     4.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     4.3 @@ -1,97 +0,0 @@
     4.4 -/*
     4.5 - * Copyright (C) 1998-2003 Hewlett-Packard Co
     4.6 - *  David Mosberger-Tang <davidm@hpl.hp.com>
     4.7 - *  Stephane Eranian <eranian@hpl.hp.com>
     4.8 - * Copyright (C) 2003 Intel Co
     4.9 - *  Suresh Siddha <suresh.b.siddha@intel.com>
    4.10 - *  Fenghua Yu <fenghua.yu@intel.com>
    4.11 - *  Arun Sharma <arun.sharma@intel.com>
    4.12 - *
    4.13 - * 12/07/98 S. Eranian  added pt_regs & switch_stack
    4.14 - * 12/21/98 D. Mosberger    updated to match latest code
    4.15 - *  6/17/99 D. Mosberger    added second unat member to "struct switch_stack"
    4.16 - *  4/28/05 Anthony Xu	  ported to Xen
    4.17 - *
    4.18 - */
    4.19 -
    4.20 -struct pt_regs {
    4.21 -	/* The following registers are saved by SAVE_MIN: */
    4.22 -	unsigned long b6;		/* scratch */
    4.23 -	unsigned long b7;		/* scratch */
    4.24 -
    4.25 -	unsigned long ar_csd;           /* used by cmp8xchg16 (scratch) */
    4.26 -	unsigned long ar_ssd;           /* reserved for future use (scratch) */
    4.27 -
    4.28 -	unsigned long r8;		/* scratch (return value register 0) */
    4.29 -	unsigned long r9;		/* scratch (return value register 1) */
    4.30 -	unsigned long r10;		/* scratch (return value register 2) */
    4.31 -	unsigned long r11;		/* scratch (return value register 3) */
    4.32 -
    4.33 -	unsigned long cr_ipsr;		/* interrupted task's psr */
    4.34 -	unsigned long cr_iip;		/* interrupted task's instruction pointer */
    4.35 -	unsigned long cr_ifs;		/* interrupted task's function state */
    4.36 -
    4.37 -	unsigned long ar_unat;		/* interrupted task's NaT register (preserved) */
    4.38 -	unsigned long ar_pfs;		/* prev function state  */
    4.39 -	unsigned long ar_rsc;		/* RSE configuration */
    4.40 -	/* The following two are valid only if cr_ipsr.cpl > 0: */
    4.41 -	unsigned long ar_rnat;		/* RSE NaT */
    4.42 -	unsigned long ar_bspstore;	/* RSE bspstore */
    4.43 -
    4.44 -	unsigned long pr;		/* 64 predicate registers (1 bit each) */
    4.45 -	unsigned long b0;		/* return pointer (bp) */
    4.46 -	unsigned long loadrs;		/* size of dirty partition << 16 */
    4.47 -
    4.48 -	unsigned long r1;		/* the gp pointer */
    4.49 -	unsigned long r12;		/* interrupted task's memory stack pointer */
    4.50 -	unsigned long r13;		/* thread pointer */
    4.51 -
    4.52 -	unsigned long ar_fpsr;		/* floating point status (preserved) */
    4.53 -	unsigned long r15;		/* scratch */
    4.54 -
    4.55 -	/* The remaining registers are NOT saved for system calls.  */
    4.56 -
    4.57 -	unsigned long r14;		/* scratch */
    4.58 -	unsigned long r2;		/* scratch */
    4.59 -	unsigned long r3;		/* scratch */
    4.60 -	unsigned long r4;		/* preserved */
    4.61 -	unsigned long r5;		/* preserved */
    4.62 -	unsigned long r6;		/* preserved */
    4.63 -	unsigned long r7;		/* preserved */
    4.64 -    unsigned long cr_iipa;   /* for emulation */
    4.65 -    unsigned long cr_isr;    /* for emulation */
    4.66 -    unsigned long eml_unat;    /* used for emulating instruction */
    4.67 -    unsigned long rfi_pfs;     /* used for elulating rfi */
    4.68 -
    4.69 -	/* The following registers are saved by SAVE_REST: */
    4.70 -	unsigned long r16;		/* scratch */
    4.71 -	unsigned long r17;		/* scratch */
    4.72 -	unsigned long r18;		/* scratch */
    4.73 -	unsigned long r19;		/* scratch */
    4.74 -	unsigned long r20;		/* scratch */
    4.75 -	unsigned long r21;		/* scratch */
    4.76 -	unsigned long r22;		/* scratch */
    4.77 -	unsigned long r23;		/* scratch */
    4.78 -	unsigned long r24;		/* scratch */
    4.79 -	unsigned long r25;		/* scratch */
    4.80 -	unsigned long r26;		/* scratch */
    4.81 -	unsigned long r27;		/* scratch */
    4.82 -	unsigned long r28;		/* scratch */
    4.83 -	unsigned long r29;		/* scratch */
    4.84 -	unsigned long r30;		/* scratch */
    4.85 -	unsigned long r31;		/* scratch */
    4.86 -
    4.87 -	unsigned long ar_ccv;		/* compare/exchange value (scratch) */
    4.88 -
    4.89 -	/*
    4.90 -	 * Floating point registers that the kernel considers scratch:
    4.91 -	 */
    4.92 -	struct ia64_fpreg f6;		/* scratch */
    4.93 -	struct ia64_fpreg f7;		/* scratch */
    4.94 -	struct ia64_fpreg f8;		/* scratch */
    4.95 -	struct ia64_fpreg f9;		/* scratch */
    4.96 -	struct ia64_fpreg f10;		/* scratch */
    4.97 -	struct ia64_fpreg f11;		/* scratch */
    4.98 -};
    4.99 -
   4.100 -
     5.1 --- a/xen/include/public/arch-ia64.h	Thu Jun 16 19:10:49 2005 +0000
     5.2 +++ b/xen/include/public/arch-ia64.h	Thu Jun 16 19:13:47 2005 +0000
     5.3 @@ -58,11 +58,99 @@ typedef struct
     5.4   * structure size will still be 8 bytes, so no other alignments will change.
     5.5   */
     5.6  typedef struct {
     5.7 -    u32  tsc_bits;      /* 0: 32 bits read from the CPU's TSC. */
     5.8 -    u32  tsc_bitshift;  /* 4: 'tsc_bits' uses N:N+31 of TSC.   */
     5.9 +    unsigned int  tsc_bits;      /* 0: 32 bits read from the CPU's TSC. */
    5.10 +    unsigned int  tsc_bitshift;  /* 4: 'tsc_bits' uses N:N+31 of TSC.   */
    5.11  } PACKED tsc_timestamp_t; /* 8 bytes */
    5.12  
    5.13 -#include <asm/tlb.h>	/* TR_ENTRY */
    5.14 +struct pt_fpreg {
    5.15 +        union {
    5.16 +                unsigned long bits[2];
    5.17 +                long double __dummy;    /* force 16-byte alignment */
    5.18 +        } u;
    5.19 +};
    5.20 +
    5.21 +struct pt_regs {
    5.22 +	/* The following registers are saved by SAVE_MIN: */
    5.23 +	unsigned long b6;		/* scratch */
    5.24 +	unsigned long b7;		/* scratch */
    5.25 +
    5.26 +	unsigned long ar_csd;           /* used by cmp8xchg16 (scratch) */
    5.27 +	unsigned long ar_ssd;           /* reserved for future use (scratch) */
    5.28 +
    5.29 +	unsigned long r8;		/* scratch (return value register 0) */
    5.30 +	unsigned long r9;		/* scratch (return value register 1) */
    5.31 +	unsigned long r10;		/* scratch (return value register 2) */
    5.32 +	unsigned long r11;		/* scratch (return value register 3) */
    5.33 +
    5.34 +	unsigned long cr_ipsr;		/* interrupted task's psr */
    5.35 +	unsigned long cr_iip;		/* interrupted task's instruction pointer */
    5.36 +	unsigned long cr_ifs;		/* interrupted task's function state */
    5.37 +
    5.38 +	unsigned long ar_unat;		/* interrupted task's NaT register (preserved) */
    5.39 +	unsigned long ar_pfs;		/* prev function state  */
    5.40 +	unsigned long ar_rsc;		/* RSE configuration */
    5.41 +	/* The following two are valid only if cr_ipsr.cpl > 0: */
    5.42 +	unsigned long ar_rnat;		/* RSE NaT */
    5.43 +	unsigned long ar_bspstore;	/* RSE bspstore */
    5.44 +
    5.45 +	unsigned long pr;		/* 64 predicate registers (1 bit each) */
    5.46 +	unsigned long b0;		/* return pointer (bp) */
    5.47 +	unsigned long loadrs;		/* size of dirty partition << 16 */
    5.48 +
    5.49 +	unsigned long r1;		/* the gp pointer */
    5.50 +	unsigned long r12;		/* interrupted task's memory stack pointer */
    5.51 +	unsigned long r13;		/* thread pointer */
    5.52 +
    5.53 +	unsigned long ar_fpsr;		/* floating point status (preserved) */
    5.54 +	unsigned long r15;		/* scratch */
    5.55 +
    5.56 +	/* The remaining registers are NOT saved for system calls.  */
    5.57 +
    5.58 +	unsigned long r14;		/* scratch */
    5.59 +	unsigned long r2;		/* scratch */
    5.60 +	unsigned long r3;		/* scratch */
    5.61 +
    5.62 +#ifdef CONFIG_VTI
    5.63 +	unsigned long r4;		/* preserved */
    5.64 +	unsigned long r5;		/* preserved */
    5.65 +	unsigned long r6;		/* preserved */
    5.66 +	unsigned long r7;		/* preserved */
    5.67 +	unsigned long cr_iipa;   /* for emulation */
    5.68 +	unsigned long cr_isr;    /* for emulation */
    5.69 +	unsigned long eml_unat;    /* used for emulating instruction */
    5.70 +	unsigned long rfi_pfs;     /* used for elulating rfi */
    5.71 +#endif
    5.72 +
    5.73 +	/* The following registers are saved by SAVE_REST: */
    5.74 +	unsigned long r16;		/* scratch */
    5.75 +	unsigned long r17;		/* scratch */
    5.76 +	unsigned long r18;		/* scratch */
    5.77 +	unsigned long r19;		/* scratch */
    5.78 +	unsigned long r20;		/* scratch */
    5.79 +	unsigned long r21;		/* scratch */
    5.80 +	unsigned long r22;		/* scratch */
    5.81 +	unsigned long r23;		/* scratch */
    5.82 +	unsigned long r24;		/* scratch */
    5.83 +	unsigned long r25;		/* scratch */
    5.84 +	unsigned long r26;		/* scratch */
    5.85 +	unsigned long r27;		/* scratch */
    5.86 +	unsigned long r28;		/* scratch */
    5.87 +	unsigned long r29;		/* scratch */
    5.88 +	unsigned long r30;		/* scratch */
    5.89 +	unsigned long r31;		/* scratch */
    5.90 +
    5.91 +	unsigned long ar_ccv;		/* compare/exchange value (scratch) */
    5.92 +
    5.93 +	/*
    5.94 +	 * Floating point registers that the kernel considers scratch:
    5.95 +	 */
    5.96 +	struct pt_fpreg f6;		/* scratch */
    5.97 +	struct pt_fpreg f7;		/* scratch */
    5.98 +	struct pt_fpreg f8;		/* scratch */
    5.99 +	struct pt_fpreg f9;		/* scratch */
   5.100 +	struct pt_fpreg f10;		/* scratch */
   5.101 +	struct pt_fpreg f11;		/* scratch */
   5.102 +};
   5.103  
   5.104  typedef struct {
   5.105  	unsigned long ipsr;
   5.106 @@ -104,11 +192,6 @@ typedef struct {
   5.107  //} PACKED arch_shared_info_t;
   5.108  } arch_shared_info_t;		// DON'T PACK 
   5.109  
   5.110 -/*
   5.111 - * The following is all CPU context. Note that the i387_ctxt block is filled 
   5.112 - * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
   5.113 - */
   5.114 -#include <asm/ptrace.h>
   5.115  typedef struct vcpu_guest_context {
   5.116  	struct pt_regs regs;
   5.117  	arch_vcpu_info_t vcpu;