1.1 --- a/.rootkeys	Mon Aug 16 14:21:43 2004 +0000
     1.2 +++ b/.rootkeys	Mon Aug 16 18:08:07 2004 +0000
     1.3 @@ -218,6 +218,7 @@ 40f5623aDLxmbOtUHvkWztKjAO4EjA linux-2.6
     1.4  41062ab7HMSSuaUv3_Z4agLpjSO88A linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/mach-xen/pci-functions.h
     1.5  40f5623aDMCsWOFO0jktZ4e8sjwvEg linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/mach-xen/setup_arch_post.h
     1.6  40f5623arsFXkGdPvIqvFi3yFXGR0Q linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/mach-xen/setup_arch_pre.h
     1.7 +4120f807GCO0uqsLqdZj9csxR1Wthw linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/mmu_context.h
     1.8  40f5623aFTyFTR-vdiA-KaGxk5JOKQ linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/msr.h
     1.9  40f5623adgjZq9nAgCt0IXdWl7udSA linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/page.h
    1.10  40f5623a54NuG-7qHihGYmw4wWQnMA linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/param.h

     2.1 --- a/linux-2.6.7-xen-sparse/arch/xen/i386/kernel/process.c	Mon Aug 16 14:21:43 2004 +0000
     2.2 +++ b/linux-2.6.7-xen-sparse/arch/xen/i386/kernel/process.c	Mon Aug 16 18:08:07 2004 +0000
     2.3 @@ -502,10 +502,10 @@ struct task_struct fastcall * __switch_t
     2.4  				 *next = &next_p->thread;
     2.5  	int cpu = smp_processor_id();
     2.6  	struct tss_struct *tss = init_tss + cpu;
     2.7 -	unsigned long flags;
     2.8  	dom0_op_t op;
     2.9  
    2.10 -	local_irq_save(flags);
    2.11 +        /* NB. No need to disable interrupts as already done in sched.c */
    2.12 +        /* __cli(); */
    2.13  
    2.14  	/*
    2.15  	 * Save away %fs and %gs. No need to save %es and %ds, as
    2.16 @@ -569,8 +569,7 @@ struct task_struct fastcall * __switch_t
    2.17  
    2.18  	/* EXECUTE ALL TASK SWITCH XEN SYSCALLS AT THIS POINT. */
    2.19  	execute_multicall_list();
    2.20 -
    2.21 -	local_irq_restore(flags);
    2.22 +        /* __sti(); */
    2.23  
    2.24  	/*
    2.25  	 * Restore %fs and %gs if needed.

     3.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.2 +++ b/linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/mmu_context.h	Mon Aug 16 18:08:07 2004 +0000
     3.3 @@ -0,0 +1,75 @@
     3.4 +#ifndef __I386_SCHED_H
     3.5 +#define __I386_SCHED_H
     3.6 +
     3.7 +#include <linux/config.h>
     3.8 +#include <asm/desc.h>
     3.9 +#include <asm/atomic.h>
    3.10 +#include <asm/pgalloc.h>
    3.11 +#include <asm/tlbflush.h>
    3.12 +
    3.13 +/*
    3.14 + * Used for LDT copy/destruction.
    3.15 + */
    3.16 +int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
    3.17 +void destroy_context(struct mm_struct *mm);
    3.18 +
    3.19 +
    3.20 +static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
    3.21 +{
    3.22 +#ifdef CONFIG_SMP
    3.23 +	unsigned cpu = smp_processor_id();
    3.24 +	if (cpu_tlbstate[cpu].state == TLBSTATE_OK)
    3.25 +		cpu_tlbstate[cpu].state = TLBSTATE_LAZY;	
    3.26 +#endif
    3.27 +}
    3.28 +
    3.29 +static inline void switch_mm(struct mm_struct *prev,
    3.30 +			     struct mm_struct *next,
    3.31 +			     struct task_struct *tsk)
    3.32 +{
    3.33 +	int cpu = smp_processor_id();
    3.34 +
    3.35 +	if (likely(prev != next)) {
    3.36 +		/* stop flush ipis for the previous mm */
    3.37 +		cpu_clear(cpu, prev->cpu_vm_mask);
    3.38 +#ifdef CONFIG_SMP
    3.39 +		cpu_tlbstate[cpu].state = TLBSTATE_OK;
    3.40 +		cpu_tlbstate[cpu].active_mm = next;
    3.41 +#endif
    3.42 +		cpu_set(cpu, next->cpu_vm_mask);
    3.43 +
    3.44 +		/* Re-load page tables */
    3.45 +		load_cr3_noflush(next->pgd);
    3.46 +
    3.47 +		/*
    3.48 +		 * load the LDT, if the LDT is different:
    3.49 +		 */
    3.50 +		if (unlikely(prev->context.ldt != next->context.ldt))
    3.51 +			load_LDT_nolock(&next->context, cpu);
    3.52 +	}
    3.53 +#ifdef CONFIG_SMP
    3.54 +	else {
    3.55 +		cpu_tlbstate[cpu].state = TLBSTATE_OK;
    3.56 +		BUG_ON(cpu_tlbstate[cpu].active_mm != next);
    3.57 +
    3.58 +		if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
    3.59 +			/* We were in lazy tlb mode and leave_mm disabled 
    3.60 +			 * tlb flush IPI delivery. We must reload %cr3.
    3.61 +			 */
    3.62 +			load_cr3_noflush(next->pgd);
    3.63 +			load_LDT_nolock(&next->context, cpu);
    3.64 +		}
    3.65 +	}
    3.66 +#endif
    3.67 +}
    3.68 +
    3.69 +#define deactivate_mm(tsk, mm) \
    3.70 +	asm("movl %0,%%fs ; movl %0,%%gs": :"r" (0))
    3.71 +
    3.72 +#define activate_mm(prev, next) \
    3.73 +do { \
    3.74 +	switch_mm((prev),(next),NULL); \
    3.75 +	flush_page_update_queue();			\
    3.76 +} while ( 0 )
    3.77 +
    3.78 +#endif

     4.1 --- a/linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/processor.h	Mon Aug 16 14:21:43 2004 +0000
     4.2 +++ b/linux-2.6.7-xen-sparse/include/asm-xen/asm-i386/processor.h	Mon Aug 16 18:08:07 2004 +0000
     4.3 @@ -186,6 +186,11 @@ static inline unsigned int cpuid_edx(uns
     4.4  	cur_pgd = pgdir;	/* XXXsmp */		\
     4.5  } while (/* CONSTCOND */0)
     4.6  
     4.7 +#define load_cr3_noflush(pgdir) do {			\
     4.8 +	queue_pt_switch(__pa(pgdir));			\
     4.9 +	cur_pgd = pgdir;	/* XXXsmp */		\
    4.10 +} while (/* CONSTCOND */0)
    4.11 +
    4.12  
    4.13  /*
    4.14   * Intel CPU features in CR4