ia64/xen-unstable

changeset 18515:104ceb3de263

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x86, amd, hvm: pass through one more cpuid cache description leaf

Add a missing CPUID leaf that contains AMD-specific cache info.
Without this, Windows can spin trying to prefetch memory buffers using
a stride length of zero.

Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Sep 18 10:39:53 2008 +0100 (2008-09-18)
parents 71d3d3ac23b8
children 79459028af39
files tools/libxc/xc_cpuid_x86.c
line diff
     1.1 --- a/tools/libxc/xc_cpuid_x86.c	Thu Sep 18 10:32:40 2008 +0100
     1.2 +++ b/tools/libxc/xc_cpuid_x86.c	Thu Sep 18 10:39:53 2008 +0100
     1.3 @@ -137,6 +137,10 @@ static void intel_xc_cpuid_policy(
     1.4                      (is_64bit ? bitmaskof(X86_FEATURE_SYSCALL) : 0));
     1.5          break;
     1.6      }
     1.7 +
     1.8 +    case 0x80000005:
     1.9 +        regs[0] = regs[1] = regs[2] = 0;
    1.10 +        break;
    1.11      }
    1.12  }
    1.13  
    1.14 @@ -210,12 +214,13 @@ static void xc_cpuid_hvm_policy(
    1.15          regs[1] = regs[2] = regs[3] = 0;
    1.16          break;
    1.17  
    1.18 -    case 0x00000002:
    1.19 -    case 0x00000004:
    1.20 -    case 0x80000002:
    1.21 -    case 0x80000003:
    1.22 -    case 0x80000004:
    1.23 -    case 0x80000006:
    1.24 +    case 0x00000002: /* Intel cache info (dumped by AMD policy) */
    1.25 +    case 0x00000004: /* Intel cache info (dumped by AMD policy) */
    1.26 +    case 0x80000002: /* Processor name string */
    1.27 +    case 0x80000003: /* ... continued         */
    1.28 +    case 0x80000004: /* ... continued         */
    1.29 +    case 0x80000005: /* AMD L1 cache/TLB info (dumped by Intel policy) */
    1.30 +    case 0x80000006: /* AMD L2/3 cache/TLB info ; Intel L2 cache features */
    1.31          break;
    1.32  
    1.33      default: