ia64/xen-unstable

changeset 4472:0dc3b8b8c298

bitkeeper revision 1.1159.170.110 (42527636gInunc40rkIVZVCuDC-_OQ)

Merge
author sd386@font.cl.cam.ac.uk
date Tue Apr 05 11:27:50 2005 +0000 (2005-04-05)
parents e9a82c51b1fc b719ddfcd506
children 18d709f72233
files .hgtags .rootkeys BitKeeper/etc/ignore BitKeeper/etc/logging_ok Makefile buildconfigs/Rules.mk buildconfigs/mk.linux-2.4-xen0 buildconfigs/mk.linux-2.4-xenU buildconfigs/mk.linux-2.6-xen0 buildconfigs/mk.linux-2.6-xenU buildconfigs/mk.netbsd-2.0-xenU docs/Makefile docs/check_pkgs docs/src/interface.tex docs/src/user.tex freebsd-5.3-xen-sparse/conf/Makefile.i386-xen freebsd-5.3-xen-sparse/conf/files.i386-xen freebsd-5.3-xen-sparse/conf/ldscript.i386-xen freebsd-5.3-xen-sparse/conf/options.i386-xen freebsd-5.3-xen-sparse/fbsdxensetup freebsd-5.3-xen-sparse/i386-xen/Makefile freebsd-5.3-xen-sparse/i386-xen/compile/.cvsignore freebsd-5.3-xen-sparse/i386-xen/conf/GENERIC freebsd-5.3-xen-sparse/i386-xen/conf/GENERIC.hints freebsd-5.3-xen-sparse/i386-xen/conf/Makefile freebsd-5.3-xen-sparse/i386-xen/conf/NOTES freebsd-5.3-xen-sparse/i386-xen/conf/OLDCARD freebsd-5.3-xen-sparse/i386-xen/conf/PAE freebsd-5.3-xen-sparse/i386-xen/conf/XENCONF freebsd-5.3-xen-sparse/i386-xen/conf/gethints.awk freebsd-5.3-xen-sparse/i386-xen/i386-xen/clock.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/critical.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/ctrl_if.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/db_interface.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/evtchn.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/exception.s freebsd-5.3-xen-sparse/i386-xen/i386-xen/genassym.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/hypervisor.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/i686_mem.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/initcpu.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/intr_machdep.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/io_apic.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/local_apic.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/locore.s freebsd-5.3-xen-sparse/i386-xen/i386-xen/machdep.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/mp_clock.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/mp_machdep.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/mptable.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/pmap.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/support.s freebsd-5.3-xen-sparse/i386-xen/i386-xen/swtch.s freebsd-5.3-xen-sparse/i386-xen/i386-xen/symbols.raw freebsd-5.3-xen-sparse/i386-xen/i386-xen/sys_machdep.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/trap.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/vm_machdep.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/xen_bus.c freebsd-5.3-xen-sparse/i386-xen/i386-xen/xen_machdep.c freebsd-5.3-xen-sparse/i386-xen/include/cpufunc.h freebsd-5.3-xen-sparse/i386-xen/include/ctrl_if.h freebsd-5.3-xen-sparse/i386-xen/include/evtchn.h freebsd-5.3-xen-sparse/i386-xen/include/frame.h freebsd-5.3-xen-sparse/i386-xen/include/hypervisor-ifs.h freebsd-5.3-xen-sparse/i386-xen/include/hypervisor.h freebsd-5.3-xen-sparse/i386-xen/include/md_var.h freebsd-5.3-xen-sparse/i386-xen/include/multicall.h freebsd-5.3-xen-sparse/i386-xen/include/param.h freebsd-5.3-xen-sparse/i386-xen/include/pcb.h freebsd-5.3-xen-sparse/i386-xen/include/pcpu.h freebsd-5.3-xen-sparse/i386-xen/include/pmap.h freebsd-5.3-xen-sparse/i386-xen/include/segments.h freebsd-5.3-xen-sparse/i386-xen/include/synch_bitops.h freebsd-5.3-xen-sparse/i386-xen/include/trap.h freebsd-5.3-xen-sparse/i386-xen/include/ucontext.h freebsd-5.3-xen-sparse/i386-xen/include/vmparam.h freebsd-5.3-xen-sparse/i386-xen/include/xen-os.h freebsd-5.3-xen-sparse/i386-xen/include/xen_intr.h freebsd-5.3-xen-sparse/i386-xen/include/xenfunc.h freebsd-5.3-xen-sparse/i386-xen/include/xenpmap.h freebsd-5.3-xen-sparse/i386-xen/include/xenvar.h freebsd-5.3-xen-sparse/i386-xen/xen/blkfront/xb_blkfront.c freebsd-5.3-xen-sparse/i386-xen/xen/char/console.c freebsd-5.3-xen-sparse/i386-xen/xen/misc/evtchn_dev.c freebsd-5.3-xen-sparse/i386-xen/xen/misc/npx.c freebsd-5.3-xen-sparse/i386-xen/xen/netfront/xn_netfront.c freebsd-5.3-xen-sparse/kern/kern_fork.c freebsd-5.3-xen-sparse/mkbuildtree freebsd-5.3-xen-sparse/xenfbsd_kernel_build install.sh linux-2.4.28-xen-sparse/Makefile linux-2.4.28-xen-sparse/arch/xen/Makefile linux-2.4.28-xen-sparse/arch/xen/boot/Makefile linux-2.4.28-xen-sparse/arch/xen/config.in linux-2.4.28-xen-sparse/arch/xen/defconfig-xen0 linux-2.4.28-xen-sparse/arch/xen/defconfig-xenU linux-2.4.28-xen-sparse/arch/xen/drivers/balloon/Makefile linux-2.4.28-xen-sparse/arch/xen/drivers/blkif/Makefile linux-2.4.28-xen-sparse/arch/xen/drivers/blkif/backend/Makefile linux-2.4.28-xen-sparse/arch/xen/drivers/blkif/frontend/Makefile linux-2.4.28-xen-sparse/arch/xen/drivers/blkif/frontend/common.h linux-2.4.28-xen-sparse/arch/xen/drivers/blkif/frontend/vbd.c linux-2.4.28-xen-sparse/arch/xen/drivers/console/Makefile linux-2.4.28-xen-sparse/arch/xen/drivers/dom0/Makefile linux-2.4.28-xen-sparse/arch/xen/drivers/evtchn/Makefile linux-2.4.28-xen-sparse/arch/xen/drivers/netif/Makefile linux-2.4.28-xen-sparse/arch/xen/drivers/netif/backend/Makefile linux-2.4.28-xen-sparse/arch/xen/drivers/netif/frontend/Makefile linux-2.4.28-xen-sparse/arch/xen/kernel/Makefile linux-2.4.28-xen-sparse/arch/xen/kernel/entry.S linux-2.4.28-xen-sparse/arch/xen/kernel/head.S linux-2.4.28-xen-sparse/arch/xen/kernel/i386_ksyms.c linux-2.4.28-xen-sparse/arch/xen/kernel/irq.c linux-2.4.28-xen-sparse/arch/xen/kernel/ldt.c linux-2.4.28-xen-sparse/arch/xen/kernel/pci-pc.c linux-2.4.28-xen-sparse/arch/xen/kernel/process.c linux-2.4.28-xen-sparse/arch/xen/kernel/setup.c linux-2.4.28-xen-sparse/arch/xen/kernel/signal.c linux-2.4.28-xen-sparse/arch/xen/kernel/time.c linux-2.4.28-xen-sparse/arch/xen/kernel/traps.c linux-2.4.28-xen-sparse/arch/xen/lib/Makefile linux-2.4.28-xen-sparse/arch/xen/lib/delay.c linux-2.4.28-xen-sparse/arch/xen/mm/Makefile linux-2.4.28-xen-sparse/arch/xen/mm/fault.c linux-2.4.28-xen-sparse/arch/xen/mm/init.c linux-2.4.28-xen-sparse/arch/xen/mm/ioremap.c linux-2.4.28-xen-sparse/arch/xen/vmlinux.lds linux-2.4.28-xen-sparse/drivers/block/ll_rw_blk.c linux-2.4.28-xen-sparse/drivers/char/Makefile linux-2.4.28-xen-sparse/drivers/char/mem.c linux-2.4.28-xen-sparse/drivers/char/tty_io.c linux-2.4.28-xen-sparse/drivers/scsi/aic7xxx/Makefile linux-2.4.28-xen-sparse/fs/exec.c linux-2.4.28-xen-sparse/include/asm-xen/bugs.h linux-2.4.28-xen-sparse/include/asm-xen/desc.h linux-2.4.28-xen-sparse/include/asm-xen/fixmap.h linux-2.4.28-xen-sparse/include/asm-xen/highmem.h linux-2.4.28-xen-sparse/include/asm-xen/hw_irq.h linux-2.4.28-xen-sparse/include/asm-xen/io.h linux-2.4.28-xen-sparse/include/asm-xen/irq.h linux-2.4.28-xen-sparse/include/asm-xen/keyboard.h linux-2.4.28-xen-sparse/include/asm-xen/mmu_context.h linux-2.4.28-xen-sparse/include/asm-xen/module.h linux-2.4.28-xen-sparse/include/asm-xen/msr.h linux-2.4.28-xen-sparse/include/asm-xen/page.h linux-2.4.28-xen-sparse/include/asm-xen/pci.h linux-2.4.28-xen-sparse/include/asm-xen/pgalloc.h linux-2.4.28-xen-sparse/include/asm-xen/pgtable-2level.h linux-2.4.28-xen-sparse/include/asm-xen/pgtable.h linux-2.4.28-xen-sparse/include/asm-xen/processor.h linux-2.4.28-xen-sparse/include/asm-xen/queues.h linux-2.4.28-xen-sparse/include/asm-xen/segment.h linux-2.4.28-xen-sparse/include/asm-xen/smp.h linux-2.4.28-xen-sparse/include/asm-xen/synch_bitops.h linux-2.4.28-xen-sparse/include/asm-xen/system.h linux-2.4.28-xen-sparse/include/asm-xen/vga.h linux-2.4.28-xen-sparse/include/asm-xen/xor.h linux-2.4.28-xen-sparse/include/linux/blk.h linux-2.4.28-xen-sparse/include/linux/irq.h linux-2.4.28-xen-sparse/include/linux/mm.h linux-2.4.28-xen-sparse/include/linux/sched.h linux-2.4.28-xen-sparse/include/linux/skbuff.h linux-2.4.28-xen-sparse/include/linux/timer.h linux-2.4.28-xen-sparse/kernel/time.c linux-2.4.28-xen-sparse/kernel/timer.c linux-2.4.28-xen-sparse/mkbuildtree linux-2.4.28-xen-sparse/mm/highmem.c linux-2.4.28-xen-sparse/mm/memory.c linux-2.4.28-xen-sparse/mm/mprotect.c linux-2.4.28-xen-sparse/mm/mremap.c linux-2.4.28-xen-sparse/mm/page_alloc.c linux-2.4.28-xen-sparse/mm/swapfile.c linux-2.4.28-xen-sparse/mm/vmalloc.c linux-2.4.28-xen-sparse/net/core/skbuff.c linux-2.4.29-xen-sparse/Makefile linux-2.4.29-xen-sparse/arch/xen/Makefile linux-2.4.29-xen-sparse/arch/xen/boot/Makefile linux-2.4.29-xen-sparse/arch/xen/config.in linux-2.4.29-xen-sparse/arch/xen/defconfig-xen0 linux-2.4.29-xen-sparse/arch/xen/defconfig-xenU linux-2.4.29-xen-sparse/arch/xen/drivers/balloon/Makefile linux-2.4.29-xen-sparse/arch/xen/drivers/blkif/Makefile linux-2.4.29-xen-sparse/arch/xen/drivers/blkif/backend/Makefile linux-2.4.29-xen-sparse/arch/xen/drivers/blkif/frontend/Makefile linux-2.4.29-xen-sparse/arch/xen/drivers/blkif/frontend/common.h linux-2.4.29-xen-sparse/arch/xen/drivers/blkif/frontend/vbd.c linux-2.4.29-xen-sparse/arch/xen/drivers/console/Makefile linux-2.4.29-xen-sparse/arch/xen/drivers/dom0/Makefile linux-2.4.29-xen-sparse/arch/xen/drivers/evtchn/Makefile linux-2.4.29-xen-sparse/arch/xen/drivers/netif/Makefile linux-2.4.29-xen-sparse/arch/xen/drivers/netif/backend/Makefile linux-2.4.29-xen-sparse/arch/xen/drivers/netif/frontend/Makefile linux-2.4.29-xen-sparse/arch/xen/kernel/Makefile linux-2.4.29-xen-sparse/arch/xen/kernel/entry.S linux-2.4.29-xen-sparse/arch/xen/kernel/head.S linux-2.4.29-xen-sparse/arch/xen/kernel/i386_ksyms.c linux-2.4.29-xen-sparse/arch/xen/kernel/irq.c linux-2.4.29-xen-sparse/arch/xen/kernel/ldt.c linux-2.4.29-xen-sparse/arch/xen/kernel/pci-pc.c linux-2.4.29-xen-sparse/arch/xen/kernel/process.c linux-2.4.29-xen-sparse/arch/xen/kernel/setup.c linux-2.4.29-xen-sparse/arch/xen/kernel/signal.c linux-2.4.29-xen-sparse/arch/xen/kernel/time.c linux-2.4.29-xen-sparse/arch/xen/kernel/traps.c linux-2.4.29-xen-sparse/arch/xen/lib/Makefile linux-2.4.29-xen-sparse/arch/xen/lib/delay.c linux-2.4.29-xen-sparse/arch/xen/mm/Makefile linux-2.4.29-xen-sparse/arch/xen/mm/fault.c linux-2.4.29-xen-sparse/arch/xen/mm/init.c linux-2.4.29-xen-sparse/arch/xen/mm/ioremap.c linux-2.4.29-xen-sparse/arch/xen/vmlinux.lds linux-2.4.29-xen-sparse/drivers/block/ll_rw_blk.c linux-2.4.29-xen-sparse/drivers/char/Makefile linux-2.4.29-xen-sparse/drivers/char/mem.c linux-2.4.29-xen-sparse/drivers/char/tty_io.c linux-2.4.29-xen-sparse/drivers/scsi/aic7xxx/Makefile linux-2.4.29-xen-sparse/fs/exec.c linux-2.4.29-xen-sparse/include/asm-xen/bugs.h linux-2.4.29-xen-sparse/include/asm-xen/desc.h linux-2.4.29-xen-sparse/include/asm-xen/fixmap.h linux-2.4.29-xen-sparse/include/asm-xen/highmem.h linux-2.4.29-xen-sparse/include/asm-xen/hw_irq.h linux-2.4.29-xen-sparse/include/asm-xen/io.h linux-2.4.29-xen-sparse/include/asm-xen/irq.h linux-2.4.29-xen-sparse/include/asm-xen/keyboard.h linux-2.4.29-xen-sparse/include/asm-xen/mmu_context.h linux-2.4.29-xen-sparse/include/asm-xen/module.h linux-2.4.29-xen-sparse/include/asm-xen/msr.h linux-2.4.29-xen-sparse/include/asm-xen/page.h linux-2.4.29-xen-sparse/include/asm-xen/pci.h linux-2.4.29-xen-sparse/include/asm-xen/pgalloc.h linux-2.4.29-xen-sparse/include/asm-xen/pgtable-2level.h linux-2.4.29-xen-sparse/include/asm-xen/pgtable.h linux-2.4.29-xen-sparse/include/asm-xen/processor.h linux-2.4.29-xen-sparse/include/asm-xen/queues.h linux-2.4.29-xen-sparse/include/asm-xen/segment.h linux-2.4.29-xen-sparse/include/asm-xen/smp.h linux-2.4.29-xen-sparse/include/asm-xen/system.h linux-2.4.29-xen-sparse/include/asm-xen/vga.h linux-2.4.29-xen-sparse/include/asm-xen/xor.h linux-2.4.29-xen-sparse/include/linux/blk.h linux-2.4.29-xen-sparse/include/linux/highmem.h linux-2.4.29-xen-sparse/include/linux/irq.h linux-2.4.29-xen-sparse/include/linux/mm.h linux-2.4.29-xen-sparse/include/linux/sched.h linux-2.4.29-xen-sparse/include/linux/skbuff.h linux-2.4.29-xen-sparse/include/linux/timer.h linux-2.4.29-xen-sparse/kernel/time.c linux-2.4.29-xen-sparse/kernel/timer.c linux-2.4.29-xen-sparse/mkbuildtree linux-2.4.29-xen-sparse/mm/highmem.c linux-2.4.29-xen-sparse/mm/memory.c linux-2.4.29-xen-sparse/mm/mprotect.c linux-2.4.29-xen-sparse/mm/mremap.c linux-2.4.29-xen-sparse/mm/page_alloc.c linux-2.4.29-xen-sparse/mm/swapfile.c linux-2.4.29-xen-sparse/mm/vmalloc.c linux-2.4.29-xen-sparse/net/core/skbuff.c linux-2.6.10-xen-sparse/arch/xen/Kconfig linux-2.6.10-xen-sparse/arch/xen/Kconfig.drivers linux-2.6.10-xen-sparse/arch/xen/Makefile linux-2.6.10-xen-sparse/arch/xen/boot/Makefile linux-2.6.10-xen-sparse/arch/xen/configs/xen0_defconfig linux-2.6.10-xen-sparse/arch/xen/configs/xenU_defconfig linux-2.6.10-xen-sparse/arch/xen/i386/Kconfig linux-2.6.10-xen-sparse/arch/xen/i386/Makefile linux-2.6.10-xen-sparse/arch/xen/i386/kernel/Makefile linux-2.6.10-xen-sparse/arch/xen/i386/kernel/cpu/Makefile linux-2.6.10-xen-sparse/arch/xen/i386/kernel/cpu/common.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/cpu/mtrr/Makefile linux-2.6.10-xen-sparse/arch/xen/i386/kernel/cpu/mtrr/main.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/entry.S linux-2.6.10-xen-sparse/arch/xen/i386/kernel/head.S linux-2.6.10-xen-sparse/arch/xen/i386/kernel/i386_ksyms.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/ioport.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/ldt.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/microcode.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/pci-dma.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/process.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/setup.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/signal.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/time.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/timers/Makefile linux-2.6.10-xen-sparse/arch/xen/i386/kernel/timers/timer_tsc.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/traps.c linux-2.6.10-xen-sparse/arch/xen/i386/kernel/vsyscall.S linux-2.6.10-xen-sparse/arch/xen/i386/kernel/vsyscall.lds linux-2.6.10-xen-sparse/arch/xen/i386/mm/Makefile linux-2.6.10-xen-sparse/arch/xen/i386/mm/fault.c linux-2.6.10-xen-sparse/arch/xen/i386/mm/highmem.c linux-2.6.10-xen-sparse/arch/xen/i386/mm/hypervisor.c linux-2.6.10-xen-sparse/arch/xen/i386/mm/init.c linux-2.6.10-xen-sparse/arch/xen/i386/mm/ioremap.c linux-2.6.10-xen-sparse/arch/xen/i386/mm/pageattr.c linux-2.6.10-xen-sparse/arch/xen/i386/mm/pgtable.c linux-2.6.10-xen-sparse/arch/xen/i386/pci/Makefile linux-2.6.10-xen-sparse/arch/xen/i386/pci/direct.c linux-2.6.10-xen-sparse/arch/xen/i386/pci/irq.c linux-2.6.10-xen-sparse/arch/xen/kernel/Makefile linux-2.6.10-xen-sparse/arch/xen/kernel/ctrl_if.c linux-2.6.10-xen-sparse/arch/xen/kernel/devmem.c linux-2.6.10-xen-sparse/arch/xen/kernel/evtchn.c linux-2.6.10-xen-sparse/arch/xen/kernel/fixup.c linux-2.6.10-xen-sparse/arch/xen/kernel/gnttab.c linux-2.6.10-xen-sparse/arch/xen/kernel/reboot.c linux-2.6.10-xen-sparse/arch/xen/kernel/skbuff.c linux-2.6.10-xen-sparse/arch/xen/kernel/xen_proc.c linux-2.6.10-xen-sparse/drivers/Makefile linux-2.6.10-xen-sparse/drivers/char/mem.c linux-2.6.10-xen-sparse/drivers/char/tty_io.c linux-2.6.10-xen-sparse/drivers/xen/Makefile linux-2.6.10-xen-sparse/drivers/xen/balloon/Makefile linux-2.6.10-xen-sparse/drivers/xen/balloon/balloon.c linux-2.6.10-xen-sparse/drivers/xen/blkback/Makefile linux-2.6.10-xen-sparse/drivers/xen/blkback/blkback.c linux-2.6.10-xen-sparse/drivers/xen/blkback/common.h linux-2.6.10-xen-sparse/drivers/xen/blkback/control.c linux-2.6.10-xen-sparse/drivers/xen/blkback/interface.c linux-2.6.10-xen-sparse/drivers/xen/blkback/vbd.c linux-2.6.10-xen-sparse/drivers/xen/blkfront/Kconfig linux-2.6.10-xen-sparse/drivers/xen/blkfront/Makefile linux-2.6.10-xen-sparse/drivers/xen/blkfront/blkfront.c linux-2.6.10-xen-sparse/drivers/xen/blkfront/block.h linux-2.6.10-xen-sparse/drivers/xen/blkfront/vbd.c linux-2.6.10-xen-sparse/drivers/xen/console/Makefile linux-2.6.10-xen-sparse/drivers/xen/console/console.c linux-2.6.10-xen-sparse/drivers/xen/evtchn/Makefile linux-2.6.10-xen-sparse/drivers/xen/evtchn/evtchn.c linux-2.6.10-xen-sparse/drivers/xen/netback/Makefile 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tools/examples/xend-config.sxp tools/examples/xmexample1 tools/examples/xmexample2 tools/examples/xmexample3 tools/libxc/Makefile tools/libxc/xc_linux_restore.c tools/libxc/xc_plan9_build.c tools/libxc/xc_private.h tools/libxutil/Makefile tools/libxutil/file_stream.c tools/libxutil/sxpr.c tools/libxutil/sxpr.h tools/libxutil/sxpr_parser.c tools/libxutil/sys_net.c tools/misc/Makefile tools/misc/miniterm/Makefile tools/python/Makefile tools/python/xen/lowlevel/xu/xu.c tools/python/xen/sv/params.py tools/python/xen/xend/Args.py tools/python/xen/xend/Vifctl.py tools/python/xen/xend/XendDomainInfo.py tools/python/xen/xend/XendMigrate.py tools/python/xen/xend/XendRoot.py tools/python/xen/xend/server/SrvBase.py tools/python/xen/xend/server/SrvDaemon.py tools/python/xen/xend/server/SrvDir.py tools/python/xen/xend/server/SrvDomain.py tools/python/xen/xend/server/SrvServer.py tools/python/xen/xend/server/blkif.py tools/python/xen/xend/server/channel.py tools/python/xen/xend/server/console.py tools/python/xen/xend/server/netif.py tools/python/xen/xend/server/params.py tools/python/xen/xend/sxp.py tools/python/xen/xm/create.py tools/sv/Makefile tools/vnet/00INSTALL tools/vnet/Makefile tools/vnet/examples/Makefile tools/vnet/vnet-module/Makefile-2.4 tools/vnet/vnet-module/Makefile-2.6 tools/vnet/vnet-module/if_varp.h tools/vnet/vnet-module/varp.c tools/vnet/vnetd/Makefile tools/x2d2/Makefile tools/xentrace/Makefile tools/xfrd/Makefile tools/xfrd/xen_domain.c tools/xfrd/xfrd.c xen/Makefile xen/Rules.mk xen/arch/x86/Makefile xen/arch/x86/Rules.mk xen/arch/x86/boot/mkelf32.c xen/arch/x86/dom0_ops.c xen/arch/x86/domain.c xen/arch/x86/e820.c xen/arch/x86/extable.c xen/arch/x86/memory.c xen/arch/x86/mpparse.c xen/arch/x86/mtrr/generic.c xen/arch/x86/mtrr/main.c xen/arch/x86/pci-pc.c xen/arch/x86/pdb-stub.c xen/arch/x86/setup.c xen/arch/x86/shadow.c xen/arch/x86/smp.c xen/arch/x86/smpboot.c xen/arch/x86/time.c xen/arch/x86/traps.c xen/arch/x86/x86_32/asm-offsets.c xen/arch/x86/x86_32/entry.S xen/arch/x86/x86_32/xen.lds xen/arch/x86/x86_64/xen.lds xen/common/Makefile xen/common/dom0_ops.c xen/common/domain.c xen/common/elf.c xen/common/keyhandler.c xen/common/page_alloc.c xen/common/physdev.c xen/common/resource.c xen/common/sched_atropos.c xen/common/sched_bvt.c xen/common/sched_rrobin.c xen/common/schedule.c xen/common/slab.c xen/common/softirq.c xen/drivers/acpi/Makefile xen/drivers/char/Makefile xen/drivers/char/console.c xen/drivers/char/serial.c xen/drivers/pci/Makefile xen/drivers/pci/compat.c xen/drivers/pci/pci.c xen/include/asm-x86/apicdef.h xen/include/asm-x86/mm.h xen/include/asm-x86/processor.h xen/include/asm-x86/shadow.h xen/include/public/arch-x86_32.h xen/include/public/arch-x86_64.h xen/include/public/io/domain_controller.h xen/include/public/xen.h xen/include/xen/compile.h.in xen/include/xen/domain.h xen/include/xen/elf.h xen/include/xen/grant_table.h xen/include/xen/ioport.h xen/include/xen/list.h xen/include/xen/mm.h xen/include/xen/pci.h xen/include/xen/perfc_defn.h xen/include/xen/sched.h xen/include/xen/slab.h xen/include/xen/softirq.h xen/include/xen/time.h
line diff
     1.1 --- a/.hgtags	Fri Apr 01 13:01:31 2005 +0000
     1.2 +++ b/.hgtags	Tue Apr 05 11:27:50 2005 +0000
     1.3 @@ -1,6 +1,7 @@
     1.4  42882b3e0dda89f3a8ec00da568f86e9b3c230f1 RELEASE-2.0.0
     1.5  475a162b66e2c19b1e9468b234a4ba705334905e RELEASE-2.0.1
     1.6  82ba8bd1ceb2e03af769775fb8bc890dcab04f72 RELEASE-2.0.3
     1.7 +1a522944f76540ea9d73fcc1b0d13d0f670183f0 RELEASE-2.0.5
     1.8  487b2ee37d1cecb5f3e7a546b05ad097a0226f2f beta1
     1.9  3d330e41f41ce1bc118c02346e18949ad5d67f6b latest-semistable
    1.10  30c521db4c71960b0cf1d9c9e1b658e77b535a3e latest-stable
     2.1 --- a/.rootkeys	Fri Apr 01 13:01:31 2005 +0000
     2.2 +++ b/.rootkeys	Tue Apr 05 11:27:50 2005 +0000
     2.3 @@ -44,218 +44,291 @@ 3f815145AYE58Kpmsj5U7oHDpVDZJA extras/mi
     2.4  3f815145CB8XdPUqsmhAjSDFuwOoqA extras/mini-os/mm.c
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   2.450 +40f56239lrg_Ob0BJ8WBFS1zeg2CYw linux-2.6.11-xen-sparse/drivers/xen/netfront/Kconfig
   2.451 +40f56239Wd4k_ycG_mFsSO1r5xKdtQ linux-2.6.11-xen-sparse/drivers/xen/netfront/Makefile
   2.452 +405853f6nbeazrNyEWNHBuoSg2PiPA linux-2.6.11-xen-sparse/drivers/xen/netfront/netfront.c
   2.453 +4108f5c1ppFXVpQzCOAZ6xXYubsjKA linux-2.6.11-xen-sparse/drivers/xen/privcmd/Makefile
   2.454 +3e5a4e65IUfzzMu2kZFlGEB8-rpTaA linux-2.6.11-xen-sparse/drivers/xen/privcmd/privcmd.c
   2.455 +412f47e4RKD-R5IS5gEXvcT8L4v8gA linux-2.6.11-xen-sparse/include/asm-generic/pgtable.h
   2.456 +42400318xlBIV46qyxLTaDepPLNyhg linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/agp.h
   2.457 +40f56239YAjS52QG2FIAQpHDZAdGHg linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/desc.h
   2.458 +4107adf1E5O4ztGHNGMzCCNhcvqNow linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/dma-mapping.h
   2.459 +40f5623akIoBsQ3KxSB2kufkbgONXQ linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/fixmap.h
   2.460 +41979925z1MsKU1SfuuheM1IFDQ_bA linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/floppy.h
   2.461 +4118b6a418gnL6AZsTdglC92YGqYTg linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/highmem.h
   2.462 +40f5623aJVXQwpJMOLE99XgvGsfQ8Q linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/io.h
   2.463 +40f5623aKXkBBxgpLx2NcvkncQ1Yyw linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/mach-xen/irq_vectors.h
   2.464 +40f5623aDMCsWOFO0jktZ4e8sjwvEg linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/mach-xen/setup_arch_post.h
   2.465 +40f5623arsFXkGdPvIqvFi3yFXGR0Q linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/mach-xen/setup_arch_pre.h
   2.466 +4120f807GCO0uqsLqdZj9csxR1Wthw linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/mmu_context.h
   2.467 +40f5623aFTyFTR-vdiA-KaGxk5JOKQ linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/msr.h
   2.468 +40f5623adgjZq9nAgCt0IXdWl7udSA linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/page.h
   2.469 +40f5623a54NuG-7qHihGYmw4wWQnMA linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/param.h
   2.470 +41137cc1kkvg0cg7uxddcEfjL7L67w linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/pci.h
   2.471 +40f5623atCokYc2uCysSJ8jFO8TEsw linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/pgalloc.h
   2.472 +412e01beTwiaC8sYY4XJP8PxLST5CA linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/pgtable-2level-defs.h
   2.473 +40f5623aEToIXouJgO-ao5d5pcEt1w linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/pgtable-2level.h
   2.474 +40f5623aCCXRPlGpNthVXstGz9ZV3A linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/pgtable.h
   2.475 +40f5623aPCkQQfPtJSooGdhcatrvnQ linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/processor.h
   2.476 +412ea0afQL2CAI-f522TbLjLPMibPQ linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/ptrace.h
   2.477 +40f5623bzLvxr7WoJIxVf2OH4rCBJg linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/segment.h
   2.478 +40f5623bG_LzgG6-qwk292nTc5Wabw linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/setup.h
   2.479 +40f5623bgzm_9vwxpzJswlAxg298Gg linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/synch_bitops.h
   2.480 +40f5623bVdKP7Dt7qm8twu3NcnGNbA linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/system.h
   2.481 +40f5623bc8LKPRO09wY5dGDnY_YCpw linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/tlbflush.h
   2.482 +41062ab7uFxnCq-KtPeAm-aV8CicgA linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/vga.h
   2.483 +40f5623bxUbeGjkRrjDguCy_Gm8RLw linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/xor.h
   2.484 +41af4017PDMuSmMWtSRU5UC9Vylw5g linux-2.6.11-xen-sparse/include/asm-xen/balloon.h
   2.485 +40f5623bYNP7tHE2zX6YQxp9Zq2utQ linux-2.6.11-xen-sparse/include/asm-xen/ctrl_if.h
   2.486 +40f5623b3Eqs8pAc5WpPX8_jTzV2qw linux-2.6.11-xen-sparse/include/asm-xen/evtchn.h
   2.487 +419b4e9367PjTEvdjwavWN12BeBBXg linux-2.6.11-xen-sparse/include/asm-xen/foreign_page.h
   2.488 +412dfaeazclyNDM0cpnp60Yo4xulpQ linux-2.6.11-xen-sparse/include/asm-xen/gnttab.h
   2.489 +40f5623aGPlsm0u1LTO-NVZ6AGzNRQ linux-2.6.11-xen-sparse/include/asm-xen/hypervisor.h
   2.490 +3f108af1ylCIm82H052FVTfXACBHrw linux-2.6.11-xen-sparse/include/asm-xen/linux-public/privcmd.h
   2.491 +3fa8e3f0kBLeE4To2vpdi3cpJbIkbQ linux-2.6.11-xen-sparse/include/asm-xen/linux-public/suspend.h
   2.492 +40f5623cndVUFlkxpf7Lfx7xu8madQ linux-2.6.11-xen-sparse/include/asm-xen/multicall.h
   2.493 +4122466356eIBnC9ot44WSVVIFyhQA linux-2.6.11-xen-sparse/include/asm-xen/queues.h
   2.494 +3f689063BoW-HWV3auUJ-OqXfcGArw linux-2.6.11-xen-sparse/include/asm-xen/xen_proc.h
   2.495 +419b4e93z2S0gR17XTy8wg09JEwAhg linux-2.6.11-xen-sparse/include/linux/gfp.h
   2.496 +42305f545Vc5SLCUewZ2-n-P9JJhEQ linux-2.6.11-xen-sparse/include/linux/highmem.h
   2.497 +419dfc609zbti8rqL60tL2dHXQ_rvQ linux-2.6.11-xen-sparse/include/linux/irq.h
   2.498 +419dfc6awx7w88wk6cG9P3mPidX6LQ linux-2.6.11-xen-sparse/kernel/irq/manage.c
   2.499 +40f56a0ddHCSs3501MY4hRf22tctOw linux-2.6.11-xen-sparse/mkbuildtree
   2.500 +42305f54Q6xJ1bXcQJlCQq1m-e2C8g linux-2.6.11-xen-sparse/mm/highmem.c
   2.501 +412f46c0LJuKAgSPGoC0Z1DEkLfuLA linux-2.6.11-xen-sparse/mm/memory.c
   2.502 +410a94a4KT6I6X0LVc7djB39tRDp4g linux-2.6.11-xen-sparse/mm/page_alloc.c
   2.503  413cb1e4zst25MDYjg63Y-NGC5_pLg netbsd-2.0-xen-sparse/Makefile
   2.504  413cb1e5c_Mkxf_X0zimEhTKI_l4DA netbsd-2.0-xen-sparse/mkbuildtree
   2.505  413cb1e5kY_Zil7-b0kI6hvCIxBEYg netbsd-2.0-xen-sparse/nbconfig-xen
   2.506 @@ -291,12 +364,14 @@ 413cb3b46JnvK1UurZAubeQoFg1W-w netbsd-2.
   2.507  413cb3b5rIKB3TbyhK3pbNyVkYysqA netbsd-2.0-xen-sparse/sys/arch/xen/xen/xen_debug.c
   2.508  413cb3b5eKxnzoodEqaWn2wrPnHWnA netbsd-2.0-xen-sparse/sys/arch/xen/xen/xencons.c
   2.509  413cb3b5F56TvQWAmO5TsuzhtzLFPQ netbsd-2.0-xen-sparse/sys/arch/xen/xen/xenkbc.c
   2.510 +422e4430vKaHLOOGS7X-SUUe3EBCgw netbsd-2.0-xen-sparse/sys/miscfs/kernfs/kernfs.h
   2.511 +422e4430-gOD358H8nGGnNWes08Nng netbsd-2.0-xen-sparse/sys/miscfs/kernfs/kernfs_vnops.c
   2.512  413cb3b53nyOv1OIeDSsCXhBFDXvJA netbsd-2.0-xen-sparse/sys/nfs/files.nfs
   2.513 -413aa1d0oNP8HXLvfPuMe6cSroUfSA patches/linux-2.6.9/agpgart.patch
   2.514 -413aa1d0ewvSv-ohnNnQQNGsbPTTNA patches/linux-2.6.9/drm.patch
   2.515 -418abc69J3F638vPO9MYoDGeYilxoQ patches/linux-2.6.9/nettel.patch
   2.516 -40e1b09db5mN69Ijj0X_Eol-S7dXiw tools/Make.defs
   2.517 +413aa1d0oNP8HXLvfPuMe6cSroUfSA patches/linux-2.6.11/agpgart.patch
   2.518 +42372652KCUP-IOH9RN19YQmGhs4aA patches/linux-2.6.11/iomap.patch
   2.519 +418abc69J3F638vPO9MYoDGeYilxoQ patches/linux-2.6.11/nettel.patch
   2.520  3f776bd1Hy9rn69ntXBhPReUFw9IEA tools/Makefile
   2.521 +40e1b09db5mN69Ijj0X_Eol-S7dXiw tools/Rules.mk
   2.522  4124b307nRyK3dhn1hAsvrY76NuV3g tools/check/Makefile
   2.523  4124b307vHLUWbfpemVefmaWDcdfag tools/check/README
   2.524  4124b307jt7T3CHysgl9LijNHSe1tA tools/check/check_brctl
   2.525 @@ -315,12 +390,17 @@ 41597996GHP2_yVih2UspXh328fgMQ tools/exa
   2.526  405ff55dawQyCHFEnJ067ChPRoXBBA tools/examples/init.d/xend
   2.527  40278d94cIUWl2eRgnwZtr4hTyWT1Q tools/examples/init.d/xendomains
   2.528  40ee75a9xFz6S05sDKu-JCLqyVTkDA tools/examples/network
   2.529 +41fc0c18hVgK5rKJyZUsqybux9D9Dg tools/examples/network-nat
   2.530  41e661e1giIEKbJ25qfiP-ke8u8hFA tools/examples/network-route
   2.531  40ee75a967sxgcRY4Q7zXoVUaJ4flA tools/examples/vif-bridge
   2.532 +41fc0c18AFAVXA1uGm1JFWHMeeznVw tools/examples/vif-nat
   2.533  41e661e1ooiRKlOfwumG6wwzc0PdhQ tools/examples/vif-route
   2.534 +423ab2eaNCzxk3c-9yU1BwzxWvsDCQ tools/examples/vnc/Xservers
   2.535 +423ab2ea7ajZLdZOI-8Z-bpNdNhhAQ tools/examples/vnc/Xvnc-xen
   2.536  40ee75a93cqxHp6MiYXxxwR5j2_8QQ tools/examples/xend-config.sxp
   2.537  41090ec8Pj_bkgCBpg2W7WfmNkumEA tools/examples/xmexample1
   2.538  40cf2937oKlROYOJTN8GWwWM5AmjBg tools/examples/xmexample2
   2.539 +41fc0c18_k4iL81hu4pMIWQu9dKpKA tools/examples/xmexample3
   2.540  3fbba6dbDfYvJSsw9500b4SZyUhxjQ tools/libxc/Makefile
   2.541  41cc934abX-QLXJXW_clV_wRjM0zYg tools/libxc/plan9a.out.h
   2.542  3fbba6dc1uU7U3IFeF6A-XEOYF2MkQ tools/libxc/rpm.spec
   2.543 @@ -554,6 +634,7 @@ 4104ffca-jPHLVOrW0n0VghEXXtKxg tools/sv/
   2.544  40fcefb3yMSrZvApO9ToIi-iQwnchA tools/sv/images/xen.png
   2.545  41013a83z27rKvWIxAfUBMVZ1eDCDg tools/sv/inc/script.js
   2.546  40fcefb3zGC9XNBkSwTEobCoq8YClA tools/sv/inc/style.css
   2.547 +420b963dK3yGNtqxRM8npGZtrCQd1g tools/vnet/00INSTALL
   2.548  41a21888_WlknVWjSxb32Fo13_ujsw tools/vnet/00README
   2.549  41a21888bOiOJc7blzRbe4MNJoaYTw tools/vnet/Makefile
   2.550  41a21888mg2k5HeiVjlQYEtJBZT4Qg tools/vnet/doc/vnet-module.txt
   2.551 @@ -857,6 +938,7 @@ 3e397e66m2tO3s-J8Jnr7Ws_tGoPTg xen/inclu
   2.552  40715b2epYl2jBbxzz9CI2rgIca7Zg xen/include/xen/acpi.h
   2.553  422f0995xCgnbsVhTjSncnqIABs64g xen/include/xen/adv_sched_hist.h
   2.554  3ddb79c0c0cX_DZE209-Bb-Rx1v-Aw xen/include/xen/cache.h
   2.555 +41f2cea7Yna7xc0X9fyavIjoSFFeVg xen/include/xen/compile.h.in
   2.556  3f840f12CkbYSlwMrY2S11Mpyxg7Nw xen/include/xen/compiler.h
   2.557  3ddb79c259jh8hE7vre_8NuE7nwNSA xen/include/xen/config.h
   2.558  3eb165e0eawr3R-p2ZQtSdLWtLRN_A xen/include/xen/console.h
     3.1 --- a/BitKeeper/etc/ignore	Fri Apr 01 13:01:31 2005 +0000
     3.2 +++ b/BitKeeper/etc/ignore	Tue Apr 05 11:27:50 2005 +0000
     3.3 @@ -1,6 +1,7 @@
     3.4  *.a
     3.5  *.d
     3.6  *.o
     3.7 +*.opic
     3.8  *.pyc
     3.9  *.so
    3.10  *.so.*
    3.11 @@ -69,6 +70,8 @@ tools/vnetd/vnetd
    3.12  tools/web-shutdown.tap
    3.13  tools/xentrace/xentrace
    3.14  tools/xfrd/xfrd
    3.15 +xen/tags
    3.16 +xen/TAGS
    3.17  xen/arch/x86/asm-offsets.s
    3.18  xen/arch/x86/boot/mkelf32
    3.19  xen/drivers/pci/classlist.h
    3.20 @@ -78,6 +81,8 @@ xen/figlet/figlet
    3.21  xen/include/asm
    3.22  xen/include/asm-*/asm-offsets.h
    3.23  xen/include/hypervisor-ifs/arch
    3.24 +xen/include/xen/*.new
    3.25 +xen/include/xen/banner.h
    3.26  xen/include/xen/compile.h
    3.27  xen/tools/elf-reloc
    3.28  xen/tools/figlet/figlet
     4.1 --- a/BitKeeper/etc/logging_ok	Fri Apr 01 13:01:31 2005 +0000
     4.2 +++ b/BitKeeper/etc/logging_ok	Tue Apr 05 11:27:50 2005 +0000
     4.3 @@ -11,26 +11,32 @@ br260@labyrinth.cl.cam.ac.uk
     4.4  br260@laudney.cl.cam.ac.uk
     4.5  bren@anvil.research
     4.6  cl349@arcadians.cl.cam.ac.uk
     4.7 +cl349@firebug.cl.cam.ac.uk
     4.8  cl349@freefall.cl.cam.ac.uk
     4.9  cl349@labyrinth.cl.cam.ac.uk
    4.10  cwc22@centipede.cl.cam.ac.uk
    4.11  djm@kirby.fc.hp.com
    4.12 +doogie@brainfood.com
    4.13  gm281@boulderdash.cl.cam.ac.uk
    4.14  gm281@tetrapod.cl.cam.ac.uk
    4.15  iap10@freefall.cl.cam.ac.uk
    4.16  iap10@labyrinth.cl.cam.ac.uk
    4.17  iap10@nidd.cl.cam.ac.uk
    4.18 +iap10@pb007.cl.cam.ac.uk
    4.19  iap10@striker.cl.cam.ac.uk
    4.20  iap10@tetris.cl.cam.ac.uk
    4.21 +jrb44@plym.cl.cam.ac.uk
    4.22  jws22@gauntlet.cl.cam.ac.uk
    4.23  jws@cairnwell.research
    4.24  kaf24@camelot.eng.3leafnetworks.com
    4.25 +kaf24@firebug.cl.cam.ac.uk
    4.26  kaf24@freefall.cl.cam.ac.uk
    4.27  kaf24@labyrinth.cl.cam.ac.uk
    4.28  kaf24@penguin.local
    4.29  kaf24@plym.cl.cam.ac.uk
    4.30  kaf24@scramble.cl.cam.ac.uk
    4.31  kaf24@striker.cl.cam.ac.uk
    4.32 +kaf24@viper.(none)
    4.33  laudney@eclipse.(none)
    4.34  lynx@idefix.cl.cam.ac.uk
    4.35  mafetter@fleming.research
    4.36 @@ -43,6 +49,7 @@ mwilli2@equilibrium.research.intel-resea
    4.37  mwilli2@pug.(none)
    4.38  rac61@labyrinth.cl.cam.ac.uk
    4.39  rgr22@boulderdash.cl.cam.ac.uk
    4.40 +rminnich@lanl.gov
    4.41  rn@wyvis.camb.intel-research.net
    4.42  rn@wyvis.research.intel-research.net
    4.43  rneugeba@wyvis.research
    4.44 @@ -59,4 +66,6 @@ tlh20@elite.cl.cam.ac.uk
    4.45  tlh20@labyrinth.cl.cam.ac.uk
    4.46  tw275@labyrinth.cl.cam.ac.uk
    4.47  tw275@striker.cl.cam.ac.uk
    4.48 +vh249@airwolf.cl.cam.ac.uk
    4.49 +vh249@arcadians.cl.cam.ac.uk
    4.50  xenbk@gandalf.hpl.hp.com
     5.1 --- a/Makefile	Fri Apr 01 13:01:31 2005 +0000
     5.2 +++ b/Makefile	Tue Apr 05 11:27:50 2005 +0000
     5.3 @@ -2,8 +2,14 @@
     5.4  # Grand Unified Makefile for Xen.
     5.5  #
     5.6  
     5.7 -DIST_DIR    ?= $(shell pwd)/dist
     5.8 -INSTALL_DIR ?= $(DIST_DIR)/install
     5.9 +# Default is to install to local 'dist' directory.
    5.10 +DISTDIR ?= $(CURDIR)/dist
    5.11 +DESTDIR ?= $(DISTDIR)/install
    5.12 +
    5.13 +INSTALL		:= install
    5.14 +INSTALL_DIR	:= $(INSTALL) -d -m0755
    5.15 +INSTALL_DATA	:= $(INSTALL) -m0644
    5.16 +INSTALL_PROG	:= $(INSTALL) -m0755
    5.17  
    5.18  KERNELS ?= linux-2.6-xen0 linux-2.6-xenU
    5.19  # linux-2.4-xen0 linux-2.4-xenU netbsd-2.0-xenU
    5.20 @@ -13,56 +19,48 @@ ALLKERNELS = $(patsubst buildconfigs/mk.
    5.21  ALLSPARSETREES = $(patsubst %-xen-sparse,%,$(wildcard *-xen-sparse))
    5.22  XKERNELS := $(foreach kernel, $(KERNELS), $(patsubst buildconfigs/mk.%,%,$(wildcard buildconfigs/mk.$(kernel))) )
    5.23  
    5.24 +export DESTDIR
    5.25  
    5.26 -export INSTALL_DIR
    5.27 +# Export target architecture overrides to Xen and Linux sub-trees.
    5.28 +ifneq ($(TARGET_ARCH),)
    5.29 +SUBARCH := $(subst x86_32,i386,$(TARGET_ARCH))
    5.30 +export TARGET_ARCH SUBARCH
    5.31 +endif
    5.32  
    5.33  include buildconfigs/Rules.mk
    5.34  
    5.35  .PHONY:	all dist install xen tools kernels docs world clean mkpatches mrproper
    5.36 -.PHONY:	kbuild kdelete kclean install-tools install-xen install-docs
    5.37 -.PHONY: install-kernels
    5.38 +.PHONY:	kbuild kdelete kclean
    5.39  
    5.40  all: dist
    5.41  
    5.42 -# install everything into the standard system directories
    5.43 -# NB: install explicitly does not check that everything is up to date!
    5.44 -install: install-tools install-xen install-kernels install-docs
    5.45 -
    5.46 -install-xen:
    5.47 -	$(MAKE) -C xen install
    5.48 +# build and install everything into the standard system directories
    5.49 +install: install-xen install-tools install-kernels install-docs
    5.50  
    5.51 -install-tools:
    5.52 -	$(MAKE) -C tools install
    5.53 -
    5.54 -install-kernels:
    5.55 -	$(shell cp -a $(INSTALL_DIR)/boot/* /boot/)
    5.56 -	$(shell cp -a $(INSTALL_DIR)/lib/modules/* /lib/modules/)
    5.57 -	$(shell cp -dR $(INSTALL_DIR)/boot/*$(LINUX_VER)* $(prefix)/boot/)
    5.58 -	$(shell cp -dR $(INSTALL_DIR)/lib/modules/* $(prefix)/lib/modules/)
    5.59 -
    5.60 -install-docs:
    5.61 -	sh ./docs/check_pkgs && $(MAKE) -C docs install || true
    5.62 +build: kernels
    5.63 +	$(MAKE) -C xen build
    5.64 +	$(MAKE) -C tools build
    5.65 +	$(MAKE) -C docs build
    5.66  
    5.67  # build and install everything into local dist directory
    5.68  dist: xen tools kernels docs
    5.69 -	install -m0644 ./COPYING $(DIST_DIR)
    5.70 -	install -m0644 ./README $(DIST_DIR)
    5.71 -	install -m0755 ./install.sh $(DIST_DIR)
    5.72 -	mkdir -p $(DIST_DIR)/check
    5.73 -	install -m0755 tools/check/chk tools/check/check_* $(DIST_DIR)/check
    5.74 +	$(INSTALL_DIR) $(DISTDIR)/check
    5.75 +	$(INSTALL_DATA) ./COPYING $(DISTDIR)
    5.76 +	$(INSTALL_DATA) ./README $(DISTDIR)
    5.77 +	$(INSTALL_PROG) ./install.sh $(DISTDIR)
    5.78 +	$(INSTALL_PROG) tools/check/chk tools/check/check_* $(DISTDIR)/check
    5.79  
    5.80  xen:
    5.81 -	$(MAKE) prefix=$(INSTALL_DIR) dist=yes -C xen install
    5.82 +	$(MAKE) -C xen install
    5.83  
    5.84  tools:
    5.85 -	$(MAKE) prefix=$(INSTALL_DIR) dist=yes -C tools install
    5.86 +	$(MAKE) -C tools install
    5.87  
    5.88  kernels:
    5.89 -	for i in $(XKERNELS) ; do $(MAKE) $$i-build ; done
    5.90 +	for i in $(XKERNELS) ; do $(MAKE) $$i-build || exit 1; done
    5.91  
    5.92  docs:
    5.93 -	sh ./docs/check_pkgs && \
    5.94 -		$(MAKE) prefix=$(INSTALL_DIR) dist=yes -C docs install || true
    5.95 +	sh ./docs/check_pkgs && $(MAKE) -C docs install || true
    5.96  
    5.97  # Build all the various kernels and modules
    5.98  kbuild: kernels
    5.99 @@ -77,7 +75,7 @@ kclean:
   5.100  
   5.101  # Make patches from kernel sparse trees
   5.102  mkpatches:
   5.103 -	for i in $(ALLSPARSETREES) ; do $(MAKE) $$i-xen.patch ; done
   5.104 +	for i in $(ALLSPARSETREES) ; do $(MAKE) $$i-xen.patch || exit 1; done
   5.105  
   5.106  
   5.107  # build xen, the tools, and a domain 0 plus unprivileged linux-xen images,
   5.108 @@ -103,38 +101,41 @@ mrproper: clean
   5.109  install-twisted:
   5.110  	wget http://www.twistedmatrix.com/products/get-current.epy
   5.111  	tar -zxf Twisted-*.tar.gz
   5.112 -	( cd Twisted-* ; python setup.py install )
   5.113 +	cd Twisted-* && python setup.py install
   5.114  
   5.115  install-logging: LOGGING=logging-0.4.9.2
   5.116  install-logging:
   5.117  	[ -f $(LOGGING).tar.gz ] || wget http://www.red-dove.com/$(LOGGING).tar.gz
   5.118  	tar -zxf $(LOGGING).tar.gz
   5.119 -	( cd $(LOGGING) && python setup.py install )
   5.120 +	cd $(LOGGING) && python setup.py install
   5.121  
   5.122  # handy target to upgrade iptables (use rpm or apt-get in preference)
   5.123  install-iptables:
   5.124  	wget http://www.netfilter.org/files/iptables-1.2.11.tar.bz2
   5.125 -	tar -jxf iptables-*.tar.bz2
   5.126 -	( cd iptables-* ; \
   5.127 -	  make PREFIX= KERNEL_DIR=../linux-$(LINUX_VER)-xen0 install)
   5.128 +	tar -jxf iptables-1.2.11.tar.bz2
   5.129 +	$(MAKE) -C iptables-1.2.11 PREFIX= KERNEL_DIR=../linux-$(LINUX_VER)-xen0 install
   5.130 +
   5.131 +install-%: DESTDIR=
   5.132 +install-%: %
   5.133 +	@: # do nothing
   5.134  
   5.135  help:
   5.136  	@echo 'Installation targets:'
   5.137 -	@echo '  install          - install everything'
   5.138 -	@echo '  install-xen      - install the Xen hypervisor'
   5.139 -	@echo '  install-tools    - install the control tools'
   5.140 -	@echo '  install-kernels  - install guest kernels'
   5.141 -	@echo '  install-docs     - install documentation'
   5.142 +	@echo '  install          - build and install everything'
   5.143 +	@echo '  install-xen      - build and install the Xen hypervisor'
   5.144 +	@echo '  install-tools    - build and install the control tools'
   5.145 +	@echo '  install-kernels  - build and install guest kernels'
   5.146 +	@echo '  install-docs     - build and install documentation'
   5.147  	@echo ''
   5.148  	@echo 'Building targets:'
   5.149 -	@echo '  dist             - build everything and place in dist/'
   5.150 +	@echo '  dist             - build and install everything into local dist directory'
   5.151  	@echo '  world            - clean everything, delete guest kernel build'
   5.152  	@echo '                     trees then make dist'
   5.153 -	@echo '  xen              - build Xen hypervisor and place in dist/'
   5.154 -	@echo '  tools            - build tools and place in dist/'
   5.155 -	@echo '  kernels          - build guest kernels and place in dist/'
   5.156 +	@echo '  xen              - build and install Xen hypervisor'
   5.157 +	@echo '  tools            - build and install tools'
   5.158 +	@echo '  kernels          - build and install guest kernels'
   5.159  	@echo '  kbuild           - synonym for make kernels'
   5.160 -	@echo '  docs             - build docs and place in dist/'
   5.161 +	@echo '  docs             - build and install docs'
   5.162  	@echo ''
   5.163  	@echo 'Cleaning targets:'
   5.164  	@echo '  clean            - clean the Xen, tools and docs (but not'
   5.165 @@ -156,9 +157,20 @@ help:
   5.166  	@echo '                     with extreme care!)'
   5.167  
   5.168  # Use this target with extreme care!
   5.169 +uninstall: DESTDIR=
   5.170 +uninstall: D=$(DESTDIR)
   5.171  uninstall:
   5.172 -	cp -a /etc/xen /etc/xen.old && rm -rf /etc/xen 
   5.173 -	rm -rf "/usr/lib/python2.?/site-packages/xen* /usr/lib/libxc* /usr/lib/python2.?/site-packages/Xc*"
   5.174 +	[ ! -d $(D)/etc/xen ] || mv -f $(D)/etc/xen $(D)/etc/xen.old
   5.175 +	rm -rf $(D)/etc/init.d/xend*
   5.176 +	rm -rf $(D)/usr/lib/libxc* $(D)/usr/lib/libxutil*
   5.177 +	rm -rf $(D)/usr/lib/python/xen $(D)/usr/include/xen
   5.178 +	rm -rf $(D)/usr/include/xcs_proto.h $(D)/usr/include/xc.h
   5.179 +	rm -rf $(D)/usr/sbin/xcs $(D)/usr/sbin/xcsdump $(D)/usr/sbin/xen*
   5.180 +	rm -rf $(D)/usr/sbin/netfix
   5.181 +	rm -rf $(D)/usr/sbin/xfrd $(D)/usr/sbin/xm $(D)/var/lib/xen
   5.182 +	rm -rf $(D)/usr/share/doc/xen  $(D)/usr/man/man*/xentrace*
   5.183 +	rm -rf $(D)/usr/bin/xen* $(D)/usr/bin/miniterm
   5.184 +	rm -rf $(D)/boot/*xen*
   5.185  
   5.186  # Legacy targets for compatibility
   5.187  linux24:
   5.188 @@ -171,3 +183,4 @@ linux26:
   5.189  
   5.190  netbsd20:
   5.191  	$(MAKE) netbsd-2.0-xenU-build
   5.192 +
     6.1 --- a/buildconfigs/Rules.mk	Fri Apr 01 13:01:31 2005 +0000
     6.2 +++ b/buildconfigs/Rules.mk	Tue Apr 05 11:27:50 2005 +0000
     6.3 @@ -1,8 +1,8 @@
     6.4  
     6.5  # We expect these two to already be set if people 
     6.6  # are using the top-level Makefile
     6.7 -DIST_DIR	?= $(shell pwd)/dist
     6.8 -INSTALL_DIR	?= $(DIST_DIR)/install
     6.9 +DISTDIR	?= $(CURDIR)/dist
    6.10 +DESTDIR	?= $(DISTDIR)/install
    6.11  
    6.12  .PHONY:	mkpatches mrproper
    6.13  
    6.14 @@ -27,7 +27,7 @@ linux-%.tar.bz2:
    6.15  # Expand NetBSD release to NetBSD version
    6.16  NETBSD_RELEASE  ?= 2.0
    6.17  NETBSD_VER      ?= $(patsubst netbsd-%-xen-sparse,%,$(wildcard netbsd-$(NETBSD_RELEASE)*-xen-sparse))
    6.18 -NETBSD_CVSSNAP  ?= 20041103
    6.19 +NETBSD_CVSSNAP  ?= 20050309
    6.20  
    6.21  # Setup NetBSD search path
    6.22  NETBSD_SRC_PATH	?= .:..
     7.1 --- a/buildconfigs/mk.linux-2.4-xen0	Fri Apr 01 13:01:31 2005 +0000
     7.2 +++ b/buildconfigs/mk.linux-2.4-xen0	Tue Apr 05 11:27:50 2005 +0000
     7.3 @@ -13,9 +13,11 @@ include buildconfigs/Rules.mk
     7.4  
     7.5  # The real action starts here!
     7.6  build: $(LINUX_DIR)/include/linux/autoconf.h
     7.7 -	$(MAKE) -C $(LINUX_DIR) ARCH=xen modules
     7.8 -	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_MOD_PATH=$(INSTALL_DIR) modules_install
     7.9 -	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_PATH=$(INSTALL_DIR) install
    7.10 +	if grep "^CONFIG_MODULES=" $(LINUX_DIR)/.config ; then \
    7.11 +	    $(MAKE) -C $(LINUX_DIR) ARCH=xen modules ; \
    7.12 +	    $(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_MOD_PATH=$(DESTDIR) modules_install ; \
    7.13 +	fi
    7.14 +	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_PATH=$(DESTDIR) install
    7.15  
    7.16  patches/tmp/ebtables.diff:
    7.17  	mkdir -p patches/tmp
    7.18 @@ -35,8 +37,8 @@ patches/tmp/ebtables.diff:
    7.19  	# add ebtables patch
    7.20  	( cd $(LINUX_DIR) ; patch -p1 -F3 < ../patches/tmp/ebtables.diff )
    7.21  	# Re-use config from install dir if one exits else use default config
    7.22 -	[ -r $(INSTALL_DIR)/boot/config-$(FULLVERSION) ] && \
    7.23 -	  cp $(INSTALL_DIR)/boot/config-$(FULLVERSION) $(LINUX_DIR)/.config \
    7.24 +	[ -r $(DESTDIR)/boot/config-$(FULLVERSION) ] && \
    7.25 +	  cp $(DESTDIR)/boot/config-$(FULLVERSION) $(LINUX_DIR)/.config \
    7.26  	  || cp $(LINUX_DIR)/arch/xen/defconfig-$(EXTRAVERSION) \
    7.27  		$(LINUX_DIR)/.config
    7.28  	make -C $(LINUX_DIR) ARCH=xen oldconfig
     8.1 --- a/buildconfigs/mk.linux-2.4-xenU	Fri Apr 01 13:01:31 2005 +0000
     8.2 +++ b/buildconfigs/mk.linux-2.4-xenU	Tue Apr 05 11:27:50 2005 +0000
     8.3 @@ -13,9 +13,11 @@ include buildconfigs/Rules.mk
     8.4  
     8.5  # The real action starts here!
     8.6  build: $(LINUX_DIR)/include/linux/autoconf.h
     8.7 -	$(MAKE) -C $(LINUX_DIR) ARCH=xen modules	
     8.8 -	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_MOD_PATH=$(INSTALL_DIR) modules_install
     8.9 -	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_PATH=$(INSTALL_DIR) install
    8.10 +	if grep "^CONFIG_MODULES=" $(LINUX_DIR)/.config ; then \
    8.11 +	    $(MAKE) -C $(LINUX_DIR) ARCH=xen modules ; \
    8.12 +	    $(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_MOD_PATH=$(DESTDIR) modules_install ; \
    8.13 +	fi
    8.14 +	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_PATH=$(DESTDIR) install
    8.15  
    8.16  $(LINUX_DIR)/include/linux/autoconf.h: pristine-linux-$(LINUX_VER)
    8.17  	rm -rf $(LINUX_DIR)
    8.18 @@ -28,8 +30,8 @@ build: $(LINUX_DIR)/include/linux/autoco
    8.19  	  sed -e 's/^EXTRAVERSION.*/&-$(EXTRAVERSION)/' Makefile >Mk.tmp ; \
    8.20  	  rm -f Makefile ; mv Mk.tmp Makefile )
    8.21  	# Re-use config from install dir if one exits else use default config
    8.22 -	[ -r $(INSTALL_DIR)/boot/config-$(FULLVERSION) ] && \
    8.23 -	  cp $(INSTALL_DIR)/boot/config-$(FULLVERSION) $(LINUX_DIR)/.config \
    8.24 +	[ -r $(DESTDIR)/boot/config-$(FULLVERSION) ] && \
    8.25 +	  cp $(DESTDIR)/boot/config-$(FULLVERSION) $(LINUX_DIR)/.config \
    8.26  	  || cp $(LINUX_DIR)/arch/xen/defconfig-$(EXTRAVERSION) \
    8.27  		$(LINUX_DIR)/.config
    8.28  	make -C $(LINUX_DIR) ARCH=xen oldconfig
     9.1 --- a/buildconfigs/mk.linux-2.6-xen0	Fri Apr 01 13:01:31 2005 +0000
     9.2 +++ b/buildconfigs/mk.linux-2.6-xen0	Tue Apr 05 11:27:50 2005 +0000
     9.3 @@ -15,9 +15,9 @@ include buildconfigs/Rules.mk
     9.4  build: $(LINUX_DIR)/include/linux/autoconf.h
     9.5  	if grep "^CONFIG_MODULES=" $(LINUX_DIR)/.config ; then \
     9.6  	    $(MAKE) -C $(LINUX_DIR) ARCH=xen modules ; \
     9.7 -	    $(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_MOD_PATH=$(INSTALL_DIR) modules_install ; \
     9.8 +	    $(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_MOD_PATH=$(DESTDIR) modules_install ; \
     9.9  	fi
    9.10 -	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_PATH=$(INSTALL_DIR) install
    9.11 +	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_PATH=$(DESTDIR) install
    9.12  
    9.13  $(LINUX_DIR)/include/linux/autoconf.h: pristine-linux-$(LINUX_VER)
    9.14  	rm -rf $(LINUX_DIR)
    9.15 @@ -30,11 +30,11 @@ build: $(LINUX_DIR)/include/linux/autoco
    9.16  	  sed -e 's/^EXTRAVERSION.*/&-$(EXTRAVERSION)/' Makefile >Mk.tmp ; \
    9.17  	  rm -f Makefile ; mv Mk.tmp Makefile )
    9.18  	# Re-use config from install dir if one exits else use default config
    9.19 -	[ -r $(INSTALL_DIR)/boot/config-$(FULLVERSION) ] && \
    9.20 -	  cp $(INSTALL_DIR)/boot/config-$(FULLVERSION) $(LINUX_DIR)/.config \
    9.21 +	[ -r $(DESTDIR)/boot/config-$(FULLVERSION) ] && \
    9.22 +	  cp $(DESTDIR)/boot/config-$(FULLVERSION) $(LINUX_DIR)/.config \
    9.23  	  || cp $(LINUX_DIR)/arch/xen/configs/$(EXTRAVERSION)_defconfig \
    9.24  		$(LINUX_DIR)/.config
    9.25 -	make -C $(LINUX_DIR) ARCH=xen oldconfig
    9.26 +	$(MAKE) -C $(LINUX_DIR) ARCH=xen oldconfig
    9.27  
    9.28  clean:
    9.29  	$(MAKE) -C $(LINUX_DIR) ARCH=xen clean
    10.1 --- a/buildconfigs/mk.linux-2.6-xenU	Fri Apr 01 13:01:31 2005 +0000
    10.2 +++ b/buildconfigs/mk.linux-2.6-xenU	Tue Apr 05 11:27:50 2005 +0000
    10.3 @@ -15,9 +15,9 @@ include buildconfigs/Rules.mk
    10.4  build: $(LINUX_DIR)/include/linux/autoconf.h
    10.5  	if grep "^CONFIG_MODULES=" $(LINUX_DIR)/.config ; then \
    10.6  	    $(MAKE) -C $(LINUX_DIR) ARCH=xen modules ; \
    10.7 -	    $(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_MOD_PATH=$(INSTALL_DIR) modules_install ; \
    10.8 +	    $(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_MOD_PATH=$(DESTDIR) modules_install ; \
    10.9  	fi
   10.10 -	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_PATH=$(INSTALL_DIR) install
   10.11 +	$(MAKE) -C $(LINUX_DIR) ARCH=xen INSTALL_PATH=$(DESTDIR) install
   10.12  
   10.13  $(LINUX_DIR)/include/linux/autoconf.h: pristine-linux-$(LINUX_VER)
   10.14  	rm -rf $(LINUX_DIR)
   10.15 @@ -30,11 +30,11 @@ build: $(LINUX_DIR)/include/linux/autoco
   10.16  	  sed -e 's/^EXTRAVERSION.*/&-$(EXTRAVERSION)/' Makefile >Mk.tmp ; \
   10.17  	  rm -f Makefile ; mv Mk.tmp Makefile )
   10.18  	# Re-use config from install dir if one exits else use default config
   10.19 -	[ -r $(INSTALL_DIR)/boot/config-$(FULLVERSION) ] && \
   10.20 -	  cp $(INSTALL_DIR)/boot/config-$(FULLVERSION) $(LINUX_DIR)/.config \
   10.21 +	[ -r $(DESTDIR)/boot/config-$(FULLVERSION) ] && \
   10.22 +	  cp $(DESTDIR)/boot/config-$(FULLVERSION) $(LINUX_DIR)/.config \
   10.23  	  || cp $(LINUX_DIR)/arch/xen/configs/$(EXTRAVERSION)_defconfig \
   10.24  		$(LINUX_DIR)/.config
   10.25 -	make -C $(LINUX_DIR) ARCH=xen oldconfig
   10.26 +	$(MAKE) -C $(LINUX_DIR) ARCH=xen oldconfig
   10.27  
   10.28  clean:
   10.29  	$(MAKE) -C $(LINUX_DIR) ARCH=xen clean
    11.1 --- a/buildconfigs/mk.netbsd-2.0-xenU	Fri Apr 01 13:01:31 2005 +0000
    11.2 +++ b/buildconfigs/mk.netbsd-2.0-xenU	Tue Apr 05 11:27:50 2005 +0000
    11.3 @@ -1,6 +1,6 @@
    11.4  
    11.5  NETBSD_RELEASE   ?= 2.0
    11.6 -NETBSD_CVSSNAP   ?= 20041103
    11.7 +NETBSD_CVSSNAP   ?= 20050309
    11.8  
    11.9  EXTRAVERSION = xenU
   11.10  
   11.11 @@ -34,7 +34,7 @@ netbsd-%-tools: netbsd-%-tools.tar.bz2
   11.12  netbsd-xen%: $(NETBSD_DIR)/.valid netbsd-$(NETBSD_RELEASE)-tools
   11.13  	$(MAKE) -C netbsd-$(FULLVERSION) config
   11.14  	$(MAKE) -C netbsd-$(FULLVERSION) netbsd
   11.15 -	$(MAKE) -C netbsd-$(FULLVERSION) INSTALL_PATH=$(INSTALL_DIR) INSTALL_NAME=boot/netbsd-$(NETBSD_VER)-xen$* install
   11.16 +	$(MAKE) -C netbsd-$(FULLVERSION) INSTALL_PATH=$(DESTDIR) INSTALL_NAME=boot/netbsd-$(NETBSD_VER)-xen$* install
   11.17  
   11.18  clean:
   11.19  	$(MAKE) -C netbsd-$(FULLVERSION) clean
    12.1 --- a/docs/Makefile	Fri Apr 01 13:01:31 2005 +0000
    12.2 +++ b/docs/Makefile	Tue Apr 05 11:27:50 2005 +0000
    12.3 @@ -1,20 +1,34 @@
    12.4 +#!/usr/bin/make -f
    12.5  
    12.6 -DOC_TEX  := $(wildcard src/*.tex)
    12.7 -DOC_PS   := $(patsubst src/%.tex,ps/%.ps,$(DOC_TEX))
    12.8 -DOC_PDF  := $(patsubst src/%.tex,pdf/%.pdf,$(DOC_TEX))
    12.9 -DOC_HTML := $(patsubst src/%.tex,html/%/index.html,$(DOC_TEX))
   12.10 +INSTALL		= install
   12.11 +INSTALL_DIR	= $(INSTALL) -d -m0755
   12.12  
   12.13 -GFX  = $(patsubst %.obj, %.eps, $(wildcard figs/*.obj))
   12.14 -GFX += $(patsubst %.fig, %.eps, $(wildcard figs/*.fig))
   12.15 +PS2PDF		:= ps2pdf
   12.16 +DVIPS		:= dvips
   12.17 +LATEX		:= latex
   12.18 +FIG2DEV		:= fig2dev
   12.19 +LATEX2HTML	:= latex2html
   12.20  
   12.21 -all: ps pdf html
   12.22 +pkgdocdir	:= /usr/share/doc/xen
   12.23 +
   12.24 +DOC_TEX		:= $(wildcard src/*.tex)
   12.25 +DOC_PS		:= $(patsubst src/%.tex,ps/%.ps,$(DOC_TEX))
   12.26 +DOC_PDF		:= $(patsubst src/%.tex,pdf/%.pdf,$(DOC_TEX))
   12.27 +DOC_HTML	:= $(patsubst src/%.tex,html/%/index.html,$(DOC_TEX))
   12.28 +
   12.29 +GFX = $(patsubst %.fig, %.eps, $(wildcard figs/*.fig))
   12.30 +
   12.31 +all: build
   12.32 +build: ps pdf html
   12.33  	rm -f *.aux *.dvi *.bbl *.blg *.glo *.idx *.ilg *.log *.ind *.toc
   12.34  
   12.35  ps: $(DOC_PS)
   12.36  
   12.37  pdf: $(DOC_PDF)
   12.38  
   12.39 -html: $(DOC_HTML)
   12.40 +html:
   12.41 +	@if which $(LATEX2HTML) 1>/dev/null 2>/dev/null; then \
   12.42 +	$(MAKE) $(DOC_HTML); fi
   12.43  
   12.44  clean:
   12.45  	rm -rf .word_count *.aux *.dvi *.bbl *.blg *.glo *.idx *~ 
   12.46 @@ -22,30 +36,31 @@ clean:
   12.47  	rm -rf $(GFX) ps pdf html
   12.48  
   12.49  install: all
   12.50 -	rm -rf $(prefix)/usr/share/doc/xen
   12.51 -	mkdir -p $(prefix)/usr/share/doc/xen
   12.52 -	cp -dR ps $(prefix)/usr/share/doc/xen
   12.53 -	cp -dR pdf $(prefix)/usr/share/doc/xen
   12.54 -	cp -dR html $(prefix)/usr/share/doc/xen
   12.55 +	rm -rf $(DESTDIR)$(pkgdocdir)
   12.56 +	$(INSTALL_DIR) $(DESTDIR)$(pkgdocdir)
   12.57 +	cp -dR ps $(DESTDIR)$(pkgdocdir)
   12.58 +	cp -dR pdf $(DESTDIR)$(pkgdocdir)
   12.59 +	[ ! -d html ] || cp -dR html $(DESTDIR)$(pkgdocdir)
   12.60  
   12.61  pdf/%.pdf: ps/%.ps
   12.62 -	mkdir -p pdf ; ps2pdf $< $@
   12.63 +	$(INSTALL_DIR) $(@D)
   12.64 +	$(PS2PDF) $< $@.new
   12.65 +	mv $@.new $@
   12.66  
   12.67  ps/%.ps: %.dvi
   12.68 -	mkdir -p ps ; dvips -Ppdf -G0 -o $@ $<
   12.69 +	$(INSTALL_DIR) $(@D)
   12.70 +	$(DVIPS) -Ppdf -G0 -o $@.new $<
   12.71 +	mv $@.new $@
   12.72  
   12.73  %.dvi: src/%.tex $(GFX)
   12.74 -	latex $< >/dev/null
   12.75 -	if [ -e $*.toc ] ; then latex $< >/dev/null ; fi
   12.76 +	$(LATEX) $< >/dev/null
   12.77 +	if [ -e $*.toc ] ; then $(LATEX) $< >/dev/null ; fi
   12.78  
   12.79  %.eps: %.fig
   12.80 -	fig2dev -L eps $< $@
   12.81 -
   12.82 -%.eps: %.obj
   12.83 -	tgif -print -color -eps $<
   12.84 +	$(FIG2DEV) -L eps $< $@
   12.85  
   12.86  html/%/index.html: src/%.tex
   12.87 -	mkdir -p html/$*
   12.88 -	latex2html -split 0 -show_section_numbers -toc_depth 3 -nonavigation \
   12.89 -	-numbered_footnotes -local_icons -noinfo -math -dir html/$* \
   12.90 +	$(INSTALL_DIR) $(@D)
   12.91 +	$(LATEX2HTML) -split 0 -show_section_numbers -toc_depth 3 -nonavigation \
   12.92 +	-numbered_footnotes -local_icons -noinfo -math -dir $(@D) \
   12.93  	$< 1>/dev/null 2>/dev/null
    13.1 --- a/docs/check_pkgs	Fri Apr 01 13:01:31 2005 +0000
    13.2 +++ b/docs/check_pkgs	Tue Apr 05 11:27:50 2005 +0000
    13.3 @@ -13,10 +13,8 @@ silent_which ()
    13.4  }
    13.5  
    13.6  silent_which latex      || exit 1
    13.7 -silent_which latex2html || exit 1
    13.8  silent_which dvips      || exit 1
    13.9  silent_which ps2pdf     || exit 1
   13.10  silent_which fig2dev    || exit 1
   13.11 -silent_which tgif       || exit 1
   13.12  
   13.13  exit 0
    14.1 --- a/docs/src/interface.tex	Fri Apr 01 13:01:31 2005 +0000
    14.2 +++ b/docs/src/interface.tex	Tue Apr 05 11:27:50 2005 +0000
    14.3 @@ -601,22 +601,24 @@ documentation.
    14.4  
    14.5  \section{Mailing lists}
    14.6  
    14.7 -There are currently three official Xen mailing lists:
    14.8 +There are currently four official Xen mailing lists:
    14.9  
   14.10  \begin{description}
   14.11 -\item[xen-devel@lists.sourceforge.net] Used for development
   14.12 +\item[xen-devel@lists.xensource.com] Used for development
   14.13 +discussions and bug reports.  Subscribe at: \\
   14.14 +{\small {\tt http://lists.xensource.com/xen-devel}}
   14.15 +\item[xen-users@lists.xensource.com] Used for installation and usage
   14.16  discussions and requests for help.  Subscribe at: \\
   14.17 -{\small {\tt http://lists.sourceforge.net/mailman/listinfo/xen-devel}}
   14.18 -\item[xen-announce@lists.sourceforge.net] Used for announcements only.
   14.19 +{\small {\tt http://lists.xensource.com/xen-users}}
   14.20 +\item[xen-announce@lists.xensource.com] Used for announcements only.
   14.21  Subscribe at: \\
   14.22 -{\small {\tt http://lists.sourceforge.net/mailman/listinfo/xen-announce}}
   14.23 -\item[xen-changelog@lists.sourceforge.net]  Changelog feed
   14.24 +{\small {\tt http://lists.xensource.com/xen-announce}}
   14.25 +\item[xen-changelog@lists.xensource.com]  Changelog feed
   14.26  from the unstable and 2.0 trees - developer oriented.  Subscribe at: \\
   14.27 -{\small {\tt http://lists.sourceforge.net/mailman/listinfo/xen-changelog}}
   14.28 +{\small {\tt http://lists.xensource.com/xen-changelog}}
   14.29  \end{description}
   14.30  
   14.31 -Of these, xen-devel is the most active; it is currently used for 
   14.32 -both developer and user-related discussions. 
   14.33 +Of these, xen-devel is the most active.
   14.34  
   14.35  
   14.36  
    15.1 --- a/docs/src/user.tex	Fri Apr 01 13:01:31 2005 +0000
    15.2 +++ b/docs/src/user.tex	Tue Apr 05 11:27:50 2005 +0000
    15.3 @@ -229,7 +229,7 @@ tree.
    15.4  \item [$*$] Development installation of libcurl (e.g., libcurl-devel) 
    15.5  \item [$*$] Development installation of zlib (e.g., zlib-dev).
    15.6  \item [$*$] Development installation of Python v2.2 or later (e.g., python-dev).
    15.7 -\item [$*$] \LaTeX, transfig and tgif are required to build the documentation.
    15.8 +\item [$*$] \LaTeX and transfig are required to build the documentation.
    15.9  \end{itemize}
   15.10  
   15.11  Once you have satisfied the relevant prerequisites, you can 
   15.12 @@ -1770,7 +1770,7 @@ editing \path{grub.conf}.
   15.13   possibilities are `bvt' (default), `atropos' and `rrobin'. 
   15.14   For more information see Section~\ref{s:sched}. 
   15.15  
   15.16 -\item [pci\_dom0\_hide=(xx.xx.x)(yy.yy.y)\ldots ] 
   15.17 +\item [physdev\_dom0\_hide=(xx:xx.x)(yy:yy.y)\ldots ]
   15.18  Hide selected PCI devices from domain 0 (for instance, to stop it
   15.19  taking ownership of them so that they can be driven by another
   15.20  domain).  Device IDs should be given in hex format.  Bridge devices do
   15.21 @@ -1850,23 +1850,23 @@ documentation (including the lateset ver
   15.22  
   15.23  \section{Mailing Lists}
   15.24  
   15.25 -There are currently three official Xen mailing lists:
   15.26 +There are currently four official Xen mailing lists:
   15.27  
   15.28  \begin{description}
   15.29 -\item[xen-devel@lists.sourceforge.net] Used for development
   15.30 +\item[xen-devel@lists.xensource.com] Used for development
   15.31 +discussions and bug reports.  Subscribe at: \\
   15.32 +{\small {\tt http://lists.xensource.com/xen-devel}}
   15.33 +\item[xen-users@lists.xensource.com] Used for installation and usage
   15.34  discussions and requests for help.  Subscribe at: \\
   15.35 -\path{http://lists.sourceforge.net/mailman/listinfo/xen-devel}
   15.36 -\item[xen-announce@lists.sourceforge.net] Used for announcements only.
   15.37 +{\small {\tt http://lists.xensource.com/xen-users}}
   15.38 +\item[xen-announce@lists.xensource.com] Used for announcements only.
   15.39  Subscribe at: \\
   15.40 -\path{http://lists.sourceforge.net/mailman/listinfo/xen-announce}
   15.41 -\item[xen-changelog@lists.sourceforge.net]  Changelog feed
   15.42 +{\small {\tt http://lists.xensource.com/xen-announce}}
   15.43 +\item[xen-changelog@lists.xensource.com]  Changelog feed
   15.44  from the unstable and 2.0 trees - developer oriented.  Subscribe at: \\
   15.45 -\path{http://lists.sourceforge.net/mailman/listinfo/xen-changelog}
   15.46 +{\small {\tt http://lists.xensource.com/xen-changelog}}
   15.47  \end{description}
   15.48  
   15.49 -Although there is no specific user support list, the developers try to
   15.50 -assist users who post on xen-devel.  As the bulk of traffic on this
   15.51 -list increases, a dedicated user support list may be introduced.
   15.52  
   15.53  \appendix
   15.54  
    16.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    16.2 +++ b/freebsd-5.3-xen-sparse/conf/Makefile.i386-xen	Tue Apr 05 11:27:50 2005 +0000
    16.3 @@ -0,0 +1,51 @@
    16.4 +# Makefile.i386 -- with config changes.
    16.5 +# Copyright 1990 W. Jolitz
    16.6 +#	from: @(#)Makefile.i386	7.1 5/10/91
    16.7 +# $FreeBSD: src/sys/conf/Makefile.i386,v 1.259 2003/04/15 21:29:11 phk Exp $
    16.8 +#
    16.9 +# Makefile for FreeBSD
   16.10 +#
   16.11 +# This makefile is constructed from a machine description:
   16.12 +#	config machineid
   16.13 +# Most changes should be made in the machine description
   16.14 +#	/sys/i386/conf/``machineid''
   16.15 +# after which you should do
   16.16 +#	 config machineid
   16.17 +# Generic makefile changes should be made in
   16.18 +#	/sys/conf/Makefile.i386
   16.19 +# after which config should be rerun for all machines.
   16.20 +#
   16.21 +
   16.22 +# Which version of config(8) is required.
   16.23 +%VERSREQ=	500013
   16.24 +
   16.25 +STD8X16FONT?=	iso
   16.26 +
   16.27 +
   16.28 +
   16.29 +.if !defined(S)
   16.30 +.if exists(./@/.)
   16.31 +S=	./@
   16.32 +.else
   16.33 +S=	../../..
   16.34 +.endif
   16.35 +.endif
   16.36 +.include "$S/conf/kern.pre.mk"
   16.37 +M=	i386-xen
   16.38 +MKMODULESENV+= MACHINE=i386-xen
   16.39 +INCLUDES+= -I../../include/xen-public
   16.40 +%BEFORE_DEPEND
   16.41 +
   16.42 +%OBJS
   16.43 +
   16.44 +%FILES.c
   16.45 +
   16.46 +%FILES.s
   16.47 +
   16.48 +%FILES.m
   16.49 +
   16.50 +%CLEAN
   16.51 +
   16.52 +%RULES
   16.53 +
   16.54 +.include "$S/conf/kern.post.mk"
    17.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    17.2 +++ b/freebsd-5.3-xen-sparse/conf/files.i386-xen	Tue Apr 05 11:27:50 2005 +0000
    17.3 @@ -0,0 +1,294 @@
    17.4 +# This file tells config what files go into building a kernel,
    17.5 +# files marked standard are always included.
    17.6 +#
    17.7 +# $FreeBSD: src/sys/conf/files.i386,v 1.457 2003/12/03 23:06:30 imp Exp $
    17.8 +#
    17.9 +# The long compile-with and dependency lines are required because of
   17.10 +# limitations in config: backslash-newline doesn't work in strings, and
   17.11 +# dependency lines other than the first are silently ignored.
   17.12 +#
   17.13 +linux_genassym.o		optional	compat_linux		\
   17.14 +	dependency 	"$S/i386/linux/linux_genassym.c"		\
   17.15 +	compile-with	"${CC} ${CFLAGS:N-fno-common} -c ${.IMPSRC}"	\
   17.16 +	no-obj no-implicit-rule						\
   17.17 +	clean		"linux_genassym.o"
   17.18 +#
   17.19 +linux_assym.h			optional	compat_linux		\
   17.20 +	dependency 	"$S/kern/genassym.sh linux_genassym.o"		\
   17.21 +	compile-with	"sh $S/kern/genassym.sh linux_genassym.o > ${.TARGET}" \
   17.22 +	no-obj no-implicit-rule before-depend				\
   17.23 +	clean		"linux_assym.h"
   17.24 +#
   17.25 +svr4_genassym.o			optional	compat_svr4		\
   17.26 +	dependency 	"$S/i386/svr4/svr4_genassym.c"			\
   17.27 +	compile-with	"${CC} ${CFLAGS:N-fno-common} -c ${.IMPSRC}"	\
   17.28 +	no-obj no-implicit-rule						\
   17.29 +	clean		"svr4_genassym.o"
   17.30 +#
   17.31 +svr4_assym.h			optional	compat_svr4		\
   17.32 +	dependency 	"$S/kern/genassym.sh svr4_genassym.o"	   	\
   17.33 +	compile-with	"sh $S/kern/genassym.sh svr4_genassym.o > ${.TARGET}" \
   17.34 +	no-obj no-implicit-rule before-depend				\
   17.35 +	clean		"svr4_assym.h"
   17.36 +#
   17.37 +font.h				optional	sc_dflt_font		\
   17.38 +	compile-with	"uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x16.fnt && file2c 'static u_char dflt_font_16[16*256] = {' '};' < ${SC_DFLT_FONT}-8x16 > font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x14.fnt && file2c 'static u_char dflt_font_14[14*256] = {' '};' < ${SC_DFLT_FONT}-8x14 >> font.h && uudecode < /usr/share/syscons/fonts/${SC_DFLT_FONT}-8x8.fnt && file2c 'static u_char dflt_font_8[8*256] = {' '};' < ${SC_DFLT_FONT}-8x8 >> font.h"									\
   17.39 +	no-obj no-implicit-rule before-depend				\
   17.40 +	clean		"font.h ${SC_DFLT_FONT}-8x14 ${SC_DFLT_FONT}-8x16 ${SC_DFLT_FONT}-8x8"
   17.41 +#
   17.42 +atkbdmap.h			optional	atkbd_dflt_keymap	\
   17.43 +	compile-with	"/usr/sbin/kbdcontrol -L ${ATKBD_DFLT_KEYMAP} | sed -e 's/^static keymap_t.* = /static keymap_t key_map = /' -e 's/^static accentmap_t.* = /static accentmap_t accent_map = /' > atkbdmap.h"			\
   17.44 +	no-obj no-implicit-rule before-depend				\
   17.45 +	clean		"atkbdmap.h"
   17.46 +#
   17.47 +ukbdmap.h			optional	ukbd_dflt_keymap	\
   17.48 +	compile-with	"/usr/sbin/kbdcontrol -L ${UKBD_DFLT_KEYMAP} | sed -e 's/^static keymap_t.* = /static keymap_t key_map = /' -e 's/^static accentmap_t.* = /static accentmap_t accent_map = /' > ukbdmap.h"			\
   17.49 +	no-obj no-implicit-rule before-depend				\
   17.50 +	clean		"ukbdmap.h"
   17.51 +#
   17.52 +msysosak.o			optional	fla			\
   17.53 +	dependency	"$S/contrib/dev/fla/i386/msysosak.o.uu" 	\
   17.54 +	compile-with	"uudecode < $S/contrib/dev/fla/i386/msysosak.o.uu" \
   17.55 +	no-implicit-rule
   17.56 +#
   17.57 +trlld.o				optional	oltr			\
   17.58 +	dependency	"$S/contrib/dev/oltr/i386-elf.trlld.o.uu"	\
   17.59 +	compile-with	"uudecode < $S/contrib/dev/oltr/i386-elf.trlld.o.uu"	\
   17.60 +	no-implicit-rule
   17.61 +#
   17.62 +hal.o				optional	ath_hal			\
   17.63 +	dependency	"$S/contrib/dev/ath/freebsd/i386-elf.hal.o.uu"	\
   17.64 +	compile-with	"uudecode < $S/contrib/dev/ath/freebsd/i386-elf.hal.o.uu" \
   17.65 +	no-implicit-rule
   17.66 +#
   17.67 +#
   17.68 +compat/linux/linux_file.c	optional	compat_linux
   17.69 +compat/linux/linux_getcwd.c	optional	compat_linux
   17.70 +compat/linux/linux_ioctl.c	optional	compat_linux
   17.71 +compat/linux/linux_ipc.c	optional	compat_linux
   17.72 +compat/linux/linux_mib.c	optional	compat_linux
   17.73 +compat/linux/linux_misc.c	optional	compat_linux
   17.74 +compat/linux/linux_signal.c	optional	compat_linux
   17.75 +compat/linux/linux_socket.c	optional	compat_linux
   17.76 +compat/linux/linux_stats.c	optional	compat_linux
   17.77 +compat/linux/linux_sysctl.c	optional	compat_linux
   17.78 +compat/linux/linux_uid16.c	optional	compat_linux
   17.79 +compat/linux/linux_util.c	optional	compat_linux
   17.80 +compat/pecoff/imgact_pecoff.c		optional	pecoff_support
   17.81 +compat/svr4/imgact_svr4.c		optional	compat_svr4
   17.82 +compat/svr4/svr4_fcntl.c		optional	compat_svr4
   17.83 +compat/svr4/svr4_filio.c		optional	compat_svr4
   17.84 +compat/svr4/svr4_ioctl.c		optional	compat_svr4
   17.85 +compat/svr4/svr4_ipc.c			optional	compat_svr4
   17.86 +compat/svr4/svr4_misc.c			optional	compat_svr4
   17.87 +compat/svr4/svr4_resource.c		optional	compat_svr4
   17.88 +compat/svr4/svr4_signal.c		optional	compat_svr4
   17.89 +compat/svr4/svr4_socket.c		optional	compat_svr4
   17.90 +compat/svr4/svr4_sockio.c		optional	compat_svr4
   17.91 +compat/svr4/svr4_stat.c			optional	compat_svr4
   17.92 +compat/svr4/svr4_stream.c		optional	compat_svr4
   17.93 +compat/svr4/svr4_syscallnames.c		optional	compat_svr4
   17.94 +compat/svr4/svr4_sysent.c		optional	compat_svr4
   17.95 +compat/svr4/svr4_sysvec.c		optional	compat_svr4
   17.96 +compat/svr4/svr4_termios.c		optional	compat_svr4
   17.97 +compat/svr4/svr4_ttold.c		optional	compat_svr4
   17.98 +contrib/dev/fla/fla.c		optional	fla
   17.99 +contrib/dev/oltr/if_oltr.c	optional	oltr
  17.100 +contrib/dev/oltr/trlldbm.c	optional	oltr
  17.101 +contrib/dev/oltr/trlldhm.c	optional	oltr
  17.102 +contrib/dev/oltr/trlldmac.c	optional	oltr
  17.103 +bf_enc.o			optional	ipsec ipsec_esp		\
  17.104 +	dependency	"$S/crypto/blowfish/arch/i386/bf_enc.S $S/crypto/blowfish/arch/i386/bf_enc_586.S $S/crypto/blowfish/arch/i386/bf_enc_686.S"		\
  17.105 +	compile-with	"${CC} -c -I$S/crypto/blowfish/arch/i386 ${ASM_CFLAGS} ${WERROR} ${.IMPSRC}"	\
  17.106 +	no-implicit-rule
  17.107 +crypto/des/arch/i386/des_enc.S		optional	ipsec ipsec_esp
  17.108 +crypto/des/des_ecb.c			optional	netsmbcrypto
  17.109 +crypto/des/arch/i386/des_enc.S		optional	netsmbcrypto
  17.110 +crypto/des/des_setkey.c			optional	netsmbcrypto
  17.111 +bf_enc.o			optional	crypto		\
  17.112 +	dependency	"$S/crypto/blowfish/arch/i386/bf_enc.S $S/crypto/blowfish/arch/i386/bf_enc_586.S $S/crypto/blowfish/arch/i386/bf_enc_686.S"		\
  17.113 +	compile-with	"${CC} -c -I$S/crypto/blowfish/arch/i386 ${ASM_CFLAGS} ${WERROR} ${.IMPSRC}"	\
  17.114 +	no-implicit-rule
  17.115 +crypto/des/arch/i386/des_enc.S		optional	crypto
  17.116 +crypto/des/des_ecb.c			optional	crypto
  17.117 +crypto/des/des_setkey.c			optional	crypto
  17.118 +dev/ar/if_ar.c			optional	ar
  17.119 +dev/ar/if_ar_pci.c		optional	ar pci
  17.120 +dev/cx/csigma.c			optional	cx
  17.121 +dev/cx/cxddk.c			optional	cx
  17.122 +dev/cx/if_cx.c			optional	cx
  17.123 +dev/dgb/dgb.c			count		dgb
  17.124 +dev/fb/fb.c			optional	fb
  17.125 +dev/fb/fb.c			optional	vga
  17.126 +dev/fb/splash.c			optional	splash
  17.127 +dev/fb/vga.c			optional	vga
  17.128 +dev/kbd/atkbd.c			optional	atkbd
  17.129 +dev/kbd/atkbdc.c		optional	atkbdc
  17.130 +dev/kbd/kbd.c			optional	atkbd
  17.131 +dev/kbd/kbd.c			optional	kbd
  17.132 +dev/kbd/kbd.c			optional	sc
  17.133 +dev/kbd/kbd.c			optional	ukbd
  17.134 +dev/kbd/kbd.c			optional	vt
  17.135 +dev/mem/memutil.c		standard
  17.136 +dev/random/nehemiah.c		standard
  17.137 +dev/ppc/ppc.c			optional	ppc
  17.138 +dev/ppc/ppc_puc.c		optional	ppc puc pci
  17.139 +dev/sio/sio.c			optional	sio
  17.140 +dev/sio/sio_isa.c		optional	sio isa
  17.141 +dev/syscons/schistory.c		optional	sc
  17.142 +dev/syscons/scmouse.c		optional	sc
  17.143 +dev/syscons/scterm.c		optional	sc
  17.144 +dev/syscons/scterm-dumb.c	optional	sc
  17.145 +dev/syscons/scterm-sc.c		optional	sc
  17.146 +dev/syscons/scvesactl.c		optional	sc vga vesa
  17.147 +dev/syscons/scvgarndr.c		optional	sc vga
  17.148 +dev/syscons/scvidctl.c		optional	sc
  17.149 +dev/syscons/scvtb.c		optional	sc
  17.150 +dev/syscons/syscons.c		optional	sc
  17.151 +dev/syscons/sysmouse.c		optional	sc
  17.152 +dev/uart/uart_cpu_i386.c	optional	uart
  17.153 +geom/geom_bsd.c			standard
  17.154 +geom/geom_bsd_enc.c		standard
  17.155 +geom/geom_mbr.c			standard
  17.156 +geom/geom_mbr_enc.c		standard
  17.157 +i386/acpica/OsdEnvironment.c	optional	acpi
  17.158 +i386/acpica/acpi_machdep.c	optional	acpi
  17.159 +i386/acpica/acpi_wakeup.c	optional	acpi
  17.160 +acpi_wakecode.h			optional	acpi			\
  17.161 +	dependency 	"$S/i386/acpica/acpi_wakecode.S"		\
  17.162 +	compile-with	"${MAKE} -f $S/i386/acpica/Makefile MAKESRCPATH=$S/i386/acpica"	\
  17.163 +	no-obj no-implicit-rule before-depend				\
  17.164 +	clean		"acpi_wakecode.h acpi_wakecode.o acpi_wakecode.bin"
  17.165 +#
  17.166 +i386/acpica/madt.c		optional	acpi apic
  17.167 +i386/bios/mca_machdep.c		optional	mca
  17.168 +i386/bios/smapi.c		optional	smapi
  17.169 +i386/bios/smapi_bios.S		optional	smapi
  17.170 +i386/bios/smbios.c		optional	smbios
  17.171 +i386/bios/vpd.c			optional	vpd
  17.172 +i386/i386/apic_vector.s		optional	apic
  17.173 +i386/i386/atomic.c		standard				\
  17.174 +	compile-with	"${CC} -c ${CFLAGS} ${DEFINED_PROF:S/^$/-fomit-frame-pointer/} ${.IMPSRC}"
  17.175 +i386/i386/autoconf.c		        standard
  17.176 +i386/i386/busdma_machdep.c		standard
  17.177 +i386-xen/i386-xen/critical.c		standard
  17.178 +i386/i386/db_disasm.c			optional	ddb
  17.179 +i386-xen/i386-xen/db_interface.c	optional	ddb
  17.180 +i386/i386/db_trace.c			optional	ddb
  17.181 +i386/i386/i386-gdbstub.c		optional	ddb
  17.182 +i386/i386/dump_machdep.c		standard
  17.183 +i386/i386/elf_machdep.c	standard
  17.184 +i386-xen/i386-xen/exception.s		standard
  17.185 +i386-xen/i386-xen/i686_mem.c		standard
  17.186 +i386/i386/identcpu.c			standard
  17.187 +i386/i386/in_cksum.c			optional	inet
  17.188 +i386-xen/i386-xen/initcpu.c		standard
  17.189 +i386-xen/i386-xen/intr_machdep.c	standard
  17.190 +i386-xen/i386-xen/io_apic.c           optional        apic
  17.191 +i386/i386/legacy.c			standard
  17.192 +i386-xen/i386-xen/locore.s		standard	no-obj
  17.193 +i386-xen/i386-xen/machdep.c		standard
  17.194 +i386/i386/mem.c		                standard
  17.195 +i386-xen/i386-xen/mp_clock.c		optional	smp
  17.196 +i386-xen/i386-xen/mp_machdep.c	optional	smp
  17.197 +i386/i386/mpboot.s		optional	smp
  17.198 +i386-xen/i386-xen/mptable.c	optional	apic
  17.199 +i386-xen/i386-xen/local_apic.c	optional	apic
  17.200 +i386/i386/mptable_pci.c		optional	apic pci
  17.201 +i386/i386/nexus.c	        standard
  17.202 +i386/i386/uio_machdep.c	        standard
  17.203 +i386/i386/perfmon.c		optional	perfmon
  17.204 +i386/i386/perfmon.c		optional	perfmon	profiling-routine
  17.205 +i386-xen/i386-xen/pmap.c	standard
  17.206 +i386-xen/i386-xen/support.s	standard
  17.207 +i386-xen/i386-xen/swtch.s	standard
  17.208 +i386-xen/i386-xen/sys_machdep.c		standard
  17.209 +i386-xen/i386-xen/trap.c	standard
  17.210 +i386/i386/tsc.c			standard
  17.211 +i386-xen/i386-xen/vm_machdep.c		standard
  17.212 +i386-xen/i386-xen/clock.c	standard
  17.213 +
  17.214 +# xen specific arch-dep files
  17.215 +i386-xen/i386-xen/hypervisor.c	standard
  17.216 +i386-xen/i386-xen/xen_machdep.c	standard
  17.217 +i386-xen/i386-xen/xen_bus.c		standard
  17.218 +i386-xen/i386-xen/evtchn.c		standard
  17.219 +i386-xen/i386-xen/ctrl_if.c		standard
  17.220 +
  17.221 +
  17.222 +i386/isa/asc.c			count		asc
  17.223 +i386/isa/ctx.c			optional	ctx
  17.224 +i386/isa/cy.c			count		cy
  17.225 +i386/isa/elink.c		optional	ep
  17.226 +i386/isa/elink.c		optional	ie
  17.227 +i386/isa/gpib.c			optional	gp
  17.228 +i386/isa/gsc.c			count		gsc
  17.229 +i386/isa/istallion.c		optional	stli nowerror
  17.230 +i386/isa/loran.c		optional	loran
  17.231 +i386/isa/mse.c			optional	mse
  17.232 +i386/isa/nmi.c			standard
  17.233 +
  17.234 +# drivers
  17.235 +i386-xen/xen/misc/npx.c	optional	npx
  17.236 +i386-xen/xen/misc/evtchn_dev.c	standard
  17.237 +i386-xen/xen/char/console.c	standard
  17.238 +i386-xen/xen/netfront/xn_netfront.c	standard
  17.239 +i386-xen/xen/blkfront/xb_blkfront.c	standard
  17.240 +
  17.241 +
  17.242 +
  17.243 +i386/isa/pcf.c			optional	pcf
  17.244 +i386/isa/pcvt/pcvt_drv.c	optional	vt
  17.245 +i386/isa/pcvt/pcvt_ext.c	optional	vt
  17.246 +i386/isa/pcvt/pcvt_kbd.c	optional	vt
  17.247 +i386/isa/pcvt/pcvt_out.c	optional	vt
  17.248 +i386/isa/pcvt/pcvt_sup.c	optional	vt
  17.249 +i386/isa/pcvt/pcvt_vtf.c	optional	vt
  17.250 +i386/isa/pmtimer.c		optional	pmtimer
  17.251 +i386/isa/prof_machdep.c		optional	profiling-routine
  17.252 +i386/isa/spic.c			optional	spic
  17.253 +i386/isa/spigot.c		count		spigot
  17.254 +i386/isa/spkr.c			optional	speaker
  17.255 +i386/isa/stallion.c		optional	stl nowerror
  17.256 +i386/isa/vesa.c			optional	vga vesa
  17.257 +i386/isa/wt.c			count		wt
  17.258 +i386/linux/imgact_linux.c	optional	compat_linux
  17.259 +i386/linux/linux_dummy.c	optional	compat_linux
  17.260 +i386/linux/linux_locore.s	optional	compat_linux		\
  17.261 +	dependency 	"linux_assym.h"
  17.262 +i386/linux/linux_machdep.c	optional	compat_linux
  17.263 +i386/linux/linux_ptrace.c	optional	compat_linux
  17.264 +i386/linux/linux_sysent.c	optional	compat_linux
  17.265 +i386/linux/linux_sysvec.c	optional	compat_linux
  17.266 +i386/pci/pci_cfgreg.c		optional	pci
  17.267 +i386/pci/pci_bus.c		optional	pci
  17.268 +i386/svr4/svr4_locore.s		optional	compat_svr4		\
  17.269 +	dependency	"svr4_assym.h"	\
  17.270 +	warning "COMPAT_SVR4 is broken and should be avoided"
  17.271 +i386/svr4/svr4_machdep.c	optional	compat_svr4
  17.272 +isa/atkbd_isa.c			optional	atkbd
  17.273 +isa/atkbdc_isa.c		optional	atkbdc
  17.274 +isa/fd.c			optional	fdc
  17.275 +isa/psm.c			optional	psm
  17.276 +isa/syscons_isa.c		optional	sc
  17.277 +isa/vga_isa.c			optional	vga
  17.278 +kern/imgact_aout.c		optional	compat_aout
  17.279 +kern/imgact_gzip.c		optional	gzip
  17.280 +libkern/divdi3.c		standard
  17.281 +libkern/moddi3.c		standard
  17.282 +libkern/qdivrem.c		standard
  17.283 +libkern/ucmpdi2.c		standard
  17.284 +libkern/udivdi3.c		standard
  17.285 +libkern/umoddi3.c		standard
  17.286 +libkern/flsl.c			standard
  17.287 +libkern/ffsl.c			standard
  17.288 +
  17.289 +pci/cy_pci.c			optional	cy pci
  17.290 +pci/agp_intel.c			optional	agp
  17.291 +pci/agp_via.c			optional	agp
  17.292 +pci/agp_sis.c			optional	agp
  17.293 +pci/agp_ali.c			optional	agp
  17.294 +pci/agp_amd.c			optional	agp
  17.295 +pci/agp_i810.c			optional	agp
  17.296 +pci/agp_nvidia.c		optional	agp
  17.297 +
    18.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    18.2 +++ b/freebsd-5.3-xen-sparse/conf/ldscript.i386-xen	Tue Apr 05 11:27:50 2005 +0000
    18.3 @@ -0,0 +1,134 @@
    18.4 +/* $FreeBSD: src/sys/conf/ldscript.i386,v 1.9 2003/12/03 07:40:03 phk Exp $ */
    18.5 +OUTPUT_FORMAT("elf32-i386-freebsd", "elf32-i386-freebsd", "elf32-i386-freebsd")
    18.6 +OUTPUT_ARCH(i386)
    18.7 +ENTRY(btext)
    18.8 +SEARCH_DIR(/usr/lib);
    18.9 +SECTIONS
   18.10 +{
   18.11 +  /* Read-only sections, merged into text segment: */
   18.12 +  . = kernbase + SIZEOF_HEADERS;
   18.13 +  .interp     : { *(.interp) 	}
   18.14 +  .hash          : { *(.hash)		}
   18.15 +  .dynsym        : { *(.dynsym)		}
   18.16 +  .dynstr        : { *(.dynstr)		}
   18.17 +  .gnu.version   : { *(.gnu.version)	}
   18.18 +  .gnu.version_d   : { *(.gnu.version_d)	}
   18.19 +  .gnu.version_r   : { *(.gnu.version_r)	}
   18.20 +  .rel.text      :
   18.21 +    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
   18.22 +  .rela.text     :
   18.23 +    { *(.rela.text) *(.rela.gnu.linkonce.t*) }
   18.24 +  .rel.data      :
   18.25 +    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
   18.26 +  .rela.data     :
   18.27 +    { *(.rela.data) *(.rela.gnu.linkonce.d*) }
   18.28 +  .rel.rodata    :
   18.29 +    { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
   18.30 +  .rela.rodata   :
   18.31 +    { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
   18.32 +  .rel.got       : { *(.rel.got)		}
   18.33 +  .rela.got      : { *(.rela.got)		}
   18.34 +  .rel.ctors     : { *(.rel.ctors)	}
   18.35 +  .rela.ctors    : { *(.rela.ctors)	}
   18.36 +  .rel.dtors     : { *(.rel.dtors)	}
   18.37 +  .rela.dtors    : { *(.rela.dtors)	}
   18.38 +  .rel.init      : { *(.rel.init)	}
   18.39 +  .rela.init     : { *(.rela.init)	}
   18.40 +  .rel.fini      : { *(.rel.fini)	}
   18.41 +  .rela.fini     : { *(.rela.fini)	}
   18.42 +  .rel.bss       : { *(.rel.bss)		}
   18.43 +  .rela.bss      : { *(.rela.bss)		}
   18.44 +  .rel.plt       : { *(.rel.plt)		}
   18.45 +  .rela.plt      : { *(.rela.plt)		}
   18.46 +  .init          : { *(.init)	} =0x9090
   18.47 +  .plt      : { *(.plt)	}
   18.48 +  .text      :
   18.49 +  {
   18.50 +    *(.text)
   18.51 +    *(.stub)
   18.52 +    /* .gnu.warning sections are handled specially by elf32.em.  */
   18.53 +    *(.gnu.warning)
   18.54 +    *(.gnu.linkonce.t*)
   18.55 +  } =0x9090
   18.56 +  _etext = .;
   18.57 +  PROVIDE (etext = .);
   18.58 +  .fini      : { *(.fini)    } =0x9090
   18.59 +  .rodata    : { *(.rodata) *(.gnu.linkonce.r*) }
   18.60 +  .rodata1   : { *(.rodata1) }
   18.61 +  /* Adjust the address for the data segment.  We want to adjust up to
   18.62 +     the same address within the page on the next page up.  */
   18.63 +  . = ALIGN(0x1000) + (. & (0x1000 - 1)) ; 
   18.64 +  .data    :
   18.65 +  {
   18.66 +    *(.data)
   18.67 +    *(.gnu.linkonce.d*)
   18.68 +    CONSTRUCTORS
   18.69 +  }
   18.70 +  .data1   : { *(.data1) }
   18.71 +  . = ALIGN(32 / 8);
   18.72 +  _start_ctors = .;
   18.73 +  PROVIDE (start_ctors = .);
   18.74 +  .ctors         :
   18.75 +  {
   18.76 +    *(.ctors)
   18.77 +  }
   18.78 +  _stop_ctors = .;
   18.79 +  PROVIDE (stop_ctors = .);
   18.80 +  .dtors         :
   18.81 +  {
   18.82 +    *(.dtors)
   18.83 +  }
   18.84 +  .got           : { *(.got.plt) *(.got) }
   18.85 +  .dynamic       : { *(.dynamic) }
   18.86 +  /* We want the small data sections together, so single-instruction offsets
   18.87 +     can access them all, and initialized data all before uninitialized, so
   18.88 +     we can shorten the on-disk segment size.  */
   18.89 +  .sdata     : { *(.sdata) }
   18.90 +  _edata  =  .;
   18.91 +  PROVIDE (edata = .);
   18.92 +  __bss_start = .;
   18.93 +  .sbss      : { *(.sbss) *(.scommon) }
   18.94 +  .bss       :
   18.95 +  {
   18.96 +   *(.dynbss)
   18.97 +   *(.bss)
   18.98 +   *(COMMON)
   18.99 +  }
  18.100 +  . = ALIGN(32 / 8);
  18.101 +  _end = . ;
  18.102 +  PROVIDE (end = .);
  18.103 +  /* Stabs debugging sections.  */
  18.104 +  .stab 0 : { *(.stab) }
  18.105 +  .stabstr 0 : { *(.stabstr) }
  18.106 +  .stab.excl 0 : { *(.stab.excl) }
  18.107 +  .stab.exclstr 0 : { *(.stab.exclstr) }
  18.108 +  .stab.index 0 : { *(.stab.index) }
  18.109 +  .stab.indexstr 0 : { *(.stab.indexstr) }
  18.110 +  .comment 0 : { *(.comment) }
  18.111 +  /* DWARF debug sections.
  18.112 +     Symbols in the DWARF debugging sections are relative to the beginning
  18.113 +     of the section so we begin them at 0.  */
  18.114 +  /* DWARF 1 */
  18.115 +  .debug          0 : { *(.debug) }
  18.116 +  .line           0 : { *(.line) }
  18.117 +  /* GNU DWARF 1 extensions */
  18.118 +  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  18.119 +  .debug_sfnames  0 : { *(.debug_sfnames) }
  18.120 +  /* DWARF 1.1 and DWARF 2 */
  18.121 +  .debug_aranges  0 : { *(.debug_aranges) }
  18.122 +  .debug_pubnames 0 : { *(.debug_pubnames) }
  18.123 +  /* DWARF 2 */
  18.124 +  .debug_info     0 : { *(.debug_info) }
  18.125 +  .debug_abbrev   0 : { *(.debug_abbrev) }
  18.126 +  .debug_line     0 : { *(.debug_line) }
  18.127 +  .debug_frame    0 : { *(.debug_frame) }
  18.128 +  .debug_str      0 : { *(.debug_str) }
  18.129 +  .debug_loc      0 : { *(.debug_loc) }
  18.130 +  .debug_macinfo  0 : { *(.debug_macinfo) }
  18.131 +  /* SGI/MIPS DWARF 2 extensions */
  18.132 +  .debug_weaknames 0 : { *(.debug_weaknames) }
  18.133 +  .debug_funcnames 0 : { *(.debug_funcnames) }
  18.134 +  .debug_typenames 0 : { *(.debug_typenames) }
  18.135 +  .debug_varnames  0 : { *(.debug_varnames) }
  18.136 +  /* These must appear regardless of  .  */
  18.137 +}
    19.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    19.2 +++ b/freebsd-5.3-xen-sparse/conf/options.i386-xen	Tue Apr 05 11:27:50 2005 +0000
    19.3 @@ -0,0 +1,162 @@
    19.4 +# $FreeBSD: src/sys/conf/options.i386,v 1.204 2003/12/03 23:06:30 imp Exp $
    19.5 +# Options specific to the i386 platform kernels
    19.6 +
    19.7 +AUTO_EOI_1		opt_auto_eoi.h
    19.8 +AUTO_EOI_2		opt_auto_eoi.h
    19.9 +BROKEN_KEYBOARD_RESET	opt_reset.h
   19.10 +COMPAT_OLDISA
   19.11 +I586_PMC_GUPROF		opt_i586_guprof.h
   19.12 +MAXMEM
   19.13 +MPTABLE_FORCE_HTT
   19.14 +NO_MIXED_MODE
   19.15 +PERFMON
   19.16 +DISABLE_PSE		opt_pmap.h
   19.17 +DISABLE_PG_G		opt_pmap.h
   19.18 +PMAP_SHPGPERPROC	opt_pmap.h
   19.19 +PPC_PROBE_CHIPSET	opt_ppc.h
   19.20 +PPC_DEBUG		opt_ppc.h
   19.21 +POWERFAIL_NMI		opt_trap.h
   19.22 +MP_WATCHDOG             opt_mp_watchdog.h
   19.23 +
   19.24 +
   19.25 +
   19.26 +# Options for emulators.  These should only be used at config time, so
   19.27 +# they are handled like options for static filesystems
   19.28 +# (see src/sys/conf/options), except for broken debugging options.
   19.29 +COMPAT_AOUT		opt_dontuse.h
   19.30 +IBCS2			opt_dontuse.h
   19.31 +COMPAT_LINUX		opt_dontuse.h
   19.32 +COMPAT_SVR4		opt_dontuse.h
   19.33 +DEBUG_SVR4		opt_svr4.h
   19.34 +PECOFF_SUPPORT		opt_dontuse.h
   19.35 +PECOFF_DEBUG		opt_pecoff.h
   19.36 +
   19.37 +# Change KVM size.  Changes things all over the kernel.
   19.38 +KVA_PAGES		opt_global.h
   19.39 +XEN			opt_global.h
   19.40 +XENDEV			opt_xen.h
   19.41 +NOXENDEBUG		opt_xen.h
   19.42 +# Physical address extensions and support for >4G ram.  As above.
   19.43 +PAE			opt_global.h
   19.44 +
   19.45 +CLK_CALIBRATION_LOOP		opt_clock.h
   19.46 +CLK_USE_I8254_CALIBRATION	opt_clock.h
   19.47 +CLK_USE_TSC_CALIBRATION		opt_clock.h
   19.48 +TIMER_FREQ			opt_clock.h
   19.49 +
   19.50 +CPU_ATHLON_SSE_HACK		opt_cpu.h
   19.51 +CPU_BLUELIGHTNING_3X		opt_cpu.h
   19.52 +CPU_BLUELIGHTNING_FPU_OP_CACHE	opt_cpu.h
   19.53 +CPU_BTB_EN			opt_cpu.h
   19.54 +CPU_CYRIX_NO_LOCK		opt_cpu.h
   19.55 +CPU_DIRECT_MAPPED_CACHE		opt_cpu.h
   19.56 +CPU_DISABLE_5X86_LSSER		opt_cpu.h
   19.57 +CPU_DISABLE_CMPXCHG		opt_global.h	# XXX global, unlike other CPU_*
   19.58 +CPU_DISABLE_SSE			opt_cpu.h
   19.59 +CPU_ELAN			opt_cpu.h
   19.60 +CPU_ELAN_XTAL			opt_cpu.h
   19.61 +CPU_ELAN_PPS			opt_cpu.h
   19.62 +CPU_ENABLE_SSE			opt_cpu.h
   19.63 +CPU_FASTER_5X86_FPU		opt_cpu.h
   19.64 +CPU_GEODE			opt_cpu.h
   19.65 +CPU_I486_ON_386			opt_cpu.h
   19.66 +CPU_IORT			opt_cpu.h
   19.67 +CPU_L2_LATENCY			opt_cpu.h
   19.68 +CPU_LOOP_EN			opt_cpu.h
   19.69 +CPU_PPRO2CELERON		opt_cpu.h
   19.70 +CPU_RSTK_EN			opt_cpu.h
   19.71 +CPU_SOEKRIS			opt_cpu.h
   19.72 +CPU_SUSP_HLT			opt_cpu.h
   19.73 +CPU_UPGRADE_HW_CACHE		opt_cpu.h
   19.74 +CPU_WT_ALLOC			opt_cpu.h
   19.75 +CYRIX_CACHE_REALLY_WORKS	opt_cpu.h
   19.76 +CYRIX_CACHE_WORKS		opt_cpu.h
   19.77 +NO_F00F_HACK			opt_cpu.h
   19.78 +NO_MEMORY_HOLE			opt_cpu.h
   19.79 +
   19.80 +# The CPU type affects the endian conversion functions all over the kernel.
   19.81 +I386_CPU		opt_global.h
   19.82 +I486_CPU		opt_global.h
   19.83 +I586_CPU		opt_global.h
   19.84 +I686_CPU		opt_global.h
   19.85 +
   19.86 +VGA_ALT_SEQACCESS	opt_vga.h
   19.87 +VGA_DEBUG		opt_vga.h
   19.88 +VGA_NO_FONT_LOADING	opt_vga.h
   19.89 +VGA_NO_MODE_CHANGE	opt_vga.h
   19.90 +VGA_SLOW_IOACCESS	opt_vga.h
   19.91 +VGA_WIDTH90		opt_vga.h
   19.92 +
   19.93 +VESA
   19.94 +VESA_DEBUG		opt_vesa.h
   19.95 +
   19.96 +PSM_HOOKRESUME		opt_psm.h
   19.97 +PSM_RESETAFTERSUSPEND	opt_psm.h
   19.98 +PSM_DEBUG		opt_psm.h
   19.99 +
  19.100 +ATKBD_DFLT_KEYMAP	opt_atkbd.h
  19.101 +
  19.102 +# pcvt(4) has a bunch of options
  19.103 +FAT_CURSOR		opt_pcvt.h
  19.104 +XSERVER			opt_pcvt.h
  19.105 +PCVT_24LINESDEF		opt_pcvt.h
  19.106 +PCVT_CTRL_ALT_DEL	opt_pcvt.h
  19.107 +PCVT_META_ESC		opt_pcvt.h
  19.108 +PCVT_NSCREENS		opt_pcvt.h
  19.109 +PCVT_PRETTYSCRNS	opt_pcvt.h
  19.110 +PCVT_SCANSET		opt_pcvt.h
  19.111 +PCVT_SCREENSAVER	opt_pcvt.h
  19.112 +PCVT_USEKBDSEC		opt_pcvt.h
  19.113 +PCVT_VT220KEYB		opt_pcvt.h
  19.114 +PCVT_GREENSAVER		opt_pcvt.h
  19.115 +
  19.116 +# Video spigot
  19.117 +SPIGOT_UNSECURE		opt_spigot.h
  19.118 +
  19.119 +# Enables NETGRAPH support for Cronyx adapters
  19.120 +NETGRAPH_CRONYX		opt_ng_cronyx.h
  19.121 +
  19.122 +# -------------------------------
  19.123 +# isdn4bsd: passive ISA cards
  19.124 +# -------------------------------
  19.125 +TEL_S0_8		opt_i4b.h
  19.126 +TEL_S0_16		opt_i4b.h
  19.127 +TEL_S0_16_3		opt_i4b.h
  19.128 +AVM_A1			opt_i4b.h
  19.129 +USR_STI			opt_i4b.h
  19.130 +ITKIX1			opt_i4b.h
  19.131 +ELSA_PCC16		opt_i4b.h
  19.132 +# -------------------------------
  19.133 +# isdn4bsd: passive ISA PnP cards
  19.134 +# -------------------------------
  19.135 +CRTX_S0_P		opt_i4b.h
  19.136 +DRN_NGO                 opt_i4b.h
  19.137 +TEL_S0_16_3_P		opt_i4b.h
  19.138 +SEDLBAUER		opt_i4b.h
  19.139 +DYNALINK		opt_i4b.h
  19.140 +ASUSCOM_IPAC		opt_i4b.h
  19.141 +ELSA_QS1ISA		opt_i4b.h
  19.142 +SIEMENS_ISURF2		opt_i4b.h
  19.143 +EICON_DIVA		opt_i4b.h
  19.144 +COMPAQ_M610		opt_i4b.h
  19.145 +# -------------------------------
  19.146 +# isdn4bsd: passive PCI cards
  19.147 +# -------------------------------
  19.148 +ELSA_QS1PCI		opt_i4b.h
  19.149 +# -------------------------------
  19.150 +# isdn4bsd: misc options
  19.151 +# -------------------------------
  19.152 +# temporary workaround for SMP machines
  19.153 +I4B_SMP_WORKAROUND      opt_i4b.h
  19.154 +# enable VJ compression code for ipr i/f
  19.155 +IPR_VJ			opt_i4b.h
  19.156 +IPR_LOG			opt_i4b.h
  19.157 +
  19.158 +# Device options
  19.159 +DEV_ACPI		opt_acpi.h
  19.160 +DEV_APIC		opt_apic.h
  19.161 +DEV_NPX			opt_npx.h
  19.162 +
  19.163 +# -------------------------------
  19.164 +# EOF
  19.165 +# -------------------------------
    20.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    20.2 +++ b/freebsd-5.3-xen-sparse/fbsdxensetup	Tue Apr 05 11:27:50 2005 +0000
    20.3 @@ -0,0 +1,39 @@
    20.4 +#!/bin/csh -f
    20.5 +
    20.6 +setenv XENROOT `bk root`
    20.7 +rm -rf $XENROOT/fbsdtmp $XENROOT/freebsd-5.3-xenU
    20.8 +mkdir -p $XENROOT/fbsdtmp
    20.9 +cd $XENROOT/fbsdtmp
   20.10 +echo "step 1"
   20.11 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.aa
   20.12 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.ab
   20.13 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.ac
   20.14 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.ad
   20.15 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.ae
   20.16 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.af
   20.17 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.ag
   20.18 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.ah
   20.19 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.ai
   20.20 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.aj
   20.21 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.ak
   20.22 +wget ftp://ftp.freebsd.org/pub/FreeBSD/releases/i386/5.3-RELEASE/src/ssys.al
   20.23 +mkdir -p foo
   20.24 +cat ssys.?? | tar --unlink -xpzf - -C foo/
   20.25 +mkdir -p $XENROOT/freebsd-5.3-xenU
   20.26 +mv foo/sys/* $XENROOT/freebsd-5.3-xenU
   20.27 +cd $XENROOT
   20.28 +rm -rf $XENROOT/fbsdtmp
   20.29 +echo "step 2"
   20.30 +mkdir -p $XENROOT/freebsd-5.3-xenU/i386-xen/include
   20.31 +cd $XENROOT/freebsd-5.3-xenU/i386-xen/include/
   20.32 +foreach file (../../i386/include/*)
   20.33 +	ln -s $file
   20.34 +end 
   20.35 +echo "step 3"
   20.36 +cd $XENROOT/freebsd-5.3-xen-sparse
   20.37 +echo "step 4"
   20.38 +./mkbuildtree ../freebsd-5.3-xenU
   20.39 +echo "step 5"
   20.40 +cd $XENROOT/freebsd-5.3-xenU/i386-xen/include
   20.41 +ln -s $XENROOT/xen/include/public xen-public
   20.42 +echo "done"
    21.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    21.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/Makefile	Tue Apr 05 11:27:50 2005 +0000
    21.3 @@ -0,0 +1,40 @@
    21.4 +# $FreeBSD: src/sys/i386/Makefile,v 1.11 2002/06/21 06:18:02 mckusick Exp $
    21.5 +#	@(#)Makefile	8.1 (Berkeley) 6/11/93
    21.6 +
    21.7 +# Makefile for i386 links, tags file
    21.8 +
    21.9 +# SYS is normally set in Make.tags.inc
   21.10 +# SYS=/sys
   21.11 +SYS=/nsys
   21.12 +
   21.13 +TAGDIR=	i386
   21.14 +
   21.15 +.include "../kern/Make.tags.inc"
   21.16 +
   21.17 +all:
   21.18 +	@echo "make links or tags only"
   21.19 +
   21.20 +# Directories in which to place i386 tags links
   21.21 +DI386=	apm i386 ibcs2 include isa linux
   21.22 +
   21.23 +links::
   21.24 +	-for i in ${COMMDIR1}; do \
   21.25 +	    (cd $$i && { rm -f tags; ln -s ../${TAGDIR}/tags tags; }) done
   21.26 +	-for i in ${COMMDIR2}; do \
   21.27 +	    (cd $$i && { rm -f tags; ln -s ../../${TAGDIR}/tags tags; }) done
   21.28 +	-for i in ${DI386}; do \
   21.29 +	    (cd $$i && { rm -f tags; ln -s ../tags tags; }) done
   21.30 +
   21.31 +SI386=	${SYS}/i386/apm/*.[ch] \
   21.32 +	${SYS}/i386/i386/*.[ch] ${SYS}/i386/ibcs2/*.[ch] \
   21.33 +	${SYS}/i386/include/*.[ch] ${SYS}/i386/isa/*.[ch] \
   21.34 +	${SYS}/i386/linux/*.[ch]
   21.35 +AI386=	${SYS}/i386/i386/*.s
   21.36 +
   21.37 +tags::
   21.38 +	-ctags -wdt ${COMM} ${SI386}
   21.39 +	egrep "^ENTRY(.*)|^ALTENTRY(.*)" ${AI386} | \
   21.40 +	    sed "s;\([^:]*\):\([^(]*\)(\([^, )]*\)\(.*\);\3 \1 /^\2(\3\4$$/;" \
   21.41 +		>> tags
   21.42 +	sort -o tags tags
   21.43 +	chmod 444 tags
    22.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    22.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/compile/.cvsignore	Tue Apr 05 11:27:50 2005 +0000
    22.3 @@ -0,0 +1,1 @@
    22.4 +[A-Za-z0-9]*
    23.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    23.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/conf/GENERIC	Tue Apr 05 11:27:50 2005 +0000
    23.3 @@ -0,0 +1,273 @@
    23.4 +#
    23.5 +# GENERIC -- Generic kernel configuration file for FreeBSD/i386
    23.6 +#
    23.7 +# For more information on this file, please read the handbook section on
    23.8 +# Kernel Configuration Files:
    23.9 +#
   23.10 +#    http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
   23.11 +#
   23.12 +# The handbook is also available locally in /usr/share/doc/handbook
   23.13 +# if you've installed the doc distribution, otherwise always see the
   23.14 +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
   23.15 +# latest information.
   23.16 +#
   23.17 +# An exhaustive list of options and more detailed explanations of the
   23.18 +# device lines is also present in the ../../conf/NOTES and NOTES files. 
   23.19 +# If you are in doubt as to the purpose or necessity of a line, check first 
   23.20 +# in NOTES.
   23.21 +#
   23.22 +# $FreeBSD: src/sys/i386/conf/GENERIC,v 1.394.2.3 2004/01/26 19:42:11 nectar Exp $
   23.23 +
   23.24 +machine		i386
   23.25 +cpu		I486_CPU
   23.26 +cpu		I586_CPU
   23.27 +cpu		I686_CPU
   23.28 +ident		GENERIC
   23.29 +
   23.30 +#To statically compile in device wiring instead of /boot/device.hints
   23.31 +#hints		"GENERIC.hints"		#Default places to look for devices.
   23.32 +
   23.33 +#makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
   23.34 +
   23.35 +options 	SCHED_4BSD		#4BSD scheduler
   23.36 +options 	INET			#InterNETworking
   23.37 +options 	INET6			#IPv6 communications protocols
   23.38 +options 	FFS			#Berkeley Fast Filesystem
   23.39 +options 	SOFTUPDATES		#Enable FFS soft updates support
   23.40 +options 	UFS_ACL			#Support for access control lists
   23.41 +options 	UFS_DIRHASH		#Improve performance on big directories
   23.42 +options 	MD_ROOT			#MD is a potential root device
   23.43 +options 	NFSCLIENT		#Network Filesystem Client
   23.44 +options 	NFSSERVER		#Network Filesystem Server
   23.45 +options 	NFS_ROOT		#NFS usable as /, requires NFSCLIENT
   23.46 +options 	MSDOSFS			#MSDOS Filesystem
   23.47 +options 	CD9660			#ISO 9660 Filesystem
   23.48 +options 	PROCFS			#Process filesystem (requires PSEUDOFS)
   23.49 +options 	PSEUDOFS		#Pseudo-filesystem framework
   23.50 +options 	COMPAT_43		#Compatible with BSD 4.3 [KEEP THIS!]
   23.51 +options 	COMPAT_FREEBSD4		#Compatible with FreeBSD4
   23.52 +options 	SCSI_DELAY=15000	#Delay (in ms) before probing SCSI
   23.53 +options 	KTRACE			#ktrace(1) support
   23.54 +options 	SYSVSHM			#SYSV-style shared memory
   23.55 +options 	SYSVMSG			#SYSV-style message queues
   23.56 +options 	SYSVSEM			#SYSV-style semaphores
   23.57 +options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
   23.58 +options 	KBD_INSTALL_CDEV	# install a CDEV entry in /dev
   23.59 +options 	AHC_REG_PRETTY_PRINT	# Print register bitfields in debug
   23.60 +					# output.  Adds ~128k to driver.
   23.61 +options 	AHD_REG_PRETTY_PRINT	# Print register bitfields in debug
   23.62 +					# output.  Adds ~215k to driver.
   23.63 +options 	PFIL_HOOKS		# pfil(9) framework
   23.64 +
   23.65 +# Debugging for use in -current
   23.66 +#options 	DDB			#Enable the kernel debugger
   23.67 +#options 	INVARIANTS		#Enable calls of extra sanity checking
   23.68 +options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
   23.69 +#options 	WITNESS			#Enable checks to detect deadlocks and cycles
   23.70 +#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
   23.71 +
   23.72 +# To make an SMP kernel, the next two are needed
   23.73 +options 	SMP			# Symmetric MultiProcessor Kernel
   23.74 +device		apic			# I/O APIC
   23.75 +
   23.76 +device		isa
   23.77 +device		eisa
   23.78 +device		pci
   23.79 +
   23.80 +# Floppy drives
   23.81 +device		fdc
   23.82 +
   23.83 +# ATA and ATAPI devices
   23.84 +device		ata
   23.85 +device		atadisk			# ATA disk drives
   23.86 +device		ataraid			# ATA RAID drives
   23.87 +device		atapicd			# ATAPI CDROM drives
   23.88 +device		atapifd			# ATAPI floppy drives
   23.89 +device		atapist			# ATAPI tape drives
   23.90 +options 	ATA_STATIC_ID		#Static device numbering
   23.91 +
   23.92 +# SCSI Controllers
   23.93 +device		ahb		# EISA AHA1742 family
   23.94 +device		ahc		# AHA2940 and onboard AIC7xxx devices
   23.95 +device		ahd		# AHA39320/29320 and onboard AIC79xx devices
   23.96 +device		amd		# AMD 53C974 (Tekram DC-390(T))
   23.97 +device		isp		# Qlogic family
   23.98 +device		mpt		# LSI-Logic MPT-Fusion
   23.99 +#device		ncr		# NCR/Symbios Logic
  23.100 +device		sym		# NCR/Symbios Logic (newer chipsets + those of `ncr')
  23.101 +device		trm		# Tekram DC395U/UW/F DC315U adapters
  23.102 +
  23.103 +device		adv		# Advansys SCSI adapters
  23.104 +device		adw		# Advansys wide SCSI adapters
  23.105 +device		aha		# Adaptec 154x SCSI adapters
  23.106 +device		aic		# Adaptec 15[012]x SCSI adapters, AIC-6[23]60.
  23.107 +device		bt		# Buslogic/Mylex MultiMaster SCSI adapters
  23.108 +
  23.109 +device		ncv		# NCR 53C500
  23.110 +device		nsp		# Workbit Ninja SCSI-3
  23.111 +device		stg		# TMC 18C30/18C50
  23.112 +
  23.113 +# SCSI peripherals
  23.114 +device		scbus		# SCSI bus (required for SCSI)
  23.115 +device		ch		# SCSI media changers
  23.116 +device		da		# Direct Access (disks)
  23.117 +device		sa		# Sequential Access (tape etc)
  23.118 +device		cd		# CD
  23.119 +device		pass		# Passthrough device (direct SCSI access)
  23.120 +device		ses		# SCSI Environmental Services (and SAF-TE)
  23.121 +
  23.122 +# RAID controllers interfaced to the SCSI subsystem
  23.123 +device		amr		# AMI MegaRAID
  23.124 +device		asr		# DPT SmartRAID V, VI and Adaptec SCSI RAID
  23.125 +device		ciss		# Compaq Smart RAID 5*
  23.126 +device		dpt		# DPT Smartcache III, IV - See NOTES for options
  23.127 +device		iir		# Intel Integrated RAID
  23.128 +device		ips		# IBM (Adaptec) ServeRAID
  23.129 +device		mly		# Mylex AcceleRAID/eXtremeRAID
  23.130 +
  23.131 +# RAID controllers
  23.132 +device		aac		# Adaptec FSA RAID
  23.133 +device		aacp		# SCSI passthrough for aac (requires CAM)
  23.134 +device		ida		# Compaq Smart RAID
  23.135 +device		mlx		# Mylex DAC960 family
  23.136 +device		pst		# Promise Supertrak SX6000
  23.137 +device		twe		# 3ware ATA RAID
  23.138 +
  23.139 +# atkbdc0 controls both the keyboard and the PS/2 mouse
  23.140 +device		atkbdc		# AT keyboard controller
  23.141 +device		atkbd		# AT keyboard
  23.142 +device		psm		# PS/2 mouse
  23.143 +
  23.144 +device		vga		# VGA video card driver
  23.145 +
  23.146 +device		splash		# Splash screen and screen saver support
  23.147 +
  23.148 +# syscons is the default console driver, resembling an SCO console
  23.149 +device		sc
  23.150 +
  23.151 +# Enable this for the pcvt (VT220 compatible) console driver
  23.152 +#device		vt
  23.153 +#options 	XSERVER			# support for X server on a vt console
  23.154 +#options 	FAT_CURSOR		# start with block cursor
  23.155 +
  23.156 +device		agp		# support several AGP chipsets
  23.157 +
  23.158 +# Floating point support - do not disable.
  23.159 +device		npx
  23.160 +
  23.161 +# Power management support (see NOTES for more options)
  23.162 +#device		apm
  23.163 +# Add suspend/resume support for the i8254.
  23.164 +device		pmtimer
  23.165 +
  23.166 +# PCCARD (PCMCIA) support
  23.167 +# Pcmcia and cardbus bridge support
  23.168 +device		cbb			# cardbus (yenta) bridge
  23.169 +#device		pcic			# ExCA ISA and PCI bridges
  23.170 +device		pccard			# PC Card (16-bit) bus
  23.171 +device		cardbus			# CardBus (32-bit) bus
  23.172 +
  23.173 +# Serial (COM) ports
  23.174 +device		sio		# 8250, 16[45]50 based serial ports
  23.175 +
  23.176 +# Parallel port
  23.177 +device		ppc
  23.178 +device		ppbus		# Parallel port bus (required)
  23.179 +device		lpt		# Printer
  23.180 +device		plip		# TCP/IP over parallel
  23.181 +device		ppi		# Parallel port interface device
  23.182 +#device		vpo		# Requires scbus and da
  23.183 +
  23.184 +# If you've got a "dumb" serial or parallel PCI card that is
  23.185 +# supported by the puc(4) glue driver, uncomment the following
  23.186 +# line to enable it (connects to the sio and/or ppc drivers):
  23.187 +#device         puc
  23.188 +
  23.189 +# PCI Ethernet NICs.
  23.190 +device		de		# DEC/Intel DC21x4x (``Tulip'')
  23.191 +device		em		# Intel PRO/1000 adapter Gigabit Ethernet Card
  23.192 +device		txp		# 3Com 3cR990 (``Typhoon'')
  23.193 +device		vx		# 3Com 3c590, 3c595 (``Vortex'')
  23.194 +
  23.195 +# PCI Ethernet NICs that use the common MII bus controller code.
  23.196 +# NOTE: Be sure to keep the 'device miibus' line in order to use these NICs!
  23.197 +device		miibus		# MII bus support
  23.198 +device		bfe		# Broadcom BCM440x 10/100 ethernet
  23.199 +device		bge		# Broadcom BCM570xx Gigabit Ethernet
  23.200 +device		dc		# DEC/Intel 21143 and various workalikes
  23.201 +device		fxp		# Intel EtherExpress PRO/100B (82557, 82558)
  23.202 +device		pcn		# AMD Am79C97x PCI 10/100 (precedence over 'lnc')
  23.203 +device		re		# RealTek 8139C+/8169/8169S/8110S
  23.204 +device		rl		# RealTek 8129/8139
  23.205 +device		sf		# Adaptec AIC-6915 (``Starfire'')
  23.206 +device		sis		# Silicon Integrated Systems SiS 900/SiS 7016
  23.207 +device		sk		# SysKonnect SK-984x and SK-982x gigabit ethernet
  23.208 +device		ste		# Sundance ST201 (D-Link DFE-550TX)
  23.209 +device		ti		# Alteon Networks Tigon I/II gigabit ethernet
  23.210 +device		tl		# Texas Instruments ThunderLAN
  23.211 +device		tx		# SMC EtherPower II (83c170 ``EPIC'')
  23.212 +device		vr		# VIA Rhine, Rhine II
  23.213 +device		wb		# Winbond W89C840F
  23.214 +device		xl		# 3Com 3c90x (``Boomerang'', ``Cyclone'')
  23.215 +
  23.216 +# ISA Ethernet NICs.  pccard nics included.
  23.217 +device		cs		# Crystal Semiconductor CS89x0 NIC
  23.218 +# 'device ed' requires 'device miibus'
  23.219 +device		ed		# NE[12]000, SMC Ultra, 3c503, DS8390 cards
  23.220 +device		ex		# Intel EtherExpress Pro/10 and Pro/10+
  23.221 +device		ep		# Etherlink III based cards
  23.222 +device		fe		# Fujitsu MB8696x based cards
  23.223 +device		ie		# EtherExpress 8/16, 3C507, StarLAN 10 etc.
  23.224 +device		lnc		# NE2100, NE32-VL Lance Ethernet cards
  23.225 +device		sn		# SMC's 9000 series of ethernet chips
  23.226 +device		xe		# Xircom pccard ethernet
  23.227 +
  23.228 +# ISA devices that use the old ISA shims
  23.229 +#device		le
  23.230 +
  23.231 +# Wireless NIC cards
  23.232 +device		wlan		# 802.11 support
  23.233 +device		an		# Aironet 4500/4800 802.11 wireless NICs. 
  23.234 +device		awi		# BayStack 660 and others
  23.235 +device		wi		# WaveLAN/Intersil/Symbol 802.11 wireless NICs.
  23.236 +#device		wl		# Older non 802.11 Wavelan wireless NIC.
  23.237 +
  23.238 +# Pseudo devices - the number indicates how many units to allocate.
  23.239 +device		random		# Entropy device
  23.240 +device		loop		# Network loopback
  23.241 +device		ether		# Ethernet support
  23.242 +device		sl		# Kernel SLIP
  23.243 +device		ppp		# Kernel PPP
  23.244 +device		tun		# Packet tunnel.
  23.245 +device		pty		# Pseudo-ttys (telnet etc)
  23.246 +device		md		# Memory "disks"
  23.247 +device		gif		# IPv6 and IPv4 tunneling
  23.248 +device		faith		# IPv6-to-IPv4 relaying (translation)
  23.249 +
  23.250 +# The `bpf' device enables the Berkeley Packet Filter.
  23.251 +# Be aware of the administrative consequences of enabling this!
  23.252 +device		bpf		# Berkeley packet filter
  23.253 +
  23.254 +# USB support
  23.255 +device		uhci		# UHCI PCI->USB interface
  23.256 +device		ohci		# OHCI PCI->USB interface
  23.257 +device		usb		# USB Bus (required)
  23.258 +#device		udbp		# USB Double Bulk Pipe devices
  23.259 +device		ugen		# Generic
  23.260 +device		uhid		# "Human Interface Devices"
  23.261 +device		ukbd		# Keyboard
  23.262 +device		ulpt		# Printer
  23.263 +device		umass		# Disks/Mass storage - Requires scbus and da
  23.264 +device		ums		# Mouse
  23.265 +device		urio		# Diamond Rio 500 MP3 player
  23.266 +device		uscanner	# Scanners
  23.267 +# USB Ethernet, requires mii
  23.268 +device		aue		# ADMtek USB ethernet
  23.269 +device		axe		# ASIX Electronics USB ethernet
  23.270 +device		cue		# CATC USB ethernet
  23.271 +device		kue		# Kawasaki LSI USB ethernet
  23.272 +
  23.273 +# FireWire support
  23.274 +device		firewire	# FireWire bus code
  23.275 +device		sbp		# SCSI over FireWire (Requires scbus and da)
  23.276 +device		fwe		# Ethernet over FireWire (non-standard!)
    24.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    24.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/conf/GENERIC.hints	Tue Apr 05 11:27:50 2005 +0000
    24.3 @@ -0,0 +1,93 @@
    24.4 +# $FreeBSD: src/sys/i386/conf/GENERIC.hints,v 1.11 2002/12/05 22:49:47 jhb Exp $
    24.5 +hint.fdc.0.at="isa"
    24.6 +hint.fdc.0.port="0x3F0"
    24.7 +hint.fdc.0.irq="6"
    24.8 +hint.fdc.0.drq="2"
    24.9 +hint.fd.0.at="fdc0"
   24.10 +hint.fd.0.drive="0"
   24.11 +hint.fd.1.at="fdc0"
   24.12 +hint.fd.1.drive="1"
   24.13 +hint.ata.0.at="isa"
   24.14 +hint.ata.0.port="0x1F0"
   24.15 +hint.ata.0.irq="14"
   24.16 +hint.ata.1.at="isa"
   24.17 +hint.ata.1.port="0x170"
   24.18 +hint.ata.1.irq="15"
   24.19 +hint.adv.0.at="isa"
   24.20 +hint.adv.0.disabled="1"
   24.21 +hint.bt.0.at="isa"
   24.22 +hint.bt.0.disabled="1"
   24.23 +hint.aha.0.at="isa"
   24.24 +hint.aha.0.disabled="1"
   24.25 +hint.aic.0.at="isa"
   24.26 +hint.aic.0.disabled="1"
   24.27 +hint.atkbdc.0.at="isa"
   24.28 +hint.atkbdc.0.port="0x060"
   24.29 +hint.atkbd.0.at="atkbdc"
   24.30 +hint.atkbd.0.irq="1"
   24.31 +hint.atkbd.0.flags="0x1"
   24.32 +hint.psm.0.at="atkbdc"
   24.33 +hint.psm.0.irq="12"
   24.34 +hint.vga.0.at="isa"
   24.35 +hint.sc.0.at="isa"
   24.36 +hint.sc.0.flags="0x100"
   24.37 +hint.vt.0.at="isa"
   24.38 +hint.vt.0.disabled="1"
   24.39 +hint.apm.0.disabled="1"
   24.40 +hint.apm.0.flags="0x20"
   24.41 +hint.pcic.0.at="isa"
   24.42 +# hint.pcic.0.irq="10"	# Default to polling
   24.43 +hint.pcic.0.port="0x3e0"
   24.44 +hint.pcic.0.maddr="0xd0000"
   24.45 +hint.pcic.1.at="isa"
   24.46 +hint.pcic.1.irq="11"
   24.47 +hint.pcic.1.port="0x3e2"
   24.48 +hint.pcic.1.maddr="0xd4000"
   24.49 +hint.pcic.1.disabled="1"
   24.50 +hint.sio.0.at="isa"
   24.51 +hint.sio.0.port="0x3F8"
   24.52 +hint.sio.0.flags="0x10"
   24.53 +hint.sio.0.irq="4"
   24.54 +hint.sio.1.at="isa"
   24.55 +hint.sio.1.port="0x2F8"
   24.56 +hint.sio.1.irq="3"
   24.57 +hint.sio.2.at="isa"
   24.58 +hint.sio.2.disabled="1"
   24.59 +hint.sio.2.port="0x3E8"
   24.60 +hint.sio.2.irq="5"
   24.61 +hint.sio.3.at="isa"
   24.62 +hint.sio.3.disabled="1"
   24.63 +hint.sio.3.port="0x2E8"
   24.64 +hint.sio.3.irq="9"
   24.65 +hint.ppc.0.at="isa"
   24.66 +hint.ppc.0.irq="7"
   24.67 +hint.ed.0.at="isa"
   24.68 +hint.ed.0.disabled="1"
   24.69 +hint.ed.0.port="0x280"
   24.70 +hint.ed.0.irq="10"
   24.71 +hint.ed.0.maddr="0xd8000"
   24.72 +hint.cs.0.at="isa"
   24.73 +hint.cs.0.disabled="1"
   24.74 +hint.cs.0.port="0x300"
   24.75 +hint.sn.0.at="isa"
   24.76 +hint.sn.0.disabled="1"
   24.77 +hint.sn.0.port="0x300"
   24.78 +hint.sn.0.irq="10"
   24.79 +hint.ie.0.at="isa"
   24.80 +hint.ie.0.disabled="1"
   24.81 +hint.ie.0.port="0x300"
   24.82 +hint.ie.0.irq="10"
   24.83 +hint.ie.0.maddr="0xd0000"
   24.84 +hint.fe.0.at="isa"
   24.85 +hint.fe.0.disabled="1"
   24.86 +hint.fe.0.port="0x300"
   24.87 +hint.le.0.at="isa"
   24.88 +hint.le.0.disabled="1"
   24.89 +hint.le.0.port="0x300"
   24.90 +hint.le.0.irq="5"
   24.91 +hint.le.0.maddr="0xd0000"
   24.92 +hint.lnc.0.at="isa"
   24.93 +hint.lnc.0.disabled="1"
   24.94 +hint.lnc.0.port="0x280"
   24.95 +hint.lnc.0.irq="10"
   24.96 +hint.lnc.0.drq="0"
    25.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    25.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/conf/Makefile	Tue Apr 05 11:27:50 2005 +0000
    25.3 @@ -0,0 +1,3 @@
    25.4 +# $FreeBSD: src/sys/i386/conf/Makefile,v 1.9 2003/02/26 23:36:58 ru Exp $
    25.5 +
    25.6 +.include "${.CURDIR}/../../conf/makeLINT.mk"
    26.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    26.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/conf/NOTES	Tue Apr 05 11:27:50 2005 +0000
    26.3 @@ -0,0 +1,1115 @@
    26.4 +#
    26.5 +# NOTES -- Lines that can be cut/pasted into kernel and hints configs.
    26.6 +#
    26.7 +# This file contains machine dependent kernel configuration notes.  For
    26.8 +# machine independent notes, look in /sys/conf/NOTES.
    26.9 +#
   26.10 +# $FreeBSD: src/sys/i386/conf/NOTES,v 1.1108 2003/12/04 19:57:56 phk Exp $
   26.11 +#
   26.12 +
   26.13 +#
   26.14 +# This directive is mandatory; it defines the architecture to be
   26.15 +# configured for; in this case, the 386 family based IBM-PC and
   26.16 +# compatibles.
   26.17 +#
   26.18 +machine		i386
   26.19 +
   26.20 +# 
   26.21 +# We want LINT to cover profiling as well
   26.22 +profile         2
   26.23 +
   26.24 +
   26.25 +#####################################################################
   26.26 +# SMP OPTIONS:
   26.27 +#
   26.28 +# The apic device enables the use of the I/O APIC for interrupt delivery.
   26.29 +# The apic device can be used in both UP and SMP kernels, but is required
   26.30 +# for SMP kernels.  Thus, the apic device is not strictly an SMP option,
   26.31 +# but it is a prerequisite for SMP.
   26.32 +#
   26.33 +# Notes:
   26.34 +#
   26.35 +# Be sure to disable 'cpu I386_CPU' for SMP kernels.
   26.36 +#
   26.37 +# By default, mixed mode is used to route IRQ0 from the AT timer via
   26.38 +# the 8259A master PIC through the ExtINT pin on the first I/O APIC.
   26.39 +# This can be disabled via the NO_MIXED_MODE option.  In that case,
   26.40 +# IRQ0 will be routed via an intpin on the first I/O APIC.  Not all
   26.41 +# motherboards hook IRQ0 up to the first I/O APIC even though their
   26.42 +# MP table or MADT may claim to do so.  That is why mixed mode is
   26.43 +# enabled by default.
   26.44 +#
   26.45 +# HTT CPUs should only be used if they are enabled in the BIOS.  For
   26.46 +# the ACPI case, ACPI only correctly tells us about any HTT CPUs if
   26.47 +# they are enabled.  However, most HTT systems do not list HTT CPUs
   26.48 +# in the MP Table if they are enabled, thus we guess at the HTT CPUs
   26.49 +# for the MP Table case.  However, we shouldn't try to guess and use
   26.50 +# these CPUs if HTTT is disabled.  Thus, HTT guessing is only enabled
   26.51 +# for the MP Table if the user explicitly asks for it via the
   26.52 +# MPTABLE_FORCE_HTT option.  Do NOT use this option if you have HTT
   26.53 +# disabled in your BIOS.
   26.54 +#
   26.55 +
   26.56 +# Mandatory:
   26.57 +device		apic			# I/O apic
   26.58 +
   26.59 +# Optional:
   26.60 +options		MPTABLE_FORCE_HTT	# Enable HTT CPUs with the MP Table
   26.61 +options 	NO_MIXED_MODE		# Disable use of mixed mode
   26.62 +
   26.63 +
   26.64 +#####################################################################
   26.65 +# CPU OPTIONS
   26.66 +
   26.67 +#
   26.68 +# You must specify at least one CPU (the one you intend to run on);
   26.69 +# deleting the specification for CPUs you don't need to use may make
   26.70 +# parts of the system run faster.
   26.71 +# I386_CPU is mutually exclusive with the other CPU types.
   26.72 +#
   26.73 +#cpu		I386_CPU		
   26.74 +cpu		I486_CPU
   26.75 +cpu		I586_CPU		# aka Pentium(tm)
   26.76 +cpu		I686_CPU		# aka Pentium Pro(tm)
   26.77 +
   26.78 +#
   26.79 +# Options for CPU features.
   26.80 +#
   26.81 +# CPU_ATHLON_SSE_HACK tries to enable SSE instructions when the BIOS has
   26.82 +# forgotten to enable them.
   26.83 +#
   26.84 +# CPU_BLUELIGHTNING_FPU_OP_CACHE enables FPU operand cache on IBM
   26.85 +# BlueLightning CPU.  It works only with Cyrix FPU, and this option
   26.86 +# should not be used with Intel FPU.
   26.87 +#
   26.88 +# CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning
   26.89 +# CPU if CPU supports it. The default is double-clock mode on
   26.90 +# BlueLightning CPU box.
   26.91 +#
   26.92 +# CPU_BTB_EN enables branch target buffer on Cyrix 5x86 (NOTE 1).
   26.93 +#
   26.94 +# CPU_DIRECT_MAPPED_CACHE sets L1 cache of Cyrix 486DLC CPU in direct
   26.95 +# mapped mode.  Default is 2-way set associative mode.
   26.96 +#
   26.97 +# CPU_CYRIX_NO_LOCK enables weak locking for the entire address space
   26.98 +# of Cyrix 6x86 and 6x86MX CPUs by setting the NO_LOCK bit of CCR1.
   26.99 +# Otherwise, the NO_LOCK bit of CCR1 is cleared.  (NOTE 3)
  26.100 +#
  26.101 +# CPU_DISABLE_5X86_LSSER disables load store serialize (i.e. enables
  26.102 +# reorder).  This option should not be used if you use memory mapped
  26.103 +# I/O device(s).
  26.104 +#
  26.105 +# CPU_ELAN enables support for AMDs ElanSC520 CPU.
  26.106 +#    CPU_ELAN_XTAL sets the clock crystal frequency in Hz
  26.107 +#    CPU_ELAN_PPS enables precision timestamp code.
  26.108 +#
  26.109 +# CPU_SOEKRIS enables support www.soekris.com hardware.
  26.110 +#
  26.111 +# CPU_ENABLE_SSE enables SSE/MMX2 instructions support.  This is default
  26.112 +# on I686_CPU and above.
  26.113 +# CPU_DISABLE_SSE explicitly prevent I686_CPU from turning on SSE.
  26.114 +#
  26.115 +# CPU_FASTER_5X86_FPU enables faster FPU exception handler.
  26.116 +#
  26.117 +# CPU_I486_ON_386 enables CPU cache on i486 based CPU upgrade products
  26.118 +# for i386 machines.
  26.119 +#
  26.120 +# CPU_IORT defines I/O clock delay time (NOTE 1).  Default values of
  26.121 +# I/O clock delay time on Cyrix 5x86 and 6x86 are 0 and 7,respectively
  26.122 +# (no clock delay).
  26.123 +#
  26.124 +# CPU_L2_LATENCY specifed the L2 cache latency value.  This option is used
  26.125 +# only when CPU_PPRO2CELERON is defined and Mendocino Celeron is detected.
  26.126 +# The default value is 5.
  26.127 +#
  26.128 +# CPU_LOOP_EN prevents flushing the prefetch buffer if the destination
  26.129 +# of a jump is already present in the prefetch buffer on Cyrix 5x86(NOTE
  26.130 +# 1).
  26.131 +#
  26.132 +# CPU_PPRO2CELERON enables L2 cache of Mendocino Celeron CPUs.  This option
  26.133 +# is useful when you use Socket 8 to Socket 370 converter, because most Pentium
  26.134 +# Pro BIOSs do not enable L2 cache of Mendocino Celeron CPUs.
  26.135 +#
  26.136 +# CPU_RSTK_EN enables return stack on Cyrix 5x86 (NOTE 1).
  26.137 +#
  26.138 +# CPU_SUSP_HLT enables suspend on HALT.  If this option is set, CPU
  26.139 +# enters suspend mode following execution of HALT instruction.
  26.140 +#
  26.141 +# CPU_UPGRADE_HW_CACHE eliminates unneeded cache flush instruction(s).
  26.142 +#
  26.143 +# CPU_WT_ALLOC enables write allocation on Cyrix 6x86/6x86MX and AMD
  26.144 +# K5/K6/K6-2 cpus.
  26.145 +#
  26.146 +# CYRIX_CACHE_WORKS enables CPU cache on Cyrix 486 CPUs with cache
  26.147 +# flush at hold state.
  26.148 +#
  26.149 +# CYRIX_CACHE_REALLY_WORKS enables (1) CPU cache on Cyrix 486 CPUs
  26.150 +# without cache flush at hold state, and (2) write-back CPU cache on
  26.151 +# Cyrix 6x86 whose revision < 2.7 (NOTE 2).
  26.152 +#
  26.153 +# NO_F00F_HACK disables the hack that prevents Pentiums (and ONLY
  26.154 +# Pentiums) from locking up when a LOCK CMPXCHG8B instruction is
  26.155 +# executed.  This option is only needed if I586_CPU is also defined,
  26.156 +# and should be included for any non-Pentium CPU that defines it.
  26.157 +#
  26.158 +# NO_MEMORY_HOLE is an optimisation for systems with AMD K6 processors
  26.159 +# which indicates that the 15-16MB range is *definitely* not being
  26.160 +# occupied by an ISA memory hole.
  26.161 +#
  26.162 +# CPU_DISABLE_CMPXCHG disables the CMPXCHG instruction on > i386 IA32 
  26.163 +# machines.  VmWare seems to emulate this instruction poorly, causing 
  26.164 +# the guest OS to run very slowly.  Enabling this with a SMP kernel
  26.165 +# will cause the kernel to be unusable.
  26.166 +#
  26.167 +# NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT,
  26.168 +# CPU_LOOP_EN and CPU_RSTK_EN should not be used because of CPU bugs.
  26.169 +# These options may crash your system.
  26.170 +#
  26.171 +# NOTE 2: If CYRIX_CACHE_REALLY_WORKS is not set, CPU cache is enabled
  26.172 +# in write-through mode when revision < 2.7.  If revision of Cyrix
  26.173 +# 6x86 >= 2.7, CPU cache is always enabled in write-back mode.
  26.174 +#
  26.175 +# NOTE 3: This option may cause failures for software that requires
  26.176 +# locked cycles in order to operate correctly.
  26.177 +#
  26.178 +options 	CPU_ATHLON_SSE_HACK
  26.179 +options 	CPU_BLUELIGHTNING_FPU_OP_CACHE
  26.180 +options 	CPU_BLUELIGHTNING_3X
  26.181 +options 	CPU_BTB_EN
  26.182 +options 	CPU_DIRECT_MAPPED_CACHE
  26.183 +options 	CPU_DISABLE_5X86_LSSER
  26.184 +options 	CPU_ELAN
  26.185 +options 	CPU_SOEKRIS
  26.186 +options 	CPU_ELAN_XTAL=32768000
  26.187 +options 	CPU_ELAN_PPS
  26.188 +options 	CPU_ENABLE_SSE
  26.189 +#options 	CPU_DISABLE_SSE
  26.190 +options 	CPU_FASTER_5X86_FPU
  26.191 +options 	CPU_I486_ON_386
  26.192 +options 	CPU_IORT
  26.193 +options 	CPU_L2_LATENCY=5
  26.194 +options 	CPU_LOOP_EN
  26.195 +options 	CPU_PPRO2CELERON
  26.196 +options 	CPU_RSTK_EN
  26.197 +options 	CPU_SUSP_HLT
  26.198 +options 	CPU_UPGRADE_HW_CACHE
  26.199 +options 	CPU_WT_ALLOC
  26.200 +options 	CYRIX_CACHE_WORKS
  26.201 +options 	CYRIX_CACHE_REALLY_WORKS
  26.202 +#options 	NO_F00F_HACK
  26.203 +options 	CPU_DISABLE_CMPXCHG
  26.204 +
  26.205 +# Debug options
  26.206 +options 	NPX_DEBUG	# enable npx debugging (FPU/math emu)
  26.207 +					#new math emulator
  26.208 +
  26.209 +#
  26.210 +# PERFMON causes the driver for Pentium/Pentium Pro performance counters
  26.211 +# to be compiled.  See perfmon(4) for more information.
  26.212 +#
  26.213 +options 	PERFMON
  26.214 +
  26.215 +
  26.216 +#####################################################################
  26.217 +# NETWORKING OPTIONS
  26.218 +
  26.219 +#
  26.220 +# DEVICE_POLLING adds support for mixed interrupt-polling handling
  26.221 +# of network device drivers, which has significant benefits in terms
  26.222 +# of robustness to overloads and responsivity, as well as permitting
  26.223 +# accurate scheduling of the CPU time between kernel network processing
  26.224 +# and other activities. The drawback is a moderate (up to 1/HZ seconds)
  26.225 +# potential increase in response times.
  26.226 +# It is strongly recommended to use HZ=1000 or 2000 with DEVICE_POLLING
  26.227 +# to achieve smoother behaviour.
  26.228 +# Additionally, you can enable/disable polling at runtime with the
  26.229 +# sysctl variable kern.polling.enable (defaults off), and select
  26.230 +# the CPU fraction reserved to userland with the sysctl variable
  26.231 +# kern.polling.user_frac (default 50, range 0..100).
  26.232 +#
  26.233 +# Only the "dc" "fxp" and "sis" devices support this mode of operation at
  26.234 +# the time of this writing.
  26.235 +
  26.236 +options 	DEVICE_POLLING
  26.237 +
  26.238 +
  26.239 +#####################################################################
  26.240 +# CLOCK OPTIONS
  26.241 +
  26.242 +# The following options are used for debugging clock behavior only, and
  26.243 +# should not be used for production systems.
  26.244 +#
  26.245 +# CLK_CALIBRATION_LOOP will run the clock calibration loop at startup
  26.246 +# until the user presses a key.
  26.247 +
  26.248 +options 	CLK_CALIBRATION_LOOP
  26.249 +
  26.250 +# The following two options measure the frequency of the corresponding
  26.251 +# clock relative to the RTC (onboard mc146818a).
  26.252 +
  26.253 +options 	CLK_USE_I8254_CALIBRATION
  26.254 +options 	CLK_USE_TSC_CALIBRATION
  26.255 +
  26.256 +
  26.257 +#####################################################################
  26.258 +# MISCELLANEOUS DEVICES AND OPTIONS
  26.259 +
  26.260 +device		speaker		#Play IBM BASIC-style noises out your speaker
  26.261 +hint.speaker.0.at="isa"
  26.262 +hint.speaker.0.port="0x61"
  26.263 +device		gzip		#Exec gzipped a.out's. REQUIRES COMPAT_AOUT!
  26.264 +device		apm_saver	# Requires APM
  26.265 +
  26.266 +
  26.267 +#####################################################################
  26.268 +# HARDWARE BUS CONFIGURATION
  26.269 +
  26.270 +#
  26.271 +# ISA bus
  26.272 +#
  26.273 +device		isa
  26.274 +
  26.275 +#
  26.276 +# Options for `isa':
  26.277 +#
  26.278 +# AUTO_EOI_1 enables the `automatic EOI' feature for the master 8259A
  26.279 +# interrupt controller.  This saves about 0.7-1.25 usec for each interrupt.
  26.280 +# This option breaks suspend/resume on some portables.
  26.281 +#
  26.282 +# AUTO_EOI_2 enables the `automatic EOI' feature for the slave 8259A
  26.283 +# interrupt controller.  This saves about 0.7-1.25 usec for each interrupt.
  26.284 +# Automatic EOI is documented not to work for for the slave with the
  26.285 +# original i8259A, but it works for some clones and some integrated
  26.286 +# versions.
  26.287 +#
  26.288 +# MAXMEM specifies the amount of RAM on the machine; if this is not
  26.289 +# specified, FreeBSD will first read the amount of memory from the CMOS
  26.290 +# RAM, so the amount of memory will initially be limited to 64MB or 16MB
  26.291 +# depending on the BIOS.  If the BIOS reports 64MB, a memory probe will
  26.292 +# then attempt to detect the installed amount of RAM.  If this probe
  26.293 +# fails to detect >64MB RAM you will have to use the MAXMEM option.
  26.294 +# The amount is in kilobytes, so for a machine with 128MB of RAM, it would
  26.295 +# be 131072 (128 * 1024).
  26.296 +#
  26.297 +# BROKEN_KEYBOARD_RESET disables the use of the keyboard controller to
  26.298 +# reset the CPU for reboot.  This is needed on some systems with broken
  26.299 +# keyboard controllers.
  26.300 +
  26.301 +options 	COMPAT_OLDISA	#Use ISA shims and glue for old drivers
  26.302 +options 	AUTO_EOI_1
  26.303 +#options 	AUTO_EOI_2
  26.304 +
  26.305 +options 	MAXMEM=(128*1024)
  26.306 +#options 	BROKEN_KEYBOARD_RESET
  26.307 +
  26.308 +# 
  26.309 +# EISA bus
  26.310 +#
  26.311 +# The EISA bus device is `eisa'.  It provides auto-detection and
  26.312 +# configuration support for all devices on the EISA bus.
  26.313 +
  26.314 +device		eisa
  26.315 +
  26.316 +# By default, only 10 EISA slots are probed, since the slot numbers
  26.317 +# above clash with the configuration address space of the PCI subsystem,
  26.318 +# and the EISA probe is not very smart about this.  This is sufficient
  26.319 +# for most machines, but in particular the HP NetServer LC series comes
  26.320 +# with an onboard AIC7770 dual-channel SCSI controller on EISA slot #11,
  26.321 +# thus you need to bump this figure to 12 for them.
  26.322 +options 	EISA_SLOTS=12
  26.323 +
  26.324 +#
  26.325 +# MCA bus:
  26.326 +#
  26.327 +# The MCA bus device is `mca'.  It provides auto-detection and
  26.328 +# configuration support for all devices on the MCA bus.
  26.329 +# No hints are required for MCA.
  26.330 +
  26.331 +device		mca
  26.332 +
  26.333 +#
  26.334 +# PCI bus & PCI options:
  26.335 +#
  26.336 +device		pci
  26.337 +
  26.338 +#
  26.339 +# AGP GART support
  26.340 +device		agp
  26.341 +
  26.342 +
  26.343 +#####################################################################
  26.344 +# HARDWARE DEVICE CONFIGURATION
  26.345 +
  26.346 +#
  26.347 +# Mandatory devices:
  26.348 +#
  26.349 +
  26.350 +# To include support for VGA VESA video modes
  26.351 +options 	VESA
  26.352 +
  26.353 +# Turn on extra debugging checks and output for VESA support.
  26.354 +options 	VESA_DEBUG
  26.355 +
  26.356 +# The pcvt console driver (vt220 compatible).
  26.357 +device		vt
  26.358 +hint.vt.0.at="isa"
  26.359 +options 	XSERVER			# support for running an X server on vt
  26.360 +options 	FAT_CURSOR		# start with block cursor
  26.361 +# This PCVT option is for keyboards such as those used on really old ThinkPads
  26.362 +options 	PCVT_SCANSET=2
  26.363 +# Other PCVT options are documented in pcvt(4).
  26.364 +options 	PCVT_24LINESDEF
  26.365 +options 	PCVT_CTRL_ALT_DEL
  26.366 +options 	PCVT_META_ESC
  26.367 +options 	PCVT_NSCREENS=9
  26.368 +options 	PCVT_PRETTYSCRNS
  26.369 +options 	PCVT_SCREENSAVER
  26.370 +options 	PCVT_USEKBDSEC
  26.371 +options 	PCVT_VT220KEYB
  26.372 +options 	PCVT_GREENSAVER
  26.373 +
  26.374 +#
  26.375 +# The Numeric Processing eXtension driver.  In addition to this, you
  26.376 +# may configure a math emulator (see above).  If your machine has a
  26.377 +# hardware FPU and the kernel configuration includes the npx device
  26.378 +# *and* a math emulator compiled into the kernel, the hardware FPU
  26.379 +# will be used, unless it is found to be broken or unless "flags" to
  26.380 +# npx0 includes "0x08", which requests preference for the emulator.
  26.381 +device		npx
  26.382 +hint.npx.0.flags="0x0"
  26.383 +hint.npx.0.irq="13"
  26.384 +
  26.385 +#
  26.386 +# `flags' for npx0:
  26.387 +#	0x01	don't use the npx registers to optimize bcopy.
  26.388 +#	0x02	don't use the npx registers to optimize bzero.
  26.389 +#	0x04	don't use the npx registers to optimize copyin or copyout.
  26.390 +#	0x08	use emulator even if hardware FPU is available.
  26.391 +# The npx registers are normally used to optimize copying and zeroing when
  26.392 +# all of the following conditions are satisfied:
  26.393 +#	I586_CPU is an option
  26.394 +#	the cpu is an i586 (perhaps not a Pentium)
  26.395 +#	the probe for npx0 succeeds
  26.396 +#	INT 16 exception handling works.
  26.397 +# Then copying and zeroing using the npx registers is normally 30-100% faster.
  26.398 +# The flags can be used to control cases where it doesn't work or is slower.
  26.399 +# Setting them at boot time using userconfig works right (the optimizations
  26.400 +# are not used until later in the bootstrap when npx0 is attached).
  26.401 +# Flag 0x08 automatically disables the i586 optimized routines.
  26.402 +#
  26.403 +
  26.404 +#
  26.405 +# Optional devices:
  26.406 +#
  26.407 +
  26.408 +# 3Dfx Voodoo Graphics, Voodoo II /dev/3dfx CDEV support. This will create
  26.409 +# the /dev/3dfx0 device to work with glide implementations. This should get
  26.410 +# linked to /dev/3dfx and /dev/voodoo. Note that this is not the same as
  26.411 +# the tdfx DRI module from XFree86 and is completely unrelated.
  26.412 +#
  26.413 +# To enable Linuxulator support, one must also include COMPAT_LINUX in the
  26.414 +# config as well, or you will not have the dependencies. The other option
  26.415 +# is to load both as modules.
  26.416 +
  26.417 +device 		tdfx			# Enable 3Dfx Voodoo support
  26.418 +options 	TDFX_LINUX		# Enable Linuxulator support
  26.419 +
  26.420 +#
  26.421 +# ACPI support using the Intel ACPI Component Architecture reference
  26.422 +# implementation.
  26.423 +#
  26.424 +# ACPI_DEBUG enables the use of the debug.acpi.level and debug.acpi.layer
  26.425 +# kernel environment variables to select initial debugging levels for the
  26.426 +# Intel ACPICA code.  (Note that the Intel code must also have USE_DEBUGGER
  26.427 +# defined when it is built).
  26.428 +#
  26.429 +# ACPI_MAX_THREADS sets the number of task threads started.
  26.430 +#
  26.431 +# ACPI_NO_SEMAPHORES makes the AcpiOs*Semaphore routines a no-op.
  26.432 +#
  26.433 +# ACPICA_PEDANTIC enables strict checking of AML.  Our default is to
  26.434 +# relax these checks to allow code generated by the Microsoft compiler
  26.435 +# to still execute.
  26.436 +#
  26.437 +# Note that building ACPI into the kernel is deprecated; the module is
  26.438 +# normally loaded automatically by the loader.
  26.439 +#
  26.440 +device		acpi
  26.441 +options 	ACPI_DEBUG
  26.442 +options 	ACPI_MAX_THREADS=1
  26.443 +#!options 	ACPI_NO_SEMAPHORES
  26.444 +#!options 	ACPICA_PEDANTIC
  26.445 +
  26.446 +# DRM options:
  26.447 +# mgadrm:    AGP Matrox G200, G400, G450, G550
  26.448 +# r128drm:   ATI Rage 128
  26.449 +# radeondrm: ATI Radeon up to 9000/9100
  26.450 +# sisdrm:    SiS 300/305,540,630
  26.451 +# tdfxdrm:   3dfx Voodoo 3/4/5 and Banshee
  26.452 +# DRM_DEBUG: include debug printfs, very slow
  26.453 +#
  26.454 +# mga requires AGP in the kernel, and it is recommended
  26.455 +# for AGP r128 and radeon cards.
  26.456 +
  26.457 +device		mgadrm
  26.458 +device		"r128drm"
  26.459 +device		radeondrm
  26.460 +device		sisdrm
  26.461 +device		tdfxdrm
  26.462 +
  26.463 +options 	DRM_DEBUG
  26.464 +
  26.465 +# M-systems DiskOnchip products see src/sys/contrib/dev/fla/README
  26.466 +device		fla
  26.467 +hint.fla.0.at="isa"
  26.468 +
  26.469 +#
  26.470 +# mse: Logitech and ATI InPort bus mouse ports
  26.471 +
  26.472 +device		mse
  26.473 +hint.mse.0.at="isa"
  26.474 +hint.mse.0.port="0x23c"
  26.475 +hint.mse.0.irq="5"
  26.476 +
  26.477 +#
  26.478 +# Network interfaces:
  26.479 +#
  26.480 +
  26.481 +# ar:   Arnet SYNC/570i hdlc sync 2/4 port V.35/X.21 serial driver
  26.482 +#       (requires sppp)
  26.483 +# ath:	Atheros a/b/g WiFi adapters (requires ath_hal and wlan)
  26.484 +# cx:   Cronyx/Sigma multiport sync/async (with Cisco or PPP framing)
  26.485 +# ed:   Western Digital and SMC 80xx; Novell NE1000 and NE2000; 3Com 3C503
  26.486 +#       HP PC Lan+, various PC Card devices (refer to etc/defauls/pccard.conf)
  26.487 +#       (requires miibus)
  26.488 +# el:   3Com 3C501 (slow!)
  26.489 +# ie:   AT&T StarLAN 10 and EN100; 3Com 3C507; unknown NI5210;
  26.490 +#       Intel EtherExpress
  26.491 +# le:   Digital Equipment EtherWorks 2 and EtherWorks 3 (DEPCA, DE100,
  26.492 +#       DE101, DE200, DE201, DE202, DE203, DE204, DE205, DE422)
  26.493 +# lnc:  Lance/PCnet cards (Isolan, Novell NE2100, NE32-VL, AMD Am7990 and
  26.494 +#       Am79C960)
  26.495 +# oltr: Olicom ISA token-ring adapters OC-3115, OC-3117, OC-3118 and OC-3133
  26.496 +#       (no hints needed).
  26.497 +#       Olicom PCI token-ring adapters OC-3136, OC-3137, OC-3139, OC-3140,
  26.498 +#       OC-3141, OC-3540, OC-3250
  26.499 +# rdp:  RealTek RTL 8002-based pocket ethernet adapters
  26.500 +# sbni:	Granch SBNI12-xx ISA and PCI adapters
  26.501 +# sr:   RISCom/N2 hdlc sync 1/2 port V.35/X.21 serial driver (requires sppp)
  26.502 +# wl:	Lucent Wavelan (ISA card only).
  26.503 +
  26.504 +# Order for ISA/EISA devices is important here
  26.505 +
  26.506 +device		ar
  26.507 +hint.ar.0.at="isa"
  26.508 +hint.ar.0.port="0x300"
  26.509 +hint.ar.0.irq="10"
  26.510 +hint.ar.0.maddr="0xd0000"
  26.511 +device		cx
  26.512 +hint.cx.0.at="isa"
  26.513 +hint.cx.0.port="0x240"
  26.514 +hint.cx.0.irq="15"
  26.515 +hint.cx.0.drq="7"
  26.516 +device		ed
  26.517 +#options 	ED_NO_MIIBUS		# Disable ed miibus support
  26.518 +hint.ed.0.at="isa"
  26.519 +hint.ed.0.port="0x280"
  26.520 +hint.ed.0.irq="5"
  26.521 +hint.ed.0.maddr="0xd8000"
  26.522 +device		el	1
  26.523 +hint.el.0.at="isa"
  26.524 +hint.el.0.port="0x300"
  26.525 +hint.el.0.irq="9"
  26.526 +device		ie			# Hints only required for Starlan
  26.527 +hint.ie.2.at="isa"
  26.528 +hint.ie.2.port="0x300"
  26.529 +hint.ie.2.irq="5"
  26.530 +hint.ie.2.maddr="0xd0000"
  26.531 +device		le	1
  26.532 +hint.le.0.at="isa"
  26.533 +hint.le.0.port="0x300"
  26.534 +hint.le.0.irq="5"
  26.535 +hint.le.0.maddr="0xd0000"
  26.536 +device		lnc
  26.537 +hint.lnc.0.at="isa"
  26.538 +hint.lnc.0.port="0x280"
  26.539 +hint.lnc.0.irq="10"
  26.540 +hint.lnc.0.drq="0"
  26.541 +device		rdp	1
  26.542 +hint.rdp.0.at="isa"
  26.543 +hint.rdp.0.port="0x378"
  26.544 +hint.rdp.0.irq="7"
  26.545 +hint.rdp.0.flags="2"
  26.546 +device		sbni
  26.547 +hint.sbni.0.at="isa"
  26.548 +hint.sbni.0.port="0x210"
  26.549 +hint.sbni.0.irq="0xefdead"
  26.550 +hint.sbni.0.flags="0"
  26.551 +device		sr
  26.552 +hint.sr.0.at="isa"
  26.553 +hint.sr.0.port="0x300"
  26.554 +hint.sr.0.irq="5"
  26.555 +hint.sr.0.maddr="0xd0000"
  26.556 +device		oltr
  26.557 +hint.oltr.0.at="isa"
  26.558 +device		wl
  26.559 +hint.wl.0.at="isa"
  26.560 +hint.wl.0.port="0x300"
  26.561 +options 	WLCACHE		# enables the signal-strength cache
  26.562 +options 	WLDEBUG		# enables verbose debugging output
  26.563 +
  26.564 +device		ath
  26.565 +device		ath_hal		# Atheros HAL (includes binary component)
  26.566 +#device		wlan		# 802.11 layer
  26.567 +
  26.568 +#
  26.569 +# ATA raid adapters
  26.570 +#
  26.571 +device		pst
  26.572 +
  26.573 +# 
  26.574 +# SCSI host adapters:
  26.575 +# 
  26.576 +# ncv: NCR 53C500 based SCSI host adapters.
  26.577 +# nsp: Workbit Ninja SCSI-3 based PC Card SCSI host adapters.
  26.578 +# stg: TMC 18C30, 18C50 based SCSI host adapters.
  26.579 +
  26.580 +device          ncv
  26.581 +device          nsp
  26.582 +device          stg
  26.583 +hint.stg.0.at="isa"
  26.584 +hint.stg.0.port="0x140"
  26.585 +hint.stg.0.port="11"
  26.586 +
  26.587 +#
  26.588 +# Adaptec FSA RAID controllers, including integrated DELL controllers,
  26.589 +# the Dell PERC 2/QC and the HP NetRAID-4M
  26.590 +device		aac
  26.591 +device		aacp	# SCSI Passthrough interface (optional, CAM required)
  26.592 +
  26.593 +#
  26.594 +# IBM (now Adaptec) ServeRAID controllers
  26.595 +device		ips
  26.596 +
  26.597 +#
  26.598 +# SafeNet crypto driver: can be moved to the MI NOTES as soon as
  26.599 +# it's tested on a big-endian machine
  26.600 +#
  26.601 +device		safe		# SafeNet 1141
  26.602 +options		SAFE_DEBUG	# enable debugging support: hw.safe.debug
  26.603 +options		SAFE_RNDTEST	# enable rndtest support
  26.604 +
  26.605 +#####################################################################
  26.606 +
  26.607 +#
  26.608 +# Miscellaneous hardware:
  26.609 +#
  26.610 +# wt: Wangtek and Archive QIC-02/QIC-36 tape drives
  26.611 +# ctx: Cortex-I frame grabber
  26.612 +# apm: Laptop Advanced Power Management (experimental)
  26.613 +# pmtimer: Timer device driver for power management events (APM or ACPI)
  26.614 +# spigot: The Creative Labs Video Spigot video-acquisition board
  26.615 +# dgb: Digiboard PC/Xi and PC/Xe series driver (ALPHA QUALITY!)
  26.616 +# digi: Digiboard driver
  26.617 +# gp:  National Instruments AT-GPIB and AT-GPIB/TNT board, PCMCIA-GPIB
  26.618 +# asc: GI1904-based hand scanners, e.g. the Trust Amiscan Grey
  26.619 +# gsc: Genius GS-4500 hand scanner.
  26.620 +# spic: Sony Programmable I/O controller (VAIO notebooks)
  26.621 +# stl: Stallion EasyIO and EasyConnection 8/32 (cd1400 based)
  26.622 +# stli: Stallion EasyConnection 8/64, ONboard, Brumby (intelligent)
  26.623 +
  26.624 +# Notes on APM
  26.625 +#  The flags takes the following meaning for apm0:
  26.626 +#    0x0020  Statclock is broken.
  26.627 +#  If apm is omitted, some systems require sysctl kern.timecounter.method=1
  26.628 +#  for correct timekeeping.
  26.629 +
  26.630 +# Notes on the spigot:
  26.631 +#  The video spigot is at 0xad6.  This port address can not be changed.
  26.632 +#  The irq values may only be 10, 11, or 15
  26.633 +#  I/O memory is an 8kb region.  Possible values are:
  26.634 +#    0a0000, 0a2000, ..., 0fffff, f00000, f02000, ..., ffffff
  26.635 +#    The start address must be on an even boundary.
  26.636 +#  Add the following option if you want to allow non-root users to be able
  26.637 +#  to access the spigot.  This option is not secure because it allows users
  26.638 +#  direct access to the I/O page.
  26.639 +#  	options SPIGOT_UNSECURE
  26.640 +
  26.641 +# Notes on the Specialix SI/XIO driver:
  26.642 +#  The host card is memory, not IO mapped.
  26.643 +#  The Rev 1 host cards use a 64K chunk, on a 32K boundary.
  26.644 +#  The Rev 2 host cards use a 32K chunk, on a 32K boundary.
  26.645 +#  The cards can use an IRQ of 11, 12 or 15.
  26.646 +
  26.647 +# Notes on the Sony Programmable I/O controller
  26.648 +#  This is a temporary driver that should someday be replaced by something
  26.649 +#  that hooks into the ACPI layer. The device is hooked to the PIIX4's
  26.650 +#  General Device 10 decoder, which means you have to fiddle with PCI
  26.651 +#  registers to map it in, even though it is otherwise treated here as
  26.652 +#  an ISA device. At the moment, the driver polls, although the device
  26.653 +#  is capable of generating interrupts. It largely undocumented.
  26.654 +#  The port location in the hint is where you WANT the device to be
  26.655 +#  mapped. 0x10a0 seems to be traditional. At the moment the jogdial
  26.656 +#  is the only thing truly supported, but aparently a fair percentage
  26.657 +#  of the Vaio extra features are controlled by this device.
  26.658 +
  26.659 +# Notes on the Stallion stl and stli drivers:
  26.660 +#  See src/i386/isa/README.stl for complete instructions.
  26.661 +#  This is version 0.0.5alpha, unsupported by Stallion.
  26.662 +#  The stl driver has a secondary IO port hard coded at 0x280.  You need
  26.663 +#     to change src/i386/isa/stallion.c if you reconfigure this on the boards.
  26.664 +#  The "flags" and "msize" settings on the stli driver depend on the board:
  26.665 +#	EasyConnection 8/64 ISA:     flags 23         msize 0x1000
  26.666 +#	EasyConnection 8/64 EISA:    flags 24         msize 0x10000
  26.667 +#	EasyConnection 8/64 MCA:     flags 25         msize 0x1000
  26.668 +#	ONboard ISA:                 flags 4          msize 0x10000
  26.669 +#	ONboard EISA:                flags 7          msize 0x10000
  26.670 +#	ONboard MCA:                 flags 3          msize 0x10000
  26.671 +#	Brumby:                      flags 2          msize 0x4000
  26.672 +#	Stallion:                    flags 1          msize 0x10000
  26.673 +
  26.674 +# Notes on the Digiboard PC/Xi and PC/Xe series driver
  26.675 +#               
  26.676 +# The NDGBPORTS option specifies the number of ports controlled by the
  26.677 +# dgb(4) driver.  The default value is 16 ports per device.
  26.678 +#
  26.679 +# The following flag values have special meanings in dgb:
  26.680 +#	0x01 - alternate layout of pins
  26.681 +#	0x02 - use the windowed PC/Xe in 64K mode
  26.682 +
  26.683 +device		wt	1
  26.684 +hint.wt.0.at="isa"
  26.685 +hint.wt.0.port="0x300"
  26.686 +hint.wt.0.irq="5"
  26.687 +hint.wt.0.drq="1"
  26.688 +device		ctx
  26.689 +hint.ctx.0.at="isa"
  26.690 +hint.ctx.0.port="0x230"
  26.691 +hint.ctx.0.maddr="0xd0000"
  26.692 +device		spigot	1
  26.693 +hint.spigot.0.at="isa"
  26.694 +hint.spigot.0.port="0xad6"
  26.695 +hint.spigot.0.irq="15"
  26.696 +hint.spigot.0.maddr="0xee000"
  26.697 +device		apm
  26.698 +hint.apm.0.flags="0x20"
  26.699 +device		pmtimer			# Adjust system timer at wakeup time
  26.700 +device		gp
  26.701 +hint.gp.0.at="isa"
  26.702 +hint.gp.0.port="0x2c0"
  26.703 +device		gsc	1
  26.704 +hint.gsc.0.at="isa"
  26.705 +hint.gsc.0.port="0x270"
  26.706 +hint.gsc.0.drq="3"
  26.707 +device		dgb	  1
  26.708 +options		NDGBPORTS=17
  26.709 +hint.dgb.0.at="isa"
  26.710 +hint.dgb.0.port="0x220"
  26.711 +hint.dgb.0.maddr="0xfc000"
  26.712 +device		digi
  26.713 +hint.digi.0.at="isa"
  26.714 +hint.digi.0.port="0x104"
  26.715 +hint.digi.0.maddr="0xd0000"
  26.716 +# BIOS & FEP/OS components of device digi.
  26.717 +device		digi_CX
  26.718 +device		digi_CX_PCI
  26.719 +device		digi_EPCX
  26.720 +device		digi_EPCX_PCI
  26.721 +device		digi_Xe
  26.722 +device		digi_Xem
  26.723 +device		digi_Xr
  26.724 +device		asc	1
  26.725 +hint.asc.0.at="isa"
  26.726 +hint.asc.0.port="0x3EB"
  26.727 +hint.asc.0.drq="3"
  26.728 +hint.asc.0.irq="10"
  26.729 +device		spic
  26.730 +hint.spic.0.at="isa"
  26.731 +hint.spic.0.port="0x10a0"
  26.732 +device		stl
  26.733 +hint.stl.0.at="isa"
  26.734 +hint.stl.0.port="0x2a0"
  26.735 +hint.stl.0.irq="10"
  26.736 +device		stli
  26.737 +hint.stli.0.at="isa"
  26.738 +hint.stli.0.port="0x2a0"
  26.739 +hint.stli.0.maddr="0xcc000"
  26.740 +hint.stli.0.flags="23"
  26.741 +hint.stli.0.msize="0x1000"
  26.742 +# You are unlikely to have the hardware for loran <phk@FreeBSD.org>
  26.743 +device		loran
  26.744 +hint.loran.0.at="isa"
  26.745 +hint.loran.0.irq="5"
  26.746 +# HOT1 Xilinx 6200 card (http://www.vcc.com/)
  26.747 +device		xrpu
  26.748 +
  26.749 +#
  26.750 +# Laptop/Notebook options:
  26.751 +#
  26.752 +# See also:
  26.753 +#  apm under `Miscellaneous hardware'
  26.754 +# above.
  26.755 +
  26.756 +# For older notebooks that signal a powerfail condition (external
  26.757 +# power supply dropped, or battery state low) by issuing an NMI:
  26.758 +
  26.759 +options 	POWERFAIL_NMI	# make it beep instead of panicing
  26.760 +
  26.761 +#
  26.762 +# I2C Bus
  26.763 +#
  26.764 +# Philips i2c bus support is provided by the `iicbus' device.
  26.765 +#
  26.766 +# Supported interfaces:
  26.767 +# pcf	Philips PCF8584 ISA-bus controller
  26.768 +#
  26.769 +device		pcf
  26.770 +hint.pcf.0.at="isa"
  26.771 +hint.pcf.0.port="0x320"
  26.772 +hint.pcf.0.irq="5"
  26.773 +
  26.774 +#---------------------------------------------------------------------------
  26.775 +# ISDN4BSD
  26.776 +#
  26.777 +# See /usr/share/examples/isdn/ROADMAP for an introduction to isdn4bsd.
  26.778 +#
  26.779 +# i4b passive ISDN cards support contains the following hardware drivers:
  26.780 +#
  26.781 +#	isic  - Siemens/Infineon ISDN ISAC/HSCX/IPAC chipset driver
  26.782 +#	iwic  - Winbond W6692 PCI bus ISDN S/T interface controller
  26.783 +#	ifpi  - AVM Fritz!Card PCI driver
  26.784 +#	ifpi2  - AVM Fritz!Card PCI version 2 driver
  26.785 +#	ihfc  - Cologne Chip HFC ISA/ISA-PnP chipset driver
  26.786 +#	ifpnp - AVM Fritz!Card PnP driver 
  26.787 +#	itjc  - Siemens ISAC / TJNet Tiger300/320 chipset
  26.788 +#
  26.789 +# i4b active ISDN cards support contains the following hardware drivers:
  26.790 +#
  26.791 +#	iavc  - AVM B1 PCI, AVM B1 ISA, AVM T1
  26.792 +#
  26.793 +# Note that the ``options'' (if given) and ``device'' lines must BOTH
  26.794 +# be uncommented to enable support for a given card !
  26.795 +#
  26.796 +# In addition to a hardware driver (and probably an option) the mandatory
  26.797 +# ISDN protocol stack devices and the mandatory support device must be 
  26.798 +# enabled as well as one or more devices from the optional devices section.
  26.799 +#
  26.800 +#---------------------------------------------------------------------------
  26.801 +#	isic driver (Siemens/Infineon chipsets)
  26.802 +#
  26.803 +device	isic
  26.804 +#
  26.805 +# ISA bus non-PnP Cards:
  26.806 +# ----------------------
  26.807 +#
  26.808 +# Teles S0/8 or Niccy 1008
  26.809 +options 	TEL_S0_8
  26.810 +hint.isic.0.at="isa"
  26.811 +hint.isic.0.maddr="0xd0000"
  26.812 +hint.isic.0.irq="5"
  26.813 +hint.isic.0.flags="1"
  26.814 +#
  26.815 +# Teles S0/16 or Creatix ISDN-S0 or Niccy 1016
  26.816 +options 	TEL_S0_16
  26.817 +hint.isic.0.at="isa"
  26.818 +hint.isic.0.port="0xd80"
  26.819 +hint.isic.0.maddr="0xd0000"
  26.820 +hint.isic.0.irq="5"
  26.821 +hint.isic.0.flags="2"
  26.822 +#
  26.823 +# Teles S0/16.3
  26.824 +options 	TEL_S0_16_3
  26.825 +hint.isic.0.at="isa"
  26.826 +hint.isic.0.port="0xd80"
  26.827 +hint.isic.0.irq="5"
  26.828 +hint.isic.0.flags="3"
  26.829 +#
  26.830 +# AVM A1 or AVM Fritz!Card
  26.831 +options 	AVM_A1
  26.832 +hint.isic.0.at="isa"
  26.833 +hint.isic.0.port="0x340"
  26.834 +hint.isic.0.irq="5"
  26.835 +hint.isic.0.flags="4"
  26.836 +#
  26.837 +# USRobotics Sportster ISDN TA intern
  26.838 +options 	USR_STI
  26.839 +hint.isic.0.at="isa"
  26.840 +hint.isic.0.port="0x268"
  26.841 +hint.isic.0.irq="5"
  26.842 +hint.isic.0.flags="7"
  26.843 +#
  26.844 +# ITK ix1 Micro ( < V.3, non-PnP version )
  26.845 +options 	ITKIX1
  26.846 +hint.isic.0.at="isa"
  26.847 +hint.isic.0.port="0x398"
  26.848 +hint.isic.0.irq="10"
  26.849 +hint.isic.0.flags="18"
  26.850 +#
  26.851 +# ELSA PCC-16
  26.852 +options 	ELSA_PCC16
  26.853 +hint.isic.0.at="isa"
  26.854 +hint.isic.0.port="0x360"
  26.855 +hint.isic.0.irq="10"
  26.856 +hint.isic.0.flags="20"
  26.857 +#
  26.858 +# ISA bus PnP Cards:
  26.859 +# ------------------
  26.860 +#
  26.861 +# Teles S0/16.3 PnP
  26.862 +options 	TEL_S0_16_3_P
  26.863 +#
  26.864 +# Creatix ISDN-S0 P&P
  26.865 +options 	CRTX_S0_P
  26.866 +#
  26.867 +# Dr. Neuhaus Niccy Go@
  26.868 +options 	DRN_NGO
  26.869 +#
  26.870 +# Sedlbauer Win Speed
  26.871 +options 	SEDLBAUER
  26.872 +#
  26.873 +# Dynalink IS64PH
  26.874 +options 	DYNALINK 
  26.875 +#
  26.876 +# ELSA QuickStep 1000pro ISA
  26.877 +options 	ELSA_QS1ISA
  26.878 +#
  26.879 +# Siemens I-Surf 2.0
  26.880 +options 	SIEMENS_ISURF2
  26.881 +#
  26.882 +# Asuscom ISDNlink 128K ISA
  26.883 +options 	ASUSCOM_IPAC
  26.884 +#
  26.885 +# Eicon Diehl DIVA 2.0 and 2.02
  26.886 +options 	EICON_DIVA
  26.887 +#
  26.888 +# Compaq Microcom 610 ISDN card (Compaq series PSB2222I)
  26.889 +options 	COMPAQ_M610
  26.890 +#
  26.891 +# PCI bus Cards:
  26.892 +# --------------
  26.893 +#
  26.894 +# Cyclades Cyclom-Y PCI serial driver
  26.895 +device		cy	1
  26.896 +options 	CY_PCI_FASTINTR		# Use with cy_pci unless irq is shared
  26.897 +hint.cy.0.at="isa"
  26.898 +hint.cy.0.irq="10"
  26.899 +hint.cy.0.maddr="0xd4000"
  26.900 +hint.cy.0.msize="0x2000"
  26.901 +#
  26.902 +#---------------------------------------------------------------------------
  26.903 +# ELSA MicroLink ISDN/PCI (same as ELSA QuickStep 1000pro PCI)
  26.904 +options 	ELSA_QS1PCI
  26.905 +#
  26.906 +#
  26.907 +#---------------------------------------------------------------------------
  26.908 +#	ifpnp driver for AVM Fritz!Card PnP
  26.909 +#
  26.910 +# AVM Fritz!Card PnP
  26.911 +device ifpnp
  26.912 +#
  26.913 +#---------------------------------------------------------------------------
  26.914 +#	ihfc driver for Cologne Chip ISA chipsets (experimental!)
  26.915 +#
  26.916 +# Teles 16.3c ISA PnP
  26.917 +# AcerISDN P10 ISA PnP
  26.918 +# TELEINT ISDN SPEED No.1
  26.919 +device ihfc
  26.920 +#
  26.921 +#---------------------------------------------------------------------------
  26.922 +#	ifpi driver for AVM Fritz!Card PCI
  26.923 +#
  26.924 +# AVM Fritz!Card PCI
  26.925 +device  ifpi
  26.926 +#
  26.927 +#---------------------------------------------------------------------------
  26.928 +#	ifpi2 driver for AVM Fritz!Card PCI version 2
  26.929 +#
  26.930 +# AVM Fritz!Card PCI version 2
  26.931 +device  "ifpi2"
  26.932 +#
  26.933 +#---------------------------------------------------------------------------
  26.934 +#	iwic driver for Winbond W6692 chipset
  26.935 +#
  26.936 +# ASUSCOM P-IN100-ST-D (and other Winbond W6692 based cards)
  26.937 +device  iwic
  26.938 +#
  26.939 +#---------------------------------------------------------------------------
  26.940 +#	itjc driver for Simens ISAC / TJNet Tiger300/320 chipset
  26.941 +#
  26.942 +# Traverse Technologies NETjet-S
  26.943 +# Teles PCI-TJ
  26.944 +device  itjc
  26.945 +#
  26.946 +#---------------------------------------------------------------------------
  26.947 +#	iavc driver (AVM active cards, needs i4bcapi driver!)
  26.948 +#
  26.949 +device	iavc
  26.950 +#
  26.951 +# AVM B1 ISA bus (PnP mode not supported!)
  26.952 +# ----------------------------------------
  26.953 +hint.iavc.0.at="isa"
  26.954 +hint.iavc.0.port="0x150"
  26.955 +hint.iavc.0.irq="5"
  26.956 +#
  26.957 +#---------------------------------------------------------------------------
  26.958 +#	ISDN Protocol Stack - mandatory for all hardware drivers
  26.959 +#
  26.960 +# Q.921 / layer 2 - i4b passive cards D channel handling
  26.961 +device		"i4bq921"
  26.962 +#
  26.963 +# Q.931 / layer 3 - i4b passive cards D channel handling
  26.964 +device		"i4bq931"
  26.965 +#
  26.966 +# layer 4 - i4b common passive and active card handling
  26.967 +device		"i4b"
  26.968 +#
  26.969 +#---------------------------------------------------------------------------
  26.970 +#	ISDN devices - mandatory for all hardware drivers
  26.971 +#
  26.972 +# userland driver to do ISDN tracing (for passive cards only)
  26.973 +device		"i4btrc"	4
  26.974 +#
  26.975 +# userland driver to control the whole thing
  26.976 +device		"i4bctl"
  26.977 +#
  26.978 +#---------------------------------------------------------------------------
  26.979 +#	ISDN devices - optional
  26.980 +#
  26.981 +# userland driver for access to raw B channel
  26.982 +device		"i4brbch"	4
  26.983 +#
  26.984 +# userland driver for telephony
  26.985 +device		"i4btel"	2
  26.986 +#
  26.987 +# network driver for IP over raw HDLC ISDN
  26.988 +device		"i4bipr"	4
  26.989 +# enable VJ header compression detection for ipr i/f
  26.990 +options 	IPR_VJ
  26.991 +# enable logging of the first n IP packets to isdnd (n=32 here)
  26.992 +options 	IPR_LOG=32
  26.993 +#
  26.994 +# network driver for sync PPP over ISDN; requires an equivalent
  26.995 +# number of sppp device to be configured
  26.996 +device		"i4bisppp"	4
  26.997 +#
  26.998 +# B-channel interface to the netgraph subsystem
  26.999 +device		"i4bing"	2
 26.1000 +#
 26.1001 +# CAPI driver needed for active ISDN cards (see iavc driver above)
 26.1002 +device		"i4bcapi"
 26.1003 +#
 26.1004 +#---------------------------------------------------------------------------
 26.1005 +
 26.1006 +#
 26.1007 +# Set the number of PV entries per process.  Increasing this can
 26.1008 +# stop panics related to heavy use of shared memory. However, that can
 26.1009 +# (combined with large amounts of physical memory) cause panics at
 26.1010 +# boot time due the kernel running out of VM space.
 26.1011 +#
 26.1012 +# If you're tweaking this, you might also want to increase the sysctls
 26.1013 +# "vm.v_free_min", "vm.v_free_reserved", and "vm.v_free_target".
 26.1014 +#
 26.1015 +# The value below is the one more than the default.
 26.1016 +#
 26.1017 +options 	PMAP_SHPGPERPROC=201
 26.1018 +
 26.1019 +#
 26.1020 +# Change the size of the kernel virtual address space.  Due to
 26.1021 +# constraints in loader(8) on i386, this must be a multiple of 4.
 26.1022 +# 256 = 1 GB of kernel address space.  Increasing this also causes
 26.1023 +# a reduction of the address space in user processes.  512 splits
 26.1024 +# the 4GB cpu address space in half (2GB user, 2GB kernel).
 26.1025 +#
 26.1026 +options 	KVA_PAGES=260
 26.1027 +
 26.1028 +
 26.1029 +#####################################################################
 26.1030 +# ABI Emulation
 26.1031 +
 26.1032 +# Enable iBCS2 runtime support for SCO and ISC binaries
 26.1033 +options 	IBCS2
 26.1034 +
 26.1035 +# Emulate spx device for client side of SVR3 local X interface
 26.1036 +options 	SPX_HACK
 26.1037 +
 26.1038 +# Enable Linux ABI emulation
 26.1039 +options 	COMPAT_LINUX
 26.1040 +
 26.1041 +# Enable i386 a.out binary support
 26.1042 +options 	COMPAT_AOUT
 26.1043 +
 26.1044 +# Enable the linux-like proc filesystem support (requires COMPAT_LINUX
 26.1045 +# and PSEUDOFS)
 26.1046 +options 	LINPROCFS
 26.1047 +
 26.1048 +#
 26.1049 +# SysVR4 ABI emulation
 26.1050 +#
 26.1051 +# The svr4 ABI emulator can be statically compiled into the kernel or loaded as
 26.1052 +# a KLD module.  
 26.1053 +# The STREAMS network emulation code can also be compiled statically or as a 
 26.1054 +# module.  If loaded as a module, it must be loaded before the svr4 module
 26.1055 +# (the /usr/sbin/svr4 script does this for you).  If compiling statically,
 26.1056 +# the `streams' device must be configured into any kernel which also
 26.1057 +# specifies COMPAT_SVR4.  It is possible to have a statically-configured 
 26.1058 +# STREAMS device and a dynamically loadable svr4 emulator;  the /usr/sbin/svr4
 26.1059 +# script understands that it doesn't need to load the `streams' module under
 26.1060 +# those circumstances.
 26.1061 +# Caveat:  At this time, `options KTRACE' is required for the svr4 emulator
 26.1062 +# (whether static or dynamic).  
 26.1063 +# 
 26.1064 +options 	COMPAT_SVR4	# build emulator statically
 26.1065 +options 	DEBUG_SVR4	# enable verbose debugging
 26.1066 +device		streams		# STREAMS network driver (required for svr4).
 26.1067 +
 26.1068 +
 26.1069 +#####################################################################
 26.1070 +# VM OPTIONS
 26.1071 +
 26.1072 +# Disable the 4 MByte page PSE CPU feature.  The PSE feature allows the
 26.1073 +# kernel to use a 4 MByte pages to map the kernel instead of 4k pages.
 26.1074 +# This saves on the amount of memory needed for page tables needed to
 26.1075 +# map the kernel.  You should only disable this feature as a temporary
 26.1076 +# workaround if you are having problems with it enabled.
 26.1077 +#
 26.1078 +#options 	DISABLE_PSE
 26.1079 +
 26.1080 +# Disable the global pages PGE CPU feature.  The PGE feature allows pages
 26.1081 +# to be marked with the PG_G bit.  TLB entries for these pages are not
 26.1082 +# flushed from the cache when %cr3 is reloaded.  This can make context
 26.1083 +# switches less expensive.  You should only disable this feature as a
 26.1084 +# temporary workaround if you are having problems with it enabled.
 26.1085 +#
 26.1086 +#options 	DISABLE_PG_G
 26.1087 +
 26.1088 +# KSTACK_PAGES is the number of memory pages to assign to the kernel
 26.1089 +# stack of each thread.
 26.1090 +
 26.1091 +options 	KSTACK_PAGES=3
 26.1092 +
 26.1093 +#####################################################################
 26.1094 +
 26.1095 +# More undocumented options for linting.
 26.1096 +# Note that documenting these are not considered an affront.
 26.1097 +
 26.1098 +options 	FB_INSTALL_CDEV		# install a CDEV entry in /dev
 26.1099 +
 26.1100 +# PECOFF module (Win32 Execution Format)
 26.1101 +options 	PECOFF_SUPPORT
 26.1102 +options 	PECOFF_DEBUG
 26.1103 +
 26.1104 +options 	ENABLE_ALART
 26.1105 +options 	I4B_SMP_WORKAROUND
 26.1106 +options 	I586_PMC_GUPROF=0x70000
 26.1107 +options 	KBDIO_DEBUG=2
 26.1108 +options 	KBD_MAXRETRY=4
 26.1109 +options 	KBD_MAXWAIT=6
 26.1110 +options 	KBD_RESETDELAY=201
 26.1111 +
 26.1112 +options 	PSM_DEBUG=1
 26.1113 +
 26.1114 +options 	TIMER_FREQ=((14318182+6)/12)
 26.1115 +
 26.1116 +options 	VM_KMEM_SIZE
 26.1117 +options 	VM_KMEM_SIZE_MAX
 26.1118 +options 	VM_KMEM_SIZE_SCALE
    27.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    27.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/conf/OLDCARD	Tue Apr 05 11:27:50 2005 +0000
    27.3 @@ -0,0 +1,17 @@
    27.4 +#
    27.5 +# OLDCARD -- Generic kernel configuration file for FreeBSD/i386
    27.6 +#            using the OLDCARD pccard system.
    27.7 +#
    27.8 +# $FreeBSD: src/sys/i386/conf/OLDCARD,v 1.18 2003/02/15 02:39:13 ru Exp $
    27.9 +
   27.10 +include GENERIC
   27.11 +
   27.12 +ident		OLDCARD
   27.13 +
   27.14 +# PCCARD (PCMCIA) support
   27.15 +nodevice	cbb		# cardbus (yenta) bridge
   27.16 +#nodevice	pcic		# ExCA ISA and PCI bridges
   27.17 +nodevice	pccard		# PC Card (16-bit) bus
   27.18 +nodevice	cardbus		# CardBus (32-bit) bus
   27.19 +device		card	1	# pccard bus
   27.20 +device		pcic		# PCMCIA bridge
    28.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    28.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/conf/PAE	Tue Apr 05 11:27:50 2005 +0000
    28.3 @@ -0,0 +1,99 @@
    28.4 +#
    28.5 +# PAE -- Generic kernel configuration file for FreeBSD/i386 PAE
    28.6 +#
    28.7 +# $FreeBSD: src/sys/i386/conf/PAE,v 1.8 2003/11/03 22:49:19 jhb Exp $
    28.8 +
    28.9 +include GENERIC
   28.10 +
   28.11 +ident		PAE-GENERIC
   28.12 +
   28.13 +# To make a PAE kernel, the next option is needed
   28.14 +options		PAE			# Physical Address Extensions Kernel
   28.15 +
   28.16 +# Compile acpi in statically since the module isn't built properly.  Most
   28.17 +# machines which support large amounts of memory require acpi.
   28.18 +device		acpi
   28.19 +
   28.20 +# Don't build modules with this kernel config, since they are not built with
   28.21 +# the correct options headers.
   28.22 +makeoptions	NO_MODULES=yes
   28.23 +
   28.24 +# What follows is a list of drivers that are normally in GENERIC, but either
   28.25 +# don't work or are untested with PAE.  Be very careful before enabling any
   28.26 +# of these drivers.  Drivers which use DMA and don't handle 64 bit physical
   28.27 +# address properly may cause data corruption when used in a machine with more
   28.28 +# than 4 gigabytes of memory.
   28.29 +
   28.30 +nodevice	ahb
   28.31 +nodevice	amd
   28.32 +nodevice	isp
   28.33 +nodevice	sym
   28.34 +nodevice	trm
   28.35 +
   28.36 +nodevice	adv
   28.37 +nodevice	adw
   28.38 +nodevice	aha
   28.39 +nodevice	aic
   28.40 +nodevice	bt
   28.41 +
   28.42 +nodevice	ncv
   28.43 +nodevice	nsp
   28.44 +nodevice	stg
   28.45 +
   28.46 +nodevice	asr
   28.47 +nodevice	dpt
   28.48 +nodevice	iir
   28.49 +nodevice	mly
   28.50 +
   28.51 +nodevice	amr
   28.52 +nodevice	ida
   28.53 +nodevice	mlx
   28.54 +nodevice	pst
   28.55 +
   28.56 +nodevice	agp
   28.57 +
   28.58 +nodevice	de
   28.59 +nodevice	txp
   28.60 +nodevice	vx
   28.61 +
   28.62 +nodevice	dc
   28.63 +nodevice	pcn
   28.64 +nodevice	rl
   28.65 +nodevice	sf
   28.66 +nodevice	sis
   28.67 +nodevice	ste
   28.68 +nodevice	tl
   28.69 +nodevice	tx
   28.70 +nodevice	vr
   28.71 +nodevice	wb
   28.72 +
   28.73 +nodevice	cs
   28.74 +nodevice	ed
   28.75 +nodevice	ex
   28.76 +nodevice	ep
   28.77 +nodevice	fe
   28.78 +nodevice	ie
   28.79 +nodevice	lnc
   28.80 +nodevice	sn
   28.81 +nodevice	xe
   28.82 +
   28.83 +nodevice	wlan
   28.84 +nodevice	an
   28.85 +nodevice	awi
   28.86 +nodevice	wi
   28.87 +
   28.88 +nodevice	uhci
   28.89 +nodevice	ohci
   28.90 +nodevice	usb
   28.91 +nodevice	ugen
   28.92 +nodevice	uhid
   28.93 +nodevice	ukbd
   28.94 +nodevice	ulpt
   28.95 +nodevice	umass
   28.96 +nodevice	ums
   28.97 +nodevice	urio
   28.98 +nodevice	uscanner
   28.99 +nodevice	aue
  28.100 +nodevice	axe
  28.101 +nodevice	cue
  28.102 +nodevice	kue
    29.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    29.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/conf/XENCONF	Tue Apr 05 11:27:50 2005 +0000
    29.3 @@ -0,0 +1,137 @@
    29.4 +#
    29.5 +# GENERIC -- Generic kernel configuration file for FreeBSD/i386
    29.6 +#
    29.7 +# For more information on this file, please read the handbook section on
    29.8 +# Kernel Configuration Files:
    29.9 +#
   29.10 +#    http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html
   29.11 +#
   29.12 +# The handbook is also available locally in /usr/share/doc/handbook
   29.13 +# if you've installed the doc distribution, otherwise always see the
   29.14 +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the
   29.15 +# latest information.
   29.16 +#
   29.17 +# An exhaustive list of options and more detailed explanations of the
   29.18 +# device lines is also present in the ../../conf/NOTES and NOTES files. 
   29.19 +# If you are in doubt as to the purpose or necessity of a line, check first 
   29.20 +# in NOTES.
   29.21 +#
   29.22 +# $FreeBSD: src/sys/i386/conf/GENERIC,v 1.394.2.3 2004/01/26 19:42:11 nectar Exp $
   29.23 +
   29.24 +machine		i386-xen
   29.25 +cpu		I686_CPU
   29.26 +ident		XEN
   29.27 +
   29.28 +#To statically compile in device wiring instead of /boot/device.hints
   29.29 +#hints		"GENERIC.hints"		#Default places to look for devices.
   29.30 +
   29.31 +makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols
   29.32 +
   29.33 +options 	SCHED_4BSD		#4BSD scheduler
   29.34 +options 	INET			#InterNETworking
   29.35 +options 	INET6			#IPv6 communications protocols
   29.36 +options 	FFS			#Berkeley Fast Filesystem
   29.37 +options 	SOFTUPDATES		#Enable FFS soft updates support
   29.38 +options 	UFS_ACL			#Support for access control lists
   29.39 +options 	UFS_DIRHASH		#Improve performance on big directories
   29.40 +options 	MD_ROOT			#MD is a potential root device
   29.41 +options 	NFSCLIENT		#Network Filesystem Client
   29.42 +options 	NFSSERVER		#Network Filesystem Server
   29.43 +# options 	NFS_ROOT		#NFS usable as /, requires NFSCLIENT
   29.44 +#options 	MSDOSFS			#MSDOS Filesystem
   29.45 +#options 	CD9660			#ISO 9660 Filesystem
   29.46 +options 	PROCFS			#Process filesystem (requires PSEUDOFS)
   29.47 +options 	PSEUDOFS		#Pseudo-filesystem framework
   29.48 +options 	COMPAT_43		#Compatible with BSD 4.3 [KEEP THIS!]
   29.49 +options 	COMPAT_FREEBSD4		#Compatible with FreeBSD4
   29.50 +options 	SCSI_DELAY=15000	#Delay (in ms) before probing SCSI
   29.51 +options 	KTRACE			#ktrace(1) support
   29.52 +options 	SYSVSHM			#SYSV-style shared memory
   29.53 +options 	SYSVMSG			#SYSV-style message queues
   29.54 +options 	SYSVSEM			#SYSV-style semaphores
   29.55 +options 	_KPOSIX_PRIORITY_SCHEDULING #Posix P1003_1B real-time extensions
   29.56 +options 	KBD_INSTALL_CDEV	# install a CDEV entry in /dev
   29.57 +options		CPU_DISABLE_SSE		# don't turn on SSE framework with Xen
   29.58 +#options 	PFIL_HOOKS		# pfil(9) framework
   29.59 +
   29.60 +# Debugging for use in -current
   29.61 +options 	KDB			#Enable the kernel debugger
   29.62 +options 	INVARIANTS		#Enable calls of extra sanity checking
   29.63 +options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
   29.64 +#options 	WITNESS			#Enable checks to detect deadlocks and cycles
   29.65 +#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed
   29.66 +
   29.67 +# To make an SMP kernel, the next two are needed
   29.68 +#options 	SMP		# Symmetric MultiProcessor Kernel
   29.69 +#device		apic		# I/O APIC
   29.70 +
   29.71 +# SCSI peripherals
   29.72 +device		scbus		# SCSI bus (required for SCSI)
   29.73 +#device		ch		# SCSI media changers
   29.74 +device		da		# Direct Access (disks)
   29.75 +#device		sa		# Sequential Access (tape etc)
   29.76 +#device		cd		# CD
   29.77 +device		pass		# Passthrough device (direct SCSI access)
   29.78 +#device		ses		# SCSI Environmental Services (and SAF-TE)
   29.79 +
   29.80 +# atkbdc0 controls both the keyboard and the PS/2 mouse
   29.81 +#device		atkbdc		# AT keyboard controller
   29.82 +#device		atkbd		# AT keyboard
   29.83 +#device		psm		# PS/2 mouse
   29.84 +
   29.85 +# device		vga	# VGA video card driver
   29.86 +
   29.87 +#device		splash		# Splash screen and screen saver support
   29.88 +
   29.89 +# syscons is the default console driver, resembling an SCO console
   29.90 +#device		sc
   29.91 +
   29.92 +# Enable this for the pcvt (VT220 compatible) console driver
   29.93 +#device		vt
   29.94 +#options 	XSERVER			# support for X server on a vt console
   29.95 +#options 	FAT_CURSOR		# start with block cursor
   29.96 +
   29.97 +#device		agp		# support several AGP chipsets
   29.98 +
   29.99 +# Floating point support - do not disable. 
  29.100 +device		npx
  29.101 +
  29.102 +# Serial (COM) ports
  29.103 +#device		sio		# 8250, 16[45]50 based serial ports
  29.104 +
  29.105 +# Parallel port
  29.106 +#device		ppc
  29.107 +#device		ppbus		# Parallel port bus (required)
  29.108 +#device		lpt		# Printer
  29.109 +#device		plip		# TCP/IP over parallel
  29.110 +#device		ppi		# Parallel port interface device
  29.111 +#device		vpo		# Requires scbus and da
  29.112 +
  29.113 +# If you've got a "dumb" serial or parallel PCI card that is
  29.114 +# supported by the puc(4) glue driver, uncomment the following
  29.115 +# line to enable it (connects to the sio and/or ppc drivers):
  29.116 +#device         puc
  29.117 +
  29.118 +
  29.119 +# Pseudo devices - the number indicates how many units to allocate.
  29.120 +device		random		# Entropy device
  29.121 +device		loop		# Network loopback
  29.122 +device		ether		# Ethernet support
  29.123 +device		tun		# Packet tunnel.
  29.124 +device		pty		# Pseudo-ttys (telnet etc)
  29.125 +device		md		# Memory "disks"
  29.126 +device		gif		# IPv6 and IPv4 tunneling
  29.127 +device		faith		# IPv6-to-IPv4 relaying (translation)
  29.128 +
  29.129 +# The `bpf' device enables the Berkeley Packet Filter.
  29.130 +# Be aware of the administrative consequences of enabling this!
  29.131 +device		bpf		# Berkeley packet filter
  29.132 +
  29.133 +#options		BOOTP
  29.134 +options		XEN
  29.135 +options		MCLSHIFT=12	# this has to be enabled for Xen as we can only have one cluster per page
  29.136 +options		MSIZE=256 
  29.137 +options 	DIAGNOSTIC
  29.138 +options		MAXMEM=(256*1024)
  29.139 +options		NOXENDEBUG=1 		# Turn off Debugging printfs
  29.140 +
    30.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    30.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/conf/gethints.awk	Tue Apr 05 11:27:50 2005 +0000
    30.3 @@ -0,0 +1,116 @@
    30.4 +#! /usr/bin/awk -f
    30.5 +#
    30.6 +# This is a transition aid. It extracts old-style configuration information
    30.7 +# from a config file and writes an equivalent device.hints file to stdout.
    30.8 +# You can use that with loader(8) or statically compile it in with the
    30.9 +# 'hints' directive.  See how GENERIC and GENERIC.hints fit together for
   30.10 +# a static example.  You should use loader(8) if at all possible.
   30.11 +#
   30.12 +# $FreeBSD: src/sys/i386/conf/gethints.awk,v 1.2 2002/07/26 03:52:30 peter Exp $
   30.13 +
   30.14 +# skip commented lines, empty lines and not "device" lines
   30.15 +/^[ \t]*#/ || /^[ \t]*$/ || !/[ \t]*device/ { next; }
   30.16 +
   30.17 +# input format :
   30.18 +#    device <name><unit> at <controler>[?] [key [val]]...
   30.19 +# possible keys are :
   30.20 +#    disable, port #, irq #, drq #, drive #, iomem #, iosiz #,
   30.21 +#    flags #, bus #, target #, unit #.
   30.22 +# output format :
   30.23 +#    hint.<name>.<unit>.<key>=<val>
   30.24 +# mapped keys are :
   30.25 +#    iomem -> maddr, iosiz -> msize.
   30.26 +{
   30.27 +	gsub ("#.*", "");		# delete comments
   30.28 +	gsub ("\"", "");		# and double-quotes
   30.29 +	nameunit = $2;			# <name><unit>
   30.30 +	at = $3;			# at
   30.31 +	controler = $4;			# <controler>[?]
   30.32 +	rest = 5;			# optional keys begin at indice 5
   30.33 +	if (at != "at" || controler == "")
   30.34 +		next;			# skip devices w/o controlers
   30.35 +	name = nameunit;
   30.36 +	sub ("[0-9]*$", "", name);	# get the name
   30.37 +	unit = nameunit;
   30.38 +	sub ("^" name, "", unit);	# and the unit
   30.39 +	sub ("\?$", "", controler);
   30.40 +	printf "hint.%s.%s.at=\"%s\"\n", name, unit, controler;
   30.41 +	# for each keys, if any ?
   30.42 +	for (key = $rest; rest <= NF; key = $(++rest)) {
   30.43 +		# skip auto-detect keys (the one w/ a ?)
   30.44 +		if (key == "port?" || key == "drq?" || key == "irq?" || \
   30.45 +		    key == "iomem?" || key == "iosiz?")
   30.46 +			continue;
   30.47 +		# disable has no value, so, give it one
   30.48 +		if (key == "disable") {
   30.49 +			printf "hint.%s.%s.disabled=\"1\"\n", name, unit;
   30.50 +			continue;
   30.51 +		}
   30.52 +		# recognized keys
   30.53 +		if (key == "port" || key == "irq" || key == "drq" || \
   30.54 +		    key == "drive" || key == "iomem" || key == "iosiz" || \
   30.55 +		    key == "flags" || key == "bus" || key == "target" || \
   30.56 +		    key == "unit") {
   30.57 +			val = $(++rest);
   30.58 +			if (val == "?")	# has above
   30.59 +				continue;
   30.60 +			if (key == "port") {
   30.61 +				# map port macros to static values
   30.62 +				sub ("IO_AHA0", "0x330", val);
   30.63 +				sub ("IO_AHA1", "0x334", val);
   30.64 +				sub ("IO_ASC1", "0x3EB", val);
   30.65 +				sub ("IO_ASC2", "0x22B", val);
   30.66 +				sub ("IO_ASC3", "0x26B", val);
   30.67 +				sub ("IO_ASC4", "0x2AB", val);
   30.68 +				sub ("IO_ASC5", "0x2EB", val);
   30.69 +				sub ("IO_ASC6", "0x32B", val);
   30.70 +				sub ("IO_ASC7", "0x36B", val);
   30.71 +				sub ("IO_ASC8", "0x3AB", val);
   30.72 +				sub ("IO_BT0", "0x330", val);
   30.73 +				sub ("IO_BT1", "0x334", val);
   30.74 +				sub ("IO_CGA", "0x3D0", val);
   30.75 +				sub ("IO_COM1", "0x3F8", val);
   30.76 +				sub ("IO_COM2", "0x2F8", val);
   30.77 +				sub ("IO_COM3", "0x3E8", val);
   30.78 +				sub ("IO_COM4", "0x2E8", val);
   30.79 +				sub ("IO_DMA1", "0x000", val);
   30.80 +				sub ("IO_DMA2", "0x0C0", val);
   30.81 +				sub ("IO_DMAPG", "0x080", val);
   30.82 +				sub ("IO_FD1", "0x3F0", val);
   30.83 +				sub ("IO_FD2", "0x370", val);
   30.84 +				sub ("IO_GAME", "0x201", val);
   30.85 +				sub ("IO_GSC1", "0x270", val);
   30.86 +				sub ("IO_GSC2", "0x2E0", val);
   30.87 +				sub ("IO_GSC3", "0x370", val);
   30.88 +				sub ("IO_GSC4", "0x3E0", val);
   30.89 +				sub ("IO_ICU1", "0x020", val);
   30.90 +				sub ("IO_ICU2", "0x0A0", val);
   30.91 +				sub ("IO_KBD", "0x060", val);
   30.92 +				sub ("IO_LPT1", "0x378", val);
   30.93 +				sub ("IO_LPT2", "0x278", val);
   30.94 +				sub ("IO_LPT3", "0x3BC", val);
   30.95 +				sub ("IO_MDA", "0x3B0", val);
   30.96 +				sub ("IO_NMI", "0x070", val);
   30.97 +				sub ("IO_NPX", "0x0F0", val);
   30.98 +				sub ("IO_PMP1", "0x026", val);
   30.99 +				sub ("IO_PMP2", "0x178", val);
  30.100 +				sub ("IO_PPI", "0x061", val);
  30.101 +				sub ("IO_RTC", "0x070", val);
  30.102 +				sub ("IO_TIMER1", "0x040", val);
  30.103 +				sub ("IO_TIMER2", "0x048", val);
  30.104 +				sub ("IO_UHA0", "0x330", val);
  30.105 +				sub ("IO_VGA", "0x3C0", val);
  30.106 +				sub ("IO_WD1", "0x1F0", val);
  30.107 +				sub ("IO_WD2", "0x170", val);
  30.108 +			} else {
  30.109 +				# map key names
  30.110 +				sub ("iomem", "maddr", key);
  30.111 +				sub ("iosiz", "msize", key);
  30.112 +			}
  30.113 +			printf "hint.%s.%s.%s=\"%s\"\n", name, unit, key, val;
  30.114 +			continue;
  30.115 +		}
  30.116 +		printf ("unrecognized config token '%s:%s' on line %s\n",
  30.117 +			rest, key, NR); # > "/dev/stderr";
  30.118 +	}
  30.119 +}
    31.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    31.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/clock.c	Tue Apr 05 11:27:50 2005 +0000
    31.3 @@ -0,0 +1,511 @@
    31.4 +/*-
    31.5 + * Copyright (c) 1990 The Regents of the University of California.
    31.6 + * All rights reserved.
    31.7 + *
    31.8 + * This code is derived from software contributed to Berkeley by
    31.9 + * William Jolitz and Don Ahn.
   31.10 + *
   31.11 + * Redistribution and use in source and binary forms, with or without
   31.12 + * modification, are permitted provided that the following conditions
   31.13 + * are met:
   31.14 + * 1. Redistributions of source code must retain the above copyright
   31.15 + *    notice, this list of conditions and the following disclaimer.
   31.16 + * 2. Redistributions in binary form must reproduce the above copyright
   31.17 + *    notice, this list of conditions and the following disclaimer in the
   31.18 + *    documentation and/or other materials provided with the distribution.
   31.19 + * 3. All advertising materials mentioning features or use of this software
   31.20 + *    must display the following acknowledgement:
   31.21 + *	This product includes software developed by the University of
   31.22 + *	California, Berkeley and its contributors.
   31.23 + * 4. Neither the name of the University nor the names of its contributors
   31.24 + *    may be used to endorse or promote products derived from this software
   31.25 + *    without specific prior written permission.
   31.26 + *
   31.27 + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   31.28 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   31.29 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   31.30 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   31.31 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   31.32 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   31.33 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   31.34 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31.35 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   31.36 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   31.37 + * SUCH DAMAGE.
   31.38 + *
   31.39 + *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
   31.40 + */
   31.41 +
   31.42 +#include <sys/cdefs.h>
   31.43 +__FBSDID("$FreeBSD: src/sys/i386/isa/clock.c,v 1.207 2003/11/13 10:02:12 phk Exp $");
   31.44 +
   31.45 +/* #define DELAYDEBUG */
   31.46 +/*
   31.47 + * Routines to handle clock hardware.
   31.48 + */
   31.49 +
   31.50 +/*
   31.51 + * inittodr, settodr and support routines written
   31.52 + * by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
   31.53 + *
   31.54 + * reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
   31.55 + */
   31.56 +
   31.57 +#include "opt_clock.h"
   31.58 +#include "opt_isa.h"
   31.59 +#include "opt_mca.h"
   31.60 +
   31.61 +#include <sys/param.h>
   31.62 +#include <sys/systm.h>
   31.63 +#include <sys/bus.h>
   31.64 +#include <sys/lock.h>
   31.65 +#include <sys/mutex.h>
   31.66 +#include <sys/proc.h>
   31.67 +#include <sys/time.h>
   31.68 +#include <sys/timetc.h>
   31.69 +#include <sys/kernel.h>
   31.70 +#include <sys/limits.h>
   31.71 +#include <sys/sysctl.h>
   31.72 +#include <sys/cons.h>
   31.73 +#include <sys/power.h>
   31.74 +
   31.75 +#include <machine/clock.h>
   31.76 +#include <machine/cputypes.h>
   31.77 +#include <machine/frame.h>
   31.78 +#include <machine/intr_machdep.h>
   31.79 +#include <machine/md_var.h>
   31.80 +#include <machine/psl.h>
   31.81 +#if defined(SMP)
   31.82 +#include <machine/smp.h>
   31.83 +#endif
   31.84 +#include <machine/specialreg.h>
   31.85 +
   31.86 +#include <i386/isa/icu.h>
   31.87 +#include <i386/isa/isa.h>
   31.88 +#include <isa/rtc.h>
   31.89 +#include <i386/isa/timerreg.h>
   31.90 +
   31.91 +/* XEN specific defines */
   31.92 +#include <machine/xen_intr.h>
   31.93 +
   31.94 +/*
   31.95 + * 32-bit time_t's can't reach leap years before 1904 or after 2036, so we
   31.96 + * can use a simple formula for leap years.
   31.97 + */
   31.98 +#define	LEAPYEAR(y) (((u_int)(y) % 4 == 0) ? 1 : 0)
   31.99 +#define DAYSPERYEAR   (31+28+31+30+31+30+31+31+30+31+30+31)
  31.100 +
  31.101 +int	adjkerntz;		/* local offset from GMT in seconds */
  31.102 +int	clkintr_pending;
  31.103 +int	disable_rtc_set = 1;	/* disable resettodr() if != 0 */
  31.104 +int	pscnt = 1;
  31.105 +int	psdiv = 1;
  31.106 +int	statclock_disable;
  31.107 +#ifndef TIMER_FREQ
  31.108 +#define TIMER_FREQ   1193182
  31.109 +#endif
  31.110 +u_int	timer_freq = TIMER_FREQ;
  31.111 +
  31.112 +static	const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
  31.113 +
  31.114 +/* Values for timerX_state: */
  31.115 +#define	RELEASED	0
  31.116 +#define	RELEASE_PENDING	1
  31.117 +#define	ACQUIRED	2
  31.118 +#define	ACQUIRE_PENDING	3
  31.119 +
  31.120 +/* Cached *multiplier* to convert TSC counts to microseconds.
  31.121 + * (see the equation below).
  31.122 + * Equal to 2^32 * (1 / (clocks per usec) ).
  31.123 + * Initialized in time_init.
  31.124 + */
  31.125 +static unsigned long fast_gettimeoffset_quotient;
  31.126 +
  31.127 +/* These are peridically updated in shared_info, and then copied here. */
  31.128 +static uint32_t shadow_tsc_stamp;
  31.129 +static uint64_t shadow_system_time;
  31.130 +static uint32_t shadow_time_version;
  31.131 +static struct timeval shadow_tv;
  31.132 +
  31.133 +static uint64_t processed_system_time;/* System time (ns) at last processing. */
  31.134 +
  31.135 +#define NS_PER_TICK (1000000000ULL/hz)
  31.136 +
  31.137 +/* convert from cycles(64bits) => nanoseconds (64bits)
  31.138 + *  basic equation:
  31.139 + *		ns = cycles / (freq / ns_per_sec)
  31.140 + *		ns = cycles * (ns_per_sec / freq)
  31.141 + *		ns = cycles * (10^9 / (cpu_mhz * 10^6))
  31.142 + *		ns = cycles * (10^3 / cpu_mhz)
  31.143 + *
  31.144 + *	Then we use scaling math (suggested by george@mvista.com) to get:
  31.145 + *		ns = cycles * (10^3 * SC / cpu_mhz) / SC
  31.146 + *		ns = cycles * cyc2ns_scale / SC
  31.147 + *
  31.148 + *	And since SC is a constant power of two, we can convert the div
  31.149 + *  into a shift.   
  31.150 + *			-johnstul@us.ibm.com "math is hard, lets go shopping!"
  31.151 + */
  31.152 +static unsigned long cyc2ns_scale; 
  31.153 +#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
  31.154 +
  31.155 +static inline void set_cyc2ns_scale(unsigned long cpu_mhz)
  31.156 +{
  31.157 +	cyc2ns_scale = (1000 << CYC2NS_SCALE_FACTOR)/cpu_mhz;
  31.158 +}
  31.159 +
  31.160 +static inline unsigned long long cycles_2_ns(unsigned long long cyc)
  31.161 +{
  31.162 +	return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
  31.163 +}
  31.164 +
  31.165 +/*
  31.166 + * Reads a consistent set of time-base values from Xen, into a shadow data
  31.167 + * area. Must be called with the xtime_lock held for writing.
  31.168 + */
  31.169 +static void __get_time_values_from_xen(void)
  31.170 +{
  31.171 +	shared_info_t *s = HYPERVISOR_shared_info;
  31.172 +
  31.173 +	do {
  31.174 +		shadow_time_version = s->time_version2;
  31.175 +		rmb();
  31.176 +		shadow_tv.tv_sec    = s->wc_sec;
  31.177 +		shadow_tv.tv_usec   = s->wc_usec;
  31.178 +		shadow_tsc_stamp    = (uint32_t)s->tsc_timestamp;
  31.179 +		shadow_system_time  = s->system_time;
  31.180 +		rmb();
  31.181 +	}
  31.182 +	while (shadow_time_version != s->time_version1);
  31.183 +}
  31.184 +
  31.185 +#define TIME_VALUES_UP_TO_DATE \
  31.186 +	(shadow_time_version == HYPERVISOR_shared_info->time_version2)
  31.187 +
  31.188 +static	void	(*timer_func)(struct clockframe *frame) = hardclock;
  31.189 +
  31.190 +static	unsigned xen_get_offset(void);
  31.191 +static	unsigned xen_get_timecount(struct timecounter *tc);
  31.192 +
  31.193 +static struct timecounter xen_timecounter = {
  31.194 +	xen_get_timecount,	/* get_timecount */
  31.195 +	0,			/* no poll_pps */
  31.196 +	~0u,			/* counter_mask */
  31.197 +	0,			/* frequency */
  31.198 +	"ixen",			/* name */
  31.199 +	0			/* quality */
  31.200 +};
  31.201 +
  31.202 +
  31.203 +static void 
  31.204 +clkintr(struct clockframe *frame)
  31.205 +{
  31.206 +    int64_t delta;
  31.207 +    long ticks = 0;
  31.208 +
  31.209 +
  31.210 +    do {
  31.211 +    	__get_time_values_from_xen();
  31.212 +    	delta = (int64_t)(shadow_system_time + 
  31.213 +			  xen_get_offset() * 1000 - 
  31.214 +			  processed_system_time);
  31.215 +    } while (!TIME_VALUES_UP_TO_DATE);
  31.216 +
  31.217 +    if (unlikely(delta < 0)) {
  31.218 +        printk("Timer ISR: Time went backwards: %lld\n", delta);
  31.219 +        return;
  31.220 +    }
  31.221 +
  31.222 +    /* Process elapsed ticks since last call. */
  31.223 +    while ( delta >= NS_PER_TICK )
  31.224 +    {
  31.225 +        ticks++;
  31.226 +        delta -= NS_PER_TICK;
  31.227 +        processed_system_time += NS_PER_TICK;
  31.228 +    }
  31.229 +
  31.230 +    if (ticks > 0) {
  31.231 +	if (frame)
  31.232 +		timer_func(frame);
  31.233 +#ifdef SMP
  31.234 +	if (timer_func == hardclock && frame)
  31.235 +		forward_hardclock();
  31.236 +#endif
  31.237 +    }
  31.238 +}
  31.239 +
  31.240 +#include "opt_ddb.h"
  31.241 +static uint32_t
  31.242 +getit(void)
  31.243 +{
  31.244 +	__get_time_values_from_xen();
  31.245 +	return shadow_tsc_stamp;
  31.246 +}
  31.247 +
  31.248 +/*
  31.249 + * Wait "n" microseconds.
  31.250 + * Relies on timer 1 counting down from (timer_freq / hz)
  31.251 + * Note: timer had better have been programmed before this is first used!
  31.252 + */
  31.253 +void
  31.254 +DELAY(int n)
  31.255 +{
  31.256 +	int delta, ticks_left;
  31.257 +	uint32_t tick, prev_tick;
  31.258 +#ifdef DELAYDEBUG
  31.259 +	int getit_calls = 1;
  31.260 +	int n1;
  31.261 +	static int state = 0;
  31.262 +
  31.263 +	if (state == 0) {
  31.264 +		state = 1;
  31.265 +		for (n1 = 1; n1 <= 10000000; n1 *= 10)
  31.266 +			DELAY(n1);
  31.267 +		state = 2;
  31.268 +	}
  31.269 +	if (state == 1)
  31.270 +		printf("DELAY(%d)...", n);
  31.271 +#endif
  31.272 +	/*
  31.273 +	 * Read the counter first, so that the rest of the setup overhead is
  31.274 +	 * counted.  Guess the initial overhead is 20 usec (on most systems it
  31.275 +	 * takes about 1.5 usec for each of the i/o's in getit().  The loop
  31.276 +	 * takes about 6 usec on a 486/33 and 13 usec on a 386/20.  The
  31.277 +	 * multiplications and divisions to scale the count take a while).
  31.278 +	 *
  31.279 +	 * However, if ddb is active then use a fake counter since reading
  31.280 +	 * the i8254 counter involves acquiring a lock.  ddb must not go
  31.281 +	 * locking for many reasons, but it calls here for at least atkbd
  31.282 +	 * input.
  31.283 +	 */
  31.284 +	prev_tick = getit();
  31.285 +
  31.286 +	n -= 0;			/* XXX actually guess no initial overhead */
  31.287 +	/*
  31.288 +	 * Calculate (n * (timer_freq / 1e6)) without using floating point
  31.289 +	 * and without any avoidable overflows.
  31.290 +	 */
  31.291 +	if (n <= 0)
  31.292 +		ticks_left = 0;
  31.293 +	else if (n < 256)
  31.294 +		/*
  31.295 +		 * Use fixed point to avoid a slow division by 1000000.
  31.296 +		 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
  31.297 +		 * 2^15 is the first power of 2 that gives exact results
  31.298 +		 * for n between 0 and 256.
  31.299 +		 */
  31.300 +		ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
  31.301 +	else
  31.302 +		/*
  31.303 +		 * Don't bother using fixed point, although gcc-2.7.2
  31.304 +		 * generates particularly poor code for the long long
  31.305 +		 * division, since even the slow way will complete long
  31.306 +		 * before the delay is up (unless we're interrupted).
  31.307 +		 */
  31.308 +		ticks_left = ((u_int)n * (long long)timer_freq + 999999)
  31.309 +			     / 1000000;
  31.310 +
  31.311 +	while (ticks_left > 0) {
  31.312 +		tick = getit();
  31.313 +#ifdef DELAYDEBUG
  31.314 +		++getit_calls;
  31.315 +#endif
  31.316 +		delta = tick - prev_tick;
  31.317 +		prev_tick = tick;
  31.318 +		if (delta < 0) {
  31.319 +			/*
  31.320 +			 * Guard against timer0_max_count being wrong.
  31.321 +			 * This shouldn't happen in normal operation,
  31.322 +			 * but it may happen if set_timer_freq() is
  31.323 +			 * traced.
  31.324 +			 */
  31.325 +			/* delta += timer0_max_count; ??? */
  31.326 +			if (delta < 0)
  31.327 +				delta = 0;
  31.328 +		}
  31.329 +		ticks_left -= delta;
  31.330 +	}
  31.331 +#ifdef DELAYDEBUG
  31.332 +	if (state == 1)
  31.333 +		printf(" %d calls to getit() at %d usec each\n",
  31.334 +		       getit_calls, (n + 5) / getit_calls);
  31.335 +#endif
  31.336 +}
  31.337 +
  31.338 +
  31.339 +int
  31.340 +sysbeep(int pitch, int period)
  31.341 +{
  31.342 +	return (0);
  31.343 +}
  31.344 +
  31.345 +/*
  31.346 + * Restore all the timers non-atomically (XXX: should be atomically).
  31.347 + *
  31.348 + * This function is called from pmtimer_resume() to restore all the timers.
  31.349 + * This should not be necessary, but there are broken laptops that do not
  31.350 + * restore all the timers on resume.
  31.351 + */
  31.352 +void
  31.353 +timer_restore(void)
  31.354 +{
  31.355 +    /* Get timebases for new environment. */ 
  31.356 +    __get_time_values_from_xen();
  31.357 +
  31.358 +    /* Reset our own concept of passage of system time. */
  31.359 +    processed_system_time = shadow_system_time;
  31.360 +}
  31.361 +
  31.362 +void
  31.363 +startrtclock()
  31.364 +{
  31.365 +	unsigned long long alarm;
  31.366 +	uint64_t __cpu_khz;
  31.367 +	uint32_t cpu_khz;
  31.368 +
  31.369 +	__cpu_khz = HYPERVISOR_shared_info->cpu_freq;
  31.370 +	__cpu_khz /= 1000;
  31.371 +	cpu_khz = (uint32_t)__cpu_khz;
  31.372 +	printk("Xen reported: %lu.%03lu MHz processor.\n", 
  31.373 +	       cpu_khz / 1000, cpu_khz % 1000);
  31.374 +
  31.375 +	/* (10^6 * 2^32) / cpu_hz = (10^3 * 2^32) / cpu_khz =
  31.376 +	   (2^32 * 1 / (clocks/us)) */
  31.377 +	{	
  31.378 +		unsigned long eax=0, edx=1000;
  31.379 +		__asm__("divl %2"
  31.380 +		    :"=a" (fast_gettimeoffset_quotient), "=d" (edx)
  31.381 +		    :"r" (cpu_khz),
  31.382 +		    "0" (eax), "1" (edx));
  31.383 +	}
  31.384 +
  31.385 +	set_cyc2ns_scale(cpu_khz/1000);
  31.386 +	timer_freq = tsc_freq = xen_timecounter.tc_frequency = cpu_khz * 1000;
  31.387 +        tc_init(&xen_timecounter);
  31.388 +
  31.389 +
  31.390 +	rdtscll(alarm);
  31.391 +}
  31.392 +
  31.393 +/*
  31.394 + * Initialize the time of day register, based on the time base which is, e.g.
  31.395 + * from a filesystem.
  31.396 + */
  31.397 +void
  31.398 +inittodr(time_t base)
  31.399 +{
  31.400 +	int		s, y;
  31.401 +	struct timespec ts;
  31.402 +
  31.403 +	s = splclock();
  31.404 +	if (base) {
  31.405 +		ts.tv_sec = base;
  31.406 +		ts.tv_nsec = 0;
  31.407 +		tc_setclock(&ts);
  31.408 +	}
  31.409 +
  31.410 +	y = time_second - shadow_tv.tv_sec;
  31.411 +	if (y <= -2 || y >= 2) {
  31.412 +		/* badly off, adjust it */
  31.413 +		ts.tv_sec = shadow_tv.tv_sec;
  31.414 +		ts.tv_nsec = shadow_tv.tv_usec * 1000;
  31.415 +		tc_setclock(&ts);
  31.416 +	}
  31.417 +	splx(s);
  31.418 +}
  31.419 +
  31.420 +/*
  31.421 + * Write system time back to RTC.  Not supported for guest domains.
  31.422 + */
  31.423 +void
  31.424 +resettodr()
  31.425 +{
  31.426 +}
  31.427 +
  31.428 +
  31.429 +/*
  31.430 + * Start clocks running.
  31.431 + */
  31.432 +void
  31.433 +cpu_initclocks()
  31.434 +{
  31.435 +	int diag;
  31.436 +	int time_irq = bind_virq_to_irq(VIRQ_TIMER);
  31.437 +
  31.438 +        if ((diag = intr_add_handler("clk", time_irq,
  31.439 +				     (driver_intr_t *)clkintr, NULL,
  31.440 +				     INTR_TYPE_CLK | INTR_FAST, NULL))) {
  31.441 +		panic("failed to register clock interrupt: %d\n", diag);
  31.442 +	}
  31.443 +
  31.444 +	/* should fast clock be enabled ? */
  31.445 +
  31.446 +	/* initialize xen values */
  31.447 +	__get_time_values_from_xen();
  31.448 +	processed_system_time = shadow_system_time;
  31.449 +}
  31.450 +
  31.451 +void
  31.452 +cpu_startprofclock(void)
  31.453 +{
  31.454 +
  31.455 +    	printf("cpu_startprofclock: profiling clock is not supported\n");
  31.456 +}
  31.457 +
  31.458 +void
  31.459 +cpu_stopprofclock(void)
  31.460 +{
  31.461 +
  31.462 +    	printf("cpu_stopprofclock: profiling clock is not supported\n");
  31.463 +}
  31.464 +
  31.465 +static uint32_t
  31.466 +xen_get_timecount(struct timecounter *tc)
  31.467 +{
  31.468 +    	__get_time_values_from_xen();
  31.469 +	return shadow_tsc_stamp;
  31.470 +}
  31.471 +
  31.472 +/*
  31.473 + * Track behavior of cur_timer->get_offset() functionality in timer_tsc.c
  31.474 + */
  31.475 +#undef rdtsc
  31.476 +#define rdtsc(low,high) \
  31.477 +     __asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
  31.478 +
  31.479 +static uint32_t
  31.480 +xen_get_offset(void)
  31.481 +{
  31.482 +	register unsigned long eax, edx;
  31.483 +
  31.484 +	/* Read the Time Stamp Counter */
  31.485 +
  31.486 +	rdtsc(eax,edx);
  31.487 +
  31.488 +	/* .. relative to previous jiffy (32 bits is enough) */
  31.489 +	eax -= shadow_tsc_stamp;
  31.490 +
  31.491 +	/*
  31.492 +	 * Time offset = (tsc_low delta) * fast_gettimeoffset_quotient
  31.493 +	 *             = (tsc_low delta) * (usecs_per_clock)
  31.494 +	 *             = (tsc_low delta) * (usecs_per_jiffy / clocks_per_jiffy)
  31.495 +	 *
  31.496 +	 * Using a mull instead of a divl saves up to 31 clock cycles
  31.497 +	 * in the critical path.
  31.498 +	 */
  31.499 +
  31.500 +	__asm__("mull %2"
  31.501 +		:"=a" (eax), "=d" (edx)
  31.502 +		:"rm" (fast_gettimeoffset_quotient),
  31.503 +		 "0" (eax));
  31.504 +
  31.505 +	/* our adjusted time offset in microseconds */
  31.506 +	return edx;
  31.507 +}
  31.508 +
  31.509 +void
  31.510 +idle_block(void)
  31.511 +{
  31.512 +	if (HYPERVISOR_set_timer_op(processed_system_time + NS_PER_TICK) == 0)
  31.513 +		HYPERVISOR_block();
  31.514 +}
    32.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    32.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/critical.c	Tue Apr 05 11:27:50 2005 +0000
    32.3 @@ -0,0 +1,46 @@
    32.4 +/*-
    32.5 + * Copyright (c) 2002 Matthew Dillon.  All Rights Reserved.
    32.6 + * Redistribution and use in source and binary forms, with or without
    32.7 + * modification, are permitted provided that the following conditions
    32.8 + * are met:
    32.9 + * 1. Redistributions of source code must retain the above copyright
   32.10 + *    notice, this list of conditions and the following disclaimer.
   32.11 + * 2. Redistributions in binary form must reproduce the above copyright
   32.12 + *    notice, this list of conditions and the following disclaimer in the
   32.13 + *    documentation and/or other materials provided with the distribution.
   32.14 + * 4. Neither the name of the University nor the names of its contributors
   32.15 + *    may be used to endorse or promote products derived from this software
   32.16 + *    without specific prior written permission.
   32.17 + *
   32.18 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
   32.19 + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   32.20 + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   32.21 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
   32.22 + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   32.23 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
   32.24 + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   32.25 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
   32.26 + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
   32.27 + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
   32.28 + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   32.29 + */
   32.30 +
   32.31 +#include <sys/cdefs.h>
   32.32 +__FBSDID("$FreeBSD: src/sys/i386/i386/critical.c,v 1.12 2003/11/03 21:06:54 jhb Exp $");
   32.33 +
   32.34 +#include <sys/param.h>
   32.35 +#include <sys/systm.h>
   32.36 +#include <sys/proc.h>
   32.37 +#include <machine/critical.h>
   32.38 +#include <machine/psl.h>
   32.39 +
   32.40 +/*
   32.41 + * cpu_critical_fork_exit() - cleanup after fork
   32.42 + *
   32.43 + *	Enable interrupts in the saved copy of eflags.
   32.44 + */
   32.45 +void
   32.46 +cpu_critical_fork_exit(void)
   32.47 +{
   32.48 +    curthread->td_md.md_savecrit = 0;
   32.49 +}
    33.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    33.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/ctrl_if.c	Tue Apr 05 11:27:50 2005 +0000
    33.3 @@ -0,0 +1,476 @@
    33.4 +/******************************************************************************
    33.5 + * ctrl_if.c
    33.6 + * 
    33.7 + * Management functions for special interface to the domain controller.
    33.8 + * 
    33.9 + * Copyright (c) 2004, K A Fraser
   33.10 + * Copyright (c) 2004, K M Macy
   33.11 + */
   33.12 +
   33.13 +#include <sys/param.h>
   33.14 +#include <sys/systm.h>
   33.15 +#include <sys/uio.h>
   33.16 +#include <sys/bus.h>
   33.17 +#include <sys/malloc.h>
   33.18 +#include <sys/kernel.h>
   33.19 +#include <sys/lock.h>
   33.20 +#include <sys/mutex.h>
   33.21 +#include <sys/selinfo.h>
   33.22 +#include <sys/poll.h>
   33.23 +#include <sys/conf.h>
   33.24 +#include <sys/fcntl.h>
   33.25 +#include <sys/ioccom.h>
   33.26 +#include <sys/taskqueue.h>
   33.27 +
   33.28 +
   33.29 +#include <machine/cpufunc.h>
   33.30 +#include <machine/intr_machdep.h>
   33.31 +#include <machine/xen-os.h>
   33.32 +#include <machine/xen_intr.h>
   33.33 +#include <machine/bus.h>
   33.34 +#include <sys/rman.h>
   33.35 +#include <machine/resource.h>
   33.36 +#include <machine/synch_bitops.h>
   33.37 +
   33.38 +
   33.39 +#include <machine/hypervisor-ifs.h>
   33.40 +
   33.41 +#include <machine/ctrl_if.h>
   33.42 +#include <machine/evtchn.h>
   33.43 +
   33.44 +/*
   33.45 + * Only used by initial domain which must create its own control-interface
   33.46 + * event channel. This value is picked up by the user-space domain controller
   33.47 + * via an ioctl.
   33.48 + */
   33.49 +int initdom_ctrlif_domcontroller_port = -1;
   33.50 +
   33.51 +static int        ctrl_if_evtchn;
   33.52 +static int        ctrl_if_irq;
   33.53 +static struct mtx ctrl_if_lock;
   33.54 +static int *      ctrl_if_wchan = &ctrl_if_evtchn;
   33.55 +
   33.56 +
   33.57 +static CONTROL_RING_IDX ctrl_if_tx_resp_cons;
   33.58 +static CONTROL_RING_IDX ctrl_if_rx_req_cons;
   33.59 +
   33.60 +/* Incoming message requests. */
   33.61 +    /* Primary message type -> message handler. */
   33.62 +static ctrl_msg_handler_t ctrl_if_rxmsg_handler[256];
   33.63 +    /* Primary message type -> callback in process context? */
   33.64 +static unsigned long ctrl_if_rxmsg_blocking_context[256/sizeof(unsigned long)];
   33.65 +    /* Queue up messages to be handled in process context. */
   33.66 +static ctrl_msg_t ctrl_if_rxmsg_deferred[CONTROL_RING_SIZE];
   33.67 +static CONTROL_RING_IDX ctrl_if_rxmsg_deferred_prod;
   33.68 +static CONTROL_RING_IDX ctrl_if_rxmsg_deferred_cons;
   33.69 +
   33.70 +/* Incoming message responses: message identifier -> message handler/id. */
   33.71 +static struct {
   33.72 +    ctrl_msg_handler_t fn;
   33.73 +    unsigned long      id;
   33.74 +} ctrl_if_txmsg_id_mapping[CONTROL_RING_SIZE];
   33.75 +
   33.76 +/*
   33.77 + * FreeBSD task queues don't allow you to requeue an already executing task.
   33.78 + * Since ctrl_if_interrupt clears the TX_FULL condition and schedules any 
   33.79 + * waiting tasks, which themselves may need to schedule a new task 
   33.80 + * (due to new a TX_FULL condition), we ping-pong between these A/B task queues.
   33.81 + * The interrupt runs anything on the current queue and moves the index so that
   33.82 + * future schedulings occur on the next queue.  We should never get into a 
   33.83 + * situation where there is a task scheduleded on both the A & B queues.
   33.84 + */
   33.85 +TASKQUEUE_DECLARE(ctrl_if_txA);
   33.86 +TASKQUEUE_DEFINE(ctrl_if_txA, NULL, NULL, {});
   33.87 +TASKQUEUE_DECLARE(ctrl_if_txB);
   33.88 +TASKQUEUE_DEFINE(ctrl_if_txB, NULL, NULL, {});
   33.89 +struct taskqueue **taskqueue_ctrl_if_tx[2] = { &taskqueue_ctrl_if_txA,
   33.90 +    				               &taskqueue_ctrl_if_txB };
   33.91 +int ctrl_if_idx;
   33.92 +
   33.93 +static struct task ctrl_if_rx_tasklet;
   33.94 +static struct task ctrl_if_tx_tasklet;
   33.95 +    /* Passed to schedule_task(). */
   33.96 +static struct task ctrl_if_rxmsg_deferred_task;
   33.97 +
   33.98 +
   33.99 +
  33.100 +#define get_ctrl_if() ((control_if_t *)((char *)HYPERVISOR_shared_info + 2048))
  33.101 +#define TX_FULL(_c)   \
  33.102 +    (((_c)->tx_req_prod - ctrl_if_tx_resp_cons) == CONTROL_RING_SIZE)
  33.103 +
  33.104 +static void 
  33.105 +ctrl_if_notify_controller(void)
  33.106 +{
  33.107 +    notify_via_evtchn(ctrl_if_evtchn);
  33.108 +}
  33.109 +
  33.110 +static void 
  33.111 +ctrl_if_rxmsg_default_handler(ctrl_msg_t *msg, unsigned long id)
  33.112 +{
  33.113 +    msg->length = 0;
  33.114 +    ctrl_if_send_response(msg);
  33.115 +}
  33.116 +
  33.117 +static void 
  33.118 +__ctrl_if_tx_tasklet(void *context __unused, int pending __unused)
  33.119 +{
  33.120 +    control_if_t *ctrl_if = get_ctrl_if();
  33.121 +    ctrl_msg_t   *msg;
  33.122 +    int           was_full = TX_FULL(ctrl_if);
  33.123 +
  33.124 +    while ( ctrl_if_tx_resp_cons != ctrl_if->tx_resp_prod )
  33.125 +    {
  33.126 +        msg = &ctrl_if->tx_ring[MASK_CONTROL_IDX(ctrl_if_tx_resp_cons)];
  33.127 +
  33.128 +        /* Execute the callback handler, if one was specified. */
  33.129 +        if ( msg->id != 0xFF )
  33.130 +        {
  33.131 +            (*ctrl_if_txmsg_id_mapping[msg->id].fn)(
  33.132 +                msg, ctrl_if_txmsg_id_mapping[msg->id].id);
  33.133 +            smp_mb(); /* Execute, /then/ free. */
  33.134 +            ctrl_if_txmsg_id_mapping[msg->id].fn = NULL;
  33.135 +        }
  33.136 +
  33.137 +        /*
  33.138 +         * Step over the message in the ring /after/ finishing reading it. As 
  33.139 +         * soon as the index is updated then the message may get blown away.
  33.140 +         */
  33.141 +        smp_mb();
  33.142 +        ctrl_if_tx_resp_cons++;
  33.143 +    }
  33.144 +
  33.145 +    if ( was_full && !TX_FULL(ctrl_if) )
  33.146 +    {
  33.147 +        wakeup(ctrl_if_wchan);
  33.148 +
  33.149 +	/* bump idx so future enqueues will occur on the next taskq
  33.150 +	 * process any currently pending tasks
  33.151 +	 */
  33.152 +	ctrl_if_idx++;		
  33.153 +        taskqueue_run(*taskqueue_ctrl_if_tx[(ctrl_if_idx-1) & 1]);
  33.154 +    }
  33.155 +}
  33.156 +
  33.157 +static void 
  33.158 +__ctrl_if_rxmsg_deferred_task(void *context __unused, int pending __unused)
  33.159 +{
  33.160 +    ctrl_msg_t *msg;
  33.161 +
  33.162 +    while ( ctrl_if_rxmsg_deferred_cons != ctrl_if_rxmsg_deferred_prod )
  33.163 +    {
  33.164 +        msg = &ctrl_if_rxmsg_deferred[MASK_CONTROL_IDX(
  33.165 +            ctrl_if_rxmsg_deferred_cons++)];
  33.166 +        (*ctrl_if_rxmsg_handler[msg->type])(msg, 0);
  33.167 +    }
  33.168 +}
  33.169 +
  33.170 +static void 
  33.171 +__ctrl_if_rx_tasklet(void *context __unused, int pending __unused)
  33.172 +{
  33.173 +    control_if_t *ctrl_if = get_ctrl_if();
  33.174 +    ctrl_msg_t    msg, *pmsg;
  33.175 +
  33.176 +    while ( ctrl_if_rx_req_cons != ctrl_if->rx_req_prod )
  33.177 +    {
  33.178 +        pmsg = &ctrl_if->rx_ring[MASK_CONTROL_IDX(ctrl_if_rx_req_cons++)];
  33.179 +        memcpy(&msg, pmsg, offsetof(ctrl_msg_t, msg));
  33.180 +        if ( msg.length != 0 )
  33.181 +            memcpy(msg.msg, pmsg->msg, msg.length);
  33.182 +        if ( test_bit(msg.type, &ctrl_if_rxmsg_blocking_context) )
  33.183 +        {
  33.184 +            pmsg = &ctrl_if_rxmsg_deferred[MASK_CONTROL_IDX(
  33.185 +                ctrl_if_rxmsg_deferred_prod++)];
  33.186 +            memcpy(pmsg, &msg, offsetof(ctrl_msg_t, msg) + msg.length);
  33.187 +            taskqueue_enqueue(taskqueue_thread, &ctrl_if_rxmsg_deferred_task);
  33.188 +        }
  33.189 +        else
  33.190 +        {
  33.191 +            (*ctrl_if_rxmsg_handler[msg.type])(&msg, 0);
  33.192 +        }
  33.193 +    }
  33.194 +}
  33.195 +
  33.196 +static void 
  33.197 +ctrl_if_interrupt(void *ctrl_sc)
  33.198 +/* (int irq, void *dev_id, struct pt_regs *regs) */
  33.199 +{
  33.200 +    control_if_t *ctrl_if = get_ctrl_if();
  33.201 +
  33.202 +    if ( ctrl_if_tx_resp_cons != ctrl_if->tx_resp_prod )
  33.203 +	taskqueue_enqueue(taskqueue_swi, &ctrl_if_tx_tasklet);
  33.204 +    
  33.205 +
  33.206 +    if ( ctrl_if_rx_req_cons != ctrl_if->rx_req_prod )
  33.207 + 	taskqueue_enqueue(taskqueue_swi, &ctrl_if_rx_tasklet);
  33.208 +}
  33.209 +
  33.210 +int 
  33.211 +ctrl_if_send_message_noblock(
  33.212 +    ctrl_msg_t *msg, 
  33.213 +    ctrl_msg_handler_t hnd,
  33.214 +    unsigned long id)
  33.215 +{
  33.216 +    control_if_t *ctrl_if = get_ctrl_if();
  33.217 +    unsigned long flags;
  33.218 +    int           i;
  33.219 +
  33.220 +    mtx_lock_irqsave(&ctrl_if_lock, flags);
  33.221 +
  33.222 +    if ( TX_FULL(ctrl_if) )
  33.223 +    {
  33.224 +        mtx_unlock_irqrestore(&ctrl_if_lock, flags);
  33.225 +        return EAGAIN;
  33.226 +    }
  33.227 +
  33.228 +    msg->id = 0xFF;
  33.229 +    if ( hnd != NULL )
  33.230 +    {
  33.231 +        for ( i = 0; ctrl_if_txmsg_id_mapping[i].fn != NULL; i++ )
  33.232 +            continue;
  33.233 +        ctrl_if_txmsg_id_mapping[i].fn = hnd;
  33.234 +        ctrl_if_txmsg_id_mapping[i].id = id;
  33.235 +        msg->id = i;
  33.236 +    }
  33.237 +
  33.238 +    memcpy(&ctrl_if->tx_ring[MASK_CONTROL_IDX(ctrl_if->tx_req_prod)], 
  33.239 +           msg, sizeof(*msg));
  33.240 +    wmb(); /* Write the message before letting the controller peek at it. */
  33.241 +    ctrl_if->tx_req_prod++;
  33.242 +
  33.243 +    mtx_unlock_irqrestore(&ctrl_if_lock, flags);
  33.244 +
  33.245 +    ctrl_if_notify_controller();
  33.246 +
  33.247 +    return 0;
  33.248 +}
  33.249 +
  33.250 +int 
  33.251 +ctrl_if_send_message_block(
  33.252 +    ctrl_msg_t *msg, 
  33.253 +    ctrl_msg_handler_t hnd, 
  33.254 +    unsigned long id,
  33.255 +    long wait_state)
  33.256 +{
  33.257 +    int rc, sst = 0;
  33.258 +
  33.259 +    /* Fast path. */
  33.260 +    if ( (rc = ctrl_if_send_message_noblock(msg, hnd, id)) != EAGAIN )
  33.261 +        return rc;
  33.262 +
  33.263 +
  33.264 +    for ( ; ; )
  33.265 +    {
  33.266 +
  33.267 +        if ( (rc = ctrl_if_send_message_noblock(msg, hnd, id)) != EAGAIN )
  33.268 +            break;
  33.269 +
  33.270 +        if ( sst != 0) 
  33.271 +	    return EINTR;
  33.272 +
  33.273 +        sst = tsleep(ctrl_if_wchan, PWAIT|PCATCH, "ctlrwt", 10);
  33.274 +    }
  33.275 +
  33.276 +    return rc;
  33.277 +}
  33.278 +
  33.279 +int 
  33.280 +ctrl_if_enqueue_space_callback(struct task *task)
  33.281 +{
  33.282 +    control_if_t *ctrl_if = get_ctrl_if();
  33.283 +
  33.284 +    /* Fast path. */
  33.285 +    if ( !TX_FULL(ctrl_if) )
  33.286 +        return 0;
  33.287 +
  33.288 +    (void)taskqueue_enqueue(*taskqueue_ctrl_if_tx[(ctrl_if_idx & 1)], task);
  33.289 +
  33.290 +    /*
  33.291 +     * We may race execution of the task queue, so return re-checked status. If
  33.292 +     * the task is not executed despite the ring being non-full then we will
  33.293 +     * certainly return 'not full'.
  33.294 +     */
  33.295 +    smp_mb();
  33.296 +    return TX_FULL(ctrl_if);
  33.297 +}
  33.298 +
  33.299 +void 
  33.300 +ctrl_if_send_response(ctrl_msg_t *msg)
  33.301 +{
  33.302 +    control_if_t *ctrl_if = get_ctrl_if();
  33.303 +    unsigned long flags;
  33.304 +    ctrl_msg_t   *dmsg;
  33.305 +
  33.306 +    /*
  33.307 +     * NB. The response may the original request message, modified in-place.
  33.308 +     * In this situation we may have src==dst, so no copying is required.
  33.309 +     */
  33.310 +    mtx_lock_irqsave(&ctrl_if_lock, flags);
  33.311 +    dmsg = &ctrl_if->rx_ring[MASK_CONTROL_IDX(ctrl_if->rx_resp_prod)];
  33.312 +    if ( dmsg != msg )
  33.313 +        memcpy(dmsg, msg, sizeof(*msg));
  33.314 +    wmb(); /* Write the message before letting the controller peek at it. */
  33.315 +    ctrl_if->rx_resp_prod++;
  33.316 +    mtx_unlock_irqrestore(&ctrl_if_lock, flags);
  33.317 +
  33.318 +    ctrl_if_notify_controller();
  33.319 +}
  33.320 +
  33.321 +int 
  33.322 +ctrl_if_register_receiver(
  33.323 +    uint8_t type, 
  33.324 +    ctrl_msg_handler_t hnd, 
  33.325 +    unsigned int flags)
  33.326 +{
  33.327 +    unsigned long _flags;
  33.328 +    int inuse;
  33.329 +
  33.330 +    mtx_lock_irqsave(&ctrl_if_lock, _flags);
  33.331 +
  33.332 +    inuse = (ctrl_if_rxmsg_handler[type] != ctrl_if_rxmsg_default_handler);
  33.333 +
  33.334 +    if ( inuse )
  33.335 +    {
  33.336 +        printk("Receiver %p already established for control "
  33.337 +               "messages of type %d.\n", ctrl_if_rxmsg_handler[type], type);
  33.338 +    }
  33.339 +    else
  33.340 +    {
  33.341 +        ctrl_if_rxmsg_handler[type] = hnd;
  33.342 +        clear_bit(type, &ctrl_if_rxmsg_blocking_context);
  33.343 +        if ( flags == CALLBACK_IN_BLOCKING_CONTEXT )
  33.344 +        {
  33.345 +            set_bit(type, &ctrl_if_rxmsg_blocking_context);
  33.346 +        }
  33.347 +    }
  33.348 +
  33.349 +    mtx_unlock_irqrestore(&ctrl_if_lock, _flags);
  33.350 +
  33.351 +    return !inuse;
  33.352 +}
  33.353 +
  33.354 +void 
  33.355 +ctrl_if_unregister_receiver(uint8_t type, ctrl_msg_handler_t hnd)
  33.356 +{
  33.357 +    unsigned long flags;
  33.358 +
  33.359 +    mtx_lock_irqsave(&ctrl_if_lock, flags);
  33.360 +
  33.361 +    if ( ctrl_if_rxmsg_handler[type] != hnd )
  33.362 +        printk("Receiver %p is not registered for control "
  33.363 +               "messages of type %d.\n", hnd, type);
  33.364 +    else
  33.365 +        ctrl_if_rxmsg_handler[type] = ctrl_if_rxmsg_default_handler;
  33.366 +
  33.367 +    mtx_unlock_irqrestore(&ctrl_if_lock, flags);
  33.368 +
  33.369 +    /* Ensure that @hnd will not be executed after this function returns. */
  33.370 +    /* XXX need rx_tasklet_lock -- can cheat for now?*/
  33.371 +#ifdef notyet
  33.372 +    tasklet_unlock_wait(&ctrl_if_rx_tasklet);
  33.373 +#endif
  33.374 +}
  33.375 +
  33.376 +void 
  33.377 +ctrl_if_suspend(void)
  33.378 +{
  33.379 +    /* I'm not sure what the equivalent is - we aren't going to support suspend 
  33.380 +     * yet anyway 
  33.381 +     */
  33.382 +#ifdef notyet
  33.383 +    free_irq(ctrl_if_irq, NULL);
  33.384 +#endif
  33.385 +    unbind_evtchn_from_irq(ctrl_if_evtchn);
  33.386 +}
  33.387 + 
  33.388 +/** Reset the control interface progress pointers.
  33.389 + * Marks the queues empty if 'clear' non-zero.
  33.390 + */
  33.391 +static void 
  33.392 +ctrl_if_reset(int clear)
  33.393 +{
  33.394 +    control_if_t *ctrl_if = get_ctrl_if();
  33.395 +
  33.396 +    if (clear) {
  33.397 +	*ctrl_if = (control_if_t){};
  33.398 +    }
  33.399 +    
  33.400 +    ctrl_if_tx_resp_cons = ctrl_if->tx_resp_prod;
  33.401 +    ctrl_if_rx_req_cons  = ctrl_if->rx_resp_prod;
  33.402 +}
  33.403 +
  33.404 +
  33.405 +void 
  33.406 +ctrl_if_resume(void)
  33.407 +{
  33.408 +    if ( xen_start_info->flags & SIF_INITDOMAIN )
  33.409 +    {
  33.410 +        /*
  33.411 +         * The initial domain must create its own domain-controller link.
  33.412 +         * The controller is probably not running at this point, but will
  33.413 +         * pick up its end of the event channel from 
  33.414 +         */
  33.415 +        evtchn_op_t op;
  33.416 +        op.cmd = EVTCHNOP_bind_interdomain;
  33.417 +        op.u.bind_interdomain.dom1 = DOMID_SELF;
  33.418 +        op.u.bind_interdomain.dom2 = DOMID_SELF;
  33.419 +        op.u.bind_interdomain.port1 = 0;
  33.420 +        op.u.bind_interdomain.port2 = 0;
  33.421 +        if ( HYPERVISOR_event_channel_op(&op) != 0 )
  33.422 +            panic("event_channel_op failed\n");
  33.423 +        xen_start_info->domain_controller_evtchn = op.u.bind_interdomain.port1;
  33.424 +        initdom_ctrlif_domcontroller_port   = op.u.bind_interdomain.port2;
  33.425 +    }
  33.426 +    
  33.427 +    ctrl_if_reset(0);
  33.428 +
  33.429 +    ctrl_if_evtchn = xen_start_info->domain_controller_evtchn;
  33.430 +    ctrl_if_irq    = bind_evtchn_to_irq(ctrl_if_evtchn);
  33.431 +    
  33.432 +    /*
  33.433 +     * I have not taken the time to determine what the interrupt thread priorities
  33.434 +     * correspond to - this interface is used for network and disk, network would
  33.435 +     * seem higher priority, hence I'm using it
  33.436 +     */
  33.437 +
  33.438 +    intr_add_handler("ctrl-if", ctrl_if_irq, (driver_intr_t*)ctrl_if_interrupt,
  33.439 +		     NULL, INTR_TYPE_NET | INTR_MPSAFE, NULL);
  33.440 +}
  33.441 +
  33.442 +static void 
  33.443 +ctrl_if_init(void *dummy __unused)
  33.444 +{
  33.445 +    int i;
  33.446 +
  33.447 +    for ( i = 0; i < 256; i++ )
  33.448 +        ctrl_if_rxmsg_handler[i] = ctrl_if_rxmsg_default_handler;
  33.449 +    
  33.450 +    mtx_init(&ctrl_if_lock, "ctrlif", NULL, MTX_SPIN | MTX_NOWITNESS);
  33.451 +    
  33.452 +    TASK_INIT(&ctrl_if_tx_tasklet, 0, __ctrl_if_tx_tasklet, NULL);
  33.453 +
  33.454 +    TASK_INIT(&ctrl_if_rx_tasklet, 0, __ctrl_if_rx_tasklet, NULL);
  33.455 +
  33.456 +    TASK_INIT(&ctrl_if_rxmsg_deferred_task, 0, __ctrl_if_rxmsg_deferred_task, NULL);
  33.457 +
  33.458 +    ctrl_if_reset(1);
  33.459 +    ctrl_if_resume();
  33.460 +}
  33.461 +
  33.462 +/*
  33.463 + * !! The following are DANGEROUS FUNCTIONS !!
  33.464 + * Use with care [for example, see xencons_force_flush()].
  33.465 + */
  33.466 +
  33.467 +int 
  33.468 +ctrl_if_transmitter_empty(void)
  33.469 +{
  33.470 +    return (get_ctrl_if()->tx_req_prod == ctrl_if_tx_resp_cons);
  33.471 +}
  33.472 +
  33.473 +void 
  33.474 +ctrl_if_discard_responses(void)
  33.475 +{
  33.476 +    ctrl_if_tx_resp_cons = get_ctrl_if()->tx_resp_prod;
  33.477 +}
  33.478 +
  33.479 +SYSINIT(ctrl_if_init, SI_SUB_DRIVERS, SI_ORDER_FIRST, ctrl_if_init, NULL);
    34.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    34.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/db_interface.c	Tue Apr 05 11:27:50 2005 +0000
    34.3 @@ -0,0 +1,209 @@
    34.4 +/*
    34.5 + * Mach Operating System
    34.6 + * Copyright (c) 1991,1990 Carnegie Mellon University
    34.7 + * All Rights Reserved.
    34.8 + *
    34.9 + * Permission to use, copy, modify and distribute this software and its
   34.10 + * documentation is hereby granted, provided that both the copyright
   34.11 + * notice and this permission notice appear in all copies of the
   34.12 + * software, derivative works or modified versions, and any portions
   34.13 + * thereof, and that both notices appear in supporting documentation.
   34.14 + *
   34.15 + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
   34.16 + * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
   34.17 + * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
   34.18 + *
   34.19 + * Carnegie Mellon requests users of this software to return to
   34.20 + *
   34.21 + *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
   34.22 + *  School of Computer Science
   34.23 + *  Carnegie Mellon University
   34.24 + *  Pittsburgh PA 15213-3890
   34.25 + *
   34.26 + * any improvements or extensions that they make and grant Carnegie the
   34.27 + * rights to redistribute these changes.
   34.28 + */
   34.29 +
   34.30 +#include <sys/cdefs.h>
   34.31 +__FBSDID("$FreeBSD: src/sys/i386/i386/db_interface.c,v 1.77 2003/11/08 03:01:26 alc Exp $");
   34.32 +
   34.33 +/*
   34.34 + * Interface to new debugger.
   34.35 + */
   34.36 +#include <sys/param.h>
   34.37 +#include <sys/systm.h>
   34.38 +#include <sys/reboot.h>
   34.39 +#include <sys/cons.h>
   34.40 +#include <sys/pcpu.h>
   34.41 +#include <sys/proc.h>
   34.42 +#include <sys/smp.h>
   34.43 +
   34.44 +#include <machine/cpu.h>
   34.45 +#ifdef SMP
   34.46 +#include <machine/smptests.h>	/** CPUSTOP_ON_DDBBREAK */
   34.47 +#endif
   34.48 +
   34.49 +#include <vm/vm.h>
   34.50 +#include <vm/pmap.h>
   34.51 +
   34.52 +#include <ddb/ddb.h>
   34.53 +
   34.54 +#include <machine/setjmp.h>
   34.55 +#include <machine/xenfunc.h>
   34.56 +
   34.57 +
   34.58 +static jmp_buf *db_nofault = 0;
   34.59 +extern jmp_buf	db_jmpbuf;
   34.60 +
   34.61 +extern void	gdb_handle_exception(db_regs_t *, int, int);
   34.62 +
   34.63 +int	db_active;
   34.64 +db_regs_t ddb_regs;
   34.65 +
   34.66 +static __inline u_short
   34.67 +rss(void)
   34.68 +{
   34.69 +	u_short ss;
   34.70 +#ifdef __GNUC__
   34.71 +	__asm __volatile("mov %%ss,%0" : "=r" (ss));
   34.72 +#else
   34.73 +	ss = 0; /* XXXX Fix for other compilers. */
   34.74 +#endif
   34.75 +	return ss;
   34.76 +}
   34.77 +
   34.78 +/*
   34.79 + *  kdb_trap - field a TRACE or BPT trap
   34.80 + */
   34.81 +int
   34.82 +kdb_trap(int type, int code, struct i386_saved_state *regs)
   34.83 +{
   34.84 +	volatile int ddb_mode = !(boothowto & RB_GDB);
   34.85 +
   34.86 +	disable_intr();
   34.87 +
   34.88 +	if (ddb_mode) {
   34.89 +	    	/* we can't do much as a guest domain except print a 
   34.90 +		 * backtrace and die gracefuly.  The reason is that we
   34.91 +		 * can't get character input to make this work.
   34.92 +		 */
   34.93 +	    	db_active = 1;
   34.94 +		db_print_backtrace(); 
   34.95 +		db_printf("************ Domain shutting down ************\n");
   34.96 +		HYPERVISOR_shutdown();
   34.97 +	} else {
   34.98 +	    	Debugger("kdb_trap");
   34.99 +	}
  34.100 +	return (1);
  34.101 +}
  34.102 +
  34.103 +/*
  34.104 + * Read bytes from kernel address space for debugger.
  34.105 + */
  34.106 +void
  34.107 +db_read_bytes(vm_offset_t addr, size_t size, char *data)
  34.108 +{
  34.109 +	char	*src;
  34.110 +
  34.111 +	db_nofault = &db_jmpbuf;
  34.112 +
  34.113 +	src = (char *)addr;
  34.114 +	while (size-- > 0)
  34.115 +	    *data++ = *src++;
  34.116 +
  34.117 +	db_nofault = 0;
  34.118 +}
  34.119 +
  34.120 +/*
  34.121 + * Write bytes to kernel address space for debugger.
  34.122 + */
  34.123 +void
  34.124 +db_write_bytes(vm_offset_t addr, size_t size, char *data)
  34.125 +{
  34.126 +	char	*dst;
  34.127 +
  34.128 +	pt_entry_t	*ptep0 = NULL;
  34.129 +	pt_entry_t	oldmap0 = 0;
  34.130 +	vm_offset_t	addr1;
  34.131 +	pt_entry_t	*ptep1 = NULL;
  34.132 +	pt_entry_t	oldmap1 = 0;
  34.133 +
  34.134 +	db_nofault = &db_jmpbuf;
  34.135 +
  34.136 +	if (addr > trunc_page((vm_offset_t)btext) - size &&
  34.137 +	    addr < round_page((vm_offset_t)etext)) {
  34.138 +
  34.139 +	    ptep0 = pmap_pte(kernel_pmap, addr);
  34.140 +	    oldmap0 = *ptep0;
  34.141 +	    *ptep0 |= PG_RW;
  34.142 +
  34.143 +	    /* Map another page if the data crosses a page boundary. */
  34.144 +	    if ((*ptep0 & PG_PS) == 0) {
  34.145 +	    	addr1 = trunc_page(addr + size - 1);
  34.146 +	    	if (trunc_page(addr) != addr1) {
  34.147 +		    ptep1 = pmap_pte(kernel_pmap, addr1);
  34.148 +		    oldmap1 = *ptep1;
  34.149 +		    *ptep1 |= PG_RW;
  34.150 +	    	}
  34.151 +	    } else {
  34.152 +		addr1 = trunc_4mpage(addr + size - 1);
  34.153 +		if (trunc_4mpage(addr) != addr1) {
  34.154 +		    ptep1 = pmap_pte(kernel_pmap, addr1);
  34.155 +		    oldmap1 = *ptep1;
  34.156 +		    *ptep1 |= PG_RW;
  34.157 +		}
  34.158 +	    }
  34.159 +
  34.160 +	    invltlb();
  34.161 +	}
  34.162 +
  34.163 +	dst = (char *)addr;
  34.164 +
  34.165 +	while (size-- > 0)
  34.166 +	    *dst++ = *data++;
  34.167 +
  34.168 +	db_nofault = 0;
  34.169 +
  34.170 +	if (ptep0) {
  34.171 +	    *ptep0 = oldmap0;
  34.172 +
  34.173 +	    if (ptep1)
  34.174 +		*ptep1 = oldmap1;
  34.175 +
  34.176 +	    invltlb();
  34.177 +	}
  34.178 +}
  34.179 +
  34.180 +/*
  34.181 + * XXX
  34.182 + * Move this to machdep.c and allow it to be called if any debugger is
  34.183 + * installed.
  34.184 + */
  34.185 +void
  34.186 +Debugger(const char *msg)
  34.187 +{
  34.188 +	static volatile u_int in_Debugger;
  34.189 +
  34.190 +	/*
  34.191 +	 * XXX
  34.192 +	 * Do nothing if the console is in graphics mode.  This is
  34.193 +	 * OK if the call is for the debugger hotkey but not if the call
  34.194 +	 * is a weak form of panicing.
  34.195 +	 */
  34.196 +	if (cons_unavail && !(boothowto & RB_GDB))
  34.197 +	    return;
  34.198 +
  34.199 +	if (atomic_cmpset_acq_int(&in_Debugger, 0, 1)) {
  34.200 +	    db_printf("Debugger(\"%s\")\n", msg);
  34.201 +	    breakpoint();
  34.202 +	    atomic_store_rel_int(&in_Debugger, 0);
  34.203 +	}
  34.204 +}
  34.205 +
  34.206 +void
  34.207 +db_show_mdpcpu(struct pcpu *pc)
  34.208 +{
  34.209 +
  34.210 +	db_printf("APIC ID      = %d\n", pc->pc_apic_id);
  34.211 +	db_printf("currentldt   = 0x%x\n", pc->pc_currentldt);
  34.212 +}
    35.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    35.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/evtchn.c	Tue Apr 05 11:27:50 2005 +0000
    35.3 @@ -0,0 +1,580 @@
    35.4 +/******************************************************************************
    35.5 + * evtchn.c
    35.6 + * 
    35.7 + * Communication via Xen event channels.
    35.8 + * 
    35.9 + * Copyright (c) 2002-2004, K A Fraser
   35.10 + */
   35.11 +#include <sys/param.h>
   35.12 +#include <sys/systm.h>
   35.13 +#include <sys/bus.h>
   35.14 +#include <sys/malloc.h>
   35.15 +#include <sys/kernel.h>
   35.16 +#include <sys/lock.h>
   35.17 +#include <sys/mutex.h>
   35.18 +
   35.19 +#include <machine/cpufunc.h>
   35.20 +#include <machine/intr_machdep.h>
   35.21 +#include <machine/xen-os.h>
   35.22 +#include <machine/xen_intr.h>
   35.23 +#include <machine/synch_bitops.h>
   35.24 +#include <machine/evtchn.h>
   35.25 +#include <machine/hypervisor.h>
   35.26 +#include <machine/hypervisor-ifs.h>
   35.27 +
   35.28 +
   35.29 +static struct mtx irq_mapping_update_lock;
   35.30 +
   35.31 +#define TODO            printf("%s: not implemented!\n", __func__) 
   35.32 +
   35.33 +/* IRQ <-> event-channel mappings. */
   35.34 +static int evtchn_to_irq[NR_EVENT_CHANNELS];
   35.35 +static int irq_to_evtchn[NR_IRQS];
   35.36 +
   35.37 +/* IRQ <-> VIRQ mapping. */
   35.38 +static int virq_to_irq[NR_VIRQS];
   35.39 +
   35.40 +/* Reference counts for bindings to IRQs. */
   35.41 +static int irq_bindcount[NR_IRQS];
   35.42 +
   35.43 +#define VALID_EVTCHN(_chn) ((_chn) != -1)
   35.44 +
   35.45 +/*
   35.46 + * Force a proper event-channel callback from Xen after clearing the
   35.47 + * callback mask. We do this in a very simple manner, by making a call
   35.48 + * down into Xen. The pending flag will be checked by Xen on return.
   35.49 + */
   35.50 +void force_evtchn_callback(void)
   35.51 +{
   35.52 +    (void)HYPERVISOR_xen_version(0);
   35.53 +}
   35.54 +
   35.55 +void 
   35.56 +evtchn_do_upcall(struct intrframe *frame) 
   35.57 +{
   35.58 +    unsigned long  l1, l2;
   35.59 +    unsigned int   l1i, l2i, port;
   35.60 +    int            irq, owned;
   35.61 +    unsigned long  flags;
   35.62 +    shared_info_t *s = HYPERVISOR_shared_info;
   35.63 +
   35.64 +    local_irq_save(flags);
   35.65 +
   35.66 +    while ( s->vcpu_data[0].evtchn_upcall_pending )
   35.67 +    {
   35.68 +        s->vcpu_data[0].evtchn_upcall_pending = 0;
   35.69 +        /* NB. No need for a barrier here -- XCHG is a barrier on x86. */
   35.70 +        l1 = xen_xchg(&s->evtchn_pending_sel, 0);
   35.71 +        while ( (l1i = ffs(l1)) != 0 )
   35.72 +        {
   35.73 +            l1i--;
   35.74 +            l1 &= ~(1 << l1i);
   35.75 +        
   35.76 +            l2 = s->evtchn_pending[l1i] & ~s->evtchn_mask[l1i];
   35.77 +            while ( (l2i = ffs(l2)) != 0 )
   35.78 +            {
   35.79 +                l2i--;
   35.80 +                l2 &= ~(1 << l2i);
   35.81 +            
   35.82 +                port = (l1i << 5) + l2i;
   35.83 +		if ((owned = mtx_owned(&sched_lock)) != 0)
   35.84 +		    mtx_unlock_spin_flags(&sched_lock, MTX_QUIET);
   35.85 +                if ( (irq = evtchn_to_irq[port]) != -1 ) {
   35.86 +		    struct intsrc *isrc = intr_lookup_source(irq);
   35.87 +		    intr_execute_handlers(isrc, frame);
   35.88 +
   35.89 +		} else {
   35.90 +                    evtchn_device_upcall(port);
   35.91 +		}
   35.92 +		if (owned)
   35.93 +		    mtx_lock_spin_flags(&sched_lock, MTX_QUIET);
   35.94 +            }
   35.95 +        }
   35.96 +    }
   35.97 +
   35.98 +    local_irq_restore(flags);
   35.99 +
  35.100 +}
  35.101 +
  35.102 +
  35.103 +static int 
  35.104 +find_unbound_irq(void)
  35.105 +{
  35.106 +    int irq;
  35.107 +
  35.108 +    for ( irq = 0; irq < NR_IRQS; irq++ )
  35.109 +        if ( irq_bindcount[irq] == 0 )
  35.110 +            break;
  35.111 +
  35.112 +    if ( irq == NR_IRQS )
  35.113 +        panic("No available IRQ to bind to: increase NR_IRQS!\n");
  35.114 +
  35.115 +    return irq;
  35.116 +}
  35.117 +
  35.118 +int 
  35.119 +bind_virq_to_irq(int virq)
  35.120 +{
  35.121 +    evtchn_op_t op;
  35.122 +    int evtchn, irq;
  35.123 +
  35.124 +    mtx_lock(&irq_mapping_update_lock);
  35.125 +
  35.126 +    if ( (irq = virq_to_irq[virq]) == -1 )
  35.127 +    {
  35.128 +        op.cmd              = EVTCHNOP_bind_virq;
  35.129 +        op.u.bind_virq.virq = virq;
  35.130 +        if ( HYPERVISOR_event_channel_op(&op) != 0 )
  35.131 +            panic("Failed to bind virtual IRQ %d\n", virq);
  35.132 +        evtchn = op.u.bind_virq.port;
  35.133 +
  35.134 +        irq = find_unbound_irq();
  35.135 +        evtchn_to_irq[evtchn] = irq;
  35.136 +        irq_to_evtchn[irq]    = evtchn;
  35.137 +
  35.138 +        virq_to_irq[virq] = irq;
  35.139 +    }
  35.140 +
  35.141 +    irq_bindcount[irq]++;
  35.142 +
  35.143 +    mtx_unlock(&irq_mapping_update_lock);
  35.144 +    
  35.145 +    return irq;
  35.146 +}
  35.147 +
  35.148 +void 
  35.149 +unbind_virq_from_irq(int virq)
  35.150 +{
  35.151 +    evtchn_op_t op;
  35.152 +    int irq    = virq_to_irq[virq];
  35.153 +    int evtchn = irq_to_evtchn[irq];
  35.154 +
  35.155 +    mtx_lock(&irq_mapping_update_lock);
  35.156 +
  35.157 +    if ( --irq_bindcount[irq] == 0 )
  35.158 +    {
  35.159 +        op.cmd          = EVTCHNOP_close;
  35.160 +        op.u.close.dom  = DOMID_SELF;
  35.161 +        op.u.close.port = evtchn;
  35.162 +        if ( HYPERVISOR_event_channel_op(&op) != 0 )
  35.163 +            panic("Failed to unbind virtual IRQ %d\n", virq);
  35.164 +
  35.165 +        evtchn_to_irq[evtchn] = -1;
  35.166 +        irq_to_evtchn[irq]    = -1;
  35.167 +        virq_to_irq[virq]     = -1;
  35.168 +    }
  35.169 +
  35.170 +    mtx_unlock(&irq_mapping_update_lock);
  35.171 +}
  35.172 +
  35.173 +int 
  35.174 +bind_evtchn_to_irq(int evtchn)
  35.175 +{
  35.176 +    int irq;
  35.177 +
  35.178 +    mtx_lock(&irq_mapping_update_lock);
  35.179 +
  35.180 +    if ( (irq = evtchn_to_irq[evtchn]) == -1 )
  35.181 +    {
  35.182 +        irq = find_unbound_irq();
  35.183 +        evtchn_to_irq[evtchn] = irq;
  35.184 +        irq_to_evtchn[irq]    = evtchn;
  35.185 +    }
  35.186 +
  35.187 +    irq_bindcount[irq]++;
  35.188 +
  35.189 +    mtx_unlock(&irq_mapping_update_lock);
  35.190 +    
  35.191 +    return irq;
  35.192 +}
  35.193 +
  35.194 +void 
  35.195 +unbind_evtchn_from_irq(int evtchn)
  35.196 +{
  35.197 +    int irq = evtchn_to_irq[evtchn];
  35.198 +
  35.199 +    mtx_lock(&irq_mapping_update_lock);
  35.200 +
  35.201 +    if ( --irq_bindcount[irq] == 0 )
  35.202 +    {
  35.203 +        evtchn_to_irq[evtchn] = -1;
  35.204 +        irq_to_evtchn[irq]    = -1;
  35.205 +    }
  35.206 +
  35.207 +    mtx_unlock(&irq_mapping_update_lock);
  35.208 +}
  35.209 +
  35.210 +
  35.211 +/*
  35.212 + * Interface to generic handling in intr_machdep.c
  35.213 + */
  35.214 +
  35.215 +
  35.216 +/*------------ interrupt handling --------------------------------------*/
  35.217 +#define TODO            printf("%s: not implemented!\n", __func__) 
  35.218 +
  35.219 + struct mtx xenpic_lock;
  35.220 +
  35.221 +struct xenpic_intsrc {
  35.222 +    struct intsrc xp_intsrc;
  35.223 +    uint8_t       xp_vector;
  35.224 +    boolean_t	  xp_masked;
  35.225 +};
  35.226 +
  35.227 +struct xenpic { 
  35.228 +    struct pic xp_pic; /* this MUST be first */
  35.229 +    uint16_t xp_numintr; 
  35.230 +    struct xenpic_intsrc xp_pins[0]; 
  35.231 +}; 
  35.232 +
  35.233 +static void     xenpic_enable_dynirq_source(struct intsrc *isrc); 
  35.234 +static void     xenpic_disable_dynirq_source(struct intsrc *isrc, int); 
  35.235 +static void     xenpic_eoi_source(struct intsrc *isrc); 
  35.236 +static void     xenpic_enable_dynirq_intr(struct intsrc *isrc); 
  35.237 +static int      xenpic_vector(struct intsrc *isrc); 
  35.238 +static int      xenpic_source_pending(struct intsrc *isrc); 
  35.239 +static void     xenpic_suspend(struct intsrc *isrc); 
  35.240 +static void     xenpic_resume(struct intsrc *isrc); 
  35.241 +
  35.242 +
  35.243 +struct pic xenpic_template  =  { 
  35.244 +    xenpic_enable_dynirq_source, 
  35.245 +    xenpic_disable_dynirq_source,
  35.246 +    xenpic_eoi_source, 
  35.247 +    xenpic_enable_dynirq_intr, 
  35.248 +    xenpic_vector, 
  35.249 +    xenpic_source_pending,
  35.250 +    xenpic_suspend, 
  35.251 +    xenpic_resume 
  35.252 +};
  35.253 +
  35.254 +
  35.255 +void 
  35.256 +xenpic_enable_dynirq_source(struct intsrc *isrc)
  35.257 +{
  35.258 +    unsigned int irq;
  35.259 +    struct xenpic_intsrc *xp;
  35.260 +
  35.261 +    xp = (struct xenpic_intsrc *)isrc;
  35.262 +
  35.263 +    if (xp->xp_masked) {
  35.264 +	irq = xenpic_vector(isrc);
  35.265 +	unmask_evtchn(irq_to_evtchn[irq]);
  35.266 +	xp->xp_masked = FALSE;
  35.267 +    }
  35.268 +}
  35.269 +
  35.270 +static void 
  35.271 +xenpic_disable_dynirq_source(struct intsrc *isrc, int foo)
  35.272 +{
  35.273 +    unsigned int irq;
  35.274 +    struct xenpic_intsrc *xp;
  35.275 +
  35.276 +    xp = (struct xenpic_intsrc *)isrc;
  35.277 +
  35.278 +    if (!xp->xp_masked) {
  35.279 +	irq = xenpic_vector(isrc);
  35.280 +	mask_evtchn(irq_to_evtchn[irq]);
  35.281 +	xp->xp_masked = TRUE;
  35.282 +    }
  35.283 +
  35.284 +}
  35.285 +
  35.286 +static void 
  35.287 +xenpic_enable_dynirq_intr(struct intsrc *isrc)
  35.288 +{
  35.289 +    unsigned int irq;
  35.290 +
  35.291 +    irq = xenpic_vector(isrc);
  35.292 +    unmask_evtchn(irq_to_evtchn[irq]);
  35.293 +}
  35.294 +
  35.295 +static void 
  35.296 +xenpic_eoi_source(struct intsrc *isrc)
  35.297 +{
  35.298 +    unsigned int irq = xenpic_vector(isrc);
  35.299 +    clear_evtchn(irq_to_evtchn[irq]);
  35.300 +}
  35.301 +
  35.302 +static int
  35.303 +xenpic_vector(struct intsrc *isrc)
  35.304 +{
  35.305 +    struct xenpic_intsrc *pin = (struct xenpic_intsrc *)isrc;
  35.306 +    return (pin->xp_vector);
  35.307 +}
  35.308 +
  35.309 +static int
  35.310 +xenpic_source_pending(struct intsrc *isrc)
  35.311 +{
  35.312 +    TODO;
  35.313 +    return 0;
  35.314 +}
  35.315 +
  35.316 +static void 
  35.317 +xenpic_suspend(struct intsrc *isrc) 
  35.318 +{ 
  35.319 +    TODO; 
  35.320 +} 
  35.321 + 
  35.322 +static void 
  35.323 +xenpic_resume(struct intsrc *isrc) 
  35.324 +{ 
  35.325 +    TODO; 
  35.326 +} 
  35.327 +
  35.328 +#ifdef CONFIG_PHYSDEV
  35.329 +/* required for support of physical devices */
  35.330 +static inline void 
  35.331 +pirq_unmask_notify(int pirq)
  35.332 +{
  35.333 +    physdev_op_t op;
  35.334 +    if ( unlikely(test_bit(pirq, &pirq_needs_unmask_notify[0])) )
  35.335 +    {
  35.336 +        op.cmd = PHYSDEVOP_IRQ_UNMASK_NOTIFY;
  35.337 +        (void)HYPERVISOR_physdev_op(&op);
  35.338 +    }
  35.339 +}
  35.340 +
  35.341 +static inline void 
  35.342 +pirq_query_unmask(int pirq)
  35.343 +{
  35.344 +    physdev_op_t op;
  35.345 +    op.cmd = PHYSDEVOP_IRQ_STATUS_QUERY;
  35.346 +    op.u.irq_status_query.irq = pirq;
  35.347 +    (void)HYPERVISOR_physdev_op(&op);
  35.348 +    clear_bit(pirq, &pirq_needs_unmask_notify[0]);
  35.349 +    if ( op.u.irq_status_query.flags & PHYSDEVOP_IRQ_NEEDS_UNMASK_NOTIFY )
  35.350 +        set_bit(pirq, &pirq_needs_unmask_notify[0]);
  35.351 +}
  35.352 +
  35.353 +/*
  35.354 + * On startup, if there is no action associated with the IRQ then we are
  35.355 + * probing. In this case we should not share with others as it will confuse us.
  35.356 + */
  35.357 +#define probing_irq(_irq) (irq_desc[(_irq)].action == NULL)
  35.358 +
  35.359 +static unsigned int startup_pirq(unsigned int irq)
  35.360 +{
  35.361 +    evtchn_op_t op;
  35.362 +    int evtchn;
  35.363 +
  35.364 +    op.cmd               = EVTCHNOP_bind_pirq;
  35.365 +    op.u.bind_pirq.pirq  = irq;
  35.366 +    /* NB. We are happy to share unless we are probing. */
  35.367 +    op.u.bind_pirq.flags = probing_irq(irq) ? 0 : BIND_PIRQ__WILL_SHARE;
  35.368 +    if ( HYPERVISOR_event_channel_op(&op) != 0 )
  35.369 +    {
  35.370 +        if ( !probing_irq(irq) ) /* Some failures are expected when probing. */
  35.371 +            printk(KERN_INFO "Failed to obtain physical IRQ %d\n", irq);
  35.372 +        return 0;
  35.373 +    }
  35.374 +    evtchn = op.u.bind_pirq.port;
  35.375 +
  35.376 +    pirq_query_unmask(irq_to_pirq(irq));
  35.377 +
  35.378 +    evtchn_to_irq[evtchn] = irq;
  35.379 +    irq_to_evtchn[irq]    = evtchn;
  35.380 +
  35.381 +    unmask_evtchn(evtchn);
  35.382 +    pirq_unmask_notify(irq_to_pirq(irq));
  35.383 +
  35.384 +    return 0;
  35.385 +}
  35.386 +
  35.387 +static void shutdown_pirq(unsigned int irq)
  35.388 +{
  35.389 +    evtchn_op_t op;
  35.390 +    int evtchn = irq_to_evtchn[irq];
  35.391 +
  35.392 +    if ( !VALID_EVTCHN(evtchn) )
  35.393 +        return;
  35.394 +
  35.395 +    mask_evtchn(evtchn);
  35.396 +
  35.397 +    op.cmd          = EVTCHNOP_close;
  35.398 +    op.u.close.dom  = DOMID_SELF;
  35.399 +    op.u.close.port = evtchn;
  35.400 +    if ( HYPERVISOR_event_channel_op(&op) != 0 )
  35.401 +        panic("Failed to unbind physical IRQ %d\n", irq);
  35.402 +
  35.403 +    evtchn_to_irq[evtchn] = -1;
  35.404 +    irq_to_evtchn[irq]    = -1;
  35.405 +}
  35.406 +
  35.407 +static void enable_pirq(unsigned int irq)
  35.408 +{
  35.409 +    int evtchn = irq_to_evtchn[irq];
  35.410 +    if ( !VALID_EVTCHN(evtchn) )
  35.411 +        return;
  35.412 +    unmask_evtchn(evtchn);
  35.413 +    pirq_unmask_notify(irq_to_pirq(irq));
  35.414 +}
  35.415 +
  35.416 +static void disable_pirq(unsigned int irq)
  35.417 +{
  35.418 +    int evtchn = irq_to_evtchn[irq];
  35.419 +    if ( !VALID_EVTCHN(evtchn) )
  35.420 +        return;
  35.421 +    mask_evtchn(evtchn);
  35.422 +}
  35.423 +
  35.424 +static void ack_pirq(unsigned int irq)
  35.425 +{
  35.426 +    int evtchn = irq_to_evtchn[irq];
  35.427 +    if ( !VALID_EVTCHN(evtchn) )
  35.428 +        return;
  35.429 +    mask_evtchn(evtchn);
  35.430 +    clear_evtchn(evtchn);
  35.431 +}
  35.432 +
  35.433 +static void end_pirq(unsigned int irq)
  35.434 +{
  35.435 +    int evtchn = irq_to_evtchn[irq];
  35.436 +    if ( !VALID_EVTCHN(evtchn) )
  35.437 +        return;
  35.438 +    if ( !(irq_desc[irq].status & IRQ_DISABLED) )
  35.439 +    {
  35.440 +        unmask_evtchn(evtchn);
  35.441 +        pirq_unmask_notify(irq_to_pirq(irq));
  35.442 +    }
  35.443 +}
  35.444 +
  35.445 +static struct hw_interrupt_type pirq_type = {
  35.446 +    "Phys-irq",
  35.447 +    startup_pirq,
  35.448 +    shutdown_pirq,
  35.449 +    enable_pirq,
  35.450 +    disable_pirq,
  35.451 +    ack_pirq,
  35.452 +    end_pirq,
  35.453 +    NULL
  35.454 +};
  35.455 +#endif
  35.456 +
  35.457 +
  35.458 +static void 
  35.459 +misdirect_interrupt(void *sc)
  35.460 +{
  35.461 +}
  35.462 +
  35.463 +void irq_suspend(void)
  35.464 +{
  35.465 +    int virq, irq, evtchn;
  35.466 +
  35.467 +    /* Unbind VIRQs from event channels. */
  35.468 +    for ( virq = 0; virq < NR_VIRQS; virq++ )
  35.469 +    {
  35.470 +        if ( (irq = virq_to_irq[virq]) == -1 )
  35.471 +            continue;
  35.472 +        evtchn = irq_to_evtchn[irq];
  35.473 +
  35.474 +        /* Mark the event channel as unused in our table. */
  35.475 +        evtchn_to_irq[evtchn] = -1;
  35.476 +        irq_to_evtchn[irq]    = -1;
  35.477 +    }
  35.478 +
  35.479 +    /*
  35.480 +     * We should now be unbound from all event channels. Stale bindings to 
  35.481 +     * PIRQs and/or inter-domain event channels will cause us to barf here.
  35.482 +     */
  35.483 +    for ( evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++ )
  35.484 +        if ( evtchn_to_irq[evtchn] != -1 )
  35.485 +            panic("Suspend attempted while bound to evtchn %d.\n", evtchn);
  35.486 +}
  35.487 +
  35.488 +
  35.489 +void irq_resume(void)
  35.490 +{
  35.491 +    evtchn_op_t op;
  35.492 +    int         virq, irq, evtchn;
  35.493 +
  35.494 +    for ( evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++ )
  35.495 +        mask_evtchn(evtchn); /* New event-channel space is not 'live' yet. */
  35.496 +
  35.497 +    for ( virq = 0; virq < NR_VIRQS; virq++ )
  35.498 +    {
  35.499 +        if ( (irq = virq_to_irq[virq]) == -1 )
  35.500 +            continue;
  35.501 +
  35.502 +        /* Get a new binding from Xen. */
  35.503 +        op.cmd              = EVTCHNOP_bind_virq;
  35.504 +        op.u.bind_virq.virq = virq;
  35.505 +        if ( HYPERVISOR_event_channel_op(&op) != 0 )
  35.506 +            panic("Failed to bind virtual IRQ %d\n", virq);
  35.507 +        evtchn = op.u.bind_virq.port;
  35.508 +        
  35.509 +        /* Record the new mapping. */
  35.510 +        evtchn_to_irq[evtchn] = irq;
  35.511 +        irq_to_evtchn[irq]    = evtchn;
  35.512 +
  35.513 +        /* Ready for use. */
  35.514 +        unmask_evtchn(evtchn);
  35.515 +    }
  35.516 +}
  35.517 +
  35.518 +static void 
  35.519 +evtchn_init(void *dummy __unused)
  35.520 +{
  35.521 +    int i;
  35.522 +    struct xenpic *xp;
  35.523 +    struct xenpic_intsrc *pin;
  35.524 +
  35.525 +    /*
  35.526 +     * xenpic_lock: in order to allow an interrupt to occur in a critical
  35.527 +     * 	        section, to set pcpu->ipending (etc...) properly, we
  35.528 +     *	        must be able to get the icu lock, so it can't be
  35.529 +     *	        under witness.
  35.530 +     */
  35.531 +    mtx_init(&irq_mapping_update_lock, "xp", NULL, MTX_DEF);
  35.532 +
  35.533 +    /* No VIRQ -> IRQ mappings. */
  35.534 +    for ( i = 0; i < NR_VIRQS; i++ )
  35.535 +        virq_to_irq[i] = -1;
  35.536 +
  35.537 +    /* No event-channel -> IRQ mappings. */
  35.538 +    for ( i = 0; i < NR_EVENT_CHANNELS; i++ )
  35.539 +    {
  35.540 +        evtchn_to_irq[i] = -1;
  35.541 +        mask_evtchn(i); /* No event channels are 'live' right now. */
  35.542 +    }
  35.543 +
  35.544 +    /* No IRQ -> event-channel mappings. */
  35.545 +    for ( i = 0; i < NR_IRQS; i++ )
  35.546 +        irq_to_evtchn[i] = -1;
  35.547 +
  35.548 +    xp = malloc(sizeof(struct xenpic) + NR_DYNIRQS*sizeof(struct xenpic_intsrc), M_DEVBUF, M_WAITOK);
  35.549 +    xp->xp_pic = xenpic_template;
  35.550 +    xp->xp_numintr = NR_DYNIRQS;
  35.551 +    bzero(xp->xp_pins, sizeof(struct xenpic_intsrc) * NR_DYNIRQS);
  35.552 +
  35.553 +    for ( i = 0, pin = xp->xp_pins; i < NR_DYNIRQS; i++, pin++ )
  35.554 +    {
  35.555 +        /* Dynamic IRQ space is currently unbound. Zero the refcnts. */
  35.556 +        irq_bindcount[dynirq_to_irq(i)] = 0;
  35.557 +
  35.558 +	pin->xp_intsrc.is_pic = (struct pic *)xp;
  35.559 +	pin->xp_vector = i;
  35.560 +	intr_register_source(&pin->xp_intsrc);
  35.561 +    }
  35.562 +    /* We don't currently have any support for physical devices in XenoFreeBSD 
  35.563 +     * so leaving this out for the moment for the sake of expediency.
  35.564 +     */
  35.565 +#ifdef notyet
  35.566 +    for ( i = 0; i < NR_PIRQS; i++ )
  35.567 +    {
  35.568 +        /* Phys IRQ space is statically bound (1:1 mapping). Nail refcnts. */
  35.569 +        irq_bindcount[pirq_to_irq(i)] = 1;
  35.570 +
  35.571 +        irq_desc[pirq_to_irq(i)].status  = IRQ_DISABLED;
  35.572 +        irq_desc[pirq_to_irq(i)].action  = 0;
  35.573 +        irq_desc[pirq_to_irq(i)].depth   = 1;
  35.574 +        irq_desc[pirq_to_irq(i)].handler = &pirq_type;
  35.575 +    }
  35.576 +
  35.577 +#endif
  35.578 +    (void) intr_add_handler("xb_mis", bind_virq_to_irq(VIRQ_MISDIRECT),
  35.579 +	    	            (driver_intr_t *)misdirect_interrupt, 
  35.580 +			    NULL, INTR_TYPE_MISC, NULL);
  35.581 +}
  35.582 +
  35.583 +SYSINIT(evtchn_init, SI_SUB_INTR, SI_ORDER_ANY, evtchn_init, NULL);
    36.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    36.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/exception.s	Tue Apr 05 11:27:50 2005 +0000
    36.3 @@ -0,0 +1,428 @@
    36.4 +/*-
    36.5 + * Copyright (c) 1989, 1990 William F. Jolitz.
    36.6 + * Copyright (c) 1990 The Regents of the University of California.
    36.7 + * All rights reserved.
    36.8 + *
    36.9 + * Redistribution and use in source and binary forms, with or without
   36.10 + * modification, are permitted provided that the following conditions
   36.11 + * are met:
   36.12 + * 1. Redistributions of source code must retain the above copyright
   36.13 + *    notice, this list of conditions and the following disclaimer.
   36.14 + * 2. Redistributions in binary form must reproduce the above copyright
   36.15 + *    notice, this list of conditions and the following disclaimer in the
   36.16 + *    documentation and/or other materials provided with the distribution.
   36.17 + * 4. Neither the name of the University nor the names of its contributors
   36.18 + *    may be used to endorse or promote products derived from this software
   36.19 + *    without specific prior written permission.
   36.20 + *
   36.21 + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   36.22 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   36.23 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   36.24 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   36.25 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   36.26 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   36.27 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   36.28 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   36.29 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   36.30 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   36.31 + * SUCH DAMAGE.
   36.32 + *
   36.33 + * $FreeBSD: src/sys/i386/i386/exception.s,v 1.106 2003/11/03 22:08:52 jhb Exp $
   36.34 + */
   36.35 +
   36.36 +#include "opt_npx.h"
   36.37 +
   36.38 +#include <machine/asmacros.h>
   36.39 +#include <machine/psl.h>
   36.40 +#include <machine/trap.h>
   36.41 +
   36.42 +#include "assym.s"
   36.43 +
   36.44 +#define	SEL_RPL_MASK	0x0002
   36.45 +/* Offsets into shared_info_t. */
   36.46 +#define evtchn_upcall_pending /* 0 */
   36.47 +#define evtchn_upcall_mask       1
   36.48 +#define XEN_BLOCK_EVENTS(reg)     movb $1,evtchn_upcall_mask(reg)
   36.49 +#define XEN_UNBLOCK_EVENTS(reg)   movb $0,evtchn_upcall_mask(reg)
   36.50 +#define XEN_TEST_PENDING(reg)     testb $0x1,evtchn_upcall_pending(reg)
   36.51 +	 
   36.52 +	
   36.53 +#define POPA \
   36.54 +	popl %edi; \
   36.55 +	popl %esi; \
   36.56 +	popl %ebp; \
   36.57 +	popl %ebx; \
   36.58 +	popl %ebx; \
   36.59 +	popl %edx; \
   36.60 +	popl %ecx; \
   36.61 +	popl %eax;
   36.62 +
   36.63 +	.text
   36.64 +
   36.65 +/*****************************************************************************/
   36.66 +/* Trap handling                                                             */
   36.67 +/*****************************************************************************/
   36.68 +/*
   36.69 + * Trap and fault vector routines.
   36.70 + *
   36.71 + * Most traps are 'trap gates', SDT_SYS386TGT.  A trap gate pushes state on
   36.72 + * the stack that mostly looks like an interrupt, but does not disable 
   36.73 + * interrupts.  A few of the traps we are use are interrupt gates, 
   36.74 + * SDT_SYS386IGT, which are nearly the same thing except interrupts are
   36.75 + * disabled on entry.
   36.76 + *
   36.77 + * The cpu will push a certain amount of state onto the kernel stack for
   36.78 + * the current process.  The amount of state depends on the type of trap 
   36.79 + * and whether the trap crossed rings or not.  See i386/include/frame.h.  
   36.80 + * At the very least the current EFLAGS (status register, which includes 
   36.81 + * the interrupt disable state prior to the trap), the code segment register,
   36.82 + * and the return instruction pointer are pushed by the cpu.  The cpu 
   36.83 + * will also push an 'error' code for certain traps.  We push a dummy 
   36.84 + * error code for those traps where the cpu doesn't in order to maintain 
   36.85 + * a consistent frame.  We also push a contrived 'trap number'.
   36.86 + *
   36.87 + * The cpu does not push the general registers, we must do that, and we 
   36.88 + * must restore them prior to calling 'iret'.  The cpu adjusts the %cs and
   36.89 + * %ss segment registers, but does not mess with %ds, %es, or %fs.  Thus we
   36.90 + * must load them with appropriate values for supervisor mode operation.
   36.91 + */
   36.92 +
   36.93 +MCOUNT_LABEL(user)
   36.94 +MCOUNT_LABEL(btrap)
   36.95 +
   36.96 +IDTVEC(div)
   36.97 +	pushl $0; pushl $0; TRAP(T_DIVIDE)
   36.98 +IDTVEC(dbg)
   36.99 +	pushl $0; pushl $0; TRAP(T_TRCTRAP)
  36.100 +IDTVEC(nmi)
  36.101 +	pushl $0; pushl $0; TRAP(T_NMI)
  36.102 +IDTVEC(bpt)
  36.103 +	pushl $0; pushl $0; TRAP(T_BPTFLT)
  36.104 +IDTVEC(ofl)
  36.105 +	pushl $0; pushl $0; TRAP(T_OFLOW)
  36.106 +IDTVEC(bnd)
  36.107 +	pushl $0; pushl $0; TRAP(T_BOUND)
  36.108 +IDTVEC(ill)
  36.109 +	pushl $0; pushl $0; TRAP(T_PRIVINFLT)
  36.110 +IDTVEC(dna)
  36.111 +	pushl $0; pushl $0; TRAP(T_DNA)
  36.112 +IDTVEC(fpusegm)
  36.113 +	pushl $0; pushl $0; TRAP(T_FPOPFLT)
  36.114 +IDTVEC(tss)
  36.115 +	pushl $0; TRAP(T_TSSFLT)
  36.116 +IDTVEC(missing)
  36.117 +	pushl $0; TRAP(T_SEGNPFLT)
  36.118 +IDTVEC(stk)
  36.119 +	pushl $0; TRAP(T_STKFLT)
  36.120 +IDTVEC(prot)
  36.121 +	pushl $0; TRAP(T_PROTFLT)
  36.122 +IDTVEC(page)
  36.123 +	TRAP(T_PAGEFLT)
  36.124 +IDTVEC(mchk)
  36.125 +	pushl $0; pushl $0; TRAP(T_MCHK)
  36.126 +IDTVEC(rsvd)
  36.127 +	pushl $0; pushl $0; TRAP(T_RESERVED)
  36.128 +IDTVEC(fpu)
  36.129 +	pushl $0; pushl $0; TRAP(T_ARITHTRAP)
  36.130 +IDTVEC(align)
  36.131 +	pushl $0; TRAP(T_ALIGNFLT)
  36.132 +
  36.133 +IDTVEC(xmm)
  36.134 +	pushl $0; pushl $0; TRAP(T_XMMFLT)
  36.135 +
  36.136 +IDTVEC(hypervisor_callback)
  36.137 +	 pushl $T_HYPCALLBACK;  pushl %eax; TRAP(T_HYPCALLBACK)
  36.138 +
  36.139 +hypervisor_callback_pending:
  36.140 +	movl	$T_HYPCALLBACK,TF_TRAPNO(%esp)
  36.141 +	movl	$T_HYPCALLBACK,TF_ERR(%esp)
  36.142 +	jmp	11f
  36.143 +	
  36.144 +	/*
  36.145 +	 * alltraps entry point.  Interrupts are enabled if this was a trap
  36.146 +	 * gate (TGT), else disabled if this was an interrupt gate (IGT).
  36.147 +	 * Note that int0x80_syscall is a trap gate.  Only page faults
  36.148 +	 * use an interrupt gate.
  36.149 +	 */
  36.150 +
  36.151 +	SUPERALIGN_TEXT
  36.152 +	.globl	alltraps
  36.153 +	.type	alltraps,@function
  36.154 +alltraps:
  36.155 +	cld
  36.156 +	pushal
  36.157 +	pushl	%ds
  36.158 +	pushl	%es
  36.159 +	pushl	%fs
  36.160 +alltraps_with_regs_pushed:
  36.161 +	movl	$KDSEL,%eax
  36.162 +	movl	%eax,%ds
  36.163 +	movl	%eax,%es
  36.164 +	movl	$KPSEL,%eax
  36.165 +	movl	%eax,%fs
  36.166 +	FAKE_MCOUNT(TF_EIP(%esp))
  36.167 +calltrap:
  36.168 +	movl	TF_EIP(%esp),%eax
  36.169 +	cmpl	$scrit,%eax
  36.170 +	jb	11f
  36.171 +	cmpl	$ecrit,%eax
  36.172 +	jb	critical_region_fixup
  36.173 +11:	call	trap
  36.174 +
  36.175 +	/*
  36.176 +	 * Return via doreti to handle ASTs.
  36.177 +	 */
  36.178 +	MEXITCOUNT
  36.179 +	jmp	doreti
  36.180 +
  36.181 +/*
  36.182 + * SYSCALL CALL GATE (old entry point for a.out binaries)
  36.183 + *
  36.184 + * The intersegment call has been set up to specify one dummy parameter.
  36.185 + *
  36.186 + * This leaves a place to put eflags so that the call frame can be
  36.187 + * converted to a trap frame. Note that the eflags is (semi-)bogusly
  36.188 + * pushed into (what will be) tf_err and then copied later into the
  36.189 + * final spot. It has to be done this way because esp can't be just
  36.190 + * temporarily altered for the pushfl - an interrupt might come in
  36.191 + * and clobber the saved cs/eip.
  36.192 + */
  36.193 +	SUPERALIGN_TEXT
  36.194 +IDTVEC(lcall_syscall)
  36.195 +	pushfl				/* save eflags */
  36.196 +	popl	8(%esp)			/* shuffle into tf_eflags */
  36.197 +	pushl	$7			/* sizeof "lcall 7,0" */
  36.198 +	subl	$4,%esp			/* skip over tf_trapno */
  36.199 +	pushal
  36.200 +	pushl	%ds
  36.201 +	pushl	%es
  36.202 +	pushl	%fs
  36.203 +	movl	$KDSEL,%eax		/* switch to kernel segments */
  36.204 +	movl	%eax,%ds
  36.205 +	movl	%eax,%es
  36.206 +	movl	$KPSEL,%eax
  36.207 +	movl	%eax,%fs
  36.208 +	FAKE_MCOUNT(TF_EIP(%esp))
  36.209 +	call	syscall
  36.210 +	MEXITCOUNT
  36.211 +	jmp	doreti
  36.212 +
  36.213 +/*
  36.214 + * Call gate entry for FreeBSD ELF and Linux/NetBSD syscall (int 0x80)
  36.215 + *
  36.216 + * Even though the name says 'int0x80', this is actually a TGT (trap gate)
  36.217 + * rather then an IGT (interrupt gate).  Thus interrupts are enabled on
  36.218 + * entry just as they are for a normal syscall.
  36.219 + */
  36.220 +	SUPERALIGN_TEXT
  36.221 +IDTVEC(int0x80_syscall)
  36.222 +	pushl	$2			/* sizeof "int 0x80" */
  36.223 +	pushl	$0xCAFE
  36.224 +	pushl	$0xDEAD
  36.225 +	pushal
  36.226 +	pushl	%ds
  36.227 +	pushl	%es
  36.228 +	pushl	%fs
  36.229 +	movl	$KDSEL,%eax		/* switch to kernel segments */
  36.230 +	movl	%eax,%ds
  36.231 +	movl	%eax,%es
  36.232 +	movl	$KPSEL,%eax
  36.233 +	movl	%eax,%fs
  36.234 +	FAKE_MCOUNT(TF_EIP(%esp))
  36.235 +	call	syscall
  36.236 +	MEXITCOUNT
  36.237 +	jmp	doreti
  36.238 +
  36.239 +ENTRY(fork_trampoline)
  36.240 +	pushl	%esp			/* trapframe pointer */
  36.241 +	pushl	%ebx			/* arg1 */
  36.242 +	pushl	%esi			/* function */
  36.243 +	call	fork_exit
  36.244 +	addl	$12,%esp               
  36.245 +	/* cut from syscall */
  36.246 +
  36.247 +	/*
  36.248 +	 * Return via doreti to handle ASTs.
  36.249 +	 */
  36.250 +	MEXITCOUNT
  36.251 +	jmp	doreti
  36.252 +
  36.253 +
  36.254 +/*
  36.255 +# A note on the "critical region" in our callback handler.
  36.256 +# We want to avoid stacking callback handlers due to events occurring
  36.257 +# during handling of the last event. To do this, we keep events disabled
  36.258 +# until weve done all processing. HOWEVER, we must enable events before
  36.259 +# popping the stack frame (cant be done atomically) and so it would still
  36.260 +# be possible to get enough handler activations to overflow the stack.
  36.261 +# Although unlikely, bugs of that kind are hard to track down, so wed
  36.262 +# like to avoid the possibility.
  36.263 +# So, on entry to the handler we detect whether we interrupted an
  36.264 +# existing activation in its critical region -- if so, we pop the current
  36.265 +# activation and restart the handler using the previous one.
  36.266 +*/
  36.267 +
  36.268 +
  36.269 +/*
  36.270 + * void doreti(struct trapframe)
  36.271 + *
  36.272 + * Handle return from interrupts, traps and syscalls.
  36.273 + */
  36.274 +	.text
  36.275 +	SUPERALIGN_TEXT
  36.276 +	.globl	doreti
  36.277 +	.type	doreti,@function
  36.278 +doreti:
  36.279 +	FAKE_MCOUNT(bintr)		/* init "from" bintr -> doreti */	
  36.280 +doreti_next:
  36.281 +	testb	$SEL_RPL_MASK,TF_CS(%esp) /* are we returning to user mode? */
  36.282 +	jz	doreti_exit		  /* #can't handle ASTs now if not */
  36.283 +
  36.284 +doreti_ast:
  36.285 +	/*
  36.286 +	 * Check for ASTs atomically with returning.  Disabling CPU
  36.287 +	 * interrupts provides sufficient locking even in the SMP case,
  36.288 +	 * since we will be informed of any new ASTs by an IPI.
  36.289 +	 */
  36.290 +	
  36.291 +	movl	HYPERVISOR_shared_info,%esi
  36.292 +	XEN_BLOCK_EVENTS(%esi) 
  36.293 +	movl	PCPU(CURTHREAD),%eax
  36.294 +	testl	$TDF_ASTPENDING | TDF_NEEDRESCHED,TD_FLAGS(%eax)
  36.295 +	je	doreti_exit
  36.296 +	XEN_UNBLOCK_EVENTS(%esi) 
  36.297 +	pushl	%esp		/* pass a pointer to the trapframe */
  36.298 +	call	ast
  36.299 +	add	$4,%esp
  36.300 +	jmp	doreti_ast
  36.301 +
  36.302 +doreti_exit:
  36.303 +	/*
  36.304 +	 * doreti_exit:	pop registers, iret.
  36.305 +	 *
  36.306 +	 *	The segment register pop is a special case, since it may
  36.307 +	 *	fault if (for example) a sigreturn specifies bad segment
  36.308 +	 *	registers.  The fault is handled in trap.c.
  36.309 +	 */
  36.310 +
  36.311 +	movl	HYPERVISOR_shared_info,%esi
  36.312 +	XEN_UNBLOCK_EVENTS(%esi) # reenable event callbacks (sti)
  36.313 +
  36.314 +	.globl	scrit
  36.315 +scrit:
  36.316 +	XEN_TEST_PENDING(%esi)
  36.317 +        jnz	hypervisor_callback_pending	/* More to go  */
  36.318 +	MEXITCOUNT
  36.319 +
  36.320 +	.globl	doreti_popl_fs
  36.321 +doreti_popl_fs:
  36.322 +	popl	%fs
  36.323 +	.globl	doreti_popl_es
  36.324 +doreti_popl_es:
  36.325 +	popl	%es
  36.326 +	.globl	doreti_popl_ds
  36.327 +doreti_popl_ds:
  36.328 +	popl	%ds
  36.329 +	POPA
  36.330 +	addl	$12,%esp
  36.331 +	.globl	doreti_iret
  36.332 +doreti_iret:
  36.333 +	iret
  36.334 +	.globl	ecrit
  36.335 +ecrit:
  36.336 +
  36.337 +	/*
  36.338 +	 * doreti_iret_fault and friends.  Alternative return code for
  36.339 +	 * the case where we get a fault in the doreti_exit code
  36.340 +	 * above.  trap() (i386/i386/trap.c) catches this specific
  36.341 +	 * case, sends the process a signal and continues in the
  36.342 +	 * corresponding place in the code below.
  36.343 +	 */
  36.344 +	ALIGN_TEXT
  36.345 +	.globl	doreti_iret_fault
  36.346 +doreti_iret_fault:
  36.347 +	subl	$12,%esp
  36.348 +	pushal
  36.349 +	pushl	%ds
  36.350 +	.globl	doreti_popl_ds_fault
  36.351 +doreti_popl_ds_fault:
  36.352 +	pushl	%es
  36.353 +	.globl	doreti_popl_es_fault
  36.354 +doreti_popl_es_fault:
  36.355 +	pushl	%fs
  36.356 +	.globl	doreti_popl_fs_fault
  36.357 +doreti_popl_fs_fault:
  36.358 +	movl	$0,TF_ERR(%esp)	/* XXX should be the error code */
  36.359 +	movl	$T_PROTFLT,TF_TRAPNO(%esp)
  36.360 +	jmp	alltraps_with_regs_pushed
  36.361 +
  36.362 +
  36.363 +
  36.364 +
  36.365 +/*
  36.366 +# [How we do the fixup]. We want to merge the current stack frame with the
  36.367 +# just-interrupted frame. How we do this depends on where in the critical
  36.368 +# region the interrupted handler was executing, and so how many saved
  36.369 +# registers are in each frame. We do this quickly using the lookup table
  36.370 +# 'critical_fixup_table'. For each byte offset in the critical region, it
  36.371 +# provides the number of bytes which have already been popped from the
  36.372 +# interrupted stack frame.
  36.373 +*/
  36.374 +
  36.375 +.globl critical_region_fixup
  36.376 +critical_region_fixup:
  36.377 +	addl $critical_fixup_table-scrit,%eax
  36.378 +	movzbl (%eax),%eax    # %eax contains num bytes popped
  36.379 +        movl  %esp,%esi
  36.380 +        add  %eax,%esi        # %esi points at end of src region
  36.381 +        movl  %esp,%edi
  36.382 +        add  $0x44,%edi       # %edi points at end of dst region
  36.383 +        movl  %eax,%ecx
  36.384 +        shr  $2,%ecx          # convert bytes to words
  36.385 +        je   16f              # skip loop if nothing to copy
  36.386 +15:     subl $4,%esi          # pre-decrementing copy loop
  36.387 +        subl $4,%edi
  36.388 +        movl (%esi),%eax
  36.389 +        movl %eax,(%edi)
  36.390 +        loop 15b
  36.391 +16:     movl %edi,%esp        # final %edi is top of merged stack
  36.392 +	jmp  hypervisor_callback_pending
  36.393 +
  36.394 +
  36.395 +critical_fixup_table:        
  36.396 +.byte   0x0,0x0,0x0			#testb  $0x1,(%esi)
  36.397 +.byte   0x0,0x0,0x0,0x0,0x0,0x0		#jne    ea 
  36.398 +.byte   0x0,0x0				#pop    %fs
  36.399 +.byte   0x04				#pop    %es
  36.400 +.byte   0x08				#pop    %ds
  36.401 +.byte   0x0c				#pop    %edi
  36.402 +.byte   0x10	                        #pop    %esi
  36.403 +.byte   0x14	                        #pop    %ebp
  36.404 +.byte   0x18	                        #pop    %ebx
  36.405 +.byte   0x1c	                        #pop    %ebx
  36.406 +.byte   0x20	                        #pop    %edx
  36.407 +.byte   0x24	                        #pop    %ecx
  36.408 +.byte   0x28	                        #pop    %eax
  36.409 +.byte   0x2c,0x2c,0x2c                  #add    $0xc,%esp
  36.410 +.byte   0x38	                        #iret   
  36.411 +
  36.412 +	
  36.413 +/* # Hypervisor uses this for application faults while it executes.*/
  36.414 +ENTRY(failsafe_callback)
  36.415 +	pushal
  36.416 +	call xen_failsafe_handler
  36.417 +/*#	call install_safe_pf_handler */
  36.418 +        movl 32(%esp),%ebx
  36.419 +1:      movl %ebx,%ds
  36.420 +        movl 36(%esp),%ebx
  36.421 +2:      movl %ebx,%es
  36.422 +        movl 40(%esp),%ebx
  36.423 +3:      movl %ebx,%fs
  36.424 +        movl 44(%esp),%ebx
  36.425 +4:      movl %ebx,%gs
  36.426 +/*#        call install_normal_pf_handler */
  36.427 +	popal
  36.428 +	addl $16,%esp
  36.429 +	iret
  36.430 +
  36.431 +
    37.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    37.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/genassym.c	Tue Apr 05 11:27:50 2005 +0000
    37.3 @@ -0,0 +1,234 @@
    37.4 +/*-
    37.5 + * Copyright (c) 1982, 1990 The Regents of the University of California.
    37.6 + * All rights reserved.
    37.7 + *
    37.8 + * This code is derived from software contributed to Berkeley by
    37.9 + * William Jolitz.
   37.10 + *
   37.11 + * Redistribution and use in source and binary forms, with or without
   37.12 + * modification, are permitted provided that the following conditions
   37.13 + * are met:
   37.14 + * 1. Redistributions of source code must retain the above copyright
   37.15 + *    notice, this list of conditions and the following disclaimer.
   37.16 + * 2. Redistributions in binary form must reproduce the above copyright
   37.17 + *    notice, this list of conditions and the following disclaimer in the
   37.18 + *    documentation and/or other materials provided with the distribution.
   37.19 + * 3. All advertising materials mentioning features or use of this software
   37.20 + *    must display the following acknowledgement:
   37.21 + *	This product includes software developed by the University of
   37.22 + *	California, Berkeley and its contributors.
   37.23 + * 4. Neither the name of the University nor the names of its contributors
   37.24 + *    may be used to endorse or promote products derived from this software
   37.25 + *    without specific prior written permission.
   37.26 + *
   37.27 + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   37.28 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   37.29 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   37.30 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   37.31 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   37.32 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   37.33 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   37.34 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   37.35 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   37.36 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   37.37 + * SUCH DAMAGE.
   37.38 + *
   37.39 + *	from: @(#)genassym.c	5.11 (Berkeley) 5/10/91
   37.40 + */
   37.41 +
   37.42 +#include <sys/cdefs.h>
   37.43 +__FBSDID("$FreeBSD: src/sys/i386/i386/genassym.c,v 1.146 2003/11/12 18:14:34 jhb Exp $");
   37.44 +
   37.45 +#include "opt_apic.h"
   37.46 +#include "opt_compat.h"
   37.47 +#include "opt_kstack_pages.h"
   37.48 +
   37.49 +#include <sys/param.h>
   37.50 +#include <sys/systm.h>
   37.51 +#include <sys/assym.h>
   37.52 +#include <sys/bio.h>
   37.53 +#include <sys/buf.h>
   37.54 +#include <sys/proc.h>
   37.55 +#include <sys/errno.h>
   37.56 +#include <sys/mount.h>
   37.57 +#include <sys/mutex.h>
   37.58 +#include <sys/socket.h>
   37.59 +#include <sys/resourcevar.h>
   37.60 +#include <sys/ucontext.h>
   37.61 +#include <sys/user.h>
   37.62 +#include <machine/bootinfo.h>
   37.63 +#include <machine/tss.h>
   37.64 +#include <sys/vmmeter.h>
   37.65 +#include <vm/vm.h>
   37.66 +#include <vm/vm_param.h>
   37.67 +#include <vm/pmap.h>
   37.68 +#include <vm/vm_map.h>
   37.69 +#include <sys/user.h>
   37.70 +#include <sys/proc.h>
   37.71 +#include <net/if.h>
   37.72 +#include <netinet/in.h>
   37.73 +#include <nfs/nfsproto.h>
   37.74 +#include <nfs/rpcv2.h>
   37.75 +#include <nfsclient/nfs.h>
   37.76 +#include <nfsclient/nfsdiskless.h>
   37.77 +#ifdef DEV_APIC
   37.78 +#include <machine/apicreg.h>
   37.79 +#endif
   37.80 +#include <machine/cpu.h>
   37.81 +#include <machine/sigframe.h>
   37.82 +#include <machine/proc.h>
   37.83 +
   37.84 +ASSYM(P_VMSPACE, offsetof(struct proc, p_vmspace));
   37.85 +ASSYM(VM_PMAP, offsetof(struct vmspace, vm_pmap));
   37.86 +ASSYM(PM_ACTIVE, offsetof(struct pmap, pm_active));
   37.87 +ASSYM(P_SFLAG, offsetof(struct proc, p_sflag));
   37.88 +ASSYM(P_UAREA, offsetof(struct proc, p_uarea));
   37.89 +
   37.90 +ASSYM(TD_FLAGS, offsetof(struct thread, td_flags));
   37.91 +ASSYM(TD_PCB, offsetof(struct thread, td_pcb));
   37.92 +ASSYM(TD_PROC, offsetof(struct thread, td_proc));
   37.93 +ASSYM(TD_MD, offsetof(struct thread, td_md));
   37.94 +
   37.95 +ASSYM(P_MD, offsetof(struct proc, p_md));
   37.96 +ASSYM(MD_LDT, offsetof(struct mdproc, md_ldt));
   37.97 +
   37.98 +ASSYM(TDF_ASTPENDING, TDF_ASTPENDING);
   37.99 +ASSYM(TDF_NEEDRESCHED, TDF_NEEDRESCHED);
  37.100 +
  37.101 +ASSYM(V_TRAP, offsetof(struct vmmeter, v_trap));
  37.102 +ASSYM(V_SYSCALL, offsetof(struct vmmeter, v_syscall));
  37.103 +ASSYM(V_INTR, offsetof(struct vmmeter, v_intr));
  37.104 +/* ASSYM(UPAGES, UPAGES);*/
  37.105 +ASSYM(UAREA_PAGES, UAREA_PAGES);
  37.106 +ASSYM(KSTACK_PAGES, KSTACK_PAGES);
  37.107 +ASSYM(PAGE_SIZE, PAGE_SIZE);
  37.108 +ASSYM(NPTEPG, NPTEPG);
  37.109 +ASSYM(NPDEPG, NPDEPG);
  37.110 +ASSYM(NPDEPTD, NPDEPTD);
  37.111 +ASSYM(NPGPTD, NPGPTD);
  37.112 +ASSYM(PDESIZE, sizeof(pd_entry_t));
  37.113 +ASSYM(PTESIZE, sizeof(pt_entry_t));
  37.114 +ASSYM(PDESHIFT, PDESHIFT);
  37.115 +ASSYM(PTESHIFT, PTESHIFT);
  37.116 +ASSYM(PAGE_SHIFT, PAGE_SHIFT);
  37.117 +ASSYM(PAGE_MASK, PAGE_MASK);
  37.118 +ASSYM(PDRSHIFT, PDRSHIFT);
  37.119 +ASSYM(PDRMASK, PDRMASK);
  37.120 +ASSYM(USRSTACK, USRSTACK);
  37.121 +ASSYM(VM_MAXUSER_ADDRESS, VM_MAXUSER_ADDRESS);
  37.122 +ASSYM(KERNBASE, KERNBASE);
  37.123 +ASSYM(KERNLOAD, KERNLOAD);
  37.124 +ASSYM(MCLBYTES, MCLBYTES);
  37.125 +ASSYM(PCB_CR3, offsetof(struct pcb, pcb_cr3));
  37.126 +ASSYM(PCB_EDI, offsetof(struct pcb, pcb_edi));
  37.127 +ASSYM(PCB_ESI, offsetof(struct pcb, pcb_esi));
  37.128 +ASSYM(PCB_EBP, offsetof(struct pcb, pcb_ebp));
  37.129 +ASSYM(PCB_ESP, offsetof(struct pcb, pcb_esp));
  37.130 +ASSYM(PCB_EBX, offsetof(struct pcb, pcb_ebx));
  37.131 +ASSYM(PCB_EIP, offsetof(struct pcb, pcb_eip));
  37.132 +ASSYM(TSS_ESP0, offsetof(struct i386tss, tss_esp0));
  37.133 +
  37.134 +ASSYM(PCB_GS, offsetof(struct pcb, pcb_gs));
  37.135 +ASSYM(PCB_DR0, offsetof(struct pcb, pcb_dr0));
  37.136 +ASSYM(PCB_DR1, offsetof(struct pcb, pcb_dr1));
  37.137 +ASSYM(PCB_DR2, offsetof(struct pcb, pcb_dr2));
  37.138 +ASSYM(PCB_DR3, offsetof(struct pcb, pcb_dr3));
  37.139 +ASSYM(PCB_DR6, offsetof(struct pcb, pcb_dr6));
  37.140 +ASSYM(PCB_DR7, offsetof(struct pcb, pcb_dr7));
  37.141 +ASSYM(PCB_PSL, offsetof(struct pcb, pcb_psl));
  37.142 +ASSYM(PCB_DBREGS, PCB_DBREGS);
  37.143 +ASSYM(PCB_EXT, offsetof(struct pcb, pcb_ext));
  37.144 +
  37.145 +ASSYM(PCB_SPARE, offsetof(struct pcb, __pcb_spare));
  37.146 +ASSYM(PCB_FLAGS, offsetof(struct pcb, pcb_flags));
  37.147 +ASSYM(PCB_SAVEFPU, offsetof(struct pcb, pcb_save));
  37.148 +ASSYM(PCB_SAVEFPU_SIZE, sizeof(union savefpu));
  37.149 +ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault));
  37.150 +ASSYM(PCB_SWITCHOUT, offsetof(struct pcb, pcb_switchout));
  37.151 +
  37.152 +ASSYM(PCB_SIZE, sizeof(struct pcb));
  37.153 +
  37.154 +ASSYM(TF_TRAPNO, offsetof(struct trapframe, tf_trapno));
  37.155 +ASSYM(TF_ERR, offsetof(struct trapframe, tf_err));
  37.156 +ASSYM(TF_CS, offsetof(struct trapframe, tf_cs));
  37.157 +ASSYM(TF_EFLAGS, offsetof(struct trapframe, tf_eflags));
  37.158 +ASSYM(TF_EIP, offsetof(struct trapframe, tf_eip));
  37.159 +ASSYM(SIGF_HANDLER, offsetof(struct sigframe, sf_ahu.sf_handler));
  37.160 +#ifdef COMPAT_43
  37.161 +ASSYM(SIGF_SC, offsetof(struct osigframe, sf_siginfo.si_sc));
  37.162 +#endif
  37.163 +ASSYM(SIGF_UC, offsetof(struct sigframe, sf_uc));
  37.164 +#ifdef COMPAT_FREEBSD4
  37.165 +ASSYM(SIGF_UC4, offsetof(struct sigframe4, sf_uc));
  37.166 +#endif
  37.167 +#ifdef COMPAT_43
  37.168 +ASSYM(SC_PS, offsetof(struct osigcontext, sc_ps));
  37.169 +ASSYM(SC_FS, offsetof(struct osigcontext, sc_fs));
  37.170 +ASSYM(SC_GS, offsetof(struct osigcontext, sc_gs));
  37.171 +ASSYM(SC_TRAPNO, offsetof(struct osigcontext, sc_trapno));
  37.172 +#endif
  37.173 +#ifdef COMPAT_FREEBSD4
  37.174 +ASSYM(UC4_EFLAGS, offsetof(struct ucontext4, uc_mcontext.mc_eflags));
  37.175 +ASSYM(UC4_GS, offsetof(struct ucontext4, uc_mcontext.mc_gs));
  37.176 +#endif
  37.177 +ASSYM(UC_EFLAGS, offsetof(ucontext_t, uc_mcontext.mc_eflags));
  37.178 +ASSYM(UC_GS, offsetof(ucontext_t, uc_mcontext.mc_gs));
  37.179 +ASSYM(ENOENT, ENOENT);
  37.180 +ASSYM(EFAULT, EFAULT);
  37.181 +ASSYM(ENAMETOOLONG, ENAMETOOLONG);
  37.182 +ASSYM(MAXCOMLEN, MAXCOMLEN);
  37.183 +ASSYM(MAXPATHLEN, MAXPATHLEN);
  37.184 +ASSYM(BOOTINFO_SIZE, sizeof(struct bootinfo));
  37.185 +ASSYM(BI_VERSION, offsetof(struct bootinfo, bi_version));
  37.186 +ASSYM(BI_KERNELNAME, offsetof(struct bootinfo, bi_kernelname));
  37.187 +ASSYM(BI_NFS_DISKLESS, offsetof(struct bootinfo, bi_nfs_diskless));
  37.188 +ASSYM(BI_ENDCOMMON, offsetof(struct bootinfo, bi_endcommon));
  37.189 +ASSYM(NFSDISKLESS_SIZE, sizeof(struct nfs_diskless));
  37.190 +ASSYM(BI_SIZE, offsetof(struct bootinfo, bi_size));
  37.191 +ASSYM(BI_SYMTAB, offsetof(struct bootinfo, bi_symtab));
  37.192 +ASSYM(BI_ESYMTAB, offsetof(struct bootinfo, bi_esymtab));
  37.193 +ASSYM(BI_KERNEND, offsetof(struct bootinfo, bi_kernend));
  37.194 +ASSYM(PC_SIZEOF, sizeof(struct pcpu));
  37.195 +ASSYM(PC_PRVSPACE, offsetof(struct pcpu, pc_prvspace));
  37.196 +ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread));
  37.197 +ASSYM(PC_FPCURTHREAD, offsetof(struct pcpu, pc_fpcurthread));
  37.198 +ASSYM(PC_IDLETHREAD, offsetof(struct pcpu, pc_idlethread));
  37.199 +ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb));
  37.200 +ASSYM(PC_COMMON_TSS, offsetof(struct pcpu, pc_common_tss));
  37.201 +ASSYM(PC_COMMON_TSSD, offsetof(struct pcpu, pc_common_tssd));
  37.202 +ASSYM(PC_TSS_GDT, offsetof(struct pcpu, pc_tss_gdt));
  37.203 +ASSYM(PC_CURRENTLDT, offsetof(struct pcpu, pc_currentldt));
  37.204 +ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid));
  37.205 +ASSYM(PC_CURPMAP, offsetof(struct pcpu, pc_curpmap));
  37.206 +ASSYM(PC_TRAP_NESTING, offsetof(struct pcpu, pc_trap_nesting));
  37.207 +
  37.208 +ASSYM(PC_CR3, offsetof(struct pcpu, pc_pdir));
  37.209 +
  37.210 +#ifdef DEV_APIC
  37.211 +ASSYM(LA_VER, offsetof(struct LAPIC, version));
  37.212 +ASSYM(LA_TPR, offsetof(struct LAPIC, tpr));
  37.213 +ASSYM(LA_EOI, offsetof(struct LAPIC, eoi));
  37.214 +ASSYM(LA_SVR, offsetof(struct LAPIC, svr));
  37.215 +ASSYM(LA_ICR_LO, offsetof(struct LAPIC, icr_lo));
  37.216 +ASSYM(LA_ICR_HI, offsetof(struct LAPIC, icr_hi));
  37.217 +ASSYM(LA_ISR, offsetof(struct LAPIC, isr0));
  37.218 +#endif
  37.219 +
  37.220 +ASSYM(KCSEL, GSEL(GCODE_SEL, SEL_KPL));
  37.221 +ASSYM(KDSEL, GSEL(GDATA_SEL, SEL_KPL));
  37.222 +ASSYM(KPSEL, GSEL(GPRIV_SEL, SEL_KPL));
  37.223 +
  37.224 +ASSYM(BC32SEL, GSEL(GBIOSCODE32_SEL, SEL_KPL));
  37.225 +ASSYM(GPROC0_SEL, GPROC0_SEL);
  37.226 +
  37.227 +ASSYM(MTX_LOCK, offsetof(struct mtx, mtx_lock));
  37.228 +ASSYM(MTX_RECURSECNT, offsetof(struct mtx, mtx_recurse));
  37.229 +
  37.230 +#ifdef PC98
  37.231 +#include <machine/bus.h>
  37.232 +
  37.233 +ASSYM(BUS_SPACE_HANDLE_BASE, offsetof(struct bus_space_handle, bsh_base));
  37.234 +ASSYM(BUS_SPACE_HANDLE_IAT, offsetof(struct bus_space_handle, bsh_iat));
  37.235 +#endif
  37.236 +
  37.237 +ASSYM(HYPERVISOR_STACK_SWITCH, __HYPERVISOR_stack_switch);
    38.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    38.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/hypervisor.c	Tue Apr 05 11:27:50 2005 +0000
    38.3 @@ -0,0 +1,107 @@
    38.4 +/******************************************************************************
    38.5 + * hypervisor.c
    38.6 + * 
    38.7 + * Communication to/from hypervisor.
    38.8 + * 
    38.9 + * Copyright (c) 2002-2003, K A Fraser
   38.10 + * 
   38.11 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   38.12 + * of this software and associated documentation files (the "Software"), to
   38.13 + * deal in the Software without restriction, including without limitation the
   38.14 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   38.15 + * sell copies of the Software, and to permit persons to whom the Software is
   38.16 + * furnished to do so, subject to the following conditions:
   38.17 + * 
   38.18 + * The above copyright notice and this permission notice shall be included in
   38.19 + * all copies or substantial portions of the Software.
   38.20 + * 
   38.21 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   38.22 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIEAS OF MERCHANTABILITY, 
   38.23 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   38.24 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   38.25 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   38.26 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   38.27 + * DEALINGS IN THE SOFTWARE.
   38.28 + */
   38.29 +
   38.30 +#include <machine/xen-os.h>
   38.31 +#include <machine/hypervisor.h>
   38.32 +#include <machine/xenvar.h>
   38.33 +#include <machine/multicall.h>
   38.34 +
   38.35 +/* XXX need to verify what the caller save registers are on x86 KMM */
   38.36 +#define CALLER_SAVE __asm__("pushal; ")
   38.37 +#define CALLER_RESTORE __asm__("popal;")
   38.38 +
   38.39 +
   38.40 +/* ni == non-inline - these are only intended for use from assembler
   38.41 + * no reason to have them in a header - 
   38.42 + *
   38.43 + */
   38.44 +void ni_queue_multicall0(unsigned long op); 
   38.45 +void ni_queue_multicall1(unsigned long op, unsigned long arg1); 
   38.46 +void ni_queue_multicall2(unsigned long op, unsigned long arg1,
   38.47 +			 unsigned long arg2); 
   38.48 +void ni_queue_multicall3(unsigned long op, unsigned long arg1,
   38.49 +			 unsigned long arg2, unsigned long arg3); 
   38.50 +void ni_queue_multicall4(unsigned long op, unsigned long arg1,
   38.51 +			 unsigned long arg2, unsigned long arg4,
   38.52 +			 unsigned long arg5); 
   38.53 +
   38.54 +void ni_execute_multicall_list(void);
   38.55 +
   38.56 +multicall_entry_t multicall_list[MAX_MULTICALL_ENTS];
   38.57 +int nr_multicall_ents = 0;
   38.58 +
   38.59 +
   38.60 +void 
   38.61 +ni_queue_multicall0(unsigned long op) 
   38.62 +{
   38.63 +    CALLER_SAVE;
   38.64 +    queue_multicall0(op);
   38.65 +    CALLER_RESTORE;
   38.66 +}
   38.67 +
   38.68 +void 
   38.69 +ni_queue_multicall1(unsigned long op, unsigned long arg1) 
   38.70 +{
   38.71 +    CALLER_SAVE;
   38.72 +    queue_multicall1(op, arg1);
   38.73 +    CALLER_RESTORE;
   38.74 +}
   38.75 +
   38.76 +void 
   38.77 +ni_queue_multicall2(unsigned long op, unsigned long arg1, 
   38.78 +		    unsigned long arg2) 
   38.79 +{
   38.80 +    CALLER_SAVE;
   38.81 +    queue_multicall2(op, arg1, arg2);
   38.82 +    CALLER_RESTORE;
   38.83 +}
   38.84 +
   38.85 +void 
   38.86 +ni_queue_multicall3(unsigned long op, unsigned long arg1, 
   38.87 +		    unsigned long arg2, unsigned long arg3) 
   38.88 +{
   38.89 +    CALLER_SAVE;
   38.90 +    queue_multicall3(op, arg1, arg2, arg3);
   38.91 +    CALLER_RESTORE;
   38.92 +}
   38.93 +
   38.94 +void 
   38.95 +ni_queue_multicall4(unsigned long op, unsigned long arg1,
   38.96 +		    unsigned long arg2, unsigned long arg3,
   38.97 +		    unsigned long arg4) 
   38.98 +{
   38.99 +    CALLER_SAVE;    
  38.100 +    queue_multicall4(op, arg1, arg2, arg3, arg4);
  38.101 +    CALLER_RESTORE;
  38.102 +}
  38.103 +
  38.104 +void
  38.105 +ni_execute_multicall_list(void)
  38.106 +{
  38.107 +    CALLER_SAVE;
  38.108 +    execute_multicall_list();
  38.109 +    CALLER_RESTORE;
  38.110 +}
    39.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    39.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/i686_mem.c	Tue Apr 05 11:27:50 2005 +0000
    39.3 @@ -0,0 +1,626 @@
    39.4 +/*-
    39.5 + * Copyright (c) 1999 Michael Smith <msmith@freebsd.org>
    39.6 + * All rights reserved.
    39.7 + *
    39.8 + * Redistribution and use in source and binary forms, with or without
    39.9 + * modification, are permitted provided that the following conditions
   39.10 + * are met:
   39.11 + * 1. Redistributions of source code must retain the above copyright
   39.12 + *    notice, this list of conditions and the following disclaimer.
   39.13 + * 2. Redistributions in binary form must reproduce the above copyright
   39.14 + *    notice, this list of conditions and the following disclaimer in the
   39.15 + *    documentation and/or other materials provided with the distribution.
   39.16 + *
   39.17 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   39.18 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   39.19 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   39.20 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   39.21 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   39.22 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   39.23 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   39.24 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   39.25 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   39.26 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   39.27 + * SUCH DAMAGE.
   39.28 + */
   39.29 +
   39.30 +#include <sys/cdefs.h>
   39.31 +__FBSDID("$FreeBSD: src/sys/i386/i386/i686_mem.c,v 1.23 2003/10/21 18:28:34 silby Exp $");
   39.32 +
   39.33 +#include <sys/param.h>
   39.34 +#include <sys/kernel.h>
   39.35 +#include <sys/systm.h>
   39.36 +#include <sys/malloc.h>
   39.37 +#include <sys/memrange.h>
   39.38 +#include <sys/smp.h>
   39.39 +#include <sys/sysctl.h>
   39.40 +
   39.41 +#include <machine/md_var.h>
   39.42 +#include <machine/specialreg.h>
   39.43 +
   39.44 +/*
   39.45 + * i686 memory range operations
   39.46 + *
   39.47 + * This code will probably be impenetrable without reference to the
   39.48 + * Intel Pentium Pro documentation.
   39.49 + */
   39.50 +
   39.51 +static char *mem_owner_bios = "BIOS";
   39.52 +
   39.53 +#define MR686_FIXMTRR	(1<<0)
   39.54 +
   39.55 +#define mrwithin(mr, a) \
   39.56 +    (((a) >= (mr)->mr_base) && ((a) < ((mr)->mr_base + (mr)->mr_len)))
   39.57 +#define mroverlap(mra, mrb) \
   39.58 +    (mrwithin(mra, mrb->mr_base) || mrwithin(mrb, mra->mr_base))
   39.59 +
   39.60 +#define mrvalid(base, len) 						\
   39.61 +    ((!(base & ((1 << 12) - 1))) && 	/* base is multiple of 4k */	\
   39.62 +     ((len) >= (1 << 12)) && 		/* length is >= 4k */		\
   39.63 +     powerof2((len)) && 		/* ... and power of two */	\
   39.64 +     !((base) & ((len) - 1)))		/* range is not discontiuous */
   39.65 +
   39.66 +#define mrcopyflags(curr, new) (((curr) & ~MDF_ATTRMASK) | ((new) & MDF_ATTRMASK))
   39.67 +
   39.68 +static int			mtrrs_disabled;
   39.69 +TUNABLE_INT("machdep.disable_mtrrs", &mtrrs_disabled);
   39.70 +SYSCTL_INT(_machdep, OID_AUTO, disable_mtrrs, CTLFLAG_RDTUN,
   39.71 +	&mtrrs_disabled, 0, "Disable i686 MTRRs.");
   39.72 +
   39.73 +static void			i686_mrinit(struct mem_range_softc *sc);
   39.74 +static int			i686_mrset(struct mem_range_softc *sc,
   39.75 +					   struct mem_range_desc *mrd,
   39.76 +					   int *arg);
   39.77 +static void			i686_mrAPinit(struct mem_range_softc *sc);
   39.78 +
   39.79 +static struct mem_range_ops i686_mrops = {
   39.80 +    i686_mrinit,
   39.81 +    i686_mrset,
   39.82 +    i686_mrAPinit
   39.83 +};
   39.84 +
   39.85 +/* XXX for AP startup hook */
   39.86 +static u_int64_t		mtrrcap, mtrrdef;
   39.87 +
   39.88 +static struct mem_range_desc	*mem_range_match(struct mem_range_softc *sc,
   39.89 +						 struct mem_range_desc *mrd);
   39.90 +static void			i686_mrfetch(struct mem_range_softc *sc);
   39.91 +static int			i686_mtrrtype(int flags);
   39.92 +#if 0
   39.93 +static int			i686_mrt2mtrr(int flags, int oldval);
   39.94 +#endif
   39.95 +static int			i686_mtrrconflict(int flag1, int flag2);
   39.96 +static void			i686_mrstore(struct mem_range_softc *sc);
   39.97 +static void			i686_mrstoreone(void *arg);
   39.98 +static struct mem_range_desc	*i686_mtrrfixsearch(struct mem_range_softc *sc,
   39.99 +						    u_int64_t addr);
  39.100 +static int			i686_mrsetlow(struct mem_range_softc *sc,
  39.101 +					      struct mem_range_desc *mrd,
  39.102 +					      int *arg);
  39.103 +static int			i686_mrsetvariable(struct mem_range_softc *sc,
  39.104 +						   struct mem_range_desc *mrd,
  39.105 +						   int *arg);
  39.106 +
  39.107 +/* i686 MTRR type to memory range type conversion */
  39.108 +static int i686_mtrrtomrt[] = {
  39.109 +    MDF_UNCACHEABLE,
  39.110 +    MDF_WRITECOMBINE,
  39.111 +    MDF_UNKNOWN,
  39.112 +    MDF_UNKNOWN,
  39.113 +    MDF_WRITETHROUGH,
  39.114 +    MDF_WRITEPROTECT,
  39.115 +    MDF_WRITEBACK
  39.116 +};
  39.117 +
  39.118 +#define MTRRTOMRTLEN (sizeof(i686_mtrrtomrt) / sizeof(i686_mtrrtomrt[0]))
  39.119 +
  39.120 +static int
  39.121 +i686_mtrr2mrt(int val) {
  39.122 +	if (val < 0 || val >= MTRRTOMRTLEN)
  39.123 +		return MDF_UNKNOWN;
  39.124 +	return i686_mtrrtomrt[val];
  39.125 +}
  39.126 +
  39.127 +/* 
  39.128 + * i686 MTRR conflicts. Writeback and uncachable may overlap.
  39.129 + */
  39.130 +static int
  39.131 +i686_mtrrconflict(int flag1, int flag2) {
  39.132 +	flag1 &= MDF_ATTRMASK;
  39.133 +	flag2 &= MDF_ATTRMASK;
  39.134 +	if (flag1 == flag2 ||
  39.135 +	    (flag1 == MDF_WRITEBACK && flag2 == MDF_UNCACHEABLE) ||
  39.136 +	    (flag2 == MDF_WRITEBACK && flag1 == MDF_UNCACHEABLE))
  39.137 +		return 0;
  39.138 +	return 1;
  39.139 +}
  39.140 +
  39.141 +/*
  39.142 + * Look for an exactly-matching range.
  39.143 + */
  39.144 +static struct mem_range_desc *
  39.145 +mem_range_match(struct mem_range_softc *sc, struct mem_range_desc *mrd) 
  39.146 +{
  39.147 +    struct mem_range_desc	*cand;
  39.148 +    int				i;
  39.149 +	
  39.150 +    for (i = 0, cand = sc->mr_desc; i < sc->mr_ndesc; i++, cand++)
  39.151 +	if ((cand->mr_base == mrd->mr_base) &&
  39.152 +	    (cand->mr_len == mrd->mr_len))
  39.153 +	    return(cand);
  39.154 +    return(NULL);
  39.155 +}
  39.156 +
  39.157 +/*
  39.158 + * Fetch the current mtrr settings from the current CPU (assumed to all
  39.159 + * be in sync in the SMP case).  Note that if we are here, we assume
  39.160 + * that MTRRs are enabled, and we may or may not have fixed MTRRs.
  39.161 + */
  39.162 +static void
  39.163 +i686_mrfetch(struct mem_range_softc *sc)
  39.164 +{
  39.165 +    struct mem_range_desc	*mrd;
  39.166 +    u_int64_t			msrv;
  39.167 +    int				i, j, msr;
  39.168 +
  39.169 +    mrd = sc->mr_desc;
  39.170 +
  39.171 +    /* Get fixed-range MTRRs */
  39.172 +    if (sc->mr_cap & MR686_FIXMTRR) {
  39.173 +	msr = MSR_MTRR64kBase;
  39.174 +	for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
  39.175 +	    msrv = rdmsr(msr);
  39.176 +	    for (j = 0; j < 8; j++, mrd++) {
  39.177 +		mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  39.178 +		    i686_mtrr2mrt(msrv & 0xff) |
  39.179 +		    MDF_ACTIVE;
  39.180 +		if (mrd->mr_owner[0] == 0)
  39.181 +		    strcpy(mrd->mr_owner, mem_owner_bios);
  39.182 +		msrv = msrv >> 8;
  39.183 +	    }
  39.184 +	}
  39.185 +	msr = MSR_MTRR16kBase;
  39.186 +	for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
  39.187 +	    msrv = rdmsr(msr);
  39.188 +	    for (j = 0; j < 8; j++, mrd++) {
  39.189 +		mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  39.190 +		    i686_mtrr2mrt(msrv & 0xff) |
  39.191 +		    MDF_ACTIVE;
  39.192 +		if (mrd->mr_owner[0] == 0)
  39.193 +		    strcpy(mrd->mr_owner, mem_owner_bios);
  39.194 +		msrv = msrv >> 8;
  39.195 +	    }
  39.196 +	}
  39.197 +	msr = MSR_MTRR4kBase;
  39.198 +	for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
  39.199 +	    msrv = rdmsr(msr);
  39.200 +	    for (j = 0; j < 8; j++, mrd++) {
  39.201 +		mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  39.202 +		    i686_mtrr2mrt(msrv & 0xff) |
  39.203 +		    MDF_ACTIVE;
  39.204 +		if (mrd->mr_owner[0] == 0)
  39.205 +		    strcpy(mrd->mr_owner, mem_owner_bios);
  39.206 +		msrv = msrv >> 8;
  39.207 +	    }
  39.208 +	}
  39.209 +    }
  39.210 +
  39.211 +    /* Get remainder which must be variable MTRRs */
  39.212 +    msr = MSR_MTRRVarBase;
  39.213 +    for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
  39.214 +	msrv = rdmsr(msr);
  39.215 +	mrd->mr_flags = (mrd->mr_flags & ~MDF_ATTRMASK) |
  39.216 +	    i686_mtrr2mrt(msrv & 0xff);
  39.217 +	mrd->mr_base = msrv & 0x0000000ffffff000LL;
  39.218 +	msrv = rdmsr(msr + 1);
  39.219 +	mrd->mr_flags = (msrv & 0x800) ? 
  39.220 +	    (mrd->mr_flags | MDF_ACTIVE) :
  39.221 +	    (mrd->mr_flags & ~MDF_ACTIVE);
  39.222 +	/* Compute the range from the mask. Ick. */
  39.223 +	mrd->mr_len = (~(msrv & 0x0000000ffffff000LL) & 0x0000000fffffffffLL) + 1;
  39.224 +	if (!mrvalid(mrd->mr_base, mrd->mr_len))
  39.225 +	    mrd->mr_flags |= MDF_BOGUS;
  39.226 +	/* If unclaimed and active, must be the BIOS */
  39.227 +	if ((mrd->mr_flags & MDF_ACTIVE) && (mrd->mr_owner[0] == 0))
  39.228 +	    strcpy(mrd->mr_owner, mem_owner_bios);
  39.229 +    }
  39.230 +}
  39.231 +
  39.232 +/*
  39.233 + * Return the MTRR memory type matching a region's flags
  39.234 + */
  39.235 +static int
  39.236 +i686_mtrrtype(int flags)
  39.237 +{
  39.238 +    int		i;
  39.239 +
  39.240 +    flags &= MDF_ATTRMASK;
  39.241 +
  39.242 +    for (i = 0; i < MTRRTOMRTLEN; i++) {
  39.243 +	if (i686_mtrrtomrt[i] == MDF_UNKNOWN)
  39.244 +	    continue;
  39.245 +	if (flags == i686_mtrrtomrt[i])
  39.246 +	    return(i);
  39.247 +    }
  39.248 +    return(-1);
  39.249 +}
  39.250 +#if 0
  39.251 +static int
  39.252 +i686_mrt2mtrr(int flags, int oldval)
  39.253 +{
  39.254 +	int val;
  39.255 +
  39.256 +	if ((val = i686_mtrrtype(flags)) == -1)
  39.257 +		return oldval & 0xff;
  39.258 +	return val & 0xff;
  39.259 +}
  39.260 +#endif
  39.261 +/*
  39.262 + * Update running CPU(s) MTRRs to match the ranges in the descriptor
  39.263 + * list.
  39.264 + *
  39.265 + * XXX Must be called with interrupts enabled.
  39.266 + */
  39.267 +static void
  39.268 +i686_mrstore(struct mem_range_softc *sc)
  39.269 +{
  39.270 +#ifdef SMP
  39.271 +    /*
  39.272 +     * We should use ipi_all_but_self() to call other CPUs into a 
  39.273 +     * locking gate, then call a target function to do this work.
  39.274 +     * The "proper" solution involves a generalised locking gate
  39.275 +     * implementation, not ready yet.
  39.276 +     */
  39.277 +    smp_rendezvous(NULL, i686_mrstoreone, NULL, (void *)sc);
  39.278 +#else
  39.279 +    disable_intr();				/* disable interrupts */
  39.280 +    i686_mrstoreone((void *)sc);
  39.281 +    enable_intr();
  39.282 +#endif
  39.283 +}
  39.284 +
  39.285 +/*
  39.286 + * Update the current CPU's MTRRs with those represented in the
  39.287 + * descriptor list.  Note that we do this wholesale rather than
  39.288 + * just stuffing one entry; this is simpler (but slower, of course).
  39.289 + */
  39.290 +static void
  39.291 +i686_mrstoreone(void *arg)
  39.292 +{
  39.293 +#if 0
  39.294 +    struct mem_range_softc 	*sc = (struct mem_range_softc *)arg;
  39.295 +    struct mem_range_desc	*mrd;
  39.296 +    u_int64_t			omsrv, msrv;
  39.297 +    int				i, j, msr;
  39.298 +    u_int			cr4save;
  39.299 +
  39.300 +    mrd = sc->mr_desc;
  39.301 +
  39.302 +    cr4save = rcr4();				/* save cr4 */
  39.303 +    if (cr4save & CR4_PGE)
  39.304 +	load_cr4(cr4save & ~CR4_PGE);
  39.305 +    load_cr0((rcr0() & ~CR0_NW) | CR0_CD);	/* disable caches (CD = 1, NW = 0) */
  39.306 +    wbinvd();					/* flush caches, TLBs */
  39.307 +    wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) & ~0x800);	/* disable MTRRs (E = 0) */
  39.308 +
  39.309 +    /* Set fixed-range MTRRs */
  39.310 +    if (sc->mr_cap & MR686_FIXMTRR) {
  39.311 +	msr = MSR_MTRR64kBase;
  39.312 +	for (i = 0; i < (MTRR_N64K / 8); i++, msr++) {
  39.313 +	    msrv = 0;
  39.314 +	    omsrv = rdmsr(msr);
  39.315 +	    for (j = 7; j >= 0; j--) {
  39.316 +		msrv = msrv << 8;
  39.317 +		msrv |= i686_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
  39.318 +	    }
  39.319 +	    wrmsr(msr, msrv);
  39.320 +	    mrd += 8;
  39.321 +	}
  39.322 +	msr = MSR_MTRR16kBase;
  39.323 +	for (i = 0; i < (MTRR_N16K / 8); i++, msr++) {
  39.324 +	    msrv = 0;
  39.325 +	    omsrv = rdmsr(msr);
  39.326 +	    for (j = 7; j >= 0; j--) {
  39.327 +		msrv = msrv << 8;
  39.328 +		msrv |= i686_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
  39.329 +	    }
  39.330 +	    wrmsr(msr, msrv);
  39.331 +	    mrd += 8;
  39.332 +	}
  39.333 +	msr = MSR_MTRR4kBase;
  39.334 +	for (i = 0; i < (MTRR_N4K / 8); i++, msr++) {
  39.335 +	    msrv = 0;
  39.336 +	    omsrv = rdmsr(msr);
  39.337 +	    for (j = 7; j >= 0; j--) {
  39.338 +		msrv = msrv << 8;
  39.339 +		msrv |= i686_mrt2mtrr((mrd + j)->mr_flags, omsrv >> (j*8));
  39.340 +	    }
  39.341 +	    wrmsr(msr, msrv);
  39.342 +	    mrd += 8;
  39.343 +	}
  39.344 +    }
  39.345 +
  39.346 +    /* Set remainder which must be variable MTRRs */
  39.347 +    msr = MSR_MTRRVarBase;
  39.348 +    for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
  39.349 +	/* base/type register */
  39.350 +	omsrv = rdmsr(msr);
  39.351 +	if (mrd->mr_flags & MDF_ACTIVE) {
  39.352 +	    msrv = mrd->mr_base & 0x0000000ffffff000LL;
  39.353 +	    msrv |= i686_mrt2mtrr(mrd->mr_flags, omsrv);
  39.354 +	} else {
  39.355 +	    msrv = 0;
  39.356 +	}
  39.357 +	wrmsr(msr, msrv);	
  39.358 +	    
  39.359 +	/* mask/active register */
  39.360 +	if (mrd->mr_flags & MDF_ACTIVE) {
  39.361 +	    msrv = 0x800 | (~(mrd->mr_len - 1) & 0x0000000ffffff000LL);
  39.362 +	} else {
  39.363 +	    msrv = 0;
  39.364 +	}
  39.365 +	wrmsr(msr + 1, msrv);
  39.366 +    }
  39.367 +    wbinvd();							/* flush caches, TLBs */
  39.368 +    wrmsr(MSR_MTRRdefType, rdmsr(MSR_MTRRdefType) | 0x800);	/* restore MTRR state */
  39.369 +    load_cr0(rcr0() & ~(CR0_CD | CR0_NW));  			/* enable caches CD = 0 and NW = 0 */
  39.370 +    load_cr4(cr4save);						/* restore cr4 */
  39.371 +#endif
  39.372 +}
  39.373 +
  39.374 +/*
  39.375 + * Hunt for the fixed MTRR referencing (addr)
  39.376 + */
  39.377 +static struct mem_range_desc *
  39.378 +i686_mtrrfixsearch(struct mem_range_softc *sc, u_int64_t addr)
  39.379 +{
  39.380 +    struct mem_range_desc *mrd;
  39.381 +    int			i;
  39.382 +    
  39.383 +    for (i = 0, mrd = sc->mr_desc; i < (MTRR_N64K + MTRR_N16K + MTRR_N4K); i++, mrd++)
  39.384 +	if ((addr >= mrd->mr_base) && (addr < (mrd->mr_base + mrd->mr_len)))
  39.385 +	    return(mrd);
  39.386 +    return(NULL);
  39.387 +}
  39.388 +
  39.389 +/*
  39.390 + * Try to satisfy the given range request by manipulating the fixed MTRRs that
  39.391 + * cover low memory.
  39.392 + *
  39.393 + * Note that we try to be generous here; we'll bloat the range out to the 
  39.394 + * next higher/lower boundary to avoid the consumer having to know too much
  39.395 + * about the mechanisms here.
  39.396 + *
  39.397 + * XXX note that this will have to be updated when we start supporting "busy" ranges.
  39.398 + */
  39.399 +static int
  39.400 +i686_mrsetlow(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  39.401 +{
  39.402 +    struct mem_range_desc	*first_md, *last_md, *curr_md;
  39.403 +
  39.404 +    /* range check */
  39.405 +    if (((first_md = i686_mtrrfixsearch(sc, mrd->mr_base)) == NULL) ||
  39.406 +	((last_md = i686_mtrrfixsearch(sc, mrd->mr_base + mrd->mr_len - 1)) == NULL))
  39.407 +	return(EINVAL);
  39.408 +
  39.409 +    /* check we aren't doing something risky */
  39.410 +    if (!(mrd->mr_flags & MDF_FORCE))
  39.411 +	for (curr_md = first_md; curr_md <= last_md; curr_md++) {
  39.412 +	    if ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN)
  39.413 +		return (EACCES);
  39.414 +	}
  39.415 +
  39.416 +    /* set flags, clear set-by-firmware flag */
  39.417 +    for (curr_md = first_md; curr_md <= last_md; curr_md++) {
  39.418 +	curr_md->mr_flags = mrcopyflags(curr_md->mr_flags & ~MDF_FIRMWARE, mrd->mr_flags);
  39.419 +	bcopy(mrd->mr_owner, curr_md->mr_owner, sizeof(mrd->mr_owner));
  39.420 +    }
  39.421 +
  39.422 +    return(0);
  39.423 +}
  39.424 +
  39.425 +
  39.426 +/*
  39.427 + * Modify/add a variable MTRR to satisfy the request.
  39.428 + *
  39.429 + * XXX needs to be updated to properly support "busy" ranges.
  39.430 + */
  39.431 +static int
  39.432 +i686_mrsetvariable(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  39.433 +{
  39.434 +    struct mem_range_desc	*curr_md, *free_md;
  39.435 +    int				i;
  39.436 +    
  39.437 +    /* 
  39.438 +     * Scan the currently active variable descriptors, look for 
  39.439 +     * one we exactly match (straight takeover) and for possible
  39.440 +     * accidental overlaps.
  39.441 +     * Keep track of the first empty variable descriptor in case we
  39.442 +     * can't perform a takeover.
  39.443 +     */
  39.444 +    i = (sc->mr_cap & MR686_FIXMTRR) ? MTRR_N64K + MTRR_N16K + MTRR_N4K : 0;
  39.445 +    curr_md = sc->mr_desc + i;
  39.446 +    free_md = NULL;
  39.447 +    for (; i < sc->mr_ndesc; i++, curr_md++) {
  39.448 +	if (curr_md->mr_flags & MDF_ACTIVE) {
  39.449 +	    /* exact match? */
  39.450 +	    if ((curr_md->mr_base == mrd->mr_base) &&
  39.451 +		(curr_md->mr_len == mrd->mr_len)) {
  39.452 +		/* whoops, owned by someone */
  39.453 +		if (curr_md->mr_flags & MDF_BUSY)
  39.454 +		    return(EBUSY);
  39.455 +		/* check we aren't doing something risky */
  39.456 +		if (!(mrd->mr_flags & MDF_FORCE) &&
  39.457 +		  ((curr_md->mr_flags & MDF_ATTRMASK) == MDF_UNKNOWN))
  39.458 +		    return (EACCES);
  39.459 +		/* Ok, just hijack this entry */
  39.460 +		free_md = curr_md;
  39.461 +		break;
  39.462 +	    }
  39.463 +	    /* non-exact overlap ? */
  39.464 +	    if (mroverlap(curr_md, mrd)) {
  39.465 +		/* between conflicting region types? */
  39.466 +		if (i686_mtrrconflict(curr_md->mr_flags, mrd->mr_flags))
  39.467 +		    return(EINVAL);
  39.468 +	    }
  39.469 +	} else if (free_md == NULL) {
  39.470 +	    free_md = curr_md;
  39.471 +	}
  39.472 +    }
  39.473 +    /* got somewhere to put it? */
  39.474 +    if (free_md == NULL)
  39.475 +	return(ENOSPC);
  39.476 +
  39.477 +    /* Set up new descriptor */
  39.478 +    free_md->mr_base = mrd->mr_base;
  39.479 +    free_md->mr_len = mrd->mr_len;
  39.480 +    free_md->mr_flags = mrcopyflags(MDF_ACTIVE, mrd->mr_flags);
  39.481 +    bcopy(mrd->mr_owner, free_md->mr_owner, sizeof(mrd->mr_owner));
  39.482 +    return(0);
  39.483 +}
  39.484 +
  39.485 +/*
  39.486 + * Handle requests to set memory range attributes by manipulating MTRRs.
  39.487 + *
  39.488 + */
  39.489 +static int
  39.490 +i686_mrset(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
  39.491 +{
  39.492 +    struct mem_range_desc	*targ;
  39.493 +    int				error = 0;
  39.494 +
  39.495 +    switch(*arg) {
  39.496 +    case MEMRANGE_SET_UPDATE:
  39.497 +	/* make sure that what's being asked for is even possible at all */
  39.498 +	if (!mrvalid(mrd->mr_base, mrd->mr_len) ||
  39.499 +	    i686_mtrrtype(mrd->mr_flags) == -1)
  39.500 +	    return(EINVAL);
  39.501 +
  39.502 +#define FIXTOP	((MTRR_N64K * 0x10000) + (MTRR_N16K * 0x4000) + (MTRR_N4K * 0x1000))
  39.503 +
  39.504 +	/* are the "low memory" conditions applicable? */
  39.505 +	if ((sc->mr_cap & MR686_FIXMTRR) &&
  39.506 +	    ((mrd->mr_base + mrd->mr_len) <= FIXTOP)) {
  39.507 +	    if ((error = i686_mrsetlow(sc, mrd, arg)) != 0)
  39.508 +		return(error);
  39.509 +	} else {
  39.510 +	    /* it's time to play with variable MTRRs */
  39.511 +	    if ((error = i686_mrsetvariable(sc, mrd, arg)) != 0)
  39.512 +		return(error);
  39.513 +	}
  39.514 +	break;
  39.515 +
  39.516 +    case MEMRANGE_SET_REMOVE:
  39.517 +	if ((targ = mem_range_match(sc, mrd)) == NULL)
  39.518 +	    return(ENOENT);
  39.519 +	if (targ->mr_flags & MDF_FIXACTIVE)
  39.520 +	    return(EPERM);
  39.521 +	if (targ->mr_flags & MDF_BUSY)
  39.522 +	    return(EBUSY);
  39.523 +	targ->mr_flags &= ~MDF_ACTIVE;
  39.524 +	targ->mr_owner[0] = 0;
  39.525 +	break;
  39.526 +
  39.527 +    default:
  39.528 +	return(EOPNOTSUPP);
  39.529 +    }
  39.530 +
  39.531 +    /* update the hardware */
  39.532 +    i686_mrstore(sc);
  39.533 +    i686_mrfetch(sc);	/* refetch to see where we're at */
  39.534 +    return(0);
  39.535 +}
  39.536 +
  39.537 +/*
  39.538 + * Work out how many ranges we support, initialise storage for them, 
  39.539 + * fetch the initial settings.
  39.540 + */
  39.541 +static void
  39.542 +i686_mrinit(struct mem_range_softc *sc)
  39.543 +{
  39.544 +    struct mem_range_desc	*mrd;
  39.545 +    int				nmdesc = 0;
  39.546 +    int				i;
  39.547 +
  39.548 +    /* XXX */
  39.549 +    return;
  39.550 +
  39.551 +    mtrrcap = rdmsr(MSR_MTRRcap);
  39.552 +    mtrrdef = rdmsr(MSR_MTRRdefType);
  39.553 +
  39.554 +    /* For now, bail out if MTRRs are not enabled */
  39.555 +    if (!(mtrrdef & 0x800)) {
  39.556 +	if (bootverbose)
  39.557 +	    printf("CPU supports MTRRs but not enabled\n");
  39.558 +	return;
  39.559 +    }
  39.560 +    nmdesc = mtrrcap & 0xff;
  39.561 +    printf("Pentium Pro MTRR support enabled\n");
  39.562 +
  39.563 +    /* If fixed MTRRs supported and enabled */
  39.564 +    if ((mtrrcap & 0x100) && (mtrrdef & 0x400)) {
  39.565 +	sc->mr_cap = MR686_FIXMTRR;
  39.566 +	nmdesc += MTRR_N64K + MTRR_N16K + MTRR_N4K;
  39.567 +    }
  39.568 +
  39.569 +    sc->mr_desc = 
  39.570 +	(struct mem_range_desc *)malloc(nmdesc * sizeof(struct mem_range_desc), 
  39.571 +					M_MEMDESC, M_WAITOK | M_ZERO);
  39.572 +    sc->mr_ndesc = nmdesc;
  39.573 +
  39.574 +    mrd = sc->mr_desc;
  39.575 +
  39.576 +    /* Populate the fixed MTRR entries' base/length */
  39.577 +    if (sc->mr_cap & MR686_FIXMTRR) {
  39.578 +	for (i = 0; i < MTRR_N64K; i++, mrd++) {
  39.579 +	    mrd->mr_base = i * 0x10000;
  39.580 +	    mrd->mr_len = 0x10000;
  39.581 +	    mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
  39.582 +	}
  39.583 +	for (i = 0; i < MTRR_N16K; i++, mrd++) {
  39.584 +	    mrd->mr_base = i * 0x4000 + 0x80000;
  39.585 +	    mrd->mr_len = 0x4000;
  39.586 +	    mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
  39.587 +	}
  39.588 +	for (i = 0; i < MTRR_N4K; i++, mrd++) {
  39.589 +	    mrd->mr_base = i * 0x1000 + 0xc0000;
  39.590 +	    mrd->mr_len = 0x1000;
  39.591 +	    mrd->mr_flags = MDF_FIXBASE | MDF_FIXLEN | MDF_FIXACTIVE;
  39.592 +	}
  39.593 +    }
  39.594 +
  39.595 +    /* 
  39.596 +     * Get current settings, anything set now is considered to have 
  39.597 +     * been set by the firmware. (XXX has something already played here?)
  39.598 +     */
  39.599 +    i686_mrfetch(sc);
  39.600 +    mrd = sc->mr_desc;
  39.601 +    for (i = 0; i < sc->mr_ndesc; i++, mrd++) {
  39.602 +	if (mrd->mr_flags & MDF_ACTIVE)
  39.603 +	    mrd->mr_flags |= MDF_FIRMWARE;
  39.604 +    }
  39.605 +}
  39.606 +
  39.607 +/*
  39.608 + * Initialise MTRRs on an AP after the BSP has run the init code.
  39.609 + */
  39.610 +static void
  39.611 +i686_mrAPinit(struct mem_range_softc *sc)
  39.612 +{
  39.613 +    i686_mrstoreone((void *)sc);	/* set MTRRs to match BSP */
  39.614 +    wrmsr(MSR_MTRRdefType, mtrrdef);	/* set MTRR behaviour to match BSP */
  39.615 +}
  39.616 +
  39.617 +static void
  39.618 +i686_mem_drvinit(void *unused)
  39.619 +{
  39.620 +    /* Try for i686 MTRRs */
  39.621 +    if (!mtrrs_disabled && (cpu_feature & CPUID_MTRR) &&
  39.622 +	((cpu_id & 0xf00) == 0x600 || (cpu_id & 0xf00) == 0xf00) &&
  39.623 +	((strcmp(cpu_vendor, "GenuineIntel") == 0) ||
  39.624 +	(strcmp(cpu_vendor, "AuthenticAMD") == 0))) {
  39.625 +	mem_range_softc.mr_op = &i686_mrops;
  39.626 +    }
  39.627 +}
  39.628 +
  39.629 +SYSINIT(i686memdev,SI_SUB_DRIVERS,SI_ORDER_FIRST,i686_mem_drvinit,NULL)
    40.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    40.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/initcpu.c	Tue Apr 05 11:27:50 2005 +0000
    40.3 @@ -0,0 +1,889 @@
    40.4 +/*-
    40.5 + * Copyright (c) KATO Takenori, 1997, 1998.
    40.6 + * 
    40.7 + * All rights reserved.  Unpublished rights reserved under the copyright
    40.8 + * laws of Japan.
    40.9 + * 
   40.10 + * Redistribution and use in source and binary forms, with or without
   40.11 + * modification, are permitted provided that the following conditions
   40.12 + * are met:
   40.13 + * 
   40.14 + * 1. Redistributions of source code must retain the above copyright
   40.15 + *    notice, this list of conditions and the following disclaimer as
   40.16 + *    the first lines of this file unmodified.
   40.17 + * 2. Redistributions in binary form must reproduce the above copyright
   40.18 + *    notice, this list of conditions and the following disclaimer in the
   40.19 + *    documentation and/or other materials provided with the distribution.
   40.20 + * 
   40.21 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   40.22 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   40.23 + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   40.24 + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   40.25 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   40.26 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   40.27 + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   40.28 + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   40.29 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   40.30 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   40.31 + */
   40.32 +
   40.33 +#include <sys/cdefs.h>
   40.34 +__FBSDID("$FreeBSD: src/sys/i386/i386/initcpu.c,v 1.49 2003/11/10 15:48:30 jhb Exp $");
   40.35 +
   40.36 +#include "opt_cpu.h"
   40.37 +
   40.38 +#include <sys/param.h>
   40.39 +#include <sys/kernel.h>
   40.40 +#include <sys/systm.h>
   40.41 +#include <sys/sysctl.h>
   40.42 +
   40.43 +#include <machine/cputypes.h>
   40.44 +#include <machine/md_var.h>
   40.45 +#include <machine/specialreg.h>
   40.46 +
   40.47 +#if !defined(CPU_ENABLE_SSE) && defined(I686_CPU)
   40.48 +#define CPU_ENABLE_SSE
   40.49 +#endif
   40.50 +#if defined(CPU_DISABLE_SSE)
   40.51 +#undef CPU_ENABLE_SSE
   40.52 +#endif
   40.53 +
   40.54 +void initializecpu(void);
   40.55 +#if defined(I586_CPU) && defined(CPU_WT_ALLOC)
   40.56 +void	enable_K5_wt_alloc(void);
   40.57 +void	enable_K6_wt_alloc(void);
   40.58 +void	enable_K6_2_wt_alloc(void);
   40.59 +#endif
   40.60 +
   40.61 +#ifdef I486_CPU
   40.62 +static void init_5x86(void);
   40.63 +static void init_bluelightning(void);
   40.64 +static void init_486dlc(void);
   40.65 +static void init_cy486dx(void);
   40.66 +#ifdef CPU_I486_ON_386
   40.67 +static void init_i486_on_386(void);
   40.68 +#endif
   40.69 +static void init_6x86(void);
   40.70 +#endif /* I486_CPU */
   40.71 +
   40.72 +#ifdef I686_CPU
   40.73 +static void	init_6x86MX(void);
   40.74 +static void	init_ppro(void);
   40.75 +static void	init_mendocino(void);
   40.76 +#endif
   40.77 +
   40.78 +static int	hw_instruction_sse;
   40.79 +SYSCTL_INT(_hw, OID_AUTO, instruction_sse, CTLFLAG_RD,
   40.80 +    &hw_instruction_sse, 0, "SIMD/MMX2 instructions available in CPU");
   40.81 +
   40.82 +/* Must *NOT* be BSS or locore will bzero these after setting them */
   40.83 +int	cpu = 0;		/* Are we 386, 386sx, 486, etc? */
   40.84 +u_int	cpu_feature = 0;	/* Feature flags */
   40.85 +u_int	cpu_high = 0;		/* Highest arg to CPUID */
   40.86 +u_int	cpu_id = 0;		/* Stepping ID */
   40.87 +u_int	cpu_procinfo = 0;	/* HyperThreading Info / Brand Index / CLFUSH */
   40.88 +char	cpu_vendor[20] = "";	/* CPU Origin code */
   40.89 +
   40.90 +#ifdef CPU_ENABLE_SSE
   40.91 +u_int	cpu_fxsr;		/* SSE enabled */
   40.92 +#endif
   40.93 +
   40.94 +#ifdef I486_CPU
   40.95 +/*
   40.96 + * IBM Blue Lightning
   40.97 + */
   40.98 +static void
   40.99 +init_bluelightning(void)
  40.100 +{
  40.101 +#if 0
  40.102 +	u_long	eflags;
  40.103 +
  40.104 +#if defined(PC98) && !defined(CPU_UPGRADE_HW_CACHE)
  40.105 +	need_post_dma_flush = 1;
  40.106 +#endif
  40.107 +
  40.108 +	eflags = read_eflags();
  40.109 +	disable_intr();
  40.110 +
  40.111 +	load_cr0(rcr0() | CR0_CD | CR0_NW);
  40.112 +	invd();
  40.113 +
  40.114 +#ifdef CPU_BLUELIGHTNING_FPU_OP_CACHE
  40.115 +	wrmsr(0x1000, 0x9c92LL);	/* FP operand can be cacheable on Cyrix FPU */
  40.116 +#else
  40.117 +	wrmsr(0x1000, 0x1c92LL);	/* Intel FPU */
  40.118 +#endif
  40.119 +	/* Enables 13MB and 0-640KB cache. */
  40.120 +	wrmsr(0x1001, (0xd0LL << 32) | 0x3ff);
  40.121 +#ifdef CPU_BLUELIGHTNING_3X
  40.122 +	wrmsr(0x1002, 0x04000000LL);	/* Enables triple-clock mode. */
  40.123 +#else
  40.124 +	wrmsr(0x1002, 0x03000000LL);	/* Enables double-clock mode. */
  40.125 +#endif
  40.126 +
  40.127 +	/* Enable caching in CR0. */
  40.128 +	load_cr0(rcr0() & ~(CR0_CD | CR0_NW));	/* CD = 0 and NW = 0 */
  40.129 +	invd();
  40.130 +	write_eflags(eflags);
  40.131 +#endif
  40.132 +}
  40.133 +
  40.134 +/*
  40.135 + * Cyrix 486SLC/DLC/SR/DR series
  40.136 + */
  40.137 +static void
  40.138 +init_486dlc(void)
  40.139 +{
  40.140 +	u_long	eflags;
  40.141 +	u_char	ccr0;
  40.142 +
  40.143 +	eflags = read_eflags();
  40.144 +	disable_intr();
  40.145 +	invd();
  40.146 +
  40.147 +	ccr0 = read_cyrix_reg(CCR0);
  40.148 +#ifndef CYRIX_CACHE_WORKS
  40.149 +	ccr0 |= CCR0_NC1 | CCR0_BARB;
  40.150 +	write_cyrix_reg(CCR0, ccr0);
  40.151 +	invd();
  40.152 +#else
  40.153 +	ccr0 &= ~CCR0_NC0;
  40.154 +#ifndef CYRIX_CACHE_REALLY_WORKS
  40.155 +	ccr0 |= CCR0_NC1 | CCR0_BARB;
  40.156 +#else
  40.157 +	ccr0 |= CCR0_NC1;
  40.158 +#endif
  40.159 +#ifdef CPU_DIRECT_MAPPED_CACHE
  40.160 +	ccr0 |= CCR0_CO;			/* Direct mapped mode. */
  40.161 +#endif
  40.162 +	write_cyrix_reg(CCR0, ccr0);
  40.163 +
  40.164 +	/* Clear non-cacheable region. */
  40.165 +	write_cyrix_reg(NCR1+2, NCR_SIZE_0K);
  40.166 +	write_cyrix_reg(NCR2+2, NCR_SIZE_0K);
  40.167 +	write_cyrix_reg(NCR3+2, NCR_SIZE_0K);
  40.168 +	write_cyrix_reg(NCR4+2, NCR_SIZE_0K);
  40.169 +
  40.170 +	write_cyrix_reg(0, 0);	/* dummy write */
  40.171 +
  40.172 +	/* Enable caching in CR0. */
  40.173 +	load_cr0(rcr0() & ~(CR0_CD | CR0_NW));	/* CD = 0 and NW = 0 */
  40.174 +	invd();
  40.175 +#endif /* !CYRIX_CACHE_WORKS */
  40.176 +	write_eflags(eflags);
  40.177 +}
  40.178 +
  40.179 +
  40.180 +/*
  40.181 + * Cyrix 486S/DX series
  40.182 + */
  40.183 +static void
  40.184 +init_cy486dx(void)
  40.185 +{
  40.186 +	u_long	eflags;
  40.187 +	u_char	ccr2;
  40.188 +
  40.189 +	eflags = read_eflags();
  40.190 +	disable_intr();
  40.191 +	invd();
  40.192 +
  40.193 +	ccr2 = read_cyrix_reg(CCR2);
  40.194 +#ifdef CPU_SUSP_HLT
  40.195 +	ccr2 |= CCR2_SUSP_HLT;
  40.196 +#endif
  40.197 +
  40.198 +#ifdef PC98
  40.199 +	/* Enables WB cache interface pin and Lock NW bit in CR0. */
  40.200 +	ccr2 |= CCR2_WB | CCR2_LOCK_NW;
  40.201 +	/* Unlock NW bit in CR0. */
  40.202 +	write_cyrix_reg(CCR2, ccr2 & ~CCR2_LOCK_NW);
  40.203 +	load_cr0((rcr0() & ~CR0_CD) | CR0_NW);	/* CD = 0, NW = 1 */
  40.204 +#endif
  40.205 +
  40.206 +	write_cyrix_reg(CCR2, ccr2);
  40.207 +	write_eflags(eflags);
  40.208 +}
  40.209 +
  40.210 +
  40.211 +/*
  40.212 + * Cyrix 5x86
  40.213 + */
  40.214 +static void
  40.215 +init_5x86(void)
  40.216 +{
  40.217 +	u_long	eflags;
  40.218 +	u_char	ccr2, ccr3, ccr4, pcr0;
  40.219 +
  40.220 +	eflags = read_eflags();
  40.221 +	disable_intr();
  40.222 +
  40.223 +	load_cr0(rcr0() | CR0_CD | CR0_NW);
  40.224 +	wbinvd();
  40.225 +
  40.226 +	(void)read_cyrix_reg(CCR3);		/* dummy */
  40.227 +
  40.228 +	/* Initialize CCR2. */
  40.229 +	ccr2 = read_cyrix_reg(CCR2);
  40.230 +	ccr2 |= CCR2_WB;
  40.231 +#ifdef CPU_SUSP_HLT
  40.232 +	ccr2 |= CCR2_SUSP_HLT;
  40.233 +#else
  40.234 +	ccr2 &= ~CCR2_SUSP_HLT;
  40.235 +#endif
  40.236 +	ccr2 |= CCR2_WT1;
  40.237 +	write_cyrix_reg(CCR2, ccr2);
  40.238 +
  40.239 +	/* Initialize CCR4. */
  40.240 +	ccr3 = read_cyrix_reg(CCR3);
  40.241 +	write_cyrix_reg(CCR3, CCR3_MAPEN0);
  40.242 +
  40.243 +	ccr4 = read_cyrix_reg(CCR4);
  40.244 +	ccr4 |= CCR4_DTE;
  40.245 +	ccr4 |= CCR4_MEM;
  40.246 +#ifdef CPU_FASTER_5X86_FPU
  40.247 +	ccr4 |= CCR4_FASTFPE;
  40.248 +#else
  40.249 +	ccr4 &= ~CCR4_FASTFPE;
  40.250 +#endif
  40.251 +	ccr4 &= ~CCR4_IOMASK;
  40.252 +	/********************************************************************
  40.253 +	 * WARNING: The "BIOS Writers Guide" mentions that I/O recovery time
  40.254 +	 * should be 0 for errata fix.
  40.255 +	 ********************************************************************/
  40.256 +#ifdef CPU_IORT
  40.257 +	ccr4 |= CPU_IORT & CCR4_IOMASK;
  40.258 +#endif
  40.259 +	write_cyrix_reg(CCR4, ccr4);
  40.260 +
  40.261 +	/* Initialize PCR0. */
  40.262 +	/****************************************************************
  40.263 +	 * WARNING: RSTK_EN and LOOP_EN could make your system unstable.
  40.264 +	 * BTB_EN might make your system unstable.
  40.265 +	 ****************************************************************/
  40.266 +	pcr0 = read_cyrix_reg(PCR0);
  40.267 +#ifdef CPU_RSTK_EN
  40.268 +	pcr0 |= PCR0_RSTK;
  40.269 +#else
  40.270 +	pcr0 &= ~PCR0_RSTK;
  40.271 +#endif
  40.272 +#ifdef CPU_BTB_EN
  40.273 +	pcr0 |= PCR0_BTB;
  40.274 +#else
  40.275 +	pcr0 &= ~PCR0_BTB;
  40.276 +#endif
  40.277 +#ifdef CPU_LOOP_EN
  40.278 +	pcr0 |= PCR0_LOOP;
  40.279 +#else
  40.280 +	pcr0 &= ~PCR0_LOOP;
  40.281 +#endif
  40.282 +
  40.283 +	/****************************************************************
  40.284 +	 * WARNING: if you use a memory mapped I/O device, don't use
  40.285 +	 * DISABLE_5X86_LSSER option, which may reorder memory mapped
  40.286 +	 * I/O access.
  40.287 +	 * IF YOUR MOTHERBOARD HAS PCI BUS, DON'T DISABLE LSSER.
  40.288 +	 ****************************************************************/
  40.289 +#ifdef CPU_DISABLE_5X86_LSSER
  40.290 +	pcr0 &= ~PCR0_LSSER;
  40.291 +#else
  40.292 +	pcr0 |= PCR0_LSSER;
  40.293 +#endif
  40.294 +	write_cyrix_reg(PCR0, pcr0);
  40.295 +
  40.296 +	/* Restore CCR3. */
  40.297 +	write_cyrix_reg(CCR3, ccr3);
  40.298 +
  40.299 +	(void)read_cyrix_reg(0x80);		/* dummy */
  40.300 +
  40.301 +	/* Unlock NW bit in CR0. */
  40.302 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) & ~CCR2_LOCK_NW);
  40.303 +	load_cr0((rcr0() & ~CR0_CD) | CR0_NW);	/* CD = 0, NW = 1 */
  40.304 +	/* Lock NW bit in CR0. */
  40.305 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) | CCR2_LOCK_NW);
  40.306 +
  40.307 +	write_eflags(eflags);
  40.308 +}
  40.309 +
  40.310 +#ifdef CPU_I486_ON_386
  40.311 +/*
  40.312 + * There are i486 based upgrade products for i386 machines.
  40.313 + * In this case, BIOS doesn't enables CPU cache.
  40.314 + */
  40.315 +static void
  40.316 +init_i486_on_386(void)
  40.317 +{
  40.318 +	u_long	eflags;
  40.319 +
  40.320 +#if defined(PC98) && !defined(CPU_UPGRADE_HW_CACHE)
  40.321 +	need_post_dma_flush = 1;
  40.322 +#endif
  40.323 +
  40.324 +	eflags = read_eflags();
  40.325 +	disable_intr();
  40.326 +
  40.327 +	load_cr0(rcr0() & ~(CR0_CD | CR0_NW));	/* CD = 0, NW = 0 */
  40.328 +
  40.329 +	write_eflags(eflags);
  40.330 +}
  40.331 +#endif
  40.332 +
  40.333 +/*
  40.334 + * Cyrix 6x86
  40.335 + *
  40.336 + * XXX - What should I do here?  Please let me know.
  40.337 + */
  40.338 +static void
  40.339 +init_6x86(void)
  40.340 +{
  40.341 +	u_long	eflags;
  40.342 +	u_char	ccr3, ccr4;
  40.343 +
  40.344 +	eflags = read_eflags();
  40.345 +	disable_intr();
  40.346 +
  40.347 +	load_cr0(rcr0() | CR0_CD | CR0_NW);
  40.348 +	wbinvd();
  40.349 +
  40.350 +	/* Initialize CCR0. */
  40.351 +	write_cyrix_reg(CCR0, read_cyrix_reg(CCR0) | CCR0_NC1);
  40.352 +
  40.353 +	/* Initialize CCR1. */
  40.354 +#ifdef CPU_CYRIX_NO_LOCK
  40.355 +	write_cyrix_reg(CCR1, read_cyrix_reg(CCR1) | CCR1_NO_LOCK);
  40.356 +#else
  40.357 +	write_cyrix_reg(CCR1, read_cyrix_reg(CCR1) & ~CCR1_NO_LOCK);
  40.358 +#endif
  40.359 +
  40.360 +	/* Initialize CCR2. */
  40.361 +#ifdef CPU_SUSP_HLT
  40.362 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) | CCR2_SUSP_HLT);
  40.363 +#else
  40.364 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) & ~CCR2_SUSP_HLT);
  40.365 +#endif
  40.366 +
  40.367 +	ccr3 = read_cyrix_reg(CCR3);
  40.368 +	write_cyrix_reg(CCR3, CCR3_MAPEN0);
  40.369 +
  40.370 +	/* Initialize CCR4. */
  40.371 +	ccr4 = read_cyrix_reg(CCR4);
  40.372 +	ccr4 |= CCR4_DTE;
  40.373 +	ccr4 &= ~CCR4_IOMASK;
  40.374 +#ifdef CPU_IORT
  40.375 +	write_cyrix_reg(CCR4, ccr4 | (CPU_IORT & CCR4_IOMASK));
  40.376 +#else
  40.377 +	write_cyrix_reg(CCR4, ccr4 | 7);
  40.378 +#endif
  40.379 +
  40.380 +	/* Initialize CCR5. */
  40.381 +#ifdef CPU_WT_ALLOC
  40.382 +	write_cyrix_reg(CCR5, read_cyrix_reg(CCR5) | CCR5_WT_ALLOC);
  40.383 +#endif
  40.384 +
  40.385 +	/* Restore CCR3. */
  40.386 +	write_cyrix_reg(CCR3, ccr3);
  40.387 +
  40.388 +	/* Unlock NW bit in CR0. */
  40.389 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) & ~CCR2_LOCK_NW);
  40.390 +
  40.391 +	/*
  40.392 +	 * Earlier revision of the 6x86 CPU could crash the system if
  40.393 +	 * L1 cache is in write-back mode.
  40.394 +	 */
  40.395 +	if ((cyrix_did & 0xff00) > 0x1600)
  40.396 +		load_cr0(rcr0() & ~(CR0_CD | CR0_NW));	/* CD = 0 and NW = 0 */
  40.397 +	else {
  40.398 +		/* Revision 2.6 and lower. */
  40.399 +#ifdef CYRIX_CACHE_REALLY_WORKS
  40.400 +		load_cr0(rcr0() & ~(CR0_CD | CR0_NW));	/* CD = 0 and NW = 0 */
  40.401 +#else
  40.402 +		load_cr0((rcr0() & ~CR0_CD) | CR0_NW);	/* CD = 0 and NW = 1 */
  40.403 +#endif
  40.404 +	}
  40.405 +
  40.406 +	/* Lock NW bit in CR0. */
  40.407 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) | CCR2_LOCK_NW);
  40.408 +
  40.409 +	write_eflags(eflags);
  40.410 +}
  40.411 +#endif /* I486_CPU */
  40.412 +
  40.413 +#ifdef I686_CPU
  40.414 +/*
  40.415 + * Cyrix 6x86MX (code-named M2)
  40.416 + *
  40.417 + * XXX - What should I do here?  Please let me know.
  40.418 + */
  40.419 +static void
  40.420 +init_6x86MX(void)
  40.421 +{
  40.422 +#if 0
  40.423 +	u_long	eflags;
  40.424 +	u_char	ccr3, ccr4;
  40.425 +
  40.426 +	eflags = read_eflags();
  40.427 +	disable_intr();
  40.428 +
  40.429 +	load_cr0(rcr0() | CR0_CD | CR0_NW);
  40.430 +	wbinvd();
  40.431 +
  40.432 +	/* Initialize CCR0. */
  40.433 +	write_cyrix_reg(CCR0, read_cyrix_reg(CCR0) | CCR0_NC1);
  40.434 +
  40.435 +	/* Initialize CCR1. */
  40.436 +#ifdef CPU_CYRIX_NO_LOCK
  40.437 +	write_cyrix_reg(CCR1, read_cyrix_reg(CCR1) | CCR1_NO_LOCK);
  40.438 +#else
  40.439 +	write_cyrix_reg(CCR1, read_cyrix_reg(CCR1) & ~CCR1_NO_LOCK);
  40.440 +#endif
  40.441 +
  40.442 +	/* Initialize CCR2. */
  40.443 +#ifdef CPU_SUSP_HLT
  40.444 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) | CCR2_SUSP_HLT);
  40.445 +#else
  40.446 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) & ~CCR2_SUSP_HLT);
  40.447 +#endif
  40.448 +
  40.449 +	ccr3 = read_cyrix_reg(CCR3);
  40.450 +	write_cyrix_reg(CCR3, CCR3_MAPEN0);
  40.451 +
  40.452 +	/* Initialize CCR4. */
  40.453 +	ccr4 = read_cyrix_reg(CCR4);
  40.454 +	ccr4 &= ~CCR4_IOMASK;
  40.455 +#ifdef CPU_IORT
  40.456 +	write_cyrix_reg(CCR4, ccr4 | (CPU_IORT & CCR4_IOMASK));
  40.457 +#else
  40.458 +	write_cyrix_reg(CCR4, ccr4 | 7);
  40.459 +#endif
  40.460 +
  40.461 +	/* Initialize CCR5. */
  40.462 +#ifdef CPU_WT_ALLOC
  40.463 +	write_cyrix_reg(CCR5, read_cyrix_reg(CCR5) | CCR5_WT_ALLOC);
  40.464 +#endif
  40.465 +
  40.466 +	/* Restore CCR3. */
  40.467 +	write_cyrix_reg(CCR3, ccr3);
  40.468 +
  40.469 +	/* Unlock NW bit in CR0. */
  40.470 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) & ~CCR2_LOCK_NW);
  40.471 +
  40.472 +	load_cr0(rcr0() & ~(CR0_CD | CR0_NW));	/* CD = 0 and NW = 0 */
  40.473 +
  40.474 +	/* Lock NW bit in CR0. */
  40.475 +	write_cyrix_reg(CCR2, read_cyrix_reg(CCR2) | CCR2_LOCK_NW);
  40.476 +
  40.477 +	write_eflags(eflags);
  40.478 +#endif
  40.479 +}
  40.480 +
  40.481 +static void
  40.482 +init_ppro(void)
  40.483 +{
  40.484 +	u_int64_t	apicbase;
  40.485 +
  40.486 +	/*
  40.487 +	 * Local APIC should be disabled if it is not going to be used.
  40.488 +	 */
  40.489 +	apicbase = rdmsr(MSR_APICBASE);
  40.490 +	apicbase &= ~APICBASE_ENABLED;
  40.491 +	wrmsr(MSR_APICBASE, apicbase);
  40.492 +}
  40.493 +
  40.494 +/*
  40.495 + * Initialize BBL_CR_CTL3 (Control register 3: used to configure the
  40.496 + * L2 cache).
  40.497 + */
  40.498 +static void
  40.499 +init_mendocino(void)
  40.500 +{
  40.501 +#ifdef CPU_PPRO2CELERON
  40.502 +	u_long	eflags;
  40.503 +	u_int64_t	bbl_cr_ctl3;
  40.504 +
  40.505 +	eflags = read_eflags();
  40.506 +	disable_intr();
  40.507 +
  40.508 +	load_cr0(rcr0() | CR0_CD | CR0_NW);
  40.509 +	wbinvd();
  40.510 +
  40.511 +	bbl_cr_ctl3 = rdmsr(MSR_BBL_CR_CTL3);
  40.512 +
  40.513 +	/* If the L2 cache is configured, do nothing. */
  40.514 +	if (!(bbl_cr_ctl3 & 1)) {
  40.515 +		bbl_cr_ctl3 = 0x134052bLL;
  40.516 +
  40.517 +		/* Set L2 Cache Latency (Default: 5). */
  40.518 +#ifdef	CPU_CELERON_L2_LATENCY
  40.519 +#if CPU_L2_LATENCY > 15
  40.520 +#error invalid CPU_L2_LATENCY.
  40.521 +#endif
  40.522 +		bbl_cr_ctl3 |= CPU_L2_LATENCY << 1;
  40.523 +#else
  40.524 +		bbl_cr_ctl3 |= 5 << 1;
  40.525 +#endif
  40.526 +		wrmsr(MSR_BBL_CR_CTL3, bbl_cr_ctl3);
  40.527 +	}
  40.528 +
  40.529 +	load_cr0(rcr0() & ~(CR0_CD | CR0_NW));
  40.530 +	write_eflags(eflags);
  40.531 +#endif /* CPU_PPRO2CELERON */
  40.532 +}
  40.533 +
  40.534 +#endif /* I686_CPU */
  40.535 +
  40.536 +/*
  40.537 + * Initialize CR4 (Control register 4) to enable SSE instructions.
  40.538 + */
  40.539 +void
  40.540 +enable_sse(void)
  40.541 +{
  40.542 +#ifdef XEN 
  40.543 +    return;
  40.544 +#endif
  40.545 +#if defined(CPU_ENABLE_SSE)
  40.546 +	if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) {
  40.547 +		load_cr4(rcr4() | CR4_FXSR | CR4_XMM);
  40.548 +		cpu_fxsr = hw_instruction_sse = 1;
  40.549 +	}
  40.550 +#endif
  40.551 +}
  40.552 +
  40.553 +void
  40.554 +initializecpu(void)
  40.555 +{
  40.556 +
  40.557 +	switch (cpu) {
  40.558 +#ifdef I486_CPU
  40.559 +	case CPU_BLUE:
  40.560 +		init_bluelightning();
  40.561 +		break;
  40.562 +	case CPU_486DLC:
  40.563 +		init_486dlc();
  40.564 +		break;
  40.565 +	case CPU_CY486DX:
  40.566 +		init_cy486dx();
  40.567 +		break;
  40.568 +	case CPU_M1SC:
  40.569 +		init_5x86();
  40.570 +		break;
  40.571 +#ifdef CPU_I486_ON_386
  40.572 +	case CPU_486:
  40.573 +		init_i486_on_386();
  40.574 +		break;
  40.575 +#endif
  40.576 +	case CPU_M1:
  40.577 +		init_6x86();
  40.578 +		break;
  40.579 +#endif /* I486_CPU */
  40.580 +#ifdef I686_CPU
  40.581 +	case CPU_M2:
  40.582 +		init_6x86MX();
  40.583 +		break;
  40.584 +	case CPU_686:
  40.585 +		if (strcmp(cpu_vendor, "GenuineIntel") == 0) {
  40.586 +			switch (cpu_id & 0xff0) {
  40.587 +			case 0x610:
  40.588 +				init_ppro();
  40.589 +				break;
  40.590 +			case 0x660:
  40.591 +				init_mendocino();
  40.592 +				break;
  40.593 +			}
  40.594 +		} else if (strcmp(cpu_vendor, "AuthenticAMD") == 0) {
  40.595 +#if defined(I686_CPU) && defined(CPU_ATHLON_SSE_HACK)
  40.596 +			/*
  40.597 +			 * Sometimes the BIOS doesn't enable SSE instructions.
  40.598 +			 * According to AMD document 20734, the mobile
  40.599 +			 * Duron, the (mobile) Athlon 4 and the Athlon MP
  40.600 +			 * support SSE. These correspond to cpu_id 0x66X
  40.601 +			 * or 0x67X.
  40.602 +			 */
  40.603 +			if ((cpu_feature & CPUID_XMM) == 0 &&
  40.604 +			    ((cpu_id & ~0xf) == 0x660 ||
  40.605 +			     (cpu_id & ~0xf) == 0x670 ||
  40.606 +			     (cpu_id & ~0xf) == 0x680)) {
  40.607 +				u_int regs[4];
  40.608 +				wrmsr(0xC0010015, rdmsr(0xC0010015) & ~0x08000);
  40.609 +				do_cpuid(1, regs);
  40.610 +				cpu_feature = regs[3];
  40.611 +			}
  40.612 +#endif
  40.613 +		}
  40.614 +		break;
  40.615 +#endif
  40.616 +	default:
  40.617 +		break;
  40.618 +	}
  40.619 +	enable_sse();
  40.620 +
  40.621 +#if defined(PC98) && !defined(CPU_UPGRADE_HW_CACHE)
  40.622 +	/*
  40.623 +	 * OS should flush L1 cache by itself because no PC-98 supports
  40.624 +	 * non-Intel CPUs.  Use wbinvd instruction before DMA transfer
  40.625 +	 * when need_pre_dma_flush = 1, use invd instruction after DMA
  40.626 +	 * transfer when need_post_dma_flush = 1.  If your CPU upgrade
  40.627 +	 * product supports hardware cache control, you can add the
  40.628 +	 * CPU_UPGRADE_HW_CACHE option in your kernel configuration file.
  40.629 +	 * This option eliminates unneeded cache flush instruction(s).
  40.630 +	 */
  40.631 +	if (strcmp(cpu_vendor, "CyrixInstead") == 0) {
  40.632 +		switch (cpu) {
  40.633 +#ifdef I486_CPU
  40.634 +		case CPU_486DLC:
  40.635 +			need_post_dma_flush = 1;
  40.636 +			break;
  40.637 +		case CPU_M1SC:
  40.638 +			need_pre_dma_flush = 1;
  40.639 +			break;
  40.640 +		case CPU_CY486DX:
  40.641 +			need_pre_dma_flush = 1;
  40.642 +#ifdef CPU_I486_ON_386
  40.643 +			need_post_dma_flush = 1;
  40.644 +#endif
  40.645 +			break;
  40.646 +#endif
  40.647 +		default:
  40.648 +			break;
  40.649 +		}
  40.650 +	} else if (strcmp(cpu_vendor, "AuthenticAMD") == 0) {
  40.651 +		switch (cpu_id & 0xFF0) {
  40.652 +		case 0x470:		/* Enhanced Am486DX2 WB */
  40.653 +		case 0x490:		/* Enhanced Am486DX4 WB */
  40.654 +		case 0x4F0:		/* Am5x86 WB */
  40.655 +			need_pre_dma_flush = 1;
  40.656 +			break;
  40.657 +		}
  40.658 +	} else if (strcmp(cpu_vendor, "IBM") == 0) {
  40.659 +		need_post_dma_flush = 1;
  40.660 +	} else {
  40.661 +#ifdef CPU_I486_ON_386
  40.662 +		need_pre_dma_flush = 1;
  40.663 +#endif
  40.664 +	}
  40.665 +#endif /* PC98 && !CPU_UPGRADE_HW_CACHE */
  40.666 +}
  40.667 +
  40.668 +#if defined(I586_CPU) && defined(CPU_WT_ALLOC)
  40.669 +/*
  40.670 + * Enable write allocate feature of AMD processors.
  40.671 + * Following two functions require the Maxmem variable being set.
  40.672 + */
  40.673 +void
  40.674 +enable_K5_wt_alloc(void)
  40.675 +{
  40.676 +	u_int64_t	msr;
  40.677 +	register_t	savecrit;
  40.678 +
  40.679 +	/*
  40.680 +	 * Write allocate is supported only on models 1, 2, and 3, with
  40.681 +	 * a stepping of 4 or greater.
  40.682 +	 */
  40.683 +	if (((cpu_id & 0xf0) > 0) && ((cpu_id & 0x0f) > 3)) {
  40.684 +		savecrit = intr_disable();
  40.685 +		msr = rdmsr(0x83);		/* HWCR */
  40.686 +		wrmsr(0x83, msr & !(0x10));
  40.687 +
  40.688 +		/*
  40.689 +		 * We have to tell the chip where the top of memory is,
  40.690 +		 * since video cards could have frame bufferes there,
  40.691 +		 * memory-mapped I/O could be there, etc.
  40.692 +		 */
  40.693 +		if(Maxmem > 0)
  40.694 +		  msr = Maxmem / 16;
  40.695 +		else
  40.696 +		  msr = 0;
  40.697 +		msr |= AMD_WT_ALLOC_TME | AMD_WT_ALLOC_FRE;
  40.698 +#ifdef PC98
  40.699 +		if (!(inb(0x43b) & 4)) {
  40.700 +			wrmsr(0x86, 0x0ff00f0);
  40.701 +			msr |= AMD_WT_ALLOC_PRE;
  40.702 +		}
  40.703 +#else
  40.704 +		/*
  40.705 +		 * There is no way to know wheter 15-16M hole exists or not. 
  40.706 +		 * Therefore, we disable write allocate for this range.
  40.707 +		 */
  40.708 +			wrmsr(0x86, 0x0ff00f0);
  40.709 +			msr |= AMD_WT_ALLOC_PRE;
  40.710 +#endif
  40.711 +		wrmsr(0x85, msr);
  40.712 +
  40.713 +		msr=rdmsr(0x83);
  40.714 +		wrmsr(0x83, msr|0x10); /* enable write allocate */
  40.715 +		intr_restore(savecrit);
  40.716 +	}
  40.717 +}
  40.718 +
  40.719 +void
  40.720 +enable_K6_wt_alloc(void)
  40.721 +{
  40.722 +	quad_t	size;
  40.723 +	u_int64_t	whcr;
  40.724 +	u_long	eflags;
  40.725 +
  40.726 +	eflags = read_eflags();
  40.727 +	disable_intr();
  40.728 +	wbinvd();
  40.729 +
  40.730 +#ifdef CPU_DISABLE_CACHE
  40.731 +	/*
  40.732 +	 * Certain K6-2 box becomes unstable when write allocation is
  40.733 +	 * enabled.
  40.734 +	 */
  40.735 +	/*
  40.736 +	 * The AMD-K6 processer provides the 64-bit Test Register 12(TR12),
  40.737 +	 * but only the Cache Inhibit(CI) (bit 3 of TR12) is suppported.
  40.738 +	 * All other bits in TR12 have no effect on the processer's operation.
  40.739 +	 * The I/O Trap Restart function (bit 9 of TR12) is always enabled
  40.740 +	 * on the AMD-K6.
  40.741 +	 */
  40.742 +	wrmsr(0x0000000e, (u_int64_t)0x0008);
  40.743 +#endif
  40.744 +	/* Don't assume that memory size is aligned with 4M. */
  40.745 +	if (Maxmem > 0)
  40.746 +	  size = ((Maxmem >> 8) + 3) >> 2;
  40.747 +	else
  40.748 +	  size = 0;
  40.749 +
  40.750 +	/* Limit is 508M bytes. */
  40.751 +	if (size > 0x7f)
  40.752 +		size = 0x7f;
  40.753 +	whcr = (rdmsr(0xc0000082) & ~(0x7fLL << 1)) | (size << 1);
  40.754 +
  40.755 +#if defined(PC98) || defined(NO_MEMORY_HOLE)
  40.756 +	if (whcr & (0x7fLL << 1)) {
  40.757 +#ifdef PC98
  40.758 +		/*
  40.759 +		 * If bit 2 of port 0x43b is 0, disable wrte allocate for the
  40.760 +		 * 15-16M range.
  40.761 +		 */
  40.762 +		if (!(inb(0x43b) & 4))
  40.763 +			whcr &= ~0x0001LL;
  40.764 +		else
  40.765 +#endif
  40.766 +			whcr |=  0x0001LL;
  40.767 +	}
  40.768 +#else
  40.769 +	/*
  40.770 +	 * There is no way to know wheter 15-16M hole exists or not. 
  40.771 +	 * Therefore, we disable write allocate for this range.
  40.772 +	 */
  40.773 +	whcr &= ~0x0001LL;
  40.774 +#endif
  40.775 +	wrmsr(0x0c0000082, whcr);
  40.776 +
  40.777 +	write_eflags(eflags);
  40.778 +}
  40.779 +
  40.780 +void
  40.781 +enable_K6_2_wt_alloc(void)
  40.782 +{
  40.783 +	quad_t	size;
  40.784 +	u_int64_t	whcr;
  40.785 +	u_long	eflags;
  40.786 +
  40.787 +	eflags = read_eflags();
  40.788 +	disable_intr();
  40.789 +	wbinvd();
  40.790 +
  40.791 +#ifdef CPU_DISABLE_CACHE
  40.792 +	/*
  40.793 +	 * Certain K6-2 box becomes unstable when write allocation is
  40.794 +	 * enabled.
  40.795 +	 */
  40.796 +	/*
  40.797 +	 * The AMD-K6 processer provides the 64-bit Test Register 12(TR12),
  40.798 +	 * but only the Cache Inhibit(CI) (bit 3 of TR12) is suppported.
  40.799 +	 * All other bits in TR12 have no effect on the processer's operation.
  40.800 +	 * The I/O Trap Restart function (bit 9 of TR12) is always enabled
  40.801 +	 * on the AMD-K6.
  40.802 +	 */
  40.803 +	wrmsr(0x0000000e, (u_int64_t)0x0008);
  40.804 +#endif
  40.805 +	/* Don't assume that memory size is aligned with 4M. */
  40.806 +	if (Maxmem > 0)
  40.807 +	  size = ((Maxmem >> 8) + 3) >> 2;
  40.808 +	else
  40.809 +	  size = 0;
  40.810 +
  40.811 +	/* Limit is 4092M bytes. */
  40.812 +	if (size > 0x3fff)
  40.813 +		size = 0x3ff;
  40.814 +	whcr = (rdmsr(0xc0000082) & ~(0x3ffLL << 22)) | (size << 22);
  40.815 +
  40.816 +#if defined(PC98) || defined(NO_MEMORY_HOLE)
  40.817 +	if (whcr & (0x3ffLL << 22)) {
  40.818 +#ifdef PC98
  40.819 +		/*
  40.820 +		 * If bit 2 of port 0x43b is 0, disable wrte allocate for the
  40.821 +		 * 15-16M range.
  40.822 +		 */
  40.823 +		if (!(inb(0x43b) & 4))
  40.824 +			whcr &= ~(1LL << 16);
  40.825 +		else
  40.826 +#endif
  40.827 +			whcr |=  1LL << 16;
  40.828 +	}
  40.829 +#else
  40.830 +	/*
  40.831 +	 * There is no way to know wheter 15-16M hole exists or not. 
  40.832 +	 * Therefore, we disable write allocate for this range.
  40.833 +	 */
  40.834 +	whcr &= ~(1LL << 16);
  40.835 +#endif
  40.836 +	wrmsr(0x0c0000082, whcr);
  40.837 +
  40.838 +	write_eflags(eflags);
  40.839 +}
  40.840 +#endif /* I585_CPU && CPU_WT_ALLOC */
  40.841 +
  40.842 +#include "opt_ddb.h"
  40.843 +#ifdef DDB
  40.844 +#include <ddb/ddb.h>
  40.845 +#if 0
  40.846 +DB_SHOW_COMMAND(cyrixreg, cyrixreg)
  40.847 +{
  40.848 +	u_long	eflags;
  40.849 +	u_int	cr0;
  40.850 +	u_char	ccr1, ccr2, ccr3;
  40.851 +	u_char	ccr0 = 0, ccr4 = 0, ccr5 = 0, pcr0 = 0;
  40.852 +
  40.853 +	cr0 = rcr0();
  40.854 +	if (strcmp(cpu_vendor,"CyrixInstead") == 0) {
  40.855 +		eflags = read_eflags();
  40.856 +		disable_intr();
  40.857 +
  40.858 +
  40.859 +		if ((cpu != CPU_M1SC) && (cpu != CPU_CY486DX)) {
  40.860 +			ccr0 = read_cyrix_reg(CCR0);
  40.861 +		}
  40.862 +		ccr1 = read_cyrix_reg(CCR1);
  40.863 +		ccr2 = read_cyrix_reg(CCR2);
  40.864 +		ccr3 = read_cyrix_reg(CCR3);
  40.865 +		if ((cpu == CPU_M1SC) || (cpu == CPU_M1) || (cpu == CPU_M2)) {
  40.866 +			write_cyrix_reg(CCR3, CCR3_MAPEN0);
  40.867 +			ccr4 = read_cyrix_reg(CCR4);
  40.868 +			if ((cpu == CPU_M1) || (cpu == CPU_M2))
  40.869 +				ccr5 = read_cyrix_reg(CCR5);
  40.870 +			else
  40.871 +				pcr0 = read_cyrix_reg(PCR0);
  40.872 +			write_cyrix_reg(CCR3, ccr3);		/* Restore CCR3. */
  40.873 +		}
  40.874 +		write_eflags(eflags);
  40.875 +
  40.876 +		if ((cpu != CPU_M1SC) && (cpu != CPU_CY486DX))
  40.877 +			printf("CCR0=%x, ", (u_int)ccr0);
  40.878 +
  40.879 +		printf("CCR1=%x, CCR2=%x, CCR3=%x",
  40.880 +			(u_int)ccr1, (u_int)ccr2, (u_int)ccr3);
  40.881 +		if ((cpu == CPU_M1SC) || (cpu == CPU_M1) || (cpu == CPU_M2)) {
  40.882 +			printf(", CCR4=%x, ", (u_int)ccr4);
  40.883 +			if (cpu == CPU_M1SC)
  40.884 +				printf("PCR0=%x\n", pcr0);
  40.885 +			else
  40.886 +				printf("CCR5=%x\n", ccr5);
  40.887 +		}
  40.888 +	}
  40.889 +	printf("CR0=%x\n", cr0);
  40.890 +}
  40.891 +#endif
  40.892 +#endif /* DDB */
    41.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    41.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/intr_machdep.c	Tue Apr 05 11:27:50 2005 +0000
    41.3 @@ -0,0 +1,326 @@
    41.4 +/*-
    41.5 + * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
    41.6 + * All rights reserved.
    41.7 + *
    41.8 + * Redistribution and use in source and binary forms, with or without
    41.9 + * modification, are permitted provided that the following conditions
   41.10 + * are met:
   41.11 + * 1. Redistributions of source code must retain the above copyright
   41.12 + *    notice, this list of conditions and the following disclaimer.
   41.13 + * 2. Redistributions in binary form must reproduce the above copyright
   41.14 + *    notice, this list of conditions and the following disclaimer in the
   41.15 + *    documentation and/or other materials provided with the distribution.
   41.16 + * 3. Neither the name of the author nor the names of any co-contributors
   41.17 + *    may be used to endorse or promote products derived from this software
   41.18 + *    without specific prior written permission.
   41.19 + *
   41.20 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   41.21 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   41.22 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   41.23 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   41.24 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   41.25 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   41.26 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   41.27 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   41.28 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   41.29 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   41.30 + * SUCH DAMAGE.
   41.31 + *
   41.32 + * $FreeBSD: src/sys/i386/i386/intr_machdep.c,v 1.4 2003/11/17 06:10:14 peter Exp $
   41.33 + */
   41.34 +
   41.35 +/*
   41.36 + * Machine dependent interrupt code for i386.  For the i386, we have to
   41.37 + * deal with different PICs.  Thus, we use the passed in vector to lookup
   41.38 + * an interrupt source associated with that vector.  The interrupt source
   41.39 + * describes which PIC the source belongs to and includes methods to handle
   41.40 + * that source.
   41.41 + */
   41.42 +
   41.43 +#include "opt_ddb.h"
   41.44 +
   41.45 +#include <sys/param.h>
   41.46 +#include <sys/bus.h>
   41.47 +#include <sys/interrupt.h>
   41.48 +#include <sys/lock.h>
   41.49 +#include <sys/ktr.h>
   41.50 +#include <sys/kernel.h>
   41.51 +#include <sys/mutex.h>
   41.52 +#include <sys/proc.h>
   41.53 +#include <sys/syslog.h>
   41.54 +#include <sys/systm.h>
   41.55 +#include <machine/clock.h>
   41.56 +#include <machine/intr_machdep.h>
   41.57 +#ifdef DDB
   41.58 +#include <ddb/ddb.h>
   41.59 +#endif
   41.60 +
   41.61 +#define	MAX_STRAY_LOG	5
   41.62 +
   41.63 +typedef void (*mask_fn)(uintptr_t vector);
   41.64 +
   41.65 +static int intrcnt_index;
   41.66 +static struct intsrc *interrupt_sources[NUM_IO_INTS];
   41.67 +static struct mtx intr_table_lock;
   41.68 +
   41.69 +static void	intr_init(void *__dummy);
   41.70 +static void	intrcnt_setname(const char *name, int index);
   41.71 +static void	intrcnt_updatename(struct intsrc *is);
   41.72 +static void	intrcnt_register(struct intsrc *is);
   41.73 +
   41.74 +/*
   41.75 + * Register a new interrupt source with the global interrupt system.
   41.76 + * The global interrupts need to be disabled when this function is
   41.77 + * called.
   41.78 + */
   41.79 +int
   41.80 +intr_register_source(struct intsrc *isrc)
   41.81 +{
   41.82 +	int error, vector;
   41.83 +
   41.84 +	vector = isrc->is_pic->pic_vector(isrc);
   41.85 +	if (interrupt_sources[vector] != NULL)
   41.86 +		return (EEXIST);
   41.87 +	error = ithread_create(&isrc->is_ithread, (uintptr_t)isrc, 0,
   41.88 +	    (mask_fn)isrc->is_pic->pic_disable_source,
   41.89 +	    (mask_fn)isrc->is_pic->pic_enable_source, "irq%d:", vector);
   41.90 +	if (error)
   41.91 +		return (error);
   41.92 +	mtx_lock_spin(&intr_table_lock);
   41.93 +	if (interrupt_sources[vector] != NULL) {
   41.94 +		mtx_unlock_spin(&intr_table_lock);
   41.95 +		ithread_destroy(isrc->is_ithread);
   41.96 +		return (EEXIST);
   41.97 +	}
   41.98 +	intrcnt_register(isrc);
   41.99 +	interrupt_sources[vector] = isrc;
  41.100 +	mtx_unlock_spin(&intr_table_lock);
  41.101 +	return (0);
  41.102 +}
  41.103 +
  41.104 +struct intsrc *
  41.105 +intr_lookup_source(int vector)
  41.106 +{
  41.107 +
  41.108 +	return (interrupt_sources[vector]);
  41.109 +}
  41.110 +
  41.111 +int
  41.112 +intr_add_handler(const char *name, int vector, driver_intr_t handler,
  41.113 +    void *arg, enum intr_type flags, void **cookiep)
  41.114 +{
  41.115 +	struct intsrc *isrc;
  41.116 +	int error;
  41.117 +
  41.118 +	isrc = intr_lookup_source(vector);
  41.119 +	if (isrc == NULL)
  41.120 +		return (EINVAL);
  41.121 +
  41.122 +	error = ithread_add_handler(isrc->is_ithread, name, handler, arg,
  41.123 +	    ithread_priority(flags), flags, cookiep);
  41.124 +	if (error == 0) {
  41.125 +		intrcnt_updatename(isrc);
  41.126 +		isrc->is_pic->pic_enable_intr(isrc);
  41.127 +		isrc->is_pic->pic_enable_source(isrc);
  41.128 +	}
  41.129 +	return (error);
  41.130 +}
  41.131 +
  41.132 +int
  41.133 +intr_remove_handler(void *cookie)
  41.134 +{
  41.135 +	int error;
  41.136 +
  41.137 +	error = ithread_remove_handler(cookie);
  41.138 +#ifdef XXX
  41.139 +	if (error == 0)
  41.140 +		intrcnt_updatename(/* XXX */);
  41.141 +#endif
  41.142 +	return (error);
  41.143 +}
  41.144 +
  41.145 +int
  41.146 +intr_config_intr(int vector, enum intr_trigger trig, enum intr_polarity pol)
  41.147 +{
  41.148 +	struct intsrc *isrc;
  41.149 +
  41.150 +	isrc = intr_lookup_source(vector);
  41.151 +	if (isrc == NULL)
  41.152 +		return (EINVAL);
  41.153 +	return (isrc->is_pic->pic_config_intr(isrc, trig, pol));
  41.154 +}
  41.155 +
  41.156 +void
  41.157 +intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
  41.158 +{
  41.159 +	struct thread *td;
  41.160 +	struct ithd *it;
  41.161 +	struct intrhand *ih;
  41.162 +	int error, vector;
  41.163 +
  41.164 +	td = curthread;
  41.165 +	td->td_intr_nesting_level++;
  41.166 +
  41.167 +	/*
  41.168 +	 * We count software interrupts when we process them.  The
  41.169 +	 * code here follows previous practice, but there's an
  41.170 +	 * argument for counting hardware interrupts when they're
  41.171 +	 * processed too.
  41.172 +	 */
  41.173 +	atomic_add_long(isrc->is_count, 1);
  41.174 +	atomic_add_int(&cnt.v_intr, 1);
  41.175 +
  41.176 +	it = isrc->is_ithread;
  41.177 +	if (it == NULL)
  41.178 +		ih = NULL;
  41.179 +	else
  41.180 +		ih = TAILQ_FIRST(&it->it_handlers);
  41.181 +
  41.182 +	/*
  41.183 +	 * XXX: We assume that IRQ 0 is only used for the ISA timer
  41.184 +	 * device (clk).
  41.185 +	 */
  41.186 +	vector = isrc->is_pic->pic_vector(isrc);
  41.187 +	if (vector == 0)
  41.188 +		clkintr_pending = 1;
  41.189 +
  41.190 +
  41.191 +	if (ih != NULL && ih->ih_flags & IH_FAST) {
  41.192 +		/*
  41.193 +		 * Execute fast interrupt handlers directly.
  41.194 +		 * To support clock handlers, if a handler registers
  41.195 +		 * with a NULL argument, then we pass it a pointer to
  41.196 +		 * a trapframe as its argument.
  41.197 +		 */
  41.198 +		critical_enter();
  41.199 +		TAILQ_FOREACH(ih, &it->it_handlers, ih_next) {
  41.200 +			MPASS(ih->ih_flags & IH_FAST);
  41.201 +			CTR3(KTR_INTR, "%s: executing handler %p(%p)",
  41.202 +			    __func__, ih->ih_handler,
  41.203 +			    ih->ih_argument == NULL ? iframe :
  41.204 +			    ih->ih_argument);
  41.205 +			if (ih->ih_argument == NULL)
  41.206 +				ih->ih_handler(iframe);
  41.207 +			else
  41.208 +				ih->ih_handler(ih->ih_argument);
  41.209 +		}
  41.210 +		isrc->is_pic->pic_eoi_source(isrc);
  41.211 +		error = 0;
  41.212 +		/* XXX */
  41.213 +		td->td_pflags &= ~TDP_OWEPREEMPT;
  41.214 +		critical_exit();
  41.215 +	} else {
  41.216 +		/*
  41.217 +		 * For stray and threaded interrupts, we mask and EOI the
  41.218 +		 * source.
  41.219 +		 */
  41.220 +		isrc->is_pic->pic_disable_source(isrc, PIC_EOI);
  41.221 +		if (ih == NULL)
  41.222 +			error = EINVAL;
  41.223 +		else
  41.224 +			error = ithread_schedule(it);
  41.225 +		isrc->is_pic->pic_eoi_source(isrc);
  41.226 +	}
  41.227 +
  41.228 +	if (error == EINVAL) {
  41.229 +		atomic_add_long(isrc->is_straycount, 1);
  41.230 +		if (*isrc->is_straycount < MAX_STRAY_LOG)
  41.231 +			log(LOG_ERR, "stray irq%d\n", vector);
  41.232 +		else if (*isrc->is_straycount == MAX_STRAY_LOG)
  41.233 +			log(LOG_CRIT,
  41.234 +			    "too many stray irq %d's: not logging anymore\n",
  41.235 +			    vector);
  41.236 +	}
  41.237 +	td->td_intr_nesting_level--;
  41.238 +	
  41.239 +}
  41.240 +
  41.241 +void
  41.242 +intr_resume(void)
  41.243 +{
  41.244 +	struct intsrc **isrc;
  41.245 +	int i;
  41.246 +
  41.247 +	mtx_lock_spin(&intr_table_lock);
  41.248 +	for (i = 0, isrc = interrupt_sources; i < NUM_IO_INTS; i++, isrc++)
  41.249 +		if (*isrc != NULL && (*isrc)->is_pic->pic_resume != NULL)
  41.250 +			(*isrc)->is_pic->pic_resume(*isrc);
  41.251 +	mtx_unlock_spin(&intr_table_lock);
  41.252 +}
  41.253 +
  41.254 +void
  41.255 +intr_suspend(void)
  41.256 +{
  41.257 +	struct intsrc **isrc;
  41.258 +	int i;
  41.259 +
  41.260 +	mtx_lock_spin(&intr_table_lock);
  41.261 +	for (i = 0, isrc = interrupt_sources; i < NUM_IO_INTS; i++, isrc++)
  41.262 +		if (*isrc != NULL && (*isrc)->is_pic->pic_suspend != NULL)
  41.263 +			(*isrc)->is_pic->pic_suspend(*isrc);
  41.264 +	mtx_unlock_spin(&intr_table_lock);
  41.265 +}
  41.266 +
  41.267 +static void
  41.268 +intrcnt_setname(const char *name, int index)
  41.269 +{
  41.270 +
  41.271 +	snprintf(intrnames + (MAXCOMLEN + 1) * index, MAXCOMLEN + 1, "%-*s",
  41.272 +	    MAXCOMLEN, name);
  41.273 +}
  41.274 +
  41.275 +static void
  41.276 +intrcnt_updatename(struct intsrc *is)
  41.277 +{
  41.278 +
  41.279 +	intrcnt_setname(is->is_ithread->it_td->td_proc->p_comm, is->is_index);
  41.280 +}
  41.281 +
  41.282 +static void
  41.283 +intrcnt_register(struct intsrc *is)
  41.284 +{
  41.285 +	char straystr[MAXCOMLEN + 1];
  41.286 +
  41.287 +	/* mtx_assert(&intr_table_lock, MA_OWNED); */
  41.288 +	KASSERT(is->is_ithread != NULL, ("%s: isrc with no ithread", __func__));
  41.289 +	is->is_index = intrcnt_index;
  41.290 +	intrcnt_index += 2;
  41.291 +	snprintf(straystr, MAXCOMLEN + 1, "stray irq%d",
  41.292 +	    is->is_pic->pic_vector(is));
  41.293 +	intrcnt_updatename(is);
  41.294 +	is->is_count = &intrcnt[is->is_index];
  41.295 +	intrcnt_setname(straystr, is->is_index + 1);
  41.296 +	is->is_straycount = &intrcnt[is->is_index + 1];
  41.297 +}
  41.298 +
  41.299 +static void
  41.300 +intr_init(void *dummy __unused)
  41.301 +{
  41.302 +
  41.303 +	intrcnt_setname("???", 0);
  41.304 +	intrcnt_index = 1;
  41.305 +	mtx_init(&intr_table_lock, "intr table", NULL, MTX_SPIN);
  41.306 +}
  41.307 +SYSINIT(intr_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_init, NULL)
  41.308 +
  41.309 +#ifdef DDB
  41.310 +/*
  41.311 + * Dump data about interrupt handlers
  41.312 + */
  41.313 +DB_SHOW_COMMAND(irqs, db_show_irqs)
  41.314 +{
  41.315 +	struct intsrc **isrc;
  41.316 +	int i, quit, verbose;
  41.317 +
  41.318 +	quit = 0;
  41.319 +	if (strcmp(modif, "v") == 0)
  41.320 +		verbose = 1;
  41.321 +	else
  41.322 +		verbose = 0;
  41.323 +	isrc = interrupt_sources;
  41.324 +	db_setup_paging(db_simple_pager, &quit, DB_LINES_PER_PAGE);
  41.325 +	for (i = 0; i < NUM_IO_INTS && !quit; i++, isrc++)
  41.326 +		if (*isrc != NULL)
  41.327 +			db_dump_ithread((*isrc)->is_ithread, verbose);
  41.328 +}
  41.329 +#endif
    42.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    42.2 +++ b/freebsd-5.3-xen-sparse/i386-xen/i386-xen/io_apic.c	Tue Apr 05 11:27:50 2005 +0000
    42.3 @@ -0,0 +1,850 @@
    42.4 +/*-
    42.5 + * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
    42.6 + * All rights reserved.
    42.7 + *
    42.8 + * Redistribution and use in source and binary forms, with or without
    42.9 + * modification, are permitted provided that the following conditions
   42.10 + * are met:
   42.11 + * 1. Redistributions of source code must retain the above copyright
   42.12 + *    notice, this list of conditions and the following disclaimer.
   42.13 + * 2. Redistributions in binary form must reproduce the above copyright
   42.14 + *    notice, this list of conditions and the following disclaimer in the
   42.15 + *    documentation and/or other materials provided with the distribution.
   42.16 + * 3. Neither the name of the author nor the names of any co-contributors
   42.17 + *    may be used to endorse or promote products derived from this software
   42.18 + *    without specific prior written permission.
   42.19 + *
   42.20 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   42.21 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   42.22 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   42.23 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   42.24 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   42.25 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   42.26 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   42.27 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   42.28 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   42.29 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   42.30 + * SUCH DAMAGE.
   42.31 + */
   42.32 +
   42.33 +#include <sys/cdefs.h>
   42.34 +__FBSDID("$FreeBSD: src/sys/i386/i386/io_apic.c,v 1.14 2004/08/02 15:31:10 scottl Exp $");
   42.35 +
   42.36 +#include "opt_isa.h"
   42.37 +#include "opt_no_mixed_mode.h"
   42.38 +
   42.39 +#include <sys/param.h>
   42.40 +#include <sys/systm.h>
   42.41 +#include <sys/bus.h>
   42.42 +#include <sys/kernel.h>
   42.43 +#include <sys/malloc.h>
   42.44 +#include <sys/lock.h>
   42.45 +#include <sys/mutex.h>
   42.46 +
   42.47 +#include <vm/vm.h>
   42.48 +#include <vm/pmap.h>
   42.49 +
   42.50 +#include <machine/apicreg.h>
   42.51 +#include <machine/frame.h>
   42.52 +#include <machine/intr_machdep.h>
   42.53 +#include <machine/apicvar.h>
   42.54 +#include <machine/segments.h>
   42.55 +
   42.56 +#define IOAPIC_ISA_INTS		16
   42.57 +#define	IOAPIC_MEM_REGION	32
   42.58 +#define	IOAPIC_REDTBL_LO(i)	(IOAPIC_REDTBL + (i) * 2)
   42.59 +#define	IOAPIC_REDTBL_HI(i)	(IOAPIC_REDTBL_LO(i) + 1)
   42.60 +
   42.61 +#define	VECTOR_EXTINT		252
   42.62 +#define	VECTOR_NMI		253
   42.63 +#define	VECTOR_SMI		254
   42.64 +#define	VECTOR_DISABLED		255
   42.65 +
   42.66 +#define	DEST_NONE		-1
   42.67 +#define	DEST_EXTINT		-2
   42.68 +
   42.69 +#define	TODO		printf("%s: not implemented!\n", __func__)
   42.70 +
   42.71 +MALLOC_DEFINE(M_IOAPIC, "I/O APIC", "I/O APIC structures");
   42.72 +
   42.73 +/*
   42.74 + * New interrupt support code..
   42.75 + *
   42.76 + * XXX: we really should have the interrupt cookie passed up from new-bus
   42.77 + * just be a int pin, and not map 1:1 to interrupt vector number but should
   42.78 + * use INTR_TYPE_FOO to set priority bands for device classes and do all the
   42.79 + * magic remapping of intpin to vector in here.  For now we just cheat as on
   42.80 + * ia64 and map intpin X to vector NRSVIDT + X.  Note that we assume that the
   42.81 + * first IO APIC has ISA interrupts on pins 1-15.  Not sure how you are
   42.82 + * really supposed to figure out which IO APIC in a system with multiple IO
   42.83 + * APIC's actually has the ISA interrupts routed to it.  As far as interrupt
   42.84 + * pin numbers, we use the ACPI System Interrupt number model where each
   42.85 + * IO APIC has a contiguous chunk of the System Interrupt address space.
   42.86 + */
   42.87 +
   42.88 +/*
   42.89 + * Direct the ExtINT pin on the first I/O APIC to a logical cluster of
   42.90 + * CPUs rather than a physical destination of just the BSP.
   42.91 + *
   42.92 + * Note: This is disabled by default as test systems seem to croak with it
   42.93 + * enabled.
   42.94 +#define ENABLE_EXTINT_LOGICAL_DESTINATION
   42.95 + */
   42.96 +
   42.97 +struct ioapic_intsrc {
   42.98 +	struct intsrc io_intsrc;
   42.99 +	u_int io_intpin:8;
  42.100 +	u_int io_vector:8;
  42.101 +	u_int io_activehi:1;
  42.102 +	u_int io_edgetrigger:1;
  42.103 +	u_int io_masked:1;
  42.104 +	int io_dest:5;
  42.105 +	int io_bus:4;
  42.106 +};
  42.107 +
  42.108 +struct ioapic {
  42.109 +	struct pic io_pic;
  42.110 +	u_int io_id:8;			/* logical ID */
  42.111 +	u_int io_apic_id:4;
  42.112 +	u_int io_intbase:8;		/* System Interrupt base */
  42.113 +	u_int io_numintr:8;
  42.114 +	volatile ioapic_t *io_addr;	/* XXX: should use bus_space */
  42.115 +	STAILQ_ENTRY(ioapic) io_next;
  42.116 +	struct ioapic_intsrc io_pins[0];
  42.117 +};
  42.118 +
  42.119 +static u_int	ioapic_read(volatile ioapic_t *apic, int reg);
  42.120 +static void	ioapic_write(volatile ioapic_t *apic, int reg, u_int val);
  42.121 +static const char *ioapic_bus_string(int bus_type);
  42.122 +static void	ioapic_print_vector(struct ioapic_intsrc *intpin);
  42.123 +static void	ioapic_enable_source(struct intsrc *isrc);
  42.124 +static void	ioapic_disable_source(struct intsrc *isrc, int eoi);
  42.125 +static void	ioapic_eoi_source(struct intsrc *isrc);
  42.126 +static void	ioapic_enable_intr(struct intsrc *isrc);
  42.127 +static int	ioapic_vector(struct intsrc *isrc);
  42.128 +static int	ioapic_source_pending(struct intsrc *isrc);
  42.129 +static int	ioapic_config_intr(struct intsrc *isrc, enum intr_trigger trig,
  42.130 +		    enum intr_polarity pol);
  42.131 +static void	ioapic_suspend(struct intsrc *isrc);
  42.132 +static void	ioapic_resume(struct intsrc *isrc);
  42.133 +static void	ioapic_program_destination(struct ioapic_intsrc *intpin);
  42.134 +static void	ioapic_program_intpin(struct ioapic_intsrc *intpin);
  42.135 +static void	ioapic_setup_mixed_mode(struct ioapic_intsrc *intpin);
  42.136 +
  42.137 +static STAILQ_HEAD(,ioapic) ioapic_list = STAILQ_HEAD_INITIALIZER(ioapic_list);
  42.138 +struct pic ioapic_template = { ioapic_enable_source, ioapic_disable_source,
  42.139 +			       ioapic_eoi_source, ioapic_enable_intr,
  42.140 +			       ioapic_vector, ioapic_source_pending,
  42.141 +			       ioapic_suspend, ioapic_resume,
  42.142 +			       ioapic_config_intr };
  42.143 +	
  42.144 +static int bsp_id, current_cluster, logical_clusters, next_ioapic_base;
  42.145 +static u_int mixed_mode_enabled, next_id, program_logical_dest;
  42.146 +#ifdef NO_MIXED_MODE
  42.147 +static int mixed_mode_active = 0;
  42.148 +#else
  42.149 +static int mixed_mode_active = 1;
  42.150 +#endif
  42.151 +TUNABLE_INT("hw.apic.mixed_mode", &mixed_mode_active);
  42.152 +
  42.153 +static __inline void
  42.154 +_ioapic_eoi_source(struct intsrc *isrc)
  42.155 +{
  42.156 +	lapic_eoi();
  42.157 +}
  42.158 +
  42.159 +static u_int
  42.160 +ioapic_read(volatile ioapic_t *apic, int reg)
  42.161 +{
  42.162 +
  42.163 +	mtx_assert(&icu_lock, MA_OWNED);
  42.164 +	apic->ioregsel = reg;
  42.165 +	return (apic->iowin);
  42.166 +}
  42.167 +
  42.168 +static void
  42.169 +ioapic_write(volatile ioapic_t *apic, int reg, u_int val)
  42.170 +{
  42.171 +
  42.172 +	mtx_assert(&icu_lock, MA_OWNED);
  42.173 +	apic->ioregsel = reg;
  42.174 +	apic->iowin = val;
  42.175 +}
  42.176 +
  42.177 +static const char *
  42.178 +ioapic_bus_string(int bus_type)
  42.179 +{
  42.180 +
  42.181 +	switch (bus_type) {
  42.182 +	case APIC_BUS_ISA:
  42.183 +		return ("ISA");
  42.184 +	case APIC_BUS_EISA:
  42.185 +		return ("EISA");
  42.186 +	case APIC_BUS_PCI:
  42.187 +		return ("PCI");
  42.188 +	default:
  42.189 +		return ("unknown");
  42.190 +	}
  42.191 +}
  42.192 +
  42.193 +static void
  42.194 +ioapic_print_vector(struct ioapic_intsrc *intpin)
  42.195 +{
  42.196 +
  42.197 +	switch (intpin->io_vector) {
  42.198 +	case VECTOR_DISABLED:
  42.199 +		printf("disabled");
  42.200 +		break;
  42.201 +	case VECTOR_EXTINT:
  42.202 +		printf("ExtINT");
  42.203 +		break;
  42.204 +	case VECTOR_NMI:
  42.205 +		printf("NMI");
  42.206 +		break;
  42.207 +	case VECTOR_SMI:
  42.208 +		printf("SMI");
  42.209 +		break;
  42.210 +	default:
  42.211 +		printf("%s IRQ %u", ioapic_bus_string(intpin->io_bus),
  42.212 +		    intpin->io_vector);
  42.213 +	}
  42.214 +}
  42.215 +
  42.216 +static void
  42.217 +ioapic_enable_source(struct intsrc *isrc)
  42.218 +{
  42.219 +	struct ioapic_intsrc *intpin = (struct ioapic_intsrc *)isrc;
  42.220 +	struct ioapic *io = (struct ioapic *)isrc->is_pic;
  42.221 +	uint32_t flags;
  42.222 +
  42.223 +	mtx_lock_spin(&icu_lock);
  42.224 +	if (intpin->io_masked) {
  42.225 +		flags = ioapic_read(io->io_addr,
  42.226 +		    IOAPIC_REDTBL_LO(intpin->io_intpin));
  42.227 +		flags &= ~(IOART_INTMASK);
  42.228 +		ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin),
  42.229 +		    flags);
  42.230 +		intpin->io_masked = 0;
  42.231 +	}
  42.232 +	mtx_unlock_spin(&icu_lock);
  42.233 +}
  42.234 +
  42.235 +static void
  42.236 +ioapic_disable_source(struct intsrc *isrc, int eoi)
  42.237 +{
  42.238 +	struct ioapic_intsrc *intpin = (struct ioapic_intsrc *)isrc;
  42.239 +	struct ioapic *io = (struct ioapic *)isrc->is_pic;
  42.240 +	uint32_t flags;
  42.241 +
  42.242 +	mtx_lock_spin(&icu_lock);
  42.243 +	if (!intpin->io_masked && !intpin->io_edgetrigger) {
  42.244 +		flags = ioapic_read(io->io_addr,
  42.245 +		    IOAPIC_REDTBL_LO(intpin->io_intpin));
  42.246 +		flags |= IOART_INTMSET;
  42.247 +		ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin),
  42.248 +		    flags);
  42.249 +		intpin->io_masked = 1;
  42.250 +	}
  42.251 +
  42.252 +	if (eoi == PIC_EOI)
  42.253 +		_ioapic_eoi_source(isrc);
  42.254 +
  42.255 +	mtx_unlock_spin(&icu_lock);
  42.256 +}
  42.257 +
  42.258 +static void
  42.259 +ioapic_eoi_source(struct intsrc *isrc)
  42.260 +{
  42.261 +
  42.262 +	_ioapic_eoi_source(isrc);
  42.263 +}
  42.264 +
  42.265 +/*
  42.266 + * Completely program an intpin based on the data in its interrupt source
  42.267 + * structure.
  42.268 + */
  42.269 +static void
  42.270 +ioapic_program_intpin(struct ioapic_intsrc *intpin)
  42.271 +{
  42.272 +	struct ioapic *io = (struct ioapic *)intpin->io_intsrc.is_pic;
  42.273 +	uint32_t low, high, value;
  42.274 +
  42.275 +	/*
  42.276 +	 * For pins routed via mixed mode or disabled, just ensure that
  42.277 +	 * they are masked.
  42.278 +	 */
  42.279 +	if (intpin->io_dest == DEST_EXTINT ||
  42.280 +	    intpin->io_vector == VECTOR_DISABLED) {
  42.281 +		low = ioapic_read(io->io_addr,
  42.282 +		    IOAPIC_REDTBL_LO(intpin->io_intpin));
  42.283 +		if ((low & IOART_INTMASK) == IOART_INTMCLR)
  42.284 +			ioapic_write(io->io_addr,
  42.285 +			    IOAPIC_REDTBL_LO(intpin->io_intpin),
  42.286 +			    low | IOART_INTMSET);
  42.287 +		return;
  42.288 +	}
  42.289 +
  42.290 +	/* Set the destination. */
  42.291 +	if (intpin->io_dest == DEST_NONE) {
  42.292 +		low = IOART_DESTPHY;
  42.293 +		high = bsp_id << APIC_ID_SHIFT;
  42.294 +	} else {
  42.295 +		low = IOART_DESTLOG;
  42.296 +		high = (intpin->io_dest << APIC_ID_CLUSTER_SHIFT |
  42.297 +		    APIC_ID_CLUSTER_ID) << APIC_ID_SHIFT;
  42.298 +	}
  42.299 +
  42.300 +	/* Program the rest of the low word. */
  42.301 +	if (intpin->io_edgetrigger)
  42.302 +		low |= IOART_TRGREDG;
  42.303 +	else
  42.304 +		low |= IOART_TRGRLVL;
  42.305 +	if (intpin->io_activehi)
  42.306 +		low |= IOART_INTAHI;
  42.307 +	else
  42.308 +		low |= IOART_INTALO;
  42.309 +	if (intpin->io_masked)
  42.310 +		low |= IOART_INTMSET;
  42.311 +	switch (intpin->io_vector) {
  42.312 +	case VECTOR_EXTINT:
  42.313 +		KASSERT(intpin->io_edgetrigger,
  42.314 +		    ("EXTINT not edge triggered"));
  42.315 +		low |= IOART_DELEXINT;
  42.316 +		break;
  42.317 +	case VECTOR_NMI:
  42.318 +		KASSERT(intpin->io_edgetrigger,
  42.319 +		    ("NMI not edge triggered"));
  42.320 +		low |= IOART_DELNMI;
  42.321 +		break;
  42.322 +	case VECTOR_SMI:
  42.323 +		KASSERT(intpin->io_edgetrigger,
  42.324 +		    ("SMI not edge triggered"));
  42.325 +		low |= IOART_DELSMI;
  42.326 +		break;
  42.327 +	default:
  42.328 +		low |= IOART_DELLOPRI | apic_irq_to_idt(intpin->io_vector);
  42.329 +	}
  42.330 +
  42.331 +	/* Write the values to the APIC. */
  42.332 +	mtx_lock_spin(&icu_lock);
  42.333 +	ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin), low);
  42.334 +	value = ioapic_read(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin));
  42.335 +	value &= ~IOART_DEST;
  42.336 +	value |= high;
  42.337 +	ioapic_write(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin), value);
  42.338 +	mtx_unlock_spin(&icu_lock);
  42.339 +}
  42.340 +
  42.341 +/*
  42.342 + * Program an individual intpin's logical destination.
  42.343 + */
  42.344 +static void
  42.345 +ioapic_program_destination(struct ioapic_intsrc *intpin)
  42.346 +{
  42.347 +	struct ioapic *io = (struct ioapic *)intpin->io_intsrc.is_pic;
  42.348 +
  42.349 +	KASSERT(intpin->io_dest != DEST_NONE,
  42.350 +	    ("intpin not assigned to a cluster"));
  42.351 +	KASSERT(intpin->io_dest != DEST_EXTINT,
  42.352 +	    ("intpin routed via ExtINT"));
  42.353 +	if (bootverbose) {
  42.354 +		printf("ioapic%u: routing intpin %u (", io->io_id,
  42.355 +		    intpin->io_intpin);
  42.356 +		ioapic_print_vector(intpin);
  42.357 +		printf(") to cluster %u\n", intpin->io_dest);
  42.358 +	}
  42.359 +	ioapic_program_intpin(intpin);
  42.360 +}
  42.361 +
  42.362 +static void
  42.363 +ioapic_assign_cluster(struct ioapic_intsrc *intpin)
  42.364 +{
  42.365 +
  42.366 +	/*
  42.367 +	 * Assign this intpin to a logical APIC cluster in a
  42.368 +	 * round-robin fashion.  We don't actually use the logical
  42.369 +	 * destination for this intpin until after all the CPU's
  42.370 +	 * have been started so that we don't end up with interrupts
  42.371 +	 * that don't go anywhere.  Another alternative might be to
  42.372 +	 * start up the CPU's earlier so that they can handle interrupts
  42.373 +	 * sooner.
  42.374 +	 */
  42.375 +	intpin->io_dest = current_cluster;
  42.376 +	current_cluster++;
  42.377 +	if (current_cluster >= logical_clusters)
  42.378 +		current_cluster = 0;
  42.379 +	if (program_logical_dest)
  42.380 +		ioapic_program_destination(intpin);
  42.381 +}
  42.382 +
  42.383 +static void
  42.384 +ioapic_enable_intr(struct intsrc *isrc)
  42.385 +{
  42.386 +	struct ioapic_intsrc *intpin = (struct ioapic_intsrc *)isrc;
  42.387 +
  42.388 +	KASSERT(intpin->io_dest != DEST_EXTINT,
  42.389 +	    ("ExtINT pin trying to use ioapic enable_intr method"));
  42.390 +	if (intpin->io_dest == DEST_NONE) {
  42.391 +		ioapic_assign_cluster(intpin);
  42.392 +		lapic_enable_intr(intpin->io_vector);
  42.393 +	}
  42.394 +}
  42.395 +
  42.396 +static int
  42.397 +ioapic_vector(struct intsrc *isrc)
  42.398 +{
  42.399 +	struct ioapic_intsrc *pin;
  42.400 +
  42.401 +	pin = (struct ioapic_intsrc *)isrc;
  42.402 +	return (pin->io_vector);
  42.403 +}
  42.404 +
  42.405 +static int
  42.406 +ioapic_source_pending(struct intsrc *isrc)
  42.407 +{
  42.408 +	struct ioapic_intsrc *intpin = (struct ioapic_intsrc *)isrc;
  42.409 +
  42.410 +	return (lapic_intr_pending(intpin->io_vector));
  42.411 +}
  42.412 +
  42.413 +static int
  42.414 +ioapic_config_intr(struct intsrc *isrc, enum intr_trigger trig,
  42.415 +    enum intr_polarity pol)
  42.416 +{
  42.417 +	struct ioapic_intsrc *intpin = (struct ioapic_intsrc *)isrc;
  42.418 +	struct ioapic *io = (struct ioapic *)isrc->is_pic;
  42.419 +	int changed;
  42.420 +
  42.421 +	KASSERT(!(trig == INTR_TRIGGER_CONFORM || pol == INTR_POLARITY_CONFORM),
  42.422 +	    ("%s: Conforming trigger or polarity\n", __func__));
  42.423 +
  42.424 +	/*
  42.425 +	 * EISA interrupts always use active high polarity, so don't allow
  42.426 +	 * them to be set to active low.
  42.427 +	 *
  42.428 +	 * XXX: Should we write to the ELCR if the trigger mode changes for
  42.429 +	 * an EISA IRQ?
  42.430 +	 */
  42.431 +	if (intpin->io_bus == APIC_BUS_EISA)
  42.432 +		pol = INTR_POLARITY_HIGH;
  42.433 +	changed = 0;
  42.434 +	if (intpin->io_edgetrigger != (trig == INTR_TRIGGER_EDGE)) {
  42.435 +		if (bootverbose)
  42.436 +			printf("ioapic%u: Changing trigger for pin %u to %s\n",
  42.437 +			    io->io_id, intpin->io_intpin,
  42.438 +			    trig == INTR_TRIGGER_EDGE ? "edge" : "level");
  42.439 +		intpin->io_edgetrigger = (trig == INTR_TRIGGER_EDGE);
  42.440 +		changed++;
  42.441 +	}
  42.442 +	if (intpin->io_activehi != (pol == INTR_POLARITY_HIGH)) {
  42.443 +		if (bootverbose)
  42.444 +			printf("ioapic%u: Changing polarity for pin %u to %s\n",
  42.445 +			    io->io_id, intpin->io_intpin,
  42.446 +			    pol == INTR_POLARITY_HIGH ? "high" : "low");
  42.447 +		intpin->io_activehi = (pol == INTR_POLARITY_HIGH);
  42.448 +		changed++;
  42.449 +	}
  42.450 +	if (changed)
  42.451 +		ioapic_program_intpin(intpin);
  42.452 +	return (0);
  42.453 +}
  42.454 +
  42.455 +static void
  42.456 +ioapic_suspend(struct intsrc *isrc)
  42.457 +{
  42.458 +
  42.459 +	TODO;
  42.460 +}
  42.461 +
  42.462 +static void
  42.463 +ioapic_resume(struct intsrc *isrc)
  42.464 +{
  42.465 +
  42.466 +	ioapic_program_intpin((struct ioapic_intsrc *)isrc);
  42.467 +}
  42.468 +
  42.469 +/*
  42.470 + * APIC enumerators call this function to indicate that the 8259A AT PICs
  42.471 + * are available and that mixed mode can be used.
  42.472 + */
  42.473 +void
  42.474 +ioapic_enable_mixed_mode(void)
  42.475 +{
  42.476 +
  42.477 +	mixed_mode_enabled = 1;
  42.478 +}
  42.479 +
  42.480 +/*
  42.481 + * Allocate and return a logical cluster ID.  Note that the first time
  42.482 + * this is called, it returns cluster 0.  ioapic_enable_intr() treats
  42.483 + * the two cases of logical_clusters == 0 and logical_clusters == 1 the
  42.484 + * same: one cluster of ID 0 exists.  The logical_clusters == 0 case is
  42.485 + * for UP kernels, which should never call this function.
  42.486 + */
  42.487 +int
  42.488 +ioapic_next_logical_cluster(void)
  42.489 +{
  42.490 +
  42.491 +	if (logical_clusters >= APIC_MAX_CLUSTER)
  42.492 +		panic("WARNING: Local APIC cluster IDs exhausted!");
  42.493 +	return (logical_clusters++);
  42.494 +}
  42.495 +
  42.496 +/*
  42.497 + * Create a plain I/O APIC object.
  42.498 + */
  42.499 +void *
  42.500 +ioapic_create(uintptr_t addr, int32_t apic_id, int intbase)
  42.501 +{
  42.502 +	struct ioapic *io;
  42.503 +	struct ioapic_intsrc *intpin;
  42.504 +	volatile ioapic_t *apic;
  42.505 +	u_int numintr, i;
  42.506 +	uint32_t value;
  42.507 +
  42.508 +	apic = (ioapic_t *)pmap_mapdev(addr, IOAPIC_MEM_REGION);
  42.509 +	mtx_lock_spin(&icu_lock);
  42.510 +	numintr = ((ioapic_read(apic, IOAPIC_VER) & IOART_VER_MAXREDIR) >>
  42.511 +	    MAXREDIRSHIFT) + 1;
  42.512 +	mtx_unlock_spin(&icu_lock);
  42.513 +	io = malloc(sizeof(struct ioapic) +
  42.514 +	    numintr * sizeof(struct ioapic_intsrc), M_IOAPIC, M_WAITOK);
  42.515 +	io->io_pic = ioapic_template;
  42.516 +	mtx_lock_spin(&icu_lock);
  42.517 +	io->io_id = next_id++;
  42.518 +	io->io_apic_id = ioapic_read(apic, IOAPIC_ID) >> APIC_ID_SHIFT;	
  42.519 +	if (apic_id != -1 && io->io_apic_id != apic_id) {
  42.520 +		ioapic_write(apic, IOAPIC_ID, apic_id << APIC_ID_SHIFT);
  42.521 +		mtx_unlock_spin(&icu_lock);
  42.522 +		io->io_apic_id = apic_id;
  42.523 +		printf("ioapic%u: Changing APIC ID to %d\n", io->io_id,
  42.524 +		    apic_id);
  42.525 +	} else
  42.526 +		mtx_unlock_spin(&icu_lock);
  42.527 +	if (intbase == -1) {
  42.528 +		intbase = next_ioapic_base;
  42.529 +		printf("ioapic%u: Assuming intbase of %d\n", io->io_id,
  42.530 +		    intbase);
  42.531 +	} else if (intbase != next_ioapic_base)
  42.532 +		printf("ioapic%u: WARNING: intbase %d != expected base %d\n",
  42.533 +		    io->io_id, intbase, next_ioapic_base);
  42.534 +	io->io_intbase = intbase;
  42.535 +	next_ioapic_base = intbase + numintr;
  42.536 +	io->io_numintr = numintr;
  42.537 +	io->io_addr = apic;
  42.538 +
  42.539 +	/*
  42.540 +	 * Initialize pins.  Start off with interrupts disabled.  Default
  42.541 +	 * to active-hi and edge-triggered for ISA interrupts and active-lo
  42.542 +	 * and level-triggered for all others.
  42.543 +	 */
  42.544 +	bzero(io->io_pins, sizeof(struct ioapic_intsrc) * numintr);
  42.545 +	mtx_lock_spin(&icu_lock);
  42.546 +	for (i = 0, intpin = io->io_pins; i < numintr; i++, intpin++) {
  42.547 +		intpin->io_intsrc.is_pic = (struct pic *)io;
  42.548 +		intpin->io_intpin = i;
  42.549 +		intpin->io_vector = intbase + i;
  42.550 +
  42.551 +		/*
  42.552 +		 * Assume that pin 0 on the first I/O APIC is an ExtINT pin
  42.553 +		 * and that pins 1-15 are ISA interrupts.  Assume that all
  42.554 +		 * other pins are PCI interrupts.
  42.555 +		 */
  42.556 +		if (intpin->io_vector == 0)
  42.557 +			ioapic_set_extint(io, i);
  42.558 +		else if (intpin->io_vector < IOAPIC_ISA_INTS) {
  42.559 +			intpin->io_bus = APIC_BUS_ISA;
  42.560 +			intpin->io_activehi = 1;
  42.561 +			intpin->io_edgetrigger = 1;
  42.562 +			intpin->io_masked = 1;
  42.563 +		} else {
  42.564 +			intpin->io_bus = APIC_BUS_PCI;
  42.565 +			intpin->io_activehi = 0;
  42.566 +			intpin->io_edgetrigger = 0;
  42.567 +			intpin->io_masked = 1;
  42.568 +		}
  42.569 +
  42.570 +		/*
  42.571 +		 * Route interrupts to the BSP by default using physical
  42.572 +		 * addressing.  Vectored interrupts get readdressed using
  42.573 +		 * logical IDs to CPU clusters when they are enabled.
  42.574 +		 */
  42.575 +		intpin->io_dest = DEST_NONE;
  42.576 +		if (bootverbose && intpin->io_vector != VECTOR_DISABLED) {
  42.577 +			printf("ioapic%u: intpin %d -> ",  io->io_id, i);
  42.578 +			ioapic_print_vector(intpin);
  42.579 +			printf(" (%s, %s)\n", intpin->io_edgetrigger ?
  42.580 +			    "edge" : "level", intpin->io_activehi ? "high" :
  42.581 +			    "low");
  42.582 +		}
  42.583 +		value = ioapic_read(apic, IOAPIC_REDTBL_LO(i));
  42.584 +		ioapic_write(apic, IOAPIC_REDTBL_LO(i), value | IOART_INTMSET);
  42.585 +	}
  42.586 +	mtx_unlock_spin(&icu_lock);
  42.587 +
  42.588 +	return (io);
  42.589 +}
  42.590 +
  42.591 +int
  42.592 +ioapic_get_vector(void *cookie, u_int pin)
  42.593 +{
  42.594 +	struct ioapic *io;
  42.595 +
  42.596 +	io = (struct ioapic *)cookie;
  42.597 +	if (pin >= io->io_numintr)
  42.598 +		return (-1);
  42.599 +	return (io->io_pins[pin].io_vector);
  42.600 +}
  42.601 +
  42.602 +int
  42.603 +ioapic_disable_pin(void *cookie, u_int pin)
  42.604 +{
  42.605 +	struct ioapic *io;
  42.606 +
  42.607 +	io = (struct ioapic *)cookie;
  42.608 +	if (pin >= io->io_numintr)
  42.609 +		return (EINVAL);
  42.610 +	if (io->io_pins[pin].io_vector == VECTOR_DISABLED)
  42.611 +		return (EINVAL);
  42.612 +	io->io_pins[pin].io_vector = VECTOR_DISABLED;
  42.613 +	if (bootverbose)
  42.614 +		printf("ioapic%u: intpin %d disabled\n", io->io_id, pin);
  42.615 +	return (0);
  42.616 +}
  42.617 +
  42.618 +int
  42.619 +ioapic_remap_vector(void *cookie, u_int pin, int vector)
  42.620 +{
  42.621 +	struct ioapic *io;
  42.622 +
  42.623 +	io = (struct ioapic *)cookie;
  42.624 +	if (pin >= io->io_numintr || vector < 0)
  42.625 +		return (EINVAL);
  42.626 +	if (io->io_pins[pin].io_vector >= NUM_IO_INTS)
  42.627 +		return (EINVAL);
  42.628 +	io->io_pins[pin].io_vector = vector;
  42.629 +	if (bootverbose)
  42.630 +		printf("ioapic%u: Routing IRQ %d -> intpin %d\n", io->io_id,
  42.631 +		    vector, pin);
  42.632 +	return (0);
  42.633 +}
  42.634 +
  42.635 +int
  42.636 +ioapic_set_bus(void *cookie, u_int pin, int bus_type)
  42.637 +{
  42.638 +	struct ioapic *io;
  42.639 +
  42.640 +	if (bus_type < 0 || bus_type > APIC_BUS_MAX)
  42.641 +		return (EINVAL);
  42.642 +	io = (struct ioapic *)cookie;
  42.643 +	if (pin >= io->io_numintr)
  42.644 +		return (EINVAL);
  42.645 +	if (io->io_pins[pin].io_vector >= NUM_IO_INTS)
  42.646 +		return (EINVAL);
  42.647 +	io->io_pins[pin].io_bus = bus_type;
  42.648 +	if (bootverbose)
  42.649 +		printf("ioapic%u: intpin %d bus %s\n", io->io_id, pin,
  42.650 +		    ioapic_bus_string(bus_type));
  42.651 +	return (0);
  42.652 +}
  42.653 +
  42.654 +int
  42.655 +ioapic_set_nmi(void *cookie, u_int pin)
  42.656 +{
  42.657 +	struct ioapic *io;
  42.658 +
  42.659 +	io = (struct ioapic *)cookie;
  42.660 +	if (pin >= io->io_numintr)
  42.661 +		return (EINVAL);
  42.662 +	if (io->io_pins[pin].io_vector == VECTOR_NMI)
  42.663 +		return (0);
  42.664 +	if (io->io_pins[pin].io_vector >= NUM_IO_INTS)
  42.665 +		return (EINVAL);
  42.666 +	io->io_pins[pin].io_bus = APIC_BUS_UNKNOWN;
  42.667 +	io->io_pins[pin].io_vector = VECTOR_NMI;
  42.668 +	io->io_pins[pin].io_masked = 0;
  42.669 +	io->io_pins[pin].io_edgetrigger = 1;
  42.670 +	io->io_pins[pin].io_activehi = 1;
  42.671 +	if (bootverbose)
  42.672 +		printf("ioapic%u: Routing NMI -> intpin %d\n",
  42.673 +		    io->io_id, pin);
  42.674 +	return (0);
  42.675 +}
  42.676 +
  42.677 +int
  42.678 +ioapic_set_smi(void *cookie, u_int pin)
  42.679 +{
  42.680 +	struct ioapic *io;
  42.681 +
  42.682 +	io = (struct ioapic *)cookie;
  42.683 +	if (pin >= io->io_numintr)
  42.684 +		return (EINVAL);
  42.685 +	if (io->io_pins[pin].io_vector == VECTOR_SMI)
  42.686 +		return (0);
  42.687 +	if (io->io_pins[pin].io_vector >= NUM_IO_INTS)
  42.688 +		return (EINVAL);
  42.689 +	io->io_pins[pin].io_bus = APIC_BUS_UNKNOWN;
  42.690 +	io->io_pins[pin].io_vector = VECTOR_SMI;
  42.691 +	io->io_pins[pin].io_masked = 0;
  42.692 +	io->io_pins[pin].io_edgetrigger = 1;
  42.693 +	io->io_pins[pin].io_activehi = 1;
  42.694 +	if (bootverbose)
  42.695 +		printf("ioapic%u: Routing SMI -> intpin %d\n",
  42.696 +		    io->io_id, pin);
  42.697 +	return (0);
  42.698 +}
  42.699 +
  42.700 +int
  42.701 +ioapic_set_extint(void *cookie, u_int pin)
  42.702 +{
  42.703 +	struct ioapic *io;
  42.704 +
  42.705 +	io = (struct ioapic *)cookie;
  42.706 +	if (pin >= io->io_numintr)
  42.707 +		return (EINVAL);
  42.708 +	if (io->io_pins[pin].io_vector == VECTOR_EXTINT)
  42.709 +		return (0);
  42.710 +	if (io->io_pins[pin].io_vector >= NUM_IO_INTS)
  42.711 +		return (EINVAL);
  42.712 +	io->io_pins[pin].io_bus = APIC_BUS_UNKNOWN;
  42.713 +	io->io_pins[pin].io_vector = VECTOR_EXTINT;
  42.714 +
  42.715 +	/* Enable this pin if mixed mode is available and active. */
  42.716 +	if (mixed_mode_enabled && mixed_mode_active)
  42.717 +		io->io_pins[pin].io_masked = 0;
  42.718 +	else
  42.719 +		io->io_pins[pin].io_masked = 1;
  42.720 +	io->io_pins[pin].io_edgetrigger = 1;
  42.721 +	io->io_pins[pin].io_activehi = 1;
  42.722 +	if (bootverbose)
  42.723 +		printf("ioapic%u: Routing external 8259A's -> intpin %d\n",
  42.724 +		    io->io_id, pin);
  42.725 +	return (0);
  42.726 +}
  42.727 +
  42.728 +int
  42.729 +ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
  42.730 +{
  42.731 +	struct ioapic *io;
  42.732 +
  42.733 +	io = (struct ioapic *)cookie;
  42.734 +	if (pin >= io->io_numintr || pol == INTR_POLARITY_CONFORM)
  42.735 +		return (EINVAL);
  42.736 +	if (io->io_pins[pin].io_vector >= NUM_IO_INTS)
  42.737 +		return (EINVAL);
  42.738 +	io->io_pins[pin].io_activehi = (pol == INTR_POLARITY_HIGH);
  42.739 +	if (bootverbose)
  42.740 +		printf("ioapic%u: intpin %d polarity: %s\n", io->io_id, pin,
  42.741 +		    pol == INTR_POLARITY_HI