1.1 --- a/xen/arch/ia64/hyperprivop.S	Mon Jul 18 14:05:04 2005 -0700
     1.2 +++ b/xen/arch/ia64/hyperprivop.S	Mon Jul 18 17:44:14 2005 -0700
     1.3 @@ -28,7 +28,7 @@
     1.4  #endif
     1.5  
     1.6  // FIXME: turn off for now... fix zero'ing regs, should be bank1?
     1.7 -//#define HANDLE_AR_UNAT
     1.8 +#define HANDLE_AR_UNAT
     1.9  
    1.10  // FIXME: This is defined in include/asm-ia64/hw_irq.h but this
    1.11  // doesn't appear to be include'able from assembly?
    1.12 @@ -457,14 +457,16 @@ GLOBAL_ENTRY(fast_tick_reflect)
    1.13  	.mem.offset 8,0; st8.spill [r3]=r29,16 ;;
    1.14  	.mem.offset 0,0; st8.spill [r2]=r30,16;
    1.15  	.mem.offset 8,0; st8.spill [r3]=r31,16 ;;
    1.16 -	movl r31=XSI_IPSR;;
    1.17 +#ifdef HANDLE_AR_UNAT
    1.18 +	// bank0 regs have no NaT bit, so ensure they are NaT clean
    1.19 +	mov r16=r0; mov r17=r0; mov r18=r0; mov r19=r0;
    1.20 +	mov r20=r0; mov r21=r0; mov r22=r0; mov r23=r0;
    1.21 +	mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
    1.22 +	mov r28=r0; mov r29=r0; mov r30=r0; movl r31=XSI_IPSR;;
    1.23 +#endif
    1.24  	bsw.0 ;;
    1.25  	mov r2=r30; mov r3=r29;;
    1.26  #ifdef HANDLE_AR_UNAT
    1.27 -	// bank0 regs have no NaT bit, so ensure they are NaT clean
    1.28 -	mov r16=r0; mov r17=r0; mov r19=r0;
    1.29 -	mov r21=r0; mov r22=r0; mov r23=r0;
    1.30 -	mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
    1.31  	mov ar.unat=r28;
    1.32  #endif
    1.33  	adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;
    1.34 @@ -608,14 +610,17 @@ ENTRY(fast_reflect)
    1.35  	.mem.offset 8,0; st8.spill [r3]=r29,16 ;;
    1.36  	.mem.offset 0,0; st8.spill [r2]=r30,16;
    1.37  	.mem.offset 8,0; st8.spill [r3]=r31,16 ;;
    1.38 +#ifdef HANDLE_AR_UNAT
    1.39 +	// bank0 regs have no NaT bit, so ensure they are NaT clean
    1.40 +	mov r16=r0; mov r17=r0; mov r18=r0; mov r19=r0;
    1.41 +	mov r20=r0; mov r21=r0; mov r22=r0; mov r23=r0;
    1.42 +	mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
    1.43 +	mov r28=r0; mov r29=r0; mov r30=r0; movl r31=XSI_IPSR;;
    1.44 +#endif
    1.45  	movl r31=XSI_IPSR;;
    1.46  	bsw.0 ;;
    1.47  	mov r2=r30; mov r3=r29;;
    1.48  #ifdef HANDLE_AR_UNAT
    1.49 -	// bank0 regs have no NaT bit, so ensure they are NaT clean
    1.50 -	mov r16=r0; mov r17=r0; mov r19=r0;
    1.51 -	mov r21=r0; mov r22=r0; mov r23=r0;
    1.52 -	mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
    1.53  	mov ar.unat=r28;
    1.54  #endif
    1.55  	adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;

     2.1 --- a/xen/include/asm-ia64/xensystem.h	Mon Jul 18 14:05:04 2005 -0700
     2.2 +++ b/xen/include/asm-ia64/xensystem.h	Mon Jul 18 17:44:14 2005 -0700
     2.3 @@ -59,8 +59,8 @@ extern struct task_struct *vmx_ia64_swit
     2.4  	if (IA64_HAS_EXTRA_STATE(next))								 \
     2.5  		ia64_load_extra(next);								 \
     2.6  	/*ia64_psr(ia64_task_regs(next))->dfh = !ia64_is_local_fpu_owner(next);*/			 \
     2.7 -	/* vcpu_set_next_timer(next);  TURN ME BACK ON */					\
     2.8  	(last) = ia64_switch_to((next));							 \
     2.9 +	vcpu_set_next_timer(current);								\
    2.10  } while (0)
    2.11  #endif // CONFIG_VTI
    2.12