ia64/xen-unstable

changeset 15374:0944634d4639

[IA64] Improve priv_emulate() isr.code handling for IA64_GENEX_VECTOR

Better handling of isr.code if priv_emulate() fails with IA64_GENEX_VECTOR.

Signed-off-by: Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
author Alex Williamson <alex.williamson@hp.com>
date Mon Jun 18 13:41:31 2007 -0600 (2007-06-18)
parents bdcb9cf6073d
children 7d4c40c21690
files xen/arch/ia64/xen/faults.c
line diff
     1.1 --- a/xen/arch/ia64/xen/faults.c	Mon Jun 18 13:36:36 2007 -0600
     1.2 +++ b/xen/arch/ia64/xen/faults.c	Mon Jun 18 13:41:31 2007 -0600
     1.3 @@ -544,6 +544,14 @@ ia64_handle_privop(unsigned long ifa, st
     1.4  	if (vector != IA64_NO_FAULT && vector != IA64_RFI_IN_PROGRESS) {
     1.5  		// Note: if a path results in a vector to reflect that requires
     1.6  		// iha/itir (e.g. vcpu_force_data_miss), they must be set there
     1.7 +		/*
     1.8 +		 * IA64_GENEX_VECTOR may contain in the lowest byte an ISR.code
     1.9 +		 * see IA64_ILLOP_FAULT, ...
    1.10 +		 */
    1.11 +		if ((vector & ~0xffUL) == IA64_GENEX_VECTOR) {
    1.12 +			isr = vector & 0xffUL;
    1.13 +			vector = IA64_GENEX_VECTOR;
    1.14 +		}
    1.15  		reflect_interruption(isr, regs, vector);
    1.16  	}
    1.17  }