ia64/xen-unstable

changeset 8893:0851d92183a1

Svm patch to cleanup the injection logic and consolidate into one function.

Signed-off-by: Tom Woller <thomas.woller@amd.com>
author kaf24@firebug.cl.cam.ac.uk
date Sat Feb 18 01:01:31 2006 +0100 (2006-02-18)
parents 7238722f8d23
children f933aae43044
files xen/arch/x86/hvm/svm/svm.c
line diff
     1.1 --- a/xen/arch/x86/hvm/svm/svm.c	Fri Feb 17 23:00:05 2006 +0100
     1.2 +++ b/xen/arch/x86/hvm/svm/svm.c	Sat Feb 18 01:01:31 2006 +0100
     1.3 @@ -164,15 +164,21 @@ void asidpool_retire( struct vmcb_struct
     1.4     spin_unlock(&ASIDpool[core].asid_lock);
     1.5  }
     1.6  
     1.7 -static inline int svm_inject_exception(struct vcpu *v, int trap, int error_code)
     1.8 +static inline void svm_inject_exception(struct vmcb_struct *vmcb, 
     1.9 +                                        int trap, int error_code)
    1.10  {
    1.11 -    void save_svm_cpu_user_regs(struct vcpu *, struct cpu_user_regs *);
    1.12 -    struct cpu_user_regs regs;
    1.13 -
    1.14 -    printf("svm_inject_exception(trap %d, error_code 0x%x)\n",
    1.15 -           trap, error_code);
    1.16 -    save_svm_cpu_user_regs(v, &regs);
    1.17 -    __hvm_bug(&regs);
    1.18 +    eventinj_t event;
    1.19 +
    1.20 +    event.bytes = 0;            
    1.21 +    event.fields.v = 1;
    1.22 +    event.fields.type = EVENTTYPE_EXCEPTION;
    1.23 +    event.fields.vector = trap;
    1.24 +    event.fields.ev = 1;
    1.25 +    event.fields.errorcode = error_code;
    1.26 +
    1.27 +    ASSERT(vmcb->eventinj.v == 0);
    1.28 +    
    1.29 +    vmcb->eventinj = event;
    1.30  }
    1.31  
    1.32  void stop_svm(void)
    1.33 @@ -368,7 +374,7 @@ static inline int long_mode_do_msr_write
    1.34                      || !test_bit(SVM_CPU_STATE_PAE_ENABLED,
    1.35                                   &vc->arch.hvm_svm.cpu_state))
    1.36              {
    1.37 -                svm_inject_exception(vc, TRAP_gp_fault, 0);
    1.38 +                svm_inject_exception(vmcb, TRAP_gp_fault, 0);
    1.39              }
    1.40          }
    1.41  
    1.42 @@ -398,7 +404,7 @@ static inline int long_mode_do_msr_write
    1.43          if (!IS_CANO_ADDRESS(msr_content))
    1.44          {
    1.45              HVM_DBG_LOG(DBG_LEVEL_1, "Not cano address of msr write\n");
    1.46 -            svm_inject_exception(vc, TRAP_gp_fault, 0);
    1.47 +            svm_inject_exception(vmcb, TRAP_gp_fault, 0);
    1.48          }
    1.49  
    1.50          if (regs->ecx == MSR_FS_BASE)
    1.51 @@ -904,7 +910,6 @@ static void svm_do_general_protection_fa
    1.52  {
    1.53      struct vmcb_struct *vmcb = v->arch.hvm_svm.vmcb;
    1.54      unsigned long eip, error_code;
    1.55 -    eventinj_t event;
    1.56  
    1.57      ASSERT(vmcb);
    1.58  
    1.59 @@ -923,14 +928,7 @@ static void svm_do_general_protection_fa
    1.60  
    1.61      
    1.62      /* Reflect it back into the guest */
    1.63 -    event.bytes = 0;
    1.64 -    event.fields.v = 1;
    1.65 -    event.fields.type = EVENTTYPE_EXCEPTION;
    1.66 -    event.fields.vector = 13;
    1.67 -    event.fields.ev = 1;
    1.68 -    event.fields.errorcode = error_code;
    1.69 -
    1.70 -    vmcb->eventinj = event;
    1.71 +    svm_inject_exception(vmcb, TRAP_gp_fault, error_code);
    1.72  }
    1.73  
    1.74  /* Reserved bits: [31:14], [12:1] */
    1.75 @@ -1380,7 +1378,7 @@ static int svm_set_cr0(unsigned long val
    1.76                      &v->arch.hvm_svm.cpu_state))
    1.77          {
    1.78              HVM_DBG_LOG(DBG_LEVEL_1, "Enable paging before PAE enable\n");
    1.79 -            svm_inject_exception(v, TRAP_gp_fault, 0);
    1.80 +            svm_inject_exception(vmcb, TRAP_gp_fault, 0);
    1.81          }
    1.82  
    1.83          if (test_bit(SVM_CPU_STATE_LME_ENABLED, &v->arch.hvm_svm.cpu_state))
    1.84 @@ -1464,9 +1462,9 @@ static int svm_set_cr0(unsigned long val
    1.85       */
    1.86      if ((value & X86_CR0_PE) == 0) {
    1.87      	if (value & X86_CR0_PG) {
    1.88 -            svm_inject_exception(v, TRAP_gp_fault, 0);
    1.89 -	    return 0;
    1.90 -	}
    1.91 +            svm_inject_exception(vmcb, TRAP_gp_fault, 0);
    1.92 +            return 0;
    1.93 +        }
    1.94  
    1.95          set_bit(ARCH_SVM_VMCB_ASSIGN_ASID, &v->arch.hvm_svm.flags);
    1.96          vmcb->cr3 = pagetable_get_paddr(v->domain->arch.phys_table);
    1.97 @@ -2473,12 +2471,8 @@ asmlinkage void svm_vmexit_handler(struc
    1.98          {
    1.99              v->arch.hvm_svm.injecting_event = 1;
   1.100              /* Inject #PG using Interruption-Information Fields */
   1.101 -            vmcb->eventinj.bytes = 0;
   1.102 -            vmcb->eventinj.fields.v = 1;
   1.103 -            vmcb->eventinj.fields.ev = 1;
   1.104 -            vmcb->eventinj.fields.errorcode = regs.error_code;
   1.105 -            vmcb->eventinj.fields.type = EVENTTYPE_EXCEPTION;
   1.106 -            vmcb->eventinj.fields.vector = TRAP_page_fault;
   1.107 +            svm_inject_exception(vmcb, TRAP_page_fault, regs.error_code);
   1.108 +
   1.109              v->arch.hvm_svm.cpu_cr2 = va;
   1.110              vmcb->cr2 = va;
   1.111              TRACE_3D(TRC_VMX_INT, v->domain->domain_id,