ia64/xen-unstable

changeset 18471:020b8340e839

CPUIDLE: Avoid remnant LAPIC timer intr while force hpetbroadcast

LAPIC will stop during C3, and resume to work after exit from
C3. Considering below case:
The LAPIC timer was programmed to expire after 1000us, but CPU enter
C3 after 100us and exit C3 at 9xxus.

0us: reprogram_timer(1000us)
100us: entry C3, LAPIC timer stop
9xxus: exit C3 due to unexpected event, LAPIC timer continue running
10xxus: reprogram_timer(1000us), fail due to the past expiring time.
......: no timer softirq raised, no change to LAPIC timer.
......: if entry C3 again, HPET will be forced reprogramed to
now+small_slop.
......: if entry C2, no change to LAPIC.
18xxus: LAPIC timer expires unexpectedly if no C3 entries after
10xxus.

Signed-off-by: Wei Gang <gang.wei@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Sep 10 11:16:26 2008 +0100 (2008-09-10)
parents 9ee24da5a488
children cfbe4df8d47c
files xen/arch/x86/hpet.c
line diff
     1.1 --- a/xen/arch/x86/hpet.c	Wed Sep 10 11:09:08 2008 +0100
     1.2 +++ b/xen/arch/x86/hpet.c	Wed Sep 10 11:16:26 2008 +0100
     1.3 @@ -233,7 +233,15 @@ void hpet_broadcast_exit(void)
     1.4  
     1.5      if ( cpu_test_and_clear(cpu, ch->cpumask) )
     1.6      {
     1.7 -        reprogram_timer(per_cpu(timer_deadline, cpu));
     1.8 +        if ( !reprogram_timer(per_cpu(timer_deadline, cpu)) )
     1.9 +        {
    1.10 +            /*
    1.11 +             * The deadline must have passed -- trigger timer work now.
    1.12 +             * Also cancel any outstanding LAPIC event.
    1.13 +             */
    1.14 +            reprogram_timer(0);
    1.15 +            raise_softirq(TIMER_SOFTIRQ);
    1.16 +        }
    1.17  
    1.18          if ( cpus_empty(ch->cpumask) && ch->next_event != STIME_MAX )
    1.19              reprogram_hpet_evt_channel(ch, STIME_MAX, 0, 0);