ia64/xen-unstable

view xen/include/public/arch-ia64.h @ 6316:f7dfaa2af90c

merge?
author cl349@firebug.cl.cam.ac.uk
date Sun Aug 21 11:02:00 2005 +0000 (2005-08-21)
parents 1872e09bfba3
children 6721abf6b16d
line source
1 /******************************************************************************
2 * arch-ia64/hypervisor-if.h
3 *
4 * Guest OS interface to IA64 Xen.
5 */
7 #ifndef __HYPERVISOR_IF_IA64_H__
8 #define __HYPERVISOR_IF_IA64_H__
10 /* Maximum number of virtual CPUs in multi-processor guests. */
11 /* WARNING: before changing this, check that shared_info fits on a page */
12 #define MAX_VIRT_CPUS 1
14 #ifndef __ASSEMBLY__
16 #define MAX_NR_SECTION 32 // at most 32 memory holes
17 typedef struct {
18 unsigned long start; /* start of memory hole */
19 unsigned long end; /* end of memory hole */
20 } mm_section_t;
22 typedef struct {
23 unsigned long mfn : 56;
24 unsigned long type: 8;
25 } pmt_entry_t;
27 #define GPFN_MEM (0UL << 56) /* Guest pfn is normal mem */
28 #define GPFN_FRAME_BUFFER (1UL << 56) /* VGA framebuffer */
29 #define GPFN_LOW_MMIO (2UL << 56) /* Low MMIO range */
30 #define GPFN_PIB (3UL << 56) /* PIB base */
31 #define GPFN_IOSAPIC (4UL << 56) /* IOSAPIC base */
32 #define GPFN_LEGACY_IO (5UL << 56) /* Legacy I/O base */
33 #define GPFN_GFW (6UL << 56) /* Guest Firmware */
34 #define GPFN_HIGH_MMIO (7UL << 56) /* High MMIO range */
36 #define GPFN_IO_MASK (7UL << 56) /* Guest pfn is I/O type */
37 #define GPFN_INV_MASK (31UL << 59) /* Guest pfn is invalid */
39 #define INVALID_MFN (~0UL)
41 /*
42 * NB. This may become a 64-bit count with no shift. If this happens then the
43 * structure size will still be 8 bytes, so no other alignments will change.
44 */
45 typedef struct {
46 unsigned int tsc_bits; /* 0: 32 bits read from the CPU's TSC. */
47 unsigned int tsc_bitshift; /* 4: 'tsc_bits' uses N:N+31 of TSC. */
48 } tsc_timestamp_t; /* 8 bytes */
50 struct pt_fpreg {
51 union {
52 unsigned long bits[2];
53 long double __dummy; /* force 16-byte alignment */
54 } u;
55 };
57 struct pt_regs {
58 /* The following registers are saved by SAVE_MIN: */
59 unsigned long b6; /* scratch */
60 unsigned long b7; /* scratch */
62 unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
63 unsigned long ar_ssd; /* reserved for future use (scratch) */
65 unsigned long r8; /* scratch (return value register 0) */
66 unsigned long r9; /* scratch (return value register 1) */
67 unsigned long r10; /* scratch (return value register 2) */
68 unsigned long r11; /* scratch (return value register 3) */
70 unsigned long cr_ipsr; /* interrupted task's psr */
71 unsigned long cr_iip; /* interrupted task's instruction pointer */
72 unsigned long cr_ifs; /* interrupted task's function state */
74 unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
75 unsigned long ar_pfs; /* prev function state */
76 unsigned long ar_rsc; /* RSE configuration */
77 /* The following two are valid only if cr_ipsr.cpl > 0: */
78 unsigned long ar_rnat; /* RSE NaT */
79 unsigned long ar_bspstore; /* RSE bspstore */
81 unsigned long pr; /* 64 predicate registers (1 bit each) */
82 unsigned long b0; /* return pointer (bp) */
83 unsigned long loadrs; /* size of dirty partition << 16 */
85 unsigned long r1; /* the gp pointer */
86 unsigned long r12; /* interrupted task's memory stack pointer */
87 unsigned long r13; /* thread pointer */
89 unsigned long ar_fpsr; /* floating point status (preserved) */
90 unsigned long r15; /* scratch */
92 /* The remaining registers are NOT saved for system calls. */
94 unsigned long r14; /* scratch */
95 unsigned long r2; /* scratch */
96 unsigned long r3; /* scratch */
98 #ifdef CONFIG_VTI
99 unsigned long r4; /* preserved */
100 unsigned long r5; /* preserved */
101 unsigned long r6; /* preserved */
102 unsigned long r7; /* preserved */
103 unsigned long cr_iipa; /* for emulation */
104 unsigned long cr_isr; /* for emulation */
105 unsigned long eml_unat; /* used for emulating instruction */
106 unsigned long rfi_pfs; /* used for elulating rfi */
107 #endif
109 /* The following registers are saved by SAVE_REST: */
110 unsigned long r16; /* scratch */
111 unsigned long r17; /* scratch */
112 unsigned long r18; /* scratch */
113 unsigned long r19; /* scratch */
114 unsigned long r20; /* scratch */
115 unsigned long r21; /* scratch */
116 unsigned long r22; /* scratch */
117 unsigned long r23; /* scratch */
118 unsigned long r24; /* scratch */
119 unsigned long r25; /* scratch */
120 unsigned long r26; /* scratch */
121 unsigned long r27; /* scratch */
122 unsigned long r28; /* scratch */
123 unsigned long r29; /* scratch */
124 unsigned long r30; /* scratch */
125 unsigned long r31; /* scratch */
127 unsigned long ar_ccv; /* compare/exchange value (scratch) */
129 /*
130 * Floating point registers that the kernel considers scratch:
131 */
132 struct pt_fpreg f6; /* scratch */
133 struct pt_fpreg f7; /* scratch */
134 struct pt_fpreg f8; /* scratch */
135 struct pt_fpreg f9; /* scratch */
136 struct pt_fpreg f10; /* scratch */
137 struct pt_fpreg f11; /* scratch */
138 };
140 typedef union {
141 unsigned long value;
142 struct {
143 int a_int:1;
144 int a_from_int_cr:1;
145 int a_to_int_cr:1;
146 int a_from_psr:1;
147 int a_from_cpuid:1;
148 int a_cover:1;
149 int a_bsw:1;
150 long reserved:57;
151 };
152 } vac_t;
154 typedef union {
155 unsigned long value;
156 struct {
157 int d_vmsw:1;
158 int d_extint:1;
159 int d_ibr_dbr:1;
160 int d_pmc:1;
161 int d_to_pmd:1;
162 int d_itm:1;
163 long reserved:58;
164 };
165 } vdc_t;
167 typedef struct {
168 vac_t vac;
169 vdc_t vdc;
170 unsigned long virt_env_vaddr;
171 unsigned long reserved1[29];
172 unsigned long vhpi;
173 unsigned long reserved2[95];
174 union {
175 unsigned long vgr[16];
176 unsigned long bank1_regs[16]; // bank1 regs (r16-r31) when bank0 active
177 };
178 union {
179 unsigned long vbgr[16];
180 unsigned long bank0_regs[16]; // bank0 regs (r16-r31) when bank1 active
181 };
182 unsigned long vnat;
183 unsigned long vbnat;
184 unsigned long vcpuid[5];
185 unsigned long reserved3[11];
186 unsigned long vpsr;
187 unsigned long vpr;
188 unsigned long reserved4[76];
189 union {
190 unsigned long vcr[128];
191 struct {
192 unsigned long dcr; // CR0
193 unsigned long itm;
194 unsigned long iva;
195 unsigned long rsv1[5];
196 unsigned long pta; // CR8
197 unsigned long rsv2[7];
198 unsigned long ipsr; // CR16
199 unsigned long isr;
200 unsigned long rsv3;
201 unsigned long iip;
202 unsigned long ifa;
203 unsigned long itir;
204 unsigned long iipa;
205 unsigned long ifs;
206 unsigned long iim; // CR24
207 unsigned long iha;
208 unsigned long rsv4[38];
209 unsigned long lid; // CR64
210 unsigned long ivr;
211 unsigned long tpr;
212 unsigned long eoi;
213 unsigned long irr[4];
214 unsigned long itv; // CR72
215 unsigned long pmv;
216 unsigned long cmcv;
217 unsigned long rsv5[5];
218 unsigned long lrr0; // CR80
219 unsigned long lrr1;
220 unsigned long rsv6[46];
221 };
222 };
223 union {
224 unsigned long reserved5[128];
225 struct {
226 unsigned long precover_ifs;
227 unsigned long unat; // not sure if this is needed until NaT arch is done
228 int interrupt_collection_enabled; // virtual psr.ic
229 int interrupt_delivery_enabled; // virtual psr.i
230 int pending_interruption;
231 int incomplete_regframe; // see SDM vol2 6.8
232 unsigned long delivery_mask[4];
233 int metaphysical_mode; // 1 = use metaphys mapping, 0 = use virtual
234 int banknum; // 0 or 1, which virtual register bank is active
235 unsigned long rrs[8]; // region registers
236 unsigned long krs[8]; // kernel registers
237 unsigned long pkrs[8]; // protection key registers
238 unsigned long tmp[8]; // temp registers (e.g. for hyperprivops)
239 };
240 };
241 #ifdef CONFIG_VTI
242 unsigned long reserved6[3456];
243 unsigned long vmm_avail[128];
244 unsigned long reserved7[4096];
245 #endif
246 } mapped_regs_t;
248 typedef struct {
249 mapped_regs_t *privregs;
250 int evtchn_vector;
251 } arch_vcpu_info_t;
253 typedef mapped_regs_t vpd_t;
255 #define __ARCH_HAS_VCPU_INFO
257 typedef struct {
258 int domain_controller_evtchn;
259 unsigned int flags;
260 //} arch_shared_info_t;
261 } arch_shared_info_t; // DON'T PACK
263 typedef struct vcpu_guest_context {
264 #define VGCF_FPU_VALID (1<<0)
265 #define VGCF_VMX_GUEST (1<<1)
266 #define VGCF_IN_KERNEL (1<<2)
267 unsigned long flags; /* VGCF_* flags */
268 unsigned long pt_base; /* PMT table base */
269 unsigned long pt_max_pfn; /* Max pfn including holes */
270 unsigned long share_io_pg; /* Shared page for I/O emulation */
271 unsigned long vm_assist; /* VMASST_TYPE_* bitmap, now none on IPF */
272 unsigned long guest_iip; /* Guest entry point */
274 struct pt_regs regs;
275 arch_vcpu_info_t vcpu;
276 arch_shared_info_t shared;
277 } vcpu_guest_context_t;
279 #endif /* !__ASSEMBLY__ */
281 #define XEN_HYPER_RFI 0x1
282 #define XEN_HYPER_RSM_DT 0x2
283 #define XEN_HYPER_SSM_DT 0x3
284 #define XEN_HYPER_COVER 0x4
285 #define XEN_HYPER_ITC_D 0x5
286 #define XEN_HYPER_ITC_I 0x6
287 #define XEN_HYPER_SSM_I 0x7
288 #define XEN_HYPER_GET_IVR 0x8
289 #define XEN_HYPER_GET_TPR 0x9
290 #define XEN_HYPER_SET_TPR 0xa
291 #define XEN_HYPER_EOI 0xb
292 #define XEN_HYPER_SET_ITM 0xc
293 #define XEN_HYPER_THASH 0xd
294 #define XEN_HYPER_PTC_GA 0xe
295 #define XEN_HYPER_ITR_D 0xf
296 #define XEN_HYPER_GET_RR 0x10
297 #define XEN_HYPER_SET_RR 0x11
299 #endif /* __HYPERVISOR_IF_IA64_H__ */