ia64/xen-unstable

view extras/mini-os/include/hypervisor.h @ 6756:f752e0c873a6

merge?
author cl349@firebug.cl.cam.ac.uk
date Mon Sep 12 12:32:20 2005 +0000 (2005-09-12)
parents cdfa7dd00c44 939fd35d58da
children 4d899a738d59 8ca0f98ba8e2
line source
1 /******************************************************************************
2 * hypervisor.h
3 *
4 * Hypervisor handling.
5 *
6 * TODO - x86_64 broken!
7 *
8 * Copyright (c) 2002, K A Fraser
9 * Copyright (c) 2005, Grzegorz Milos
10 */
12 #ifndef _HYPERVISOR_H_
13 #define _HYPERVISOR_H_
15 #include <types.h>
16 #include <xen/xen.h>
17 #include <xen/io/domain_controller.h>
21 /*
22 * a placeholder for the start of day information passed up from the hypervisor
23 */
24 union start_info_union
25 {
26 start_info_t start_info;
27 char padding[512];
28 };
29 extern union start_info_union start_info_union;
30 #define start_info (start_info_union.start_info)
33 /* hypervisor.c */
34 //void do_hypervisor_callback(struct pt_regs *regs);
35 void mask_evtchn(u32 port);
36 void unmask_evtchn(u32 port);
37 void clear_evtchn(u32 port);
39 /*
40 * Assembler stubs for hyper-calls.
41 */
42 #if defined(__i386__)
43 static inline int
44 HYPERVISOR_set_trap_table(
45 trap_info_t *table)
46 {
47 int ret;
48 unsigned long ignore;
50 __asm__ __volatile__ (
51 TRAP_INSTR
52 : "=a" (ret), "=b" (ignore)
53 : "0" (__HYPERVISOR_set_trap_table), "1" (table)
54 : "memory" );
56 return ret;
57 }
59 static inline int
60 HYPERVISOR_mmu_update(
61 mmu_update_t *req, int count, int *success_count, domid_t domid)
62 {
63 int ret;
64 unsigned long ign1, ign2, ign3, ign4;
66 __asm__ __volatile__ (
67 TRAP_INSTR
68 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
69 : "0" (__HYPERVISOR_mmu_update), "1" (req), "2" (count),
70 "3" (success_count), "4" (domid)
71 : "memory" );
73 return ret;
74 }
76 static inline int
77 HYPERVISOR_mmuext_op(
78 struct mmuext_op *op, int count, int *success_count, domid_t domid)
79 {
80 int ret;
81 unsigned long ign1, ign2, ign3, ign4;
83 __asm__ __volatile__ (
84 TRAP_INSTR
85 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
86 : "0" (__HYPERVISOR_mmuext_op), "1" (op), "2" (count),
87 "3" (success_count), "4" (domid)
88 : "memory" );
90 return ret;
91 }
93 static inline int
94 HYPERVISOR_set_gdt(
95 unsigned long *frame_list, int entries)
96 {
97 int ret;
98 unsigned long ign1, ign2;
100 __asm__ __volatile__ (
101 TRAP_INSTR
102 : "=a" (ret), "=b" (ign1), "=c" (ign2)
103 : "0" (__HYPERVISOR_set_gdt), "1" (frame_list), "2" (entries)
104 : "memory" );
107 return ret;
108 }
110 static inline int
111 HYPERVISOR_stack_switch(
112 unsigned long ss, unsigned long esp)
113 {
114 int ret;
115 unsigned long ign1, ign2;
117 __asm__ __volatile__ (
118 TRAP_INSTR
119 : "=a" (ret), "=b" (ign1), "=c" (ign2)
120 : "0" (__HYPERVISOR_stack_switch), "1" (ss), "2" (esp)
121 : "memory" );
123 return ret;
124 }
126 static inline int
127 HYPERVISOR_set_callbacks(
128 unsigned long event_selector, unsigned long event_address,
129 unsigned long failsafe_selector, unsigned long failsafe_address)
130 {
131 int ret;
132 unsigned long ign1, ign2, ign3, ign4;
134 __asm__ __volatile__ (
135 TRAP_INSTR
136 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
137 : "0" (__HYPERVISOR_set_callbacks), "1" (event_selector),
138 "2" (event_address), "3" (failsafe_selector), "4" (failsafe_address)
139 : "memory" );
141 return ret;
142 }
144 static inline int
145 HYPERVISOR_fpu_taskswitch(
146 int set)
147 {
148 int ret;
149 unsigned long ign;
151 __asm__ __volatile__ (
152 TRAP_INSTR
153 : "=a" (ret), "=b" (ign)
154 : "0" (__HYPERVISOR_fpu_taskswitch), "1" (set)
155 : "memory" );
157 return ret;
158 }
160 static inline int
161 HYPERVISOR_yield(
162 void)
163 {
164 int ret;
165 unsigned long ign;
167 __asm__ __volatile__ (
168 TRAP_INSTR
169 : "=a" (ret), "=b" (ign)
170 : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_yield)
171 : "memory", "ecx" );
173 return ret;
174 }
176 static inline int
177 HYPERVISOR_block(
178 void)
179 {
180 int ret;
181 unsigned long ign1;
182 __asm__ __volatile__ (
183 TRAP_INSTR
184 : "=a" (ret), "=b" (ign1)
185 : "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_block)
186 : "memory", "ecx" );
188 return ret;
189 }
191 static inline int
192 HYPERVISOR_shutdown(
193 void)
194 {
195 int ret;
196 unsigned long ign1;
197 __asm__ __volatile__ (
198 TRAP_INSTR
199 : "=a" (ret), "=b" (ign1)
200 : "0" (__HYPERVISOR_sched_op),
201 "1" (SCHEDOP_shutdown | (SHUTDOWN_poweroff << SCHEDOP_reasonshift))
202 : "memory", "ecx" );
204 return ret;
205 }
207 static inline int
208 HYPERVISOR_reboot(
209 void)
210 {
211 int ret;
212 unsigned long ign1;
213 __asm__ __volatile__ (
214 TRAP_INSTR
215 : "=a" (ret), "=b" (ign1)
216 : "0" (__HYPERVISOR_sched_op),
217 "1" (SCHEDOP_shutdown | (SHUTDOWN_reboot << SCHEDOP_reasonshift))
218 : "memory", "ecx" );
220 return ret;
221 }
223 static inline int
224 HYPERVISOR_suspend(
225 unsigned long srec)
226 {
227 int ret;
228 unsigned long ign1, ign2;
230 /* NB. On suspend, control software expects a suspend record in %esi. */
231 __asm__ __volatile__ (
232 TRAP_INSTR
233 : "=a" (ret), "=b" (ign1), "=S" (ign2)
234 : "0" (__HYPERVISOR_sched_op),
235 "b" (SCHEDOP_shutdown | (SHUTDOWN_suspend << SCHEDOP_reasonshift)),
236 "S" (srec) : "memory", "ecx");
238 return ret;
239 }
241 static inline int
242 HYPERVISOR_crash(
243 void)
244 {
245 int ret;
246 unsigned long ign1;
247 __asm__ __volatile__ (
248 TRAP_INSTR
249 : "=a" (ret), "=b" (ign1)
250 : "0" (__HYPERVISOR_sched_op),
251 "1" (SCHEDOP_shutdown | (SHUTDOWN_crash << SCHEDOP_reasonshift))
252 : "memory", "ecx" );
254 return ret;
255 }
257 static inline long
258 HYPERVISOR_set_timer_op(
259 u64 timeout)
260 {
261 int ret;
262 unsigned long timeout_hi = (unsigned long)(timeout>>32);
263 unsigned long timeout_lo = (unsigned long)timeout;
264 unsigned long ign1, ign2;
266 __asm__ __volatile__ (
267 TRAP_INSTR
268 : "=a" (ret), "=b" (ign1), "=c" (ign2)
269 : "0" (__HYPERVISOR_set_timer_op), "b" (timeout_lo), "c" (timeout_hi)
270 : "memory");
272 return ret;
273 }
275 #if 0
276 static inline int
277 HYPERVISOR_dom0_op(
278 dom0_op_t *dom0_op)
279 {
280 int ret;
281 unsigned long ign1;
283 dom0_op->interface_version = DOM0_INTERFACE_VERSION;
284 __asm__ __volatile__ (
285 TRAP_INSTR
286 : "=a" (ret), "=b" (ign1)
287 : "0" (__HYPERVISOR_dom0_op), "1" (dom0_op)
288 : "memory");
290 return ret;
291 }
292 #endif
294 static inline int
295 HYPERVISOR_set_debugreg(
296 int reg, unsigned long value)
297 {
298 int ret;
299 unsigned long ign1, ign2;
300 __asm__ __volatile__ (
301 TRAP_INSTR
302 : "=a" (ret), "=b" (ign1), "=c" (ign2)
303 : "0" (__HYPERVISOR_set_debugreg), "1" (reg), "2" (value)
304 : "memory" );
306 return ret;
307 }
309 static inline unsigned long
310 HYPERVISOR_get_debugreg(
311 int reg)
312 {
313 unsigned long ret;
314 unsigned long ign;
315 __asm__ __volatile__ (
316 TRAP_INSTR
317 : "=a" (ret), "=b" (ign)
318 : "0" (__HYPERVISOR_get_debugreg), "1" (reg)
319 : "memory" );
321 return ret;
322 }
324 static inline int
325 HYPERVISOR_update_descriptor(
326 u64 ma, u64 desc)
327 {
328 int ret;
329 unsigned long ign1, ign2, ign3, ign4;
331 __asm__ __volatile__ (
332 TRAP_INSTR
333 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
334 : "0" (__HYPERVISOR_update_descriptor),
335 "1" ((unsigned long)ma), "2" ((unsigned long)(ma>>32)),
336 "3" ((unsigned long)desc), "4" ((unsigned long)(desc>>32))
337 : "memory" );
339 return ret;
340 }
342 static inline int
343 HYPERVISOR_dom_mem_op(
344 unsigned int op, unsigned long *extent_list,
345 unsigned long nr_extents, unsigned int extent_order)
346 {
347 int ret;
348 unsigned long ign1, ign2, ign3, ign4, ign5;
350 __asm__ __volatile__ (
351 TRAP_INSTR
352 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4),
353 "=D" (ign5)
354 : "0" (__HYPERVISOR_dom_mem_op), "1" (op), "2" (extent_list),
355 "3" (nr_extents), "4" (extent_order), "5" (DOMID_SELF)
356 : "memory" );
358 return ret;
359 }
361 static inline int
362 HYPERVISOR_multicall(
363 void *call_list, int nr_calls)
364 {
365 int ret;
366 unsigned long ign1, ign2;
368 __asm__ __volatile__ (
369 TRAP_INSTR
370 : "=a" (ret), "=b" (ign1), "=c" (ign2)
371 : "0" (__HYPERVISOR_multicall), "1" (call_list), "2" (nr_calls)
372 : "memory" );
374 return ret;
375 }
377 static inline int
378 HYPERVISOR_update_va_mapping(
379 unsigned long va, pte_t new_val, unsigned long flags)
380 {
381 int ret;
382 unsigned long ign1, ign2, ign3, ign4;
384 __asm__ __volatile__ (
385 TRAP_INSTR
386 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
387 : "0" (__HYPERVISOR_update_va_mapping),
388 "1" (va), "2" ((new_val).pte_low),
389 #ifdef CONFIG_X86_PAE
390 "3" ((new_val).pte_high),
391 #else
392 "3" (0),
393 #endif
394 "4" (flags)
395 : "memory" );
397 return ret;
398 }
400 static inline int
401 HYPERVISOR_event_channel_op(
402 void *op)
403 {
404 int ret;
405 unsigned long ignore;
406 __asm__ __volatile__ (
407 TRAP_INSTR
408 : "=a" (ret), "=b" (ignore)
409 : "0" (__HYPERVISOR_event_channel_op), "1" (op)
410 : "memory" );
412 return ret;
413 }
415 static inline int
416 HYPERVISOR_xen_version(
417 int cmd, void *arg)
418 {
419 int ret;
420 unsigned long ignore, ign2;
422 __asm__ __volatile__ (
423 TRAP_INSTR
424 : "=a" (ret), "=b" (ignore), "=c" (ign2)
425 : "0" (__HYPERVISOR_xen_version), "1" (cmd), "2" (arg)
426 : "memory" );
428 return ret;
429 }
431 static inline int
432 HYPERVISOR_console_io(
433 int cmd, int count, char *str)
434 {
435 int ret;
436 unsigned long ign1, ign2, ign3;
437 __asm__ __volatile__ (
438 TRAP_INSTR
439 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
440 : "0" (__HYPERVISOR_console_io), "1" (cmd), "2" (count), "3" (str)
441 : "memory" );
443 return ret;
444 }
446 static inline int
447 HYPERVISOR_physdev_op(
448 void *physdev_op)
449 {
450 int ret;
451 unsigned long ign;
453 __asm__ __volatile__ (
454 TRAP_INSTR
455 : "=a" (ret), "=b" (ign)
456 : "0" (__HYPERVISOR_physdev_op), "1" (physdev_op)
457 : "memory" );
459 return ret;
460 }
462 static inline int
463 HYPERVISOR_grant_table_op(
464 unsigned int cmd, void *uop, unsigned int count)
465 {
466 int ret;
467 unsigned long ign1, ign2, ign3;
469 __asm__ __volatile__ (
470 TRAP_INSTR
471 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
472 : "0" (__HYPERVISOR_grant_table_op), "1" (cmd), "2" (uop), "3" (count)
473 : "memory" );
475 return ret;
476 }
478 static inline int
479 HYPERVISOR_update_va_mapping_otherdomain(
480 unsigned long va, pte_t new_val, unsigned long flags, domid_t domid)
481 {
482 int ret;
483 unsigned long ign1, ign2, ign3, ign4, ign5;
485 __asm__ __volatile__ (
486 TRAP_INSTR
487 : "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3),
488 "=S" (ign4), "=D" (ign5)
489 : "0" (__HYPERVISOR_update_va_mapping_otherdomain),
490 "1" (va), "2" ((new_val).pte_low),
491 #ifdef CONFIG_X86_PAE
492 "3" ((new_val).pte_high),
493 #else
494 "3" (0),
495 #endif
496 "4" (flags), "5" (domid) :
497 "memory" );
499 return ret;
500 }
502 static inline int
503 HYPERVISOR_vm_assist(
504 unsigned int cmd, unsigned int type)
505 {
506 int ret;
507 unsigned long ign1, ign2;
509 __asm__ __volatile__ (
510 TRAP_INSTR
511 : "=a" (ret), "=b" (ign1), "=c" (ign2)
512 : "0" (__HYPERVISOR_vm_assist), "1" (cmd), "2" (type)
513 : "memory" );
515 return ret;
516 }
518 static inline int
519 HYPERVISOR_boot_vcpu(
520 unsigned long vcpu, vcpu_guest_context_t *ctxt)
521 {
522 int ret;
523 unsigned long ign1, ign2;
525 __asm__ __volatile__ (
526 TRAP_INSTR
527 : "=a" (ret), "=b" (ign1), "=c" (ign2)
528 : "0" (__HYPERVISOR_boot_vcpu), "1" (vcpu), "2" (ctxt)
529 : "memory");
531 return ret;
532 }
534 static inline int
535 HYPERVISOR_vcpu_down(
536 int vcpu)
537 {
538 int ret;
539 unsigned long ign1;
540 /* Yes, I really do want to clobber edx here: when we resume a
541 vcpu after unpickling a multi-processor domain, it returns
542 here, but clobbers all of the call clobbered registers. */
543 __asm__ __volatile__ (
544 TRAP_INSTR
545 : "=a" (ret), "=b" (ign1)
546 : "0" (__HYPERVISOR_sched_op),
547 "1" (SCHEDOP_vcpu_down | (vcpu << SCHEDOP_vcpushift))
548 : "memory", "ecx", "edx" );
550 return ret;
551 }
553 static inline int
554 HYPERVISOR_vcpu_up(
555 int vcpu)
556 {
557 int ret;
558 unsigned long ign1;
559 __asm__ __volatile__ (
560 TRAP_INSTR
561 : "=a" (ret), "=b" (ign1)
562 : "0" (__HYPERVISOR_sched_op),
563 "1" (SCHEDOP_vcpu_up | (vcpu << SCHEDOP_vcpushift))
564 : "memory", "ecx" );
566 return ret;
567 }
569 static inline int
570 HYPERVISOR_vcpu_pickle(
571 int vcpu, vcpu_guest_context_t *ctxt)
572 {
573 int ret;
574 unsigned long ign1, ign2;
575 __asm__ __volatile__ (
576 TRAP_INSTR
577 : "=a" (ret), "=b" (ign1), "=c" (ign2)
578 : "0" (__HYPERVISOR_sched_op),
579 "1" (SCHEDOP_vcpu_pickle | (vcpu << SCHEDOP_vcpushift)),
580 "2" (ctxt)
581 : "memory" );
583 return ret;
584 }
585 #elif defined(__x86_64__)
587 #define __syscall_clobber "r11","rcx","memory"
589 /*
590 * Assembler stubs for hyper-calls.
591 */
592 static inline int
593 HYPERVISOR_set_trap_table(
594 trap_info_t *table)
595 {
596 int ret;
598 __asm__ __volatile__ (
599 TRAP_INSTR
600 : "=a" (ret)
601 : "0" ((unsigned long)__HYPERVISOR_set_trap_table), "D" (table)
602 : __syscall_clobber );
604 return ret;
605 }
607 static inline int
608 HYPERVISOR_mmu_update(
609 mmu_update_t *req, int count, int *success_count, domid_t domid)
610 {
611 int ret;
613 __asm__ __volatile__ (
614 "movq %5, %%r10;" TRAP_INSTR
615 : "=a" (ret)
616 : "0" ((unsigned long)__HYPERVISOR_mmu_update), "D" (req), "S" ((long)count),
617 "d" (success_count), "g" ((unsigned long)domid)
618 : __syscall_clobber, "r10" );
620 return ret;
621 }
623 static inline int
624 HYPERVISOR_mmuext_op(
625 struct mmuext_op *op, int count, int *success_count, domid_t domid)
626 {
627 int ret;
629 __asm__ __volatile__ (
630 "movq %5, %%r10;" TRAP_INSTR
631 : "=a" (ret)
632 : "0" (__HYPERVISOR_mmuext_op), "D" (op), "S" ((long)count),
633 "d" (success_count), "g" ((unsigned long)domid)
634 : __syscall_clobber, "r10" );
636 return ret;
637 }
639 static inline int
640 HYPERVISOR_set_gdt(
641 unsigned long *frame_list, int entries)
642 {
643 int ret;
645 __asm__ __volatile__ (
646 TRAP_INSTR
647 : "=a" (ret)
648 : "0" ((unsigned long)__HYPERVISOR_set_gdt), "D" (frame_list), "S" ((long)entries)
649 : __syscall_clobber );
652 return ret;
653 }
654 static inline int
655 HYPERVISOR_stack_switch(
656 unsigned long ss, unsigned long esp)
657 {
658 int ret;
660 __asm__ __volatile__ (
661 TRAP_INSTR
662 : "=a" (ret)
663 : "0" ((unsigned long)__HYPERVISOR_stack_switch), "D" (ss), "S" (esp)
664 : __syscall_clobber );
666 return ret;
667 }
669 static inline int
670 HYPERVISOR_set_callbacks(
671 unsigned long event_address, unsigned long failsafe_address,
672 unsigned long syscall_address)
673 {
674 int ret;
676 __asm__ __volatile__ (
677 TRAP_INSTR
678 : "=a" (ret)
679 : "0" ((unsigned long)__HYPERVISOR_set_callbacks), "D" (event_address),
680 "S" (failsafe_address), "d" (syscall_address)
681 : __syscall_clobber );
683 return ret;
684 }
686 static inline int
687 HYPERVISOR_fpu_taskswitch(
688 int set)
689 {
690 int ret;
691 __asm__ __volatile__ (
692 TRAP_INSTR
693 : "=a" (ret) : "0" ((unsigned long)__HYPERVISOR_fpu_taskswitch),
694 "D" ((unsigned long) set) : __syscall_clobber );
696 return ret;
697 }
699 static inline int
700 HYPERVISOR_yield(
701 void)
702 {
703 int ret;
705 __asm__ __volatile__ (
706 TRAP_INSTR
707 : "=a" (ret)
708 : "0" ((unsigned long)__HYPERVISOR_sched_op), "D" ((unsigned long)SCHEDOP_yield)
709 : __syscall_clobber );
711 return ret;
712 }
714 static inline int
715 HYPERVISOR_block(
716 void)
717 {
718 int ret;
719 __asm__ __volatile__ (
720 TRAP_INSTR
721 : "=a" (ret)
722 : "0" ((unsigned long)__HYPERVISOR_sched_op), "D" ((unsigned long)SCHEDOP_block)
723 : __syscall_clobber );
725 return ret;
726 }
728 static inline int
729 HYPERVISOR_shutdown(
730 void)
731 {
732 int ret;
733 __asm__ __volatile__ (
734 TRAP_INSTR
735 : "=a" (ret)
736 : "0" ((unsigned long)__HYPERVISOR_sched_op),
737 "D" ((unsigned long)(SCHEDOP_shutdown | (SHUTDOWN_poweroff << SCHEDOP_reasonshift)))
738 : __syscall_clobber );
740 return ret;
741 }
743 static inline int
744 HYPERVISOR_reboot(
745 void)
746 {
747 int ret;
749 __asm__ __volatile__ (
750 TRAP_INSTR
751 : "=a" (ret)
752 : "0" ((unsigned long)__HYPERVISOR_sched_op),
753 "D" ((unsigned long)(SCHEDOP_shutdown | (SHUTDOWN_reboot << SCHEDOP_reasonshift)))
754 : __syscall_clobber );
756 return ret;
757 }
759 static inline int
760 HYPERVISOR_suspend(
761 unsigned long srec)
762 {
763 int ret;
765 /* NB. On suspend, control software expects a suspend record in %esi. */
766 __asm__ __volatile__ (
767 TRAP_INSTR
768 : "=a" (ret)
769 : "0" ((unsigned long)__HYPERVISOR_sched_op),
770 "D" ((unsigned long)(SCHEDOP_shutdown | (SHUTDOWN_suspend << SCHEDOP_reasonshift))),
771 "S" (srec)
772 : __syscall_clobber );
774 return ret;
775 }
777 /*
778 * We can have the timeout value in a single argument for the hypercall, but
779 * that will break the common code.
780 */
781 static inline long
782 HYPERVISOR_set_timer_op(
783 u64 timeout)
784 {
785 int ret;
787 __asm__ __volatile__ (
788 TRAP_INSTR
789 : "=a" (ret)
790 : "0" ((unsigned long)__HYPERVISOR_set_timer_op),
791 "D" (timeout)
792 : __syscall_clobber );
794 return ret;
795 }
796 #endif
799 static __inline__ int HYPERVISOR_dom0_op(void *dom0_op)
800 {
801 int ret;
802 __asm__ __volatile__ (
803 TRAP_INSTR
804 : "=a" (ret) : "0" (__HYPERVISOR_dom0_op),
805 _a1 (dom0_op) : "memory" );
807 return ret;
808 }
810 static __inline__ int HYPERVISOR_set_debugreg(int reg, unsigned long value)
811 {
812 int ret;
813 __asm__ __volatile__ (
814 TRAP_INSTR
815 : "=a" (ret) : "0" (__HYPERVISOR_set_debugreg),
816 _a1 (reg), _a2 (value) : "memory" );
818 return ret;
819 }
821 static __inline__ unsigned long HYPERVISOR_get_debugreg(int reg)
822 {
823 unsigned long ret;
824 __asm__ __volatile__ (
825 TRAP_INSTR
826 : "=a" (ret) : "0" (__HYPERVISOR_get_debugreg),
827 _a1 (reg) : "memory" );
829 return ret;
830 }
832 static __inline__ int HYPERVISOR_update_descriptor(
833 unsigned long pa, unsigned long word1, unsigned long word2)
834 {
835 int ret;
836 __asm__ __volatile__ (
837 TRAP_INSTR
838 : "=a" (ret) : "0" (__HYPERVISOR_update_descriptor),
839 _a1 (pa), _a2 (word1), _a3 (word2) : "memory" );
841 return ret;
842 }
844 static __inline__ int HYPERVISOR_dom_mem_op(void *dom_mem_op)
845 {
846 int ret;
847 __asm__ __volatile__ (
848 TRAP_INSTR
849 : "=a" (ret) : "0" (__HYPERVISOR_memory_op),
850 _a1 (dom_mem_op) : "memory" );
852 return ret;
853 }
855 static __inline__ int HYPERVISOR_multicall(void *call_list, int nr_calls)
856 {
857 int ret;
858 __asm__ __volatile__ (
859 TRAP_INSTR
860 : "=a" (ret) : "0" (__HYPERVISOR_multicall),
861 _a1 (call_list), _a2 (nr_calls) : "memory" );
863 return ret;
864 }
866 static __inline__ int HYPERVISOR_update_va_mapping(
867 unsigned long page_nr, unsigned long new_val, unsigned long flags)
868 {
869 int ret;
870 __asm__ __volatile__ (
871 TRAP_INSTR
872 : "=a" (ret) : "0" (__HYPERVISOR_update_va_mapping),
873 _a1 (page_nr), _a2 (new_val), _a3 (flags) : "memory" );
875 return ret;
876 }
878 static __inline__ int HYPERVISOR_xen_version(int cmd)
879 {
880 int ret;
881 __asm__ __volatile__ (
882 TRAP_INSTR
883 : "=a" (ret) : "0" (__HYPERVISOR_xen_version),
884 _a1 (cmd) : "memory" );
886 return ret;
887 }
889 static __inline__ int HYPERVISOR_console_io(int cmd, int count, char *str)
890 {
891 int ret;
892 __asm__ __volatile__ (
893 TRAP_INSTR
894 : "=a" (ret) : "0" (__HYPERVISOR_console_io),
895 _a1 (cmd), _a2 (count), _a3 (str) : "memory" );
897 return ret;
898 }
900 #endif /* __HYPERVISOR_H__ */