ia64/xen-unstable

view xen/arch/ia64/linux-xen/entry.S @ 18366:efee1e0f2e08

[IA64] update the comment in ia64_switch_to.

update the comment in ia64_switch_to.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Mon Aug 25 19:04:37 2008 +0900 (2008-08-25)
parents b844f87db11d
children 903a901ab372
line source
1 /*
2 * ia64/kernel/entry.S
3 *
4 * Kernel entry points.
5 *
6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999, 2002-2003
9 * Asit Mallick <Asit.K.Mallick@intel.com>
10 * Don Dugger <Don.Dugger@intel.com>
11 * Suresh Siddha <suresh.b.siddha@intel.com>
12 * Fenghua Yu <fenghua.yu@intel.com>
13 * Copyright (C) 1999 VA Linux Systems
14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
15 */
16 /*
17 * ia64_switch_to now places correct virtual mapping in in TR2 for
18 * kernel stack. This allows us to handle interrupts without changing
19 * to physical mode.
20 *
21 * Jonathan Nicklin <nicklin@missioncriticallinux.com>
22 * Patrick O'Rourke <orourke@missioncriticallinux.com>
23 * 11/07/2000
24 */
25 /*
26 * Global (preserved) predicate usage on syscall entry/exit path:
27 *
28 * pKStk: See entry.h.
29 * pUStk: See entry.h.
30 * pSys: See entry.h.
31 * pNonSys: !pSys
32 */
34 #include <linux/config.h>
36 #include <asm/asmmacro.h>
37 #include <asm/cache.h>
38 #ifdef XEN
39 #include <xen/errno.h>
40 #else
41 #include <asm/errno.h>
42 #endif
43 #include <asm/kregs.h>
44 #include <asm/offsets.h>
45 #include <asm/pgtable.h>
46 #include <asm/percpu.h>
47 #include <asm/processor.h>
48 #include <asm/thread_info.h>
49 #include <asm/unistd.h>
51 #include "minstate.h"
53 #ifndef XEN
54 /*
55 * execve() is special because in case of success, we need to
56 * setup a null register window frame.
57 */
58 ENTRY(ia64_execve)
59 /*
60 * Allocate 8 input registers since ptrace() may clobber them
61 */
62 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
63 alloc loc1=ar.pfs,8,2,4,0
64 mov loc0=rp
65 .body
66 mov out0=in0 // filename
67 ;; // stop bit between alloc and call
68 mov out1=in1 // argv
69 mov out2=in2 // envp
70 add out3=16,sp // regs
71 br.call.sptk.many rp=sys_execve
72 .ret0:
73 #ifdef CONFIG_IA32_SUPPORT
74 /*
75 * Check if we're returning to ia32 mode. If so, we need to restore ia32 registers
76 * from pt_regs.
77 */
78 adds r16=PT(CR_IPSR)+16,sp
79 ;;
80 ld8 r16=[r16]
81 #endif
82 cmp4.ge p6,p7=r8,r0
83 mov ar.pfs=loc1 // restore ar.pfs
84 sxt4 r8=r8 // return 64-bit result
85 ;;
86 stf.spill [sp]=f0
87 (p6) cmp.ne pKStk,pUStk=r0,r0 // a successful execve() lands us in user-mode...
88 mov rp=loc0
89 (p6) mov ar.pfs=r0 // clear ar.pfs on success
90 (p7) br.ret.sptk.many rp
92 /*
93 * In theory, we'd have to zap this state only to prevent leaking of
94 * security sensitive state (e.g., if current->mm->dumpable is zero). However,
95 * this executes in less than 20 cycles even on Itanium, so it's not worth
96 * optimizing for...).
97 */
98 mov ar.unat=0; mov ar.lc=0
99 mov r4=0; mov f2=f0; mov b1=r0
100 mov r5=0; mov f3=f0; mov b2=r0
101 mov r6=0; mov f4=f0; mov b3=r0
102 mov r7=0; mov f5=f0; mov b4=r0
103 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
104 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
105 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
106 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
107 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
108 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
109 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
110 #ifdef CONFIG_IA32_SUPPORT
111 tbit.nz p6,p0=r16, IA64_PSR_IS_BIT
112 movl loc0=ia64_ret_from_ia32_execve
113 ;;
114 (p6) mov rp=loc0
115 #endif
116 br.ret.sptk.many rp
117 END(ia64_execve)
119 /*
120 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
121 * u64 tls)
122 */
123 GLOBAL_ENTRY(sys_clone2)
124 /*
125 * Allocate 8 input registers since ptrace() may clobber them
126 */
127 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
128 alloc r16=ar.pfs,8,2,6,0
129 DO_SAVE_SWITCH_STACK
130 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
131 mov loc0=rp
132 mov loc1=r16 // save ar.pfs across do_fork
133 .body
134 mov out1=in1
135 mov out3=in2
136 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
137 mov out4=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
138 ;;
139 (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
140 mov out5=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
141 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
142 mov out0=in0 // out0 = clone_flags
143 br.call.sptk.many rp=do_fork
144 .ret1: .restore sp
145 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
146 mov ar.pfs=loc1
147 mov rp=loc0
148 br.ret.sptk.many rp
149 END(sys_clone2)
151 /*
152 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
153 * Deprecated. Use sys_clone2() instead.
154 */
155 GLOBAL_ENTRY(sys_clone)
156 /*
157 * Allocate 8 input registers since ptrace() may clobber them
158 */
159 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
160 alloc r16=ar.pfs,8,2,6,0
161 DO_SAVE_SWITCH_STACK
162 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
163 mov loc0=rp
164 mov loc1=r16 // save ar.pfs across do_fork
165 .body
166 mov out1=in1
167 mov out3=16 // stacksize (compensates for 16-byte scratch area)
168 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
169 mov out4=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
170 ;;
171 (p6) st8 [r2]=in4 // store TLS in r13 (tp)
172 mov out5=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
173 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
174 mov out0=in0 // out0 = clone_flags
175 br.call.sptk.many rp=do_fork
176 .ret2: .restore sp
177 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
178 mov ar.pfs=loc1
179 mov rp=loc0
180 br.ret.sptk.many rp
181 END(sys_clone)
182 #endif
184 /*
185 * prev_task <- ia64_switch_to(struct task_struct *next)
186 * With Ingo's new scheduler, interrupts are disabled when this routine gets
187 * called. The code starting at .map relies on this. The rest of the code
188 * doesn't care about the interrupt masking status.
189 */
190 GLOBAL_ENTRY(ia64_switch_to)
191 .prologue
192 alloc r16=ar.pfs,1,0,0,0
193 DO_SAVE_SWITCH_STACK
194 .body
196 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
197 #ifdef XEN
198 movl r24=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
199 ld8 r27=[r24]
200 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
201 dep r20=0,in0,60,4 // physical address of "next"
202 #else
203 movl r25=init_task
204 mov r27=IA64_KR(CURRENT_STACK)
205 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
206 dep r20=0,in0,61,3 // physical address of "next"
207 #endif
208 ;;
209 st8 [r22]=sp // save kernel stack pointer of old task
210 shr.u r26=r20,IA64_GRANULE_SHIFT
211 #ifdef XEN
212 ;;
213 /*
214 * If we've already mapped this task's page, we can skip doing it again.
215 */
216 cmp.eq p7,p6=r26,r27
217 (p6) br.cond.dpnt .map
218 #else
219 cmp.eq p7,p6=r25,in0
220 ;;
221 /*
222 * If we've already mapped this task's page, we can skip doing it again.
223 */
224 (p6) cmp.eq p7,p6=r26,r27
225 (p6) br.cond.dpnt .map
226 #endif
227 ;;
228 .done:
229 (p6) ssm psr.ic // if we had to map, reenable the psr.ic bit FIRST!!!
230 ;;
231 (p6) srlz.d
232 ld8 sp=[r21] // load kernel stack pointer of new task
233 #ifdef XEN
234 add r25=IA64_KR_CURRENT_OFFSET-IA64_KR_CURRENT_STACK_OFFSET,r24
235 ;;
236 st8 [r25]=in0 // update "current" application register
237 ;;
238 bsw.0
239 ;;
240 mov r8=r13 // return pointer to previously running task
241 mov r13=in0 // set "current" pointer
242 mov r21=in0
243 ;;
244 bsw.1
245 ;;
246 #else
247 mov IA64_KR(CURRENT)=in0 // update "current" application register
248 mov r8=r13 // return pointer to previously running task
249 mov r13=in0 // set "current" pointer
250 #endif
251 DO_LOAD_SWITCH_STACK
253 #ifdef CONFIG_SMP
254 sync.i // ensure "fc"s done by this CPU are visible on other CPUs
255 #endif
256 br.ret.sptk.many rp // boogie on out in new context
258 .map:
259 rsm psr.ic // interrupts (psr.i) are already disabled here
260 movl r25=PAGE_KERNEL
261 #ifdef XEN
262 movl r27=IA64_GRANULE_SHIFT << 2
263 #endif
264 ;;
265 srlz.d
266 or r23=r25,r20 // construct PA | page properties
267 #ifdef XEN
268 ptr.d in0,r27 // to purge dtr[IA64_TR_VHPT] and dtr[IA64_TR_VPD]
269 #else
270 movl r27=IA64_GRANULE_SHIFT << 2
271 #endif
272 ;;
273 mov cr.itir=r27
274 mov cr.ifa=in0 // VA of next task...
275 #ifdef XEN
276 srlz.d
277 #endif
278 ;;
279 mov r25=IA64_TR_CURRENT_STACK
280 #ifdef XEN
281 st8 [r24]=r26 // remember last page we mapped...
282 #else
283 mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped...
284 #endif
285 ;;
286 itr.d dtr[r25]=r23 // wire in new mapping...
287 br.cond.sptk .done
288 END(ia64_switch_to)
290 /*
291 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
292 * means that we may get an interrupt with "sp" pointing to the new kernel stack while
293 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
294 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
295 * problem. Also, we don't need to specify unwind information for preserved registers
296 * that are not modified in save_switch_stack as the right unwind information is already
297 * specified at the call-site of save_switch_stack.
298 */
300 /*
301 * save_switch_stack:
302 * - r16 holds ar.pfs
303 * - b7 holds address to return to
304 * - rp (b0) holds return address to save
305 */
306 GLOBAL_ENTRY(save_switch_stack)
307 .prologue
308 .altrp b7
309 flushrs // flush dirty regs to backing store (must be first in insn group)
310 .save @priunat,r17
311 mov r17=ar.unat // preserve caller's
312 .body
313 #ifdef CONFIG_ITANIUM
314 adds r2=16+128,sp
315 adds r3=16+64,sp
316 adds r14=SW(R4)+16,sp
317 ;;
318 st8.spill [r14]=r4,16 // spill r4
319 lfetch.fault.excl.nt1 [r3],128
320 ;;
321 lfetch.fault.excl.nt1 [r2],128
322 lfetch.fault.excl.nt1 [r3],128
323 ;;
324 lfetch.fault.excl [r2]
325 lfetch.fault.excl [r3]
326 adds r15=SW(R5)+16,sp
327 #else
328 add r2=16+3*128,sp
329 add r3=16,sp
330 add r14=SW(R4)+16,sp
331 ;;
332 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
333 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
334 ;;
335 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
336 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
337 ;;
338 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
339 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
340 adds r15=SW(R5)+16,sp
341 #endif
342 ;;
343 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
344 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
345 add r2=SW(F2)+16,sp // r2 = &sw->f2
346 ;;
347 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
348 mov.m r18=ar.fpsr // preserve fpsr
349 add r3=SW(F3)+16,sp // r3 = &sw->f3
350 ;;
351 stf.spill [r2]=f2,32
352 mov.m r19=ar.rnat
353 mov r21=b0
355 stf.spill [r3]=f3,32
356 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
357 mov r22=b1
358 ;;
359 // since we're done with the spills, read and save ar.unat:
360 mov.m r29=ar.unat
361 mov.m r20=ar.bspstore
362 mov r23=b2
363 stf.spill [r2]=f4,32
364 stf.spill [r3]=f5,32
365 mov r24=b3
366 ;;
367 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
368 st8 [r15]=r23,SW(B3)-SW(B2) // save b2
369 mov r25=b4
370 mov r26=b5
371 ;;
372 st8 [r14]=r22,SW(B4)-SW(B1) // save b1
373 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
374 mov r21=ar.lc // I-unit
375 stf.spill [r2]=f12,32
376 stf.spill [r3]=f13,32
377 ;;
378 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
379 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
380 stf.spill [r2]=f14,32
381 stf.spill [r3]=f15,32
382 ;;
383 st8 [r14]=r26 // save b5
384 st8 [r15]=r21 // save ar.lc
385 stf.spill [r2]=f16,32
386 stf.spill [r3]=f17,32
387 ;;
388 stf.spill [r2]=f18,32
389 stf.spill [r3]=f19,32
390 ;;
391 stf.spill [r2]=f20,32
392 stf.spill [r3]=f21,32
393 ;;
394 stf.spill [r2]=f22,32
395 stf.spill [r3]=f23,32
396 ;;
397 stf.spill [r2]=f24,32
398 stf.spill [r3]=f25,32
399 ;;
400 stf.spill [r2]=f26,32
401 stf.spill [r3]=f27,32
402 ;;
403 stf.spill [r2]=f28,32
404 stf.spill [r3]=f29,32
405 ;;
406 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
407 stf.spill [r3]=f31,SW(PR)-SW(F31)
408 add r14=SW(CALLER_UNAT)+16,sp
409 ;;
410 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
411 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
412 mov r21=pr
413 ;;
414 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
415 st8 [r3]=r21 // save predicate registers
416 ;;
417 st8 [r2]=r20 // save ar.bspstore
418 st8 [r14]=r18 // save fpsr
419 mov ar.rsc=3 // put RSE back into eager mode, pl 0
420 br.cond.sptk.many b7
421 END(save_switch_stack)
423 /*
424 * load_switch_stack:
425 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
426 * - b7 holds address to return to
427 * - must not touch r8-r11
428 */
429 #ifdef XEN
430 GLOBAL_ENTRY(load_switch_stack)
431 #else
432 ENTRY(load_switch_stack)
433 #endif
434 .prologue
435 .altrp b7
437 .body
438 lfetch.fault.nt1 [sp]
439 adds r2=SW(AR_BSPSTORE)+16,sp
440 adds r3=SW(AR_UNAT)+16,sp
441 mov ar.rsc=0 // put RSE into enforced lazy mode
442 adds r14=SW(CALLER_UNAT)+16,sp
443 adds r15=SW(AR_FPSR)+16,sp
444 ;;
445 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
446 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
447 ;;
448 ld8 r21=[r2],16 // restore b0
449 ld8 r22=[r3],16 // restore b1
450 ;;
451 ld8 r23=[r2],16 // restore b2
452 ld8 r24=[r3],16 // restore b3
453 ;;
454 ld8 r25=[r2],16 // restore b4
455 ld8 r26=[r3],16 // restore b5
456 ;;
457 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
458 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
459 ;;
460 ld8 r28=[r2] // restore pr
461 ld8 r30=[r3] // restore rnat
462 ;;
463 ld8 r18=[r14],16 // restore caller's unat
464 ld8 r19=[r15],24 // restore fpsr
465 ;;
466 ldf.fill f2=[r14],32
467 ldf.fill f3=[r15],32
468 ;;
469 ldf.fill f4=[r14],32
470 ldf.fill f5=[r15],32
471 ;;
472 ldf.fill f12=[r14],32
473 ldf.fill f13=[r15],32
474 ;;
475 ldf.fill f14=[r14],32
476 ldf.fill f15=[r15],32
477 ;;
478 ldf.fill f16=[r14],32
479 ldf.fill f17=[r15],32
480 ;;
481 ldf.fill f18=[r14],32
482 ldf.fill f19=[r15],32
483 mov b0=r21
484 ;;
485 ldf.fill f20=[r14],32
486 ldf.fill f21=[r15],32
487 mov b1=r22
488 ;;
489 ldf.fill f22=[r14],32
490 ldf.fill f23=[r15],32
491 mov b2=r23
492 ;;
493 mov ar.bspstore=r27
494 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
495 mov b3=r24
496 ;;
497 ldf.fill f24=[r14],32
498 ldf.fill f25=[r15],32
499 mov b4=r25
500 ;;
501 ldf.fill f26=[r14],32
502 ldf.fill f27=[r15],32
503 mov b5=r26
504 ;;
505 ldf.fill f28=[r14],32
506 ldf.fill f29=[r15],32
507 mov ar.pfs=r16
508 ;;
509 ldf.fill f30=[r14],32
510 ldf.fill f31=[r15],24
511 mov ar.lc=r17
512 ;;
513 ld8.fill r4=[r14],16
514 ld8.fill r5=[r15],16
515 mov pr=r28,-1
516 ;;
517 ld8.fill r6=[r14],16
518 ld8.fill r7=[r15],16
520 mov ar.unat=r18 // restore caller's unat
521 mov ar.rnat=r30 // must restore after bspstore but before rsc!
522 mov ar.fpsr=r19 // restore fpsr
523 mov ar.rsc=3 // put RSE back into eager mode, pl 0
524 br.cond.sptk.many b7
525 END(load_switch_stack)
527 #ifndef XEN
528 GLOBAL_ENTRY(execve)
529 mov r15=__NR_execve // put syscall number in place
530 break __BREAK_SYSCALL
531 br.ret.sptk.many rp
532 END(execve)
534 GLOBAL_ENTRY(clone)
535 mov r15=__NR_clone // put syscall number in place
536 break __BREAK_SYSCALL
537 br.ret.sptk.many rp
538 END(clone)
540 /*
541 * Invoke a system call, but do some tracing before and after the call.
542 * We MUST preserve the current register frame throughout this routine
543 * because some system calls (such as ia64_execve) directly
544 * manipulate ar.pfs.
545 */
546 GLOBAL_ENTRY(ia64_trace_syscall)
547 PT_REGS_UNWIND_INFO(0)
548 /*
549 * We need to preserve the scratch registers f6-f11 in case the system
550 * call is sigreturn.
551 */
552 adds r16=PT(F6)+16,sp
553 adds r17=PT(F7)+16,sp
554 ;;
555 stf.spill [r16]=f6,32
556 stf.spill [r17]=f7,32
557 ;;
558 stf.spill [r16]=f8,32
559 stf.spill [r17]=f9,32
560 ;;
561 stf.spill [r16]=f10
562 stf.spill [r17]=f11
563 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
564 adds r16=PT(F6)+16,sp
565 adds r17=PT(F7)+16,sp
566 ;;
567 ldf.fill f6=[r16],32
568 ldf.fill f7=[r17],32
569 ;;
570 ldf.fill f8=[r16],32
571 ldf.fill f9=[r17],32
572 ;;
573 ldf.fill f10=[r16]
574 ldf.fill f11=[r17]
575 // the syscall number may have changed, so re-load it and re-calculate the
576 // syscall entry-point:
577 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
578 ;;
579 ld8 r15=[r15]
580 mov r3=NR_syscalls - 1
581 ;;
582 adds r15=-1024,r15
583 movl r16=sys_call_table
584 ;;
585 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
586 cmp.leu p6,p7=r15,r3
587 ;;
588 (p6) ld8 r20=[r20] // load address of syscall entry point
589 (p7) movl r20=sys_ni_syscall
590 ;;
591 mov b6=r20
592 br.call.sptk.many rp=b6 // do the syscall
593 .strace_check_retval:
594 cmp.lt p6,p0=r8,r0 // syscall failed?
595 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
596 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
597 mov r10=0
598 (p6) br.cond.sptk strace_error // syscall failed ->
599 ;; // avoid RAW on r10
600 .strace_save_retval:
601 .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
602 .mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
603 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
604 .ret3: br.cond.sptk .work_pending_syscall_end
606 strace_error:
607 ld8 r3=[r2] // load pt_regs.r8
608 sub r9=0,r8 // negate return value to get errno value
609 ;;
610 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
611 adds r3=16,r2 // r3=&pt_regs.r10
612 ;;
613 (p6) mov r10=-1
614 (p6) mov r8=r9
615 br.cond.sptk .strace_save_retval
616 END(ia64_trace_syscall)
618 /*
619 * When traced and returning from sigreturn, we invoke syscall_trace but then
620 * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
621 */
622 GLOBAL_ENTRY(ia64_strace_leave_kernel)
623 PT_REGS_UNWIND_INFO(0)
624 { /*
625 * Some versions of gas generate bad unwind info if the first instruction of a
626 * procedure doesn't go into the first slot of a bundle. This is a workaround.
627 */
628 nop.m 0
629 nop.i 0
630 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
631 }
632 .ret4: br.cond.sptk ia64_leave_kernel
633 END(ia64_strace_leave_kernel)
634 #endif
636 GLOBAL_ENTRY(ia64_ret_from_clone)
637 PT_REGS_UNWIND_INFO(0)
638 { /*
639 * Some versions of gas generate bad unwind info if the first instruction of a
640 * procedure doesn't go into the first slot of a bundle. This is a workaround.
641 */
642 nop.m 0
643 nop.i 0
644 /*
645 * We need to call schedule_tail() to complete the scheduling process.
646 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
647 * address of the previously executing task.
648 */
649 br.call.sptk.many rp=ia64_invoke_schedule_tail
650 }
651 #ifdef XEN
652 // new domains are cloned but not exec'ed so switch to user mode here
653 cmp.ne pKStk,pUStk=r0,r0
654 adds r16 = IA64_VCPU_FLAGS_OFFSET, r13
655 ;;
656 ld8 r16 = [r16] // arch.arch_vmx.flags
657 ;;
658 cmp.eq p6,p0 = r16, r0
659 (p6) br.cond.spnt ia64_leave_kernel // !VMX_DOMAIN
660 ;;
661 adds r16 = PT(CR_IFS)+16, r12
662 ;;
663 ld8 r16 = [r16]
664 cmp.eq pNonSys,pSys=r0,r0 // pSys=0,pNonSys=1
665 ;;
666 cmp.eq p6,p7 = 0x6, r16
667 (p7) br.cond.sptk ia64_leave_hypervisor // VMX_DOMAIN
668 ;;
669 /*
670 * cr.ifs.v==0 && cr.ifm(ar.pfm)==6 means that HYPERVISOR_suspend
671 * has been called. (i.e. HVM with PV driver is restored here)
672 * We need to allocate a dummy RSE stack frame to resume.
673 */
674 alloc r32=ar.pfs, 0, 0, 6, 0
675 cmp.eq pSys,pNonSys=r0,r0 // pSys=1,pNonSys=0
676 ;;
677 bsw.0
678 ;;
679 mov r21=r13 // set current
680 ;;
681 bsw.1
682 ;;
683 mov r8=r0
684 br.cond.sptk.many ia64_leave_hypercall
685 #else
686 .ret8:
687 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
688 ;;
689 ld4 r2=[r2]
690 ;;
691 mov r8=0
692 and r2=_TIF_SYSCALL_TRACEAUDIT,r2
693 ;;
694 cmp.ne p6,p0=r2,r0
695 (p6) br.cond.spnt .strace_check_retval
696 #endif
697 ;; // added stop bits to prevent r8 dependency
698 END(ia64_ret_from_clone)
699 // fall through
700 GLOBAL_ENTRY(ia64_ret_from_syscall)
701 PT_REGS_UNWIND_INFO(0)
702 cmp.ge p6,p7=r8,r0 // syscall executed successfully?
703 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
704 mov r10=r0 // clear error indication in r10
705 #ifndef XEN
706 (p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
707 #endif
708 END(ia64_ret_from_syscall)
709 // fall through
710 /*
711 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
712 * need to switch to bank 0 and doesn't restore the scratch registers.
713 * To avoid leaking kernel bits, the scratch registers are set to
714 * the following known-to-be-safe values:
715 *
716 * r1: restored (global pointer)
717 * r2: cleared
718 * r3: 1 (when returning to user-level)
719 * r8-r11: restored (syscall return value(s))
720 * r12: restored (user-level stack pointer)
721 * r13: restored (user-level thread pointer)
722 * r14: set to __kernel_syscall_via_epc
723 * r15: restored (syscall #)
724 * r16-r17: cleared
725 * r18: user-level b6
726 * r19: cleared
727 * r20: user-level ar.fpsr
728 * r21: user-level b0
729 * r22: cleared
730 * r23: user-level ar.bspstore
731 * r24: user-level ar.rnat
732 * r25: user-level ar.unat
733 * r26: user-level ar.pfs
734 * r27: user-level ar.rsc
735 * r28: user-level ip
736 * r29: user-level psr
737 * r30: user-level cfm
738 * r31: user-level pr
739 * f6-f11: cleared
740 * pr: restored (user-level pr)
741 * b0: restored (user-level rp)
742 * b6: restored
743 * b7: set to __kernel_syscall_via_epc
744 * ar.unat: restored (user-level ar.unat)
745 * ar.pfs: restored (user-level ar.pfs)
746 * ar.rsc: restored (user-level ar.rsc)
747 * ar.rnat: restored (user-level ar.rnat)
748 * ar.bspstore: restored (user-level ar.bspstore)
749 * ar.fpsr: restored (user-level ar.fpsr)
750 * ar.ccv: cleared
751 * ar.csd: cleared
752 * ar.ssd: cleared
753 */
754 ENTRY(ia64_leave_syscall)
755 PT_REGS_UNWIND_INFO(0)
756 /*
757 * work.need_resched etc. mustn't get changed by this CPU before it returns to
758 * user- or fsys-mode, hence we disable interrupts early on.
759 *
760 * p6 controls whether current_thread_info()->flags needs to be check for
761 * extra work. We always check for extra work when returning to user-level.
762 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
763 * is 0. After extra work processing has been completed, execution
764 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
765 * needs to be redone.
766 */
767 #ifdef CONFIG_PREEMPT
768 rsm psr.i // disable interrupts
769 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
770 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
771 ;;
772 .pred.rel.mutex pUStk,pKStk
773 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
774 (pUStk) mov r21=0 // r21 <- 0
775 ;;
776 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
777 #else /* !CONFIG_PREEMPT */
778 (pUStk) rsm psr.i
779 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
780 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
781 #endif
782 .work_processed_syscall:
783 adds r2=PT(LOADRS)+16,r12
784 adds r3=PT(AR_BSPSTORE)+16,r12
785 #ifdef XEN
786 ;;
787 #else
788 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
789 ;;
790 (p6) ld4 r31=[r18] // load current_thread_info()->flags
791 #endif
792 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
793 nop.i 0
794 ;;
795 #ifndef XEN
796 mov r16=ar.bsp // M2 get existing backing store pointer
797 #endif
798 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
799 #ifndef XEN
800 (p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
801 #endif
802 ;;
803 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
804 #ifndef XEN
805 (p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
806 (p6) br.cond.spnt .work_pending_syscall
807 #endif
808 ;;
809 // start restoring the state saved on the kernel stack (struct pt_regs):
810 ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
811 ld8 r11=[r3],PT(CR_IIP)-PT(R11)
812 (pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
813 ;;
814 invala // M0|1 invalidate ALAT
815 rsm psr.i | psr.ic // M2 turn off interrupts and interruption collection
816 #ifndef XEN
817 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
818 #endif
820 ld8 r29=[r2],16 // M0|1 load cr.ipsr
821 ld8 r28=[r3],16 // M0|1 load cr.iip
822 mov r22=r0 // A clear r22
823 ;;
824 ld8 r30=[r2],16 // M0|1 load cr.ifs
825 ld8 r25=[r3],16 // M0|1 load ar.unat
826 (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
827 ;;
828 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
829 (pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled
830 nop 0
831 ;;
832 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
833 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
834 mov f6=f0 // F clear f6
835 ;;
836 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
837 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
838 mov f7=f0 // F clear f7
839 ;;
840 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
841 ld8.fill r1=[r3],16 // M0|1 load r1
842 (pUStk) mov r17=1 // A
843 ;;
844 (pUStk) st1 [r14]=r17 // M2|3
845 ld8.fill r13=[r3],16 // M0|1
846 mov f8=f0 // F clear f8
847 ;;
848 ld8.fill r12=[r2] // M0|1 restore r12 (sp)
849 #ifdef XEN
850 ld8.fill r2=[r3] // M0|1
851 #else
852 ld8.fill r15=[r3] // M0|1 restore r15
853 #endif
854 mov b6=r18 // I0 restore b6
856 #ifdef XEN
857 movl r17=THIS_CPU(ia64_phys_stacked_size_p8) // A
858 #else
859 addl r17=THIS_CPU(ia64_phys_stacked_size_p8),r0 // A
860 #endif
861 mov f9=f0 // F clear f9
862 (pKStk) br.cond.dpnt.many skip_rbs_switch // B
864 srlz.d // M0 ensure interruption collection is off (for cover)
865 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
866 #ifndef XEN
867 cover // B add current frame into dirty partition & set cr.ifs
868 #endif
869 ;;
870 (pUStk) ld4 r17=[r17] // M0|1 r17 = cpu_data->phys_stacked_size_p8
871 mov r19=ar.bsp // M2 get new backing store pointer
872 mov f10=f0 // F clear f10
874 nop.m 0
875 #ifdef XEN
876 mov r14=r0
877 #else
878 movl r14=__kernel_syscall_via_epc // X
879 #endif
880 ;;
881 mov.m ar.csd=r0 // M2 clear ar.csd
882 mov.m ar.ccv=r0 // M2 clear ar.ccv
883 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
885 mov.m ar.ssd=r0 // M2 clear ar.ssd
886 mov f11=f0 // F clear f11
887 br.cond.sptk.many rbs_switch // B
888 END(ia64_leave_syscall)
890 #ifdef CONFIG_IA32_SUPPORT
891 GLOBAL_ENTRY(ia64_ret_from_ia32_execve)
892 PT_REGS_UNWIND_INFO(0)
893 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
894 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
895 ;;
896 .mem.offset 0,0
897 st8.spill [r2]=r8 // store return value in slot for r8 and set unat bit
898 .mem.offset 8,0
899 st8.spill [r3]=r0 // clear error indication in slot for r10 and set unat bit
900 END(ia64_ret_from_ia32_execve)
901 // fall through
902 #endif /* CONFIG_IA32_SUPPORT */
903 GLOBAL_ENTRY(ia64_leave_kernel)
904 PT_REGS_UNWIND_INFO(0)
905 /*
906 * work.need_resched etc. mustn't get changed by this CPU before it returns to
907 * user- or fsys-mode, hence we disable interrupts early on.
908 *
909 * p6 controls whether current_thread_info()->flags needs to be check for
910 * extra work. We always check for extra work when returning to user-level.
911 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
912 * is 0. After extra work processing has been completed, execution
913 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
914 * needs to be redone.
915 */
916 #ifdef CONFIG_PREEMPT
917 rsm psr.i // disable interrupts
918 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
919 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
920 ;;
921 .pred.rel.mutex pUStk,pKStk
922 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
923 (pUStk) mov r21=0 // r21 <- 0
924 ;;
925 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
926 #else
927 (pUStk) rsm psr.i
928 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
929 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
930 #endif
931 .work_processed_kernel:
932 #ifdef XEN
933 ;;
934 (pUStk) ssm psr.i
935 (pUStk) br.call.sptk.many b0=do_softirq
936 (pUStk) rsm psr.i
937 ;;
938 (pUStk) br.call.sptk.many b0=reflect_event
939 ;;
940 adds r7 = PT(EML_UNAT)+16,r12
941 ;;
942 ld8 r7 = [r7]
943 ;;
944 mov ar.unat=r7 /* load eml_unat */
945 mov r31=r0
947 #else
948 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
949 ;;
950 (p6) ld4 r31=[r17] // load current_thread_info()->flags
951 #endif
952 adds r21=PT(PR)+16,r12
953 ;;
955 lfetch [r21],PT(CR_IPSR)-PT(PR)
956 adds r2=PT(B6)+16,r12
957 adds r3=PT(R16)+16,r12
958 ;;
959 lfetch [r21]
960 ld8 r28=[r2],8 // load b6
961 adds r29=PT(R24)+16,r12
963 #ifdef XEN
964 ld8.fill r16=[r3]
965 adds r3=PT(AR_CSD)-PT(R16),r3
966 #else
967 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
968 #endif
969 adds r30=PT(AR_CCV)+16,r12
970 (p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
971 ;;
972 ld8.fill r24=[r29]
973 ld8 r15=[r30] // load ar.ccv
974 (p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
975 ;;
976 ld8 r29=[r2],16 // load b7
977 ld8 r30=[r3],16 // load ar.csd
978 #ifndef XEN
979 (p6) br.cond.spnt .work_pending
980 #endif
981 ;;
982 ld8 r31=[r2],16 // load ar.ssd
983 ld8.fill r8=[r3],16
984 ;;
985 ld8.fill r9=[r2],16
986 ld8.fill r10=[r3],PT(R17)-PT(R10)
987 ;;
988 ld8.fill r11=[r2],PT(R18)-PT(R11)
989 ld8.fill r17=[r3],16
990 ;;
991 ld8.fill r18=[r2],16
992 ld8.fill r19=[r3],16
993 ;;
994 ld8.fill r20=[r2],16
995 ld8.fill r21=[r3],16
996 mov ar.csd=r30
997 mov ar.ssd=r31
998 ;;
999 rsm psr.i | psr.ic // initiate turning off of interrupt and interruption collection
1000 invala // invalidate ALAT
1001 ;;
1002 ld8.fill r22=[r2],24
1003 ld8.fill r23=[r3],24
1004 mov b6=r28
1005 ;;
1006 ld8.fill r25=[r2],16
1007 ld8.fill r26=[r3],16
1008 mov b7=r29
1009 ;;
1010 ld8.fill r27=[r2],16
1011 ld8.fill r28=[r3],16
1012 ;;
1013 ld8.fill r29=[r2],16
1014 ld8.fill r30=[r3],24
1015 ;;
1016 ld8.fill r31=[r2],PT(F9)-PT(R31)
1017 adds r3=PT(F10)-PT(F6),r3
1018 ;;
1019 ldf.fill f9=[r2],PT(F6)-PT(F9)
1020 ldf.fill f10=[r3],PT(F8)-PT(F10)
1021 ;;
1022 ldf.fill f6=[r2],PT(F7)-PT(F6)
1023 ;;
1024 ldf.fill f7=[r2],PT(F11)-PT(F7)
1025 #ifdef XEN
1026 ldf.fill f8=[r3],PT(R5)-PT(F8)
1027 ;;
1028 ldf.fill f11=[r2],PT(R4)-PT(F11)
1029 mov ar.ccv=r15
1030 ;;
1031 ld8.fill r4=[r2],16
1032 ld8.fill r5=[r3],16
1033 ;;
1034 ld8.fill r6=[r2]
1035 ld8.fill r7=[r3]
1036 ;;
1037 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
1038 ;;
1039 bsw.0 // switch back to bank 0 (no stop bit required beforehand...)
1040 ;;
1041 #else
1042 ldf.fill f8=[r3],32
1043 ;;
1044 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
1045 mov ar.ccv=r15
1046 ;;
1047 ldf.fill f11=[r2]
1048 bsw.0 // switch back to bank 0 (no stop bit required beforehand...)
1049 ;;
1050 #endif
1051 #ifdef XEN
1052 (pUStk) movl r18=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
1053 (pUStk) ld8 r18=[r18]
1054 #else
1055 (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
1056 #endif
1057 adds r16=PT(CR_IPSR)+16,r12
1058 adds r17=PT(CR_IIP)+16,r12
1060 (pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled
1061 nop.i 0
1062 nop.i 0
1063 ;;
1064 ld8 r29=[r16],16 // load cr.ipsr
1065 ld8 r28=[r17],16 // load cr.iip
1066 ;;
1067 ld8 r30=[r16],16 // load cr.ifs
1068 ld8 r25=[r17],16 // load ar.unat
1069 ;;
1070 ld8 r26=[r16],16 // load ar.pfs
1071 ld8 r27=[r17],16 // load ar.rsc
1072 #ifndef XEN
1073 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
1074 #endif
1075 ;;
1076 ld8 r24=[r16],16 // load ar.rnat (may be garbage)
1077 ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
1078 ;;
1079 ld8 r31=[r16],16 // load predicates
1080 ld8 r21=[r17],16 // load b0
1081 ;;
1082 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
1083 ld8.fill r1=[r17],16 // load r1
1084 ;;
1085 ld8.fill r12=[r16],16
1086 ld8.fill r13=[r17],16
1087 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
1088 ;;
1089 ld8 r20=[r16],16 // ar.fpsr
1090 ld8.fill r15=[r17],16
1091 ;;
1092 ld8.fill r14=[r16],16
1093 ld8.fill r2=[r17]
1094 (pUStk) mov r17=1
1095 ;;
1096 ld8.fill r3=[r16]
1097 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1098 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1099 ;;
1100 mov r16=ar.bsp // get existing backing store pointer
1101 #ifdef XEN
1102 movl r17=THIS_CPU(ia64_phys_stacked_size_p8)
1103 #else
1104 addl r17=THIS_CPU(ia64_phys_stacked_size_p8),r0
1105 #endif
1106 ;;
1107 ld4 r17=[r17] // r17 = cpu_data->phys_stacked_size_p8
1108 (pKStk) br.cond.dpnt skip_rbs_switch
1110 /*
1111 * Restore user backing store.
1113 * NOTE: alloc, loadrs, and cover can't be predicated.
1114 */
1115 (pNonSys) br.cond.dpnt dont_preserve_current_frame
1116 cover // add current frame into dirty partition and set cr.ifs
1117 ;;
1118 mov r19=ar.bsp // get new backing store pointer
1119 rbs_switch:
1120 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1121 #ifndef XEN
1122 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
1123 #endif
1124 ;;
1125 sub r19=r19,r16 // calculate total byte size of dirty partition
1126 add r18=64,r18 // don't force in0-in7 into memory...
1127 ;;
1128 shl r19=r19,16 // shift size of dirty partition into loadrs position
1129 ;;
1130 dont_preserve_current_frame:
1131 /*
1132 * To prevent leaking bits between the kernel and user-space,
1133 * we must clear the stacked registers in the "invalid" partition here.
1134 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1135 * 5 registers/cycle on McKinley).
1136 */
1137 # define pRecurse p6
1138 # define pReturn p7
1139 #ifdef CONFIG_ITANIUM
1140 # define Nregs 10
1141 #else
1142 # define Nregs 14
1143 #endif
1144 alloc loc0=ar.pfs,2,Nregs-2,2,0
1145 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1146 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1147 ;;
1148 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1149 shladd in0=loc1,3,r17
1150 mov in1=0
1151 ;;
1152 TEXT_ALIGN(32)
1153 rse_clear_invalid:
1154 #ifdef CONFIG_ITANIUM
1155 // cycle 0
1156 { .mii
1157 alloc loc0=ar.pfs,2,Nregs-2,2,0
1158 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1159 add out0=-Nregs*8,in0
1160 }{ .mfb
1161 add out1=1,in1 // increment recursion count
1162 nop.f 0
1163 nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
1164 ;;
1165 }{ .mfi // cycle 1
1166 mov loc1=0
1167 nop.f 0
1168 mov loc2=0
1169 }{ .mib
1170 mov loc3=0
1171 mov loc4=0
1172 (pRecurse) br.call.sptk.many b0=rse_clear_invalid
1174 }{ .mfi // cycle 2
1175 mov loc5=0
1176 nop.f 0
1177 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1178 }{ .mib
1179 mov loc6=0
1180 mov loc7=0
1181 (pReturn) br.ret.sptk.many b0
1183 #else /* !CONFIG_ITANIUM */
1184 alloc loc0=ar.pfs,2,Nregs-2,2,0
1185 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1186 add out0=-Nregs*8,in0
1187 add out1=1,in1 // increment recursion count
1188 mov loc1=0
1189 mov loc2=0
1190 ;;
1191 mov loc3=0
1192 mov loc4=0
1193 mov loc5=0
1194 mov loc6=0
1195 mov loc7=0
1196 (pRecurse) br.call.dptk.few b0=rse_clear_invalid
1197 ;;
1198 mov loc8=0
1199 mov loc9=0
1200 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1201 mov loc10=0
1202 mov loc11=0
1203 (pReturn) br.ret.dptk.many b0
1204 #endif /* !CONFIG_ITANIUM */
1205 # undef pRecurse
1206 # undef pReturn
1207 ;;
1208 alloc r17=ar.pfs,0,0,0,0 // drop current register frame
1209 ;;
1210 loadrs
1211 ;;
1212 skip_rbs_switch:
1213 mov ar.unat=r25 // M2
1214 (pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1215 (pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
1216 ;;
1217 (pUStk) mov ar.bspstore=r23 // M2
1218 (pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
1219 (pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1220 ;;
1221 mov cr.ipsr=r29 // M2
1222 mov ar.pfs=r26 // I0
1223 (pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
1224 #ifdef XEN
1225 mov cr.ifs=r30 // M2
1226 #else
1227 (p9) mov cr.ifs=r30 // M2
1228 #endif
1229 mov b0=r21 // I0
1230 (pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
1232 mov ar.fpsr=r20 // M2
1233 mov cr.iip=r28 // M2
1234 nop 0
1235 ;;
1236 (pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
1237 nop 0
1238 #ifdef XEN
1239 (pLvSys)mov r15=r0
1240 #else
1241 (pLvSys)mov r2=r0
1242 #endif
1244 mov ar.rsc=r27 // M2
1245 mov pr=r31,-1 // I0
1246 rfi // B
1248 #ifndef XEN
1249 /*
1250 * On entry:
1251 * r20 = &current->thread_info->pre_count (if CONFIG_PREEMPT)
1252 * r31 = current->thread_info->flags
1253 * On exit:
1254 * p6 = TRUE if work-pending-check needs to be redone
1255 */
1256 .work_pending_syscall:
1257 add r2=-8,r2
1258 add r3=-8,r3
1259 ;;
1260 st8 [r2]=r8
1261 st8 [r3]=r10
1262 .work_pending:
1263 tbit.nz p6,p0=r31,TIF_SIGDELAYED // signal delayed from MCA/INIT/NMI/PMI context?
1264 (p6) br.cond.sptk.few .sigdelayed
1265 ;;
1266 tbit.z p6,p0=r31,TIF_NEED_RESCHED // current_thread_info()->need_resched==0?
1267 (p6) br.cond.sptk.few .notify
1268 #ifdef CONFIG_PREEMPT
1269 (pKStk) dep r21=-1,r0,PREEMPT_ACTIVE_BIT,1
1270 ;;
1271 (pKStk) st4 [r20]=r21
1272 ssm psr.i // enable interrupts
1273 #endif
1274 br.call.spnt.many rp=schedule
1275 .ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1
1276 rsm psr.i // disable interrupts
1277 ;;
1278 #ifdef CONFIG_PREEMPT
1279 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
1280 ;;
1281 (pKStk) st4 [r20]=r0 // preempt_count() <- 0
1282 #endif
1283 (pLvSys)br.cond.sptk.few .work_pending_syscall_end
1284 br.cond.sptk.many .work_processed_kernel // re-check
1286 .notify:
1287 (pUStk) br.call.spnt.many rp=notify_resume_user
1288 .ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0
1289 (pLvSys)br.cond.sptk.few .work_pending_syscall_end
1290 br.cond.sptk.many .work_processed_kernel // don't re-check
1292 // There is a delayed signal that was detected in MCA/INIT/NMI/PMI context where
1293 // it could not be delivered. Deliver it now. The signal might be for us and
1294 // may set TIF_SIGPENDING, so redrive ia64_leave_* after processing the delayed
1295 // signal.
1297 .sigdelayed:
1298 br.call.sptk.many rp=do_sigdelayed
1299 cmp.eq p6,p0=r0,r0 // p6 <- 1, always re-check
1300 (pLvSys)br.cond.sptk.few .work_pending_syscall_end
1301 br.cond.sptk.many .work_processed_kernel // re-check
1303 .work_pending_syscall_end:
1304 adds r2=PT(R8)+16,r12
1305 adds r3=PT(R10)+16,r12
1306 ;;
1307 ld8 r8=[r2]
1308 ld8 r10=[r3]
1309 br.cond.sptk.many .work_processed_syscall // re-check
1310 #endif
1312 END(ia64_leave_kernel)
1314 ENTRY(handle_syscall_error)
1315 /*
1316 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1317 * lead us to mistake a negative return value as a failed syscall. Those syscall
1318 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
1319 * pt_regs.r8 is zero, we assume that the call completed successfully.
1320 */
1321 PT_REGS_UNWIND_INFO(0)
1322 ld8 r3=[r2] // load pt_regs.r8
1323 ;;
1324 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
1325 ;;
1326 (p7) mov r10=-1
1327 (p7) sub r8=0,r8 // negate return value to get errno
1328 br.cond.sptk ia64_leave_syscall
1329 END(handle_syscall_error)
1331 /*
1332 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1333 * in case a system call gets restarted.
1334 */
1335 GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1336 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1337 alloc loc1=ar.pfs,8,2,1,0
1338 mov loc0=rp
1339 mov out0=r8 // Address of previous task
1340 ;;
1341 br.call.sptk.many rp=schedule_tail
1342 .ret11: mov ar.pfs=loc1
1343 mov rp=loc0
1344 br.ret.sptk.many rp
1345 END(ia64_invoke_schedule_tail)
1347 #ifndef XEN
1348 /*
1349 * Setup stack and call do_notify_resume_user(). Note that pSys and pNonSys need to
1350 * be set up by the caller. We declare 8 input registers so the system call
1351 * args get preserved, in case we need to restart a system call.
1352 */
1353 ENTRY(notify_resume_user)
1354 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1355 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1356 mov r9=ar.unat
1357 mov loc0=rp // save return address
1358 mov out0=0 // there is no "oldset"
1359 adds out1=8,sp // out1=&sigscratch->ar_pfs
1360 (pSys) mov out2=1 // out2==1 => we're in a syscall
1361 ;;
1362 (pNonSys) mov out2=0 // out2==0 => not a syscall
1363 .fframe 16
1364 .spillsp ar.unat, 16
1365 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1366 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1367 .body
1368 br.call.sptk.many rp=do_notify_resume_user
1369 .ret15: .restore sp
1370 adds sp=16,sp // pop scratch stack space
1371 ;;
1372 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
1373 mov rp=loc0
1374 ;;
1375 mov ar.unat=r9
1376 mov ar.pfs=loc1
1377 br.ret.sptk.many rp
1378 END(notify_resume_user)
1380 GLOBAL_ENTRY(sys_rt_sigsuspend)
1381 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1382 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1383 mov r9=ar.unat
1384 mov loc0=rp // save return address
1385 mov out0=in0 // mask
1386 mov out1=in1 // sigsetsize
1387 adds out2=8,sp // out2=&sigscratch->ar_pfs
1388 ;;
1389 .fframe 16
1390 .spillsp ar.unat, 16
1391 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1392 st8 [out2]=loc1,-8 // save ar.pfs, out2=&sigscratch
1393 .body
1394 br.call.sptk.many rp=ia64_rt_sigsuspend
1395 .ret17: .restore sp
1396 adds sp=16,sp // pop scratch stack space
1397 ;;
1398 ld8 r9=[sp] // load new unat from sw->caller_unat
1399 mov rp=loc0
1400 ;;
1401 mov ar.unat=r9
1402 mov ar.pfs=loc1
1403 br.ret.sptk.many rp
1404 END(sys_rt_sigsuspend)
1406 ENTRY(sys_rt_sigreturn)
1407 PT_REGS_UNWIND_INFO(0)
1408 /*
1409 * Allocate 8 input registers since ptrace() may clobber them
1410 */
1411 alloc r2=ar.pfs,8,0,1,0
1412 .prologue
1413 PT_REGS_SAVES(16)
1414 adds sp=-16,sp
1415 .body
1416 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
1417 ;;
1418 /*
1419 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1420 * syscall-entry path does not save them we save them here instead. Note: we
1421 * don't need to save any other registers that are not saved by the stream-lined
1422 * syscall path, because restore_sigcontext() restores them.
1423 */
1424 adds r16=PT(F6)+32,sp
1425 adds r17=PT(F7)+32,sp
1426 ;;
1427 stf.spill [r16]=f6,32
1428 stf.spill [r17]=f7,32
1429 ;;
1430 stf.spill [r16]=f8,32
1431 stf.spill [r17]=f9,32
1432 ;;
1433 stf.spill [r16]=f10
1434 stf.spill [r17]=f11
1435 adds out0=16,sp // out0 = &sigscratch
1436 br.call.sptk.many rp=ia64_rt_sigreturn
1437 .ret19: .restore sp,0
1438 adds sp=16,sp
1439 ;;
1440 ld8 r9=[sp] // load new ar.unat
1441 mov.sptk b7=r8,ia64_leave_kernel
1442 ;;
1443 mov ar.unat=r9
1444 br.many b7
1445 END(sys_rt_sigreturn)
1446 #endif
1448 GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1449 .prologue
1450 /*
1451 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1452 */
1453 mov r16=r0
1454 DO_SAVE_SWITCH_STACK
1455 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
1456 .ret21: .body
1457 DO_LOAD_SWITCH_STACK
1458 br.cond.sptk.many rp // goes to ia64_leave_kernel
1459 END(ia64_prepare_handle_unaligned)
1461 //
1462 // unw_init_running(void (*callback)(info, arg), void *arg)
1463 //
1464 # define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1466 GLOBAL_ENTRY(unw_init_running)
1467 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1468 alloc loc1=ar.pfs,2,3,3,0
1469 ;;
1470 ld8 loc2=[in0],8
1471 mov loc0=rp
1472 mov r16=loc1
1473 DO_SAVE_SWITCH_STACK
1474 .body
1476 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1477 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1478 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1479 adds sp=-EXTRA_FRAME_SIZE,sp
1480 .body
1481 ;;
1482 adds out0=16,sp // &info
1483 mov out1=r13 // current
1484 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
1485 br.call.sptk.many rp=unw_init_frame_info
1486 1: adds out0=16,sp // &info
1487 mov b6=loc2
1488 mov loc2=gp // save gp across indirect function call
1489 ;;
1490 ld8 gp=[in0]
1491 mov out1=in1 // arg
1492 br.call.sptk.many rp=b6 // invoke the callback function
1493 1: mov gp=loc2 // restore gp
1495 // For now, we don't allow changing registers from within
1496 // unw_init_running; if we ever want to allow that, we'd
1497 // have to do a load_switch_stack here:
1498 .restore sp
1499 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1501 mov ar.pfs=loc1
1502 mov rp=loc0
1503 br.ret.sptk.many rp
1504 END(unw_init_running)
1506 #ifdef XEN
1507 GLOBAL_ENTRY(ia64_do_multicall_call)
1508 movl r2=ia64_hypercall_table;;
1509 shladd r2=r38,3,r2;;
1510 ld8 r2=[r2];;
1511 mov b6=r2
1512 br.sptk.many b6;;
1513 END(ia64_do_multicall_call)
1516 .rodata
1517 .align 8
1518 .globl ia64_hypercall_table
1519 ia64_hypercall_table:
1520 data8 do_ni_hypercall /* do_set_trap_table *//* 0 */
1521 data8 do_ni_hypercall /* do_mmu_update */
1522 data8 do_ni_hypercall /* do_set_gdt */
1523 data8 do_ni_hypercall /* do_stack_switch */
1524 data8 do_ni_hypercall /* do_set_callbacks */
1525 data8 do_ni_hypercall /* do_fpu_taskswitch *//* 5 */
1526 data8 do_sched_op_compat
1527 data8 do_ni_hypercall
1528 data8 do_ni_hypercall /* do_set_debugreg */
1529 data8 do_ni_hypercall /* do_get_debugreg */
1530 data8 do_ni_hypercall /* do_update_descriptor * 10 */
1531 data8 do_ni_hypercall /* do_ni_hypercall */
1532 data8 do_memory_op
1533 data8 do_multicall
1534 data8 do_ni_hypercall /* do_update_va_mapping */
1535 data8 do_ni_hypercall /* do_set_timer_op */ /* 15 */
1536 data8 do_ni_hypercall
1537 data8 do_xen_version
1538 data8 do_console_io
1539 data8 do_ni_hypercall
1540 data8 do_grant_table_op /* 20 */
1541 data8 do_ni_hypercall /* do_vm_assist */
1542 data8 do_ni_hypercall /* do_update_va_mapping_othe */
1543 data8 do_ni_hypercall /* (x86 only) */
1544 data8 do_vcpu_op /* do_vcpu_op */
1545 data8 do_ni_hypercall /* (x86_64 only) */ /* 25 */
1546 data8 do_ni_hypercall /* do_mmuext_op */
1547 data8 do_ni_hypercall /* do_acm_op */
1548 data8 do_ni_hypercall /* do_nmi_op */
1549 data8 do_sched_op
1550 data8 do_callback_op /* */ /* 30 */
1551 data8 do_xenoprof_op /* */
1552 data8 do_event_channel_op
1553 data8 do_physdev_op
1554 data8 do_hvm_op /* */
1555 data8 do_sysctl /* */ /* 35 */
1556 data8 do_domctl /* */
1557 data8 do_kexec_op /* */
1558 data8 do_ni_hypercall /* */
1559 data8 do_ni_hypercall /* */
1560 data8 do_ni_hypercall /* */ /* 40 */
1561 data8 do_ni_hypercall /* */
1562 data8 do_ni_hypercall /* */
1563 data8 do_ni_hypercall /* */
1564 data8 do_ni_hypercall /* */
1565 data8 do_ni_hypercall /* */ /* 45 */
1566 data8 do_ni_hypercall /* */
1567 data8 do_ni_hypercall /* */
1568 data8 do_dom0vp_op /* dom0vp_op */
1569 data8 do_pirq_guest_eoi /* arch_1 */
1570 data8 do_ia64_debug_op /* arch_2 */ /* 50 */
1571 data8 do_ni_hypercall /* arch_3 */
1572 data8 do_ni_hypercall /* arch_4 */
1573 data8 do_ni_hypercall /* arch_5 */
1574 data8 do_ni_hypercall /* arch_6 */
1575 data8 do_ni_hypercall /* arch_7 */ /* 55 */
1576 data8 do_ni_hypercall
1577 data8 do_ni_hypercall
1578 data8 do_ni_hypercall
1579 data8 do_ni_hypercall
1580 data8 do_ni_hypercall /* 60 */
1581 data8 do_ni_hypercall
1582 data8 do_ni_hypercall
1583 data8 do_ni_hypercall
1585 // guard against failures to increase NR_hypercalls
1586 .org ia64_hypercall_table + 8*NR_hypercalls
1588 #else
1589 .rodata
1590 .align 8
1591 .globl sys_call_table
1592 sys_call_table:
1593 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
1594 data8 sys_exit // 1025
1595 data8 sys_read
1596 data8 sys_write
1597 data8 sys_open
1598 data8 sys_close
1599 data8 sys_creat // 1030
1600 data8 sys_link
1601 data8 sys_unlink
1602 data8 ia64_execve
1603 data8 sys_chdir
1604 data8 sys_fchdir // 1035
1605 data8 sys_utimes
1606 data8 sys_mknod
1607 data8 sys_chmod
1608 data8 sys_chown
1609 data8 sys_lseek // 1040
1610 data8 sys_getpid
1611 data8 sys_getppid
1612 data8 sys_mount
1613 data8 sys_umount
1614 data8 sys_setuid // 1045
1615 data8 sys_getuid
1616 data8 sys_geteuid
1617 data8 sys_ptrace
1618 data8 sys_access
1619 data8 sys_sync // 1050
1620 data8 sys_fsync
1621 data8 sys_fdatasync
1622 data8 sys_kill
1623 data8 sys_rename
1624 data8 sys_mkdir // 1055
1625 data8 sys_rmdir
1626 data8 sys_dup
1627 data8 sys_pipe
1628 data8 sys_times
1629 data8 ia64_brk // 1060
1630 data8 sys_setgid
1631 data8 sys_getgid
1632 data8 sys_getegid
1633 data8 sys_acct
1634 data8 sys_ioctl // 1065
1635 data8 sys_fcntl
1636 data8 sys_umask
1637 data8 sys_chroot
1638 data8 sys_ustat
1639 data8 sys_dup2 // 1070
1640 data8 sys_setreuid
1641 data8 sys_setregid
1642 data8 sys_getresuid
1643 data8 sys_setresuid
1644 data8 sys_getresgid // 1075
1645 data8 sys_setresgid
1646 data8 sys_getgroups
1647 data8 sys_setgroups
1648 data8 sys_getpgid
1649 data8 sys_setpgid // 1080
1650 data8 sys_setsid
1651 data8 sys_getsid
1652 data8 sys_sethostname
1653 data8 sys_setrlimit
1654 data8 sys_getrlimit // 1085
1655 data8 sys_getrusage
1656 data8 sys_gettimeofday
1657 data8 sys_settimeofday
1658 data8 sys_select
1659 data8 sys_poll // 1090
1660 data8 sys_symlink
1661 data8 sys_readlink
1662 data8 sys_uselib
1663 data8 sys_swapon
1664 data8 sys_swapoff // 1095
1665 data8 sys_reboot
1666 data8 sys_truncate
1667 data8 sys_ftruncate
1668 data8 sys_fchmod
1669 data8 sys_fchown // 1100
1670 data8 ia64_getpriority
1671 data8 sys_setpriority
1672 data8 sys_statfs
1673 data8 sys_fstatfs
1674 data8 sys_gettid // 1105
1675 data8 sys_semget
1676 data8 sys_semop
1677 data8 sys_semctl
1678 data8 sys_msgget
1679 data8 sys_msgsnd // 1110
1680 data8 sys_msgrcv
1681 data8 sys_msgctl
1682 data8 sys_shmget
1683 data8 sys_shmat
1684 data8 sys_shmdt // 1115
1685 data8 sys_shmctl
1686 data8 sys_syslog
1687 data8 sys_setitimer
1688 data8 sys_getitimer
1689 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
1690 data8 sys_ni_syscall /* was: ia64_oldlstat */
1691 data8 sys_ni_syscall /* was: ia64_oldfstat */
1692 data8 sys_vhangup
1693 data8 sys_lchown
1694 data8 sys_remap_file_pages // 1125
1695 data8 sys_wait4
1696 data8 sys_sysinfo
1697 data8 sys_clone
1698 data8 sys_setdomainname
1699 data8 sys_newuname // 1130
1700 data8 sys_adjtimex
1701 data8 sys_ni_syscall /* was: ia64_create_module */
1702 data8 sys_init_module
1703 data8 sys_delete_module
1704 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
1705 data8 sys_ni_syscall /* was: sys_query_module */
1706 data8 sys_quotactl
1707 data8 sys_bdflush
1708 data8 sys_sysfs
1709 data8 sys_personality // 1140
1710 data8 sys_ni_syscall // sys_afs_syscall
1711 data8 sys_setfsuid
1712 data8 sys_setfsgid
1713 data8 sys_getdents
1714 data8 sys_flock // 1145
1715 data8 sys_readv
1716 data8 sys_writev
1717 data8 sys_pread64
1718 data8 sys_pwrite64
1719 data8 sys_sysctl // 1150
1720 data8 sys_mmap
1721 data8 sys_munmap
1722 data8 sys_mlock
1723 data8 sys_mlockall
1724 data8 sys_mprotect // 1155
1725 data8 ia64_mremap
1726 data8 sys_msync
1727 data8 sys_munlock
1728 data8 sys_munlockall
1729 data8 sys_sched_getparam // 1160
1730 data8 sys_sched_setparam
1731 data8 sys_sched_getscheduler
1732 data8 sys_sched_setscheduler
1733 data8 sys_sched_yield
1734 data8 sys_sched_get_priority_max // 1165
1735 data8 sys_sched_get_priority_min
1736 data8 sys_sched_rr_get_interval
1737 data8 sys_nanosleep
1738 data8 sys_nfsservctl
1739 data8 sys_prctl // 1170
1740 data8 sys_getpagesize
1741 data8 sys_mmap2
1742 data8 sys_pciconfig_read
1743 data8 sys_pciconfig_write
1744 data8 sys_perfmonctl // 1175
1745 data8 sys_sigaltstack
1746 data8 sys_rt_sigaction
1747 data8 sys_rt_sigpending
1748 data8 sys_rt_sigprocmask
1749 data8 sys_rt_sigqueueinfo // 1180
1750 data8 sys_rt_sigreturn
1751 data8 sys_rt_sigsuspend
1752 data8 sys_rt_sigtimedwait
1753 data8 sys_getcwd
1754 data8 sys_capget // 1185
1755 data8 sys_capset
1756 data8 sys_sendfile64
1757 data8 sys_ni_syscall // sys_getpmsg (STREAMS)
1758 data8 sys_ni_syscall // sys_putpmsg (STREAMS)
1759 data8 sys_socket // 1190
1760 data8 sys_bind
1761 data8 sys_connect
1762 data8 sys_listen
1763 data8 sys_accept
1764 data8 sys_getsockname // 1195
1765 data8 sys_getpeername
1766 data8 sys_socketpair
1767 data8 sys_send
1768 data8 sys_sendto
1769 data8 sys_recv // 1200
1770 data8 sys_recvfrom
1771 data8 sys_shutdown
1772 data8 sys_setsockopt
1773 data8 sys_getsockopt
1774 data8 sys_sendmsg // 1205
1775 data8 sys_recvmsg
1776 data8 sys_pivot_root
1777 data8 sys_mincore
1778 data8 sys_madvise
1779 data8 sys_newstat // 1210
1780 data8 sys_newlstat
1781 data8 sys_newfstat
1782 data8 sys_clone2
1783 data8 sys_getdents64
1784 data8 sys_getunwind // 1215
1785 data8 sys_readahead
1786 data8 sys_setxattr
1787 data8 sys_lsetxattr
1788 data8 sys_fsetxattr
1789 data8 sys_getxattr // 1220
1790 data8 sys_lgetxattr
1791 data8 sys_fgetxattr
1792 data8 sys_listxattr
1793 data8 sys_llistxattr
1794 data8 sys_flistxattr // 1225
1795 data8 sys_removexattr
1796 data8 sys_lremovexattr
1797 data8 sys_fremovexattr
1798 data8 sys_tkill
1799 data8 sys_futex // 1230
1800 data8 sys_sched_setaffinity
1801 data8 sys_sched_getaffinity
1802 data8 sys_set_tid_address
1803 data8 sys_fadvise64_64
1804 data8 sys_tgkill // 1235
1805 data8 sys_exit_group
1806 data8 sys_lookup_dcookie
1807 data8 sys_io_setup
1808 data8 sys_io_destroy
1809 data8 sys_io_getevents // 1240
1810 data8 sys_io_submit
1811 data8 sys_io_cancel
1812 data8 sys_epoll_create
1813 data8 sys_epoll_ctl
1814 data8 sys_epoll_wait // 1245
1815 data8 sys_restart_syscall
1816 data8 sys_semtimedop
1817 data8 sys_timer_create
1818 data8 sys_timer_settime
1819 data8 sys_timer_gettime // 1250
1820 data8 sys_timer_getoverrun
1821 data8 sys_timer_delete
1822 data8 sys_clock_settime
1823 data8 sys_clock_gettime
1824 data8 sys_clock_getres // 1255
1825 data8 sys_clock_nanosleep
1826 data8 sys_fstatfs64
1827 data8 sys_statfs64
1828 data8 sys_mbind
1829 data8 sys_get_mempolicy // 1260
1830 data8 sys_set_mempolicy
1831 data8 sys_mq_open
1832 data8 sys_mq_unlink
1833 data8 sys_mq_timedsend
1834 data8 sys_mq_timedreceive // 1265
1835 data8 sys_mq_notify
1836 data8 sys_mq_getsetattr
1837 data8 sys_ni_syscall // reserved for kexec_load
1838 data8 sys_ni_syscall // reserved for vserver
1839 data8 sys_waitid // 1270
1840 data8 sys_add_key
1841 data8 sys_request_key
1842 data8 sys_keyctl
1843 data8 sys_ioprio_set
1844 data8 sys_ioprio_get // 1275
1845 data8 sys_ni_syscall
1846 data8 sys_inotify_init
1847 data8 sys_inotify_add_watch
1848 data8 sys_inotify_rm_watch
1850 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1851 #endif