ia64/xen-unstable

view xen/arch/x86/irq.c @ 19835:edfdeb150f27

Fix buildsystem to detect udev > version 124

udev removed the udevinfo symlink from versions higher than 123 and
xen's build-system could not detect if udev is in place and has the
required version.

Signed-off-by: Marc-A. Dahlhaus <mad@wol.de>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Jun 25 13:02:37 2009 +0100 (2009-06-25)
parents 16c2806b09c6
children
line source
1 /******************************************************************************
2 * arch/x86/irq.c
3 *
4 * Portions of this file are:
5 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
6 */
8 #include <xen/config.h>
9 #include <xen/init.h>
10 #include <xen/errno.h>
11 #include <xen/event.h>
12 #include <xen/irq.h>
13 #include <xen/perfc.h>
14 #include <xen/sched.h>
15 #include <xen/keyhandler.h>
16 #include <xen/compat.h>
17 #include <xen/iocap.h>
18 #include <xen/iommu.h>
19 #include <xen/trace.h>
20 #include <asm/msi.h>
21 #include <asm/current.h>
22 #include <asm/flushtlb.h>
23 #include <public/physdev.h>
25 /* opt_noirqbalance: If true, software IRQ balancing/affinity is disabled. */
26 int opt_noirqbalance = 0;
27 boolean_param("noirqbalance", opt_noirqbalance);
29 unsigned int __read_mostly nr_irqs = 16;
30 irq_desc_t irq_desc[NR_VECTORS];
32 static DEFINE_SPINLOCK(vector_lock);
33 int vector_irq[NR_VECTORS] __read_mostly = {
34 [0 ... NR_VECTORS - 1] = FREE_TO_ASSIGN_IRQ
35 };
37 static void __do_IRQ_guest(int vector);
39 void no_action(int cpl, void *dev_id, struct cpu_user_regs *regs) { }
41 static void enable_none(unsigned int vector) { }
42 static unsigned int startup_none(unsigned int vector) { return 0; }
43 static void disable_none(unsigned int vector) { }
44 static void ack_none(unsigned int vector)
45 {
46 ack_bad_irq(vector);
47 }
49 #define shutdown_none disable_none
50 #define end_none enable_none
52 struct hw_interrupt_type no_irq_type = {
53 "none",
54 startup_none,
55 shutdown_none,
56 enable_none,
57 disable_none,
58 ack_none,
59 end_none
60 };
62 atomic_t irq_err_count;
64 int free_irq_vector(int vector)
65 {
66 int irq;
68 BUG_ON((vector > LAST_DYNAMIC_VECTOR) || (vector < FIRST_DYNAMIC_VECTOR));
70 spin_lock(&vector_lock);
71 if ((irq = vector_irq[vector]) == AUTO_ASSIGN_IRQ)
72 vector_irq[vector] = FREE_TO_ASSIGN_IRQ;
73 spin_unlock(&vector_lock);
75 return (irq == AUTO_ASSIGN_IRQ) ? 0 : -EINVAL;
76 }
78 int assign_irq_vector(int irq)
79 {
80 static unsigned current_vector = FIRST_DYNAMIC_VECTOR;
81 unsigned vector;
83 BUG_ON(irq >= nr_irqs && irq != AUTO_ASSIGN_IRQ);
85 spin_lock(&vector_lock);
87 if ((irq != AUTO_ASSIGN_IRQ) && (irq_to_vector(irq) > 0)) {
88 spin_unlock(&vector_lock);
89 return irq_to_vector(irq);
90 }
92 vector = current_vector;
93 while (vector_irq[vector] != FREE_TO_ASSIGN_IRQ) {
94 vector += 8;
95 if (vector > LAST_DYNAMIC_VECTOR)
96 vector = FIRST_DYNAMIC_VECTOR + ((vector + 1) & 7);
98 if (vector == current_vector) {
99 spin_unlock(&vector_lock);
100 return -ENOSPC;
101 }
102 }
104 current_vector = vector;
105 vector_irq[vector] = irq;
106 if (irq != AUTO_ASSIGN_IRQ)
107 IO_APIC_VECTOR(irq) = vector;
109 spin_unlock(&vector_lock);
111 return vector;
112 }
114 asmlinkage void do_IRQ(struct cpu_user_regs *regs)
115 {
116 unsigned int vector = regs->entry_vector;
117 irq_desc_t *desc = &irq_desc[vector];
118 struct irqaction *action;
119 uint32_t tsc_in;
121 perfc_incr(irqs);
123 spin_lock(&desc->lock);
124 desc->handler->ack(vector);
126 if ( likely(desc->status & IRQ_GUEST) )
127 {
128 irq_enter();
129 tsc_in = tb_init_done ? get_cycles() : 0;
130 __do_IRQ_guest(vector);
131 TRACE_3D(TRC_TRACE_IRQ, vector, tsc_in, get_cycles());
132 irq_exit();
133 spin_unlock(&desc->lock);
134 return;
135 }
137 desc->status &= ~IRQ_REPLAY;
138 desc->status |= IRQ_PENDING;
140 /*
141 * Since we set PENDING, if another processor is handling a different
142 * instance of this same irq, the other processor will take care of it.
143 */
144 if ( desc->status & (IRQ_DISABLED | IRQ_INPROGRESS) )
145 goto out;
147 desc->status |= IRQ_INPROGRESS;
149 action = desc->action;
150 while ( desc->status & IRQ_PENDING )
151 {
152 desc->status &= ~IRQ_PENDING;
153 irq_enter();
154 spin_unlock_irq(&desc->lock);
155 tsc_in = tb_init_done ? get_cycles() : 0;
156 action->handler(vector_to_irq(vector), action->dev_id, regs);
157 TRACE_3D(TRC_TRACE_IRQ, vector, tsc_in, get_cycles());
158 spin_lock_irq(&desc->lock);
159 irq_exit();
160 }
162 desc->status &= ~IRQ_INPROGRESS;
164 out:
165 desc->handler->end(vector);
166 spin_unlock(&desc->lock);
167 }
169 int request_irq_vector(unsigned int vector,
170 void (*handler)(int, void *, struct cpu_user_regs *),
171 unsigned long irqflags, const char * devname, void *dev_id)
172 {
173 struct irqaction * action;
174 int retval;
176 /*
177 * Sanity-check: shared interrupts must pass in a real dev-ID,
178 * otherwise we'll have trouble later trying to figure out
179 * which interrupt is which (messes up the interrupt freeing
180 * logic etc).
181 */
182 if (vector >= NR_VECTORS)
183 return -EINVAL;
184 if (!handler)
185 return -EINVAL;
187 action = xmalloc(struct irqaction);
188 if (!action)
189 return -ENOMEM;
191 action->handler = handler;
192 action->name = devname;
193 action->dev_id = dev_id;
195 retval = setup_irq_vector(vector, action);
196 if (retval)
197 xfree(action);
199 return retval;
200 }
202 void release_irq_vector(unsigned int vector)
203 {
204 irq_desc_t *desc = &irq_desc[vector];
205 unsigned long flags;
207 spin_lock_irqsave(&desc->lock,flags);
208 desc->action = NULL;
209 desc->depth = 1;
210 desc->status |= IRQ_DISABLED;
211 desc->handler->shutdown(vector);
212 spin_unlock_irqrestore(&desc->lock,flags);
214 /* Wait to make sure it's not being used on another CPU */
215 do { smp_mb(); } while ( desc->status & IRQ_INPROGRESS );
216 }
218 int setup_irq_vector(unsigned int vector, struct irqaction *new)
219 {
220 irq_desc_t *desc = &irq_desc[vector];
221 unsigned long flags;
223 spin_lock_irqsave(&desc->lock,flags);
225 if ( desc->action != NULL )
226 {
227 spin_unlock_irqrestore(&desc->lock,flags);
228 return -EBUSY;
229 }
231 desc->action = new;
232 desc->depth = 0;
233 desc->status &= ~IRQ_DISABLED;
234 desc->handler->startup(vector);
236 spin_unlock_irqrestore(&desc->lock,flags);
238 return 0;
239 }
242 /*
243 * HANDLING OF GUEST-BOUND PHYSICAL IRQS
244 */
246 #define IRQ_MAX_GUESTS 7
247 typedef struct {
248 u8 nr_guests;
249 u8 in_flight;
250 u8 shareable;
251 u8 ack_type;
252 #define ACKTYPE_NONE 0 /* No final acknowledgement is required */
253 #define ACKTYPE_UNMASK 1 /* Unmask PIC hardware (from any CPU) */
254 #define ACKTYPE_EOI 2 /* EOI on the CPU that was interrupted */
255 cpumask_t cpu_eoi_map; /* CPUs that need to EOI this interrupt */
256 struct domain *guest[IRQ_MAX_GUESTS];
257 } irq_guest_action_t;
259 /*
260 * Stack of interrupts awaiting EOI on each CPU. These must be popped in
261 * order, as only the current highest-priority pending irq can be EOIed.
262 */
263 struct pending_eoi {
264 u8 vector; /* Vector awaiting EOI */
265 u8 ready; /* Ready for EOI now? */
266 };
267 static DEFINE_PER_CPU(struct pending_eoi, pending_eoi[NR_VECTORS]);
268 #define pending_eoi_sp(p) ((p)[NR_VECTORS-1].vector)
270 static inline void set_pirq_eoi(struct domain *d, unsigned int irq)
271 {
272 if ( d->arch.pirq_eoi_map )
273 set_bit(irq, d->arch.pirq_eoi_map);
274 }
276 static inline void clear_pirq_eoi(struct domain *d, unsigned int irq)
277 {
278 if ( d->arch.pirq_eoi_map )
279 clear_bit(irq, d->arch.pirq_eoi_map);
280 }
282 static void _irq_guest_eoi(irq_desc_t *desc)
283 {
284 irq_guest_action_t *action = (irq_guest_action_t *)desc->action;
285 unsigned int i, vector = desc - irq_desc;
287 if ( !(desc->status & IRQ_GUEST_EOI_PENDING) )
288 return;
290 for ( i = 0; i < action->nr_guests; ++i )
291 clear_pirq_eoi(action->guest[i],
292 domain_vector_to_irq(action->guest[i], vector));
294 desc->status &= ~(IRQ_INPROGRESS|IRQ_GUEST_EOI_PENDING);
295 desc->handler->enable(vector);
296 }
298 static struct timer irq_guest_eoi_timer[NR_VECTORS];
299 static void irq_guest_eoi_timer_fn(void *data)
300 {
301 irq_desc_t *desc = data;
302 unsigned long flags;
304 spin_lock_irqsave(&desc->lock, flags);
305 _irq_guest_eoi(desc);
306 spin_unlock_irqrestore(&desc->lock, flags);
307 }
309 static void __do_IRQ_guest(int vector)
310 {
311 irq_desc_t *desc = &irq_desc[vector];
312 irq_guest_action_t *action = (irq_guest_action_t *)desc->action;
313 struct domain *d;
314 int i, sp, already_pending = 0;
315 struct pending_eoi *peoi = this_cpu(pending_eoi);
317 if ( unlikely(action->nr_guests == 0) )
318 {
319 /* An interrupt may slip through while freeing an ACKTYPE_EOI irq. */
320 ASSERT(action->ack_type == ACKTYPE_EOI);
321 ASSERT(desc->status & IRQ_DISABLED);
322 desc->handler->end(vector);
323 return;
324 }
326 if ( action->ack_type == ACKTYPE_EOI )
327 {
328 sp = pending_eoi_sp(peoi);
329 ASSERT((sp == 0) || (peoi[sp-1].vector < vector));
330 ASSERT(sp < (NR_VECTORS-1));
331 peoi[sp].vector = vector;
332 peoi[sp].ready = 0;
333 pending_eoi_sp(peoi) = sp+1;
334 cpu_set(smp_processor_id(), action->cpu_eoi_map);
335 }
337 for ( i = 0; i < action->nr_guests; i++ )
338 {
339 unsigned int irq;
340 d = action->guest[i];
341 irq = domain_vector_to_irq(d, vector);
342 if ( (action->ack_type != ACKTYPE_NONE) &&
343 !test_and_set_bit(irq, d->pirq_mask) )
344 action->in_flight++;
345 if ( hvm_do_IRQ_dpci(d, irq) )
346 {
347 if ( action->ack_type == ACKTYPE_NONE )
348 {
349 already_pending += !!(desc->status & IRQ_INPROGRESS);
350 desc->status |= IRQ_INPROGRESS; /* cleared during hvm eoi */
351 }
352 }
353 else if ( send_guest_pirq(d, irq) &&
354 (action->ack_type == ACKTYPE_NONE) )
355 {
356 already_pending++;
357 }
358 }
360 if ( already_pending == action->nr_guests )
361 {
362 stop_timer(&irq_guest_eoi_timer[vector]);
363 desc->handler->disable(vector);
364 desc->status |= IRQ_GUEST_EOI_PENDING;
365 for ( i = 0; i < already_pending; ++i )
366 {
367 d = action->guest[i];
368 set_pirq_eoi(d, domain_vector_to_irq(d, vector));
369 /*
370 * Could check here whether the guest unmasked the event by now
371 * (or perhaps just re-issue the send_guest_pirq()), and if it
372 * can now accept the event,
373 * - clear all the pirq_eoi bits we already set,
374 * - re-enable the vector, and
375 * - skip the timer setup below.
376 */
377 }
378 init_timer(&irq_guest_eoi_timer[vector],
379 irq_guest_eoi_timer_fn, desc, smp_processor_id());
380 set_timer(&irq_guest_eoi_timer[vector], NOW() + MILLISECS(1));
381 }
382 }
384 /*
385 * Retrieve Xen irq-descriptor corresponding to a domain-specific irq.
386 * The descriptor is returned locked. This function is safe against changes
387 * to the per-domain irq-to-vector mapping.
388 */
389 irq_desc_t *domain_spin_lock_irq_desc(
390 struct domain *d, int irq, unsigned long *pflags)
391 {
392 unsigned int vector;
393 unsigned long flags;
394 irq_desc_t *desc;
396 for ( ; ; )
397 {
398 vector = domain_irq_to_vector(d, irq);
399 if ( vector <= 0 )
400 return NULL;
401 desc = &irq_desc[vector];
402 spin_lock_irqsave(&desc->lock, flags);
403 if ( vector == domain_irq_to_vector(d, irq) )
404 break;
405 spin_unlock_irqrestore(&desc->lock, flags);
406 }
408 if ( pflags != NULL )
409 *pflags = flags;
410 return desc;
411 }
413 /* Flush all ready EOIs from the top of this CPU's pending-EOI stack. */
414 static void flush_ready_eoi(void)
415 {
416 struct pending_eoi *peoi = this_cpu(pending_eoi);
417 irq_desc_t *desc;
418 int vector, sp;
420 ASSERT(!local_irq_is_enabled());
422 sp = pending_eoi_sp(peoi);
424 while ( (--sp >= 0) && peoi[sp].ready )
425 {
426 vector = peoi[sp].vector;
427 desc = &irq_desc[vector];
428 spin_lock(&desc->lock);
429 desc->handler->end(vector);
430 spin_unlock(&desc->lock);
431 }
433 pending_eoi_sp(peoi) = sp+1;
434 }
436 static void __set_eoi_ready(irq_desc_t *desc)
437 {
438 irq_guest_action_t *action = (irq_guest_action_t *)desc->action;
439 struct pending_eoi *peoi = this_cpu(pending_eoi);
440 int vector, sp;
442 vector = desc - irq_desc;
444 if ( !(desc->status & IRQ_GUEST) ||
445 (action->in_flight != 0) ||
446 !cpu_test_and_clear(smp_processor_id(), action->cpu_eoi_map) )
447 return;
449 sp = pending_eoi_sp(peoi);
450 do {
451 ASSERT(sp > 0);
452 } while ( peoi[--sp].vector != vector );
453 ASSERT(!peoi[sp].ready);
454 peoi[sp].ready = 1;
455 }
457 /* Mark specified IRQ as ready-for-EOI (if it really is) and attempt to EOI. */
458 static void set_eoi_ready(void *data)
459 {
460 irq_desc_t *desc = data;
462 ASSERT(!local_irq_is_enabled());
464 spin_lock(&desc->lock);
465 __set_eoi_ready(desc);
466 spin_unlock(&desc->lock);
468 flush_ready_eoi();
469 }
471 static void __pirq_guest_eoi(struct domain *d, int irq)
472 {
473 irq_desc_t *desc;
474 irq_guest_action_t *action;
475 cpumask_t cpu_eoi_map;
476 int vector;
478 ASSERT(local_irq_is_enabled());
479 desc = domain_spin_lock_irq_desc(d, irq, NULL);
480 if ( desc == NULL )
481 return;
483 action = (irq_guest_action_t *)desc->action;
484 vector = desc - irq_desc;
486 if ( action->ack_type == ACKTYPE_NONE )
487 {
488 ASSERT(!test_bit(irq, d->pirq_mask));
489 stop_timer(&irq_guest_eoi_timer[vector]);
490 _irq_guest_eoi(desc);
491 }
493 if ( unlikely(!test_and_clear_bit(irq, d->pirq_mask)) ||
494 unlikely(--action->in_flight != 0) )
495 {
496 spin_unlock_irq(&desc->lock);
497 return;
498 }
500 if ( action->ack_type == ACKTYPE_UNMASK )
501 {
502 ASSERT(cpus_empty(action->cpu_eoi_map));
503 desc->handler->end(vector);
504 spin_unlock_irq(&desc->lock);
505 return;
506 }
508 ASSERT(action->ack_type == ACKTYPE_EOI);
510 cpu_eoi_map = action->cpu_eoi_map;
512 if ( cpu_test_and_clear(smp_processor_id(), cpu_eoi_map) )
513 {
514 __set_eoi_ready(desc);
515 spin_unlock(&desc->lock);
516 flush_ready_eoi();
517 local_irq_enable();
518 }
519 else
520 {
521 spin_unlock_irq(&desc->lock);
522 }
524 if ( !cpus_empty(cpu_eoi_map) )
525 on_selected_cpus(&cpu_eoi_map, set_eoi_ready, desc, 0);
526 }
528 int pirq_guest_eoi(struct domain *d, int irq)
529 {
530 if ( (irq < 0) || (irq >= d->nr_pirqs) )
531 return -EINVAL;
533 __pirq_guest_eoi(d, irq);
535 return 0;
536 }
538 int pirq_guest_unmask(struct domain *d)
539 {
540 unsigned int irq, nr = d->nr_pirqs;
542 for ( irq = find_first_bit(d->pirq_mask, nr);
543 irq < nr;
544 irq = find_next_bit(d->pirq_mask, nr, irq+1) )
545 {
546 if ( !test_bit(d->pirq_to_evtchn[irq], &shared_info(d, evtchn_mask)) )
547 __pirq_guest_eoi(d, irq);
548 }
550 return 0;
551 }
553 extern int ioapic_ack_new;
554 static int pirq_acktype(struct domain *d, int irq)
555 {
556 irq_desc_t *desc;
557 unsigned int vector;
559 vector = domain_irq_to_vector(d, irq);
560 if ( vector <= 0 )
561 return ACKTYPE_NONE;
563 desc = &irq_desc[vector];
565 if ( desc->handler == &no_irq_type )
566 return ACKTYPE_NONE;
568 /*
569 * Edge-triggered IO-APIC and LAPIC interrupts need no final
570 * acknowledgement: we ACK early during interrupt processing.
571 */
572 if ( !strcmp(desc->handler->typename, "IO-APIC-edge") ||
573 !strcmp(desc->handler->typename, "local-APIC-edge") )
574 return ACKTYPE_NONE;
576 /*
577 * MSIs are treated as edge-triggered interrupts, except
578 * when there is no proper way to mask them.
579 */
580 if ( desc->handler == &pci_msi_type )
581 return msi_maskable_irq(desc->msi_desc) ? ACKTYPE_NONE : ACKTYPE_EOI;
583 /*
584 * Level-triggered IO-APIC interrupts need to be acknowledged on the CPU
585 * on which they were received. This is because we tickle the LAPIC to EOI.
586 */
587 if ( !strcmp(desc->handler->typename, "IO-APIC-level") )
588 return ioapic_ack_new ? ACKTYPE_EOI : ACKTYPE_UNMASK;
590 /* Legacy PIC interrupts can be acknowledged from any CPU. */
591 if ( !strcmp(desc->handler->typename, "XT-PIC") )
592 return ACKTYPE_UNMASK;
594 printk("Unknown PIC type '%s' for IRQ %d\n", desc->handler->typename, irq);
595 BUG();
597 return 0;
598 }
600 int pirq_shared(struct domain *d, int irq)
601 {
602 irq_desc_t *desc;
603 irq_guest_action_t *action;
604 unsigned long flags;
605 int shared;
607 desc = domain_spin_lock_irq_desc(d, irq, &flags);
608 if ( desc == NULL )
609 return 0;
611 action = (irq_guest_action_t *)desc->action;
612 shared = ((desc->status & IRQ_GUEST) && (action->nr_guests > 1));
614 spin_unlock_irqrestore(&desc->lock, flags);
616 return shared;
617 }
619 int pirq_guest_bind(struct vcpu *v, int irq, int will_share)
620 {
621 unsigned int vector;
622 irq_desc_t *desc;
623 irq_guest_action_t *action, *newaction = NULL;
624 int rc = 0;
625 cpumask_t cpumask = CPU_MASK_NONE;
627 WARN_ON(!spin_is_locked(&v->domain->event_lock));
628 BUG_ON(!local_irq_is_enabled());
630 retry:
631 desc = domain_spin_lock_irq_desc(v->domain, irq, NULL);
632 if ( desc == NULL )
633 {
634 rc = -EINVAL;
635 goto out;
636 }
638 action = (irq_guest_action_t *)desc->action;
639 vector = desc - irq_desc;
641 if ( !(desc->status & IRQ_GUEST) )
642 {
643 if ( desc->action != NULL )
644 {
645 gdprintk(XENLOG_INFO,
646 "Cannot bind IRQ %d to guest. In use by '%s'.\n",
647 irq, desc->action->name);
648 rc = -EBUSY;
649 goto unlock_out;
650 }
652 if ( newaction == NULL )
653 {
654 spin_unlock_irq(&desc->lock);
655 if ( (newaction = xmalloc(irq_guest_action_t)) != NULL )
656 goto retry;
657 gdprintk(XENLOG_INFO,
658 "Cannot bind IRQ %d to guest. Out of memory.\n",
659 irq);
660 rc = -ENOMEM;
661 goto out;
662 }
664 action = newaction;
665 desc->action = (struct irqaction *)action;
666 newaction = NULL;
668 action->nr_guests = 0;
669 action->in_flight = 0;
670 action->shareable = will_share;
671 action->ack_type = pirq_acktype(v->domain, irq);
672 cpus_clear(action->cpu_eoi_map);
674 desc->depth = 0;
675 desc->status |= IRQ_GUEST;
676 desc->status &= ~IRQ_DISABLED;
677 desc->handler->startup(vector);
679 /* Attempt to bind the interrupt target to the correct CPU. */
680 cpu_set(v->processor, cpumask);
681 if ( !opt_noirqbalance && (desc->handler->set_affinity != NULL) )
682 desc->handler->set_affinity(vector, cpumask);
683 }
684 else if ( !will_share || !action->shareable )
685 {
686 gdprintk(XENLOG_INFO, "Cannot bind IRQ %d to guest. %s.\n",
687 irq,
688 will_share ?
689 "Others do not share" :
690 "Will not share with others");
691 rc = -EBUSY;
692 goto unlock_out;
693 }
694 else if ( action->nr_guests == 0 )
695 {
696 /*
697 * Indicates that an ACKTYPE_EOI interrupt is being released.
698 * Wait for that to happen before continuing.
699 */
700 ASSERT(action->ack_type == ACKTYPE_EOI);
701 ASSERT(desc->status & IRQ_DISABLED);
702 spin_unlock_irq(&desc->lock);
703 cpu_relax();
704 goto retry;
705 }
707 if ( action->nr_guests == IRQ_MAX_GUESTS )
708 {
709 gdprintk(XENLOG_INFO, "Cannot bind IRQ %d to guest. "
710 "Already at max share.\n", irq);
711 rc = -EBUSY;
712 goto unlock_out;
713 }
715 action->guest[action->nr_guests++] = v->domain;
717 if ( action->ack_type != ACKTYPE_NONE )
718 set_pirq_eoi(v->domain, irq);
719 else
720 clear_pirq_eoi(v->domain, irq);
722 unlock_out:
723 spin_unlock_irq(&desc->lock);
724 out:
725 if ( newaction != NULL )
726 xfree(newaction);
727 return rc;
728 }
730 static irq_guest_action_t *__pirq_guest_unbind(
731 struct domain *d, int irq, irq_desc_t *desc)
732 {
733 unsigned int vector;
734 irq_guest_action_t *action;
735 cpumask_t cpu_eoi_map;
736 int i;
738 BUG_ON(!(desc->status & IRQ_GUEST));
740 action = (irq_guest_action_t *)desc->action;
741 vector = desc - irq_desc;
743 for ( i = 0; (i < action->nr_guests) && (action->guest[i] != d); i++ )
744 continue;
745 BUG_ON(i == action->nr_guests);
746 memmove(&action->guest[i], &action->guest[i+1], IRQ_MAX_GUESTS-i-1);
747 action->nr_guests--;
749 switch ( action->ack_type )
750 {
751 case ACKTYPE_UNMASK:
752 if ( test_and_clear_bit(irq, d->pirq_mask) &&
753 (--action->in_flight == 0) )
754 desc->handler->end(vector);
755 break;
756 case ACKTYPE_EOI:
757 /* NB. If #guests == 0 then we clear the eoi_map later on. */
758 if ( test_and_clear_bit(irq, d->pirq_mask) &&
759 (--action->in_flight == 0) &&
760 (action->nr_guests != 0) )
761 {
762 cpu_eoi_map = action->cpu_eoi_map;
763 spin_unlock_irq(&desc->lock);
764 on_selected_cpus(&cpu_eoi_map, set_eoi_ready, desc, 0);
765 spin_lock_irq(&desc->lock);
766 }
767 break;
768 case ACKTYPE_NONE:
769 stop_timer(&irq_guest_eoi_timer[vector]);
770 _irq_guest_eoi(desc);
771 break;
772 }
774 /*
775 * The guest cannot re-bind to this IRQ until this function returns. So,
776 * when we have flushed this IRQ from pirq_mask, it should remain flushed.
777 */
778 BUG_ON(test_bit(irq, d->pirq_mask));
780 if ( action->nr_guests != 0 )
781 return NULL;
783 BUG_ON(action->in_flight != 0);
785 /* Disabling IRQ before releasing the desc_lock avoids an IRQ storm. */
786 desc->depth = 1;
787 desc->status |= IRQ_DISABLED;
788 desc->handler->disable(vector);
790 /*
791 * Mark any remaining pending EOIs as ready to flush.
792 * NOTE: We will need to make this a stronger barrier if in future we allow
793 * an interrupt vectors to be re-bound to a different PIC. In that case we
794 * would need to flush all ready EOIs before returning as otherwise the
795 * desc->handler could change and we would call the wrong 'end' hook.
796 */
797 cpu_eoi_map = action->cpu_eoi_map;
798 if ( !cpus_empty(cpu_eoi_map) )
799 {
800 BUG_ON(action->ack_type != ACKTYPE_EOI);
801 spin_unlock_irq(&desc->lock);
802 on_selected_cpus(&cpu_eoi_map, set_eoi_ready, desc, 1);
803 spin_lock_irq(&desc->lock);
804 }
806 BUG_ON(!cpus_empty(action->cpu_eoi_map));
808 desc->action = NULL;
809 desc->status &= ~IRQ_GUEST;
810 desc->status &= ~IRQ_INPROGRESS;
811 kill_timer(&irq_guest_eoi_timer[vector]);
812 desc->handler->shutdown(vector);
814 /* Caller frees the old guest descriptor block. */
815 return action;
816 }
818 void pirq_guest_unbind(struct domain *d, int irq)
819 {
820 irq_guest_action_t *oldaction = NULL;
821 irq_desc_t *desc;
822 int vector;
824 WARN_ON(!spin_is_locked(&d->event_lock));
826 BUG_ON(!local_irq_is_enabled());
827 desc = domain_spin_lock_irq_desc(d, irq, NULL);
829 if ( desc == NULL )
830 {
831 vector = -domain_irq_to_vector(d, irq);
832 BUG_ON(vector <= 0);
833 desc = &irq_desc[vector];
834 spin_lock_irq(&desc->lock);
835 d->arch.pirq_vector[irq] = d->arch.vector_pirq[vector] = 0;
836 }
837 else
838 {
839 oldaction = __pirq_guest_unbind(d, irq, desc);
840 }
842 spin_unlock_irq(&desc->lock);
844 if ( oldaction != NULL )
845 xfree(oldaction);
846 }
848 static int pirq_guest_force_unbind(struct domain *d, int irq)
849 {
850 irq_desc_t *desc;
851 irq_guest_action_t *action, *oldaction = NULL;
852 int i, bound = 0;
854 WARN_ON(!spin_is_locked(&d->event_lock));
856 BUG_ON(!local_irq_is_enabled());
857 desc = domain_spin_lock_irq_desc(d, irq, NULL);
858 BUG_ON(desc == NULL);
860 if ( !(desc->status & IRQ_GUEST) )
861 goto out;
863 action = (irq_guest_action_t *)desc->action;
864 for ( i = 0; (i < action->nr_guests) && (action->guest[i] != d); i++ )
865 continue;
866 if ( i == action->nr_guests )
867 goto out;
869 bound = 1;
870 oldaction = __pirq_guest_unbind(d, irq, desc);
872 out:
873 spin_unlock_irq(&desc->lock);
875 if ( oldaction != NULL )
876 xfree(oldaction);
878 return bound;
879 }
881 int get_free_pirq(struct domain *d, int type, int index)
882 {
883 int i;
885 ASSERT(spin_is_locked(&d->event_lock));
887 if ( type == MAP_PIRQ_TYPE_GSI )
888 {
889 for ( i = 16; i < nr_irqs; i++ )
890 if ( !d->arch.pirq_vector[i] )
891 break;
892 if ( i == nr_irqs )
893 return -ENOSPC;
894 }
895 else
896 {
897 for ( i = d->nr_pirqs - 1; i >= 16; i-- )
898 if ( !d->arch.pirq_vector[i] )
899 break;
900 if ( i == 16 )
901 return -ENOSPC;
902 }
904 return i;
905 }
907 int map_domain_pirq(
908 struct domain *d, int pirq, int vector, int type, void *data)
909 {
910 int ret = 0;
911 int old_vector, old_pirq;
912 irq_desc_t *desc;
913 unsigned long flags;
914 struct msi_desc *msi_desc;
915 struct pci_dev *pdev = NULL;
917 ASSERT(spin_is_locked(&pcidevs_lock));
918 ASSERT(spin_is_locked(&d->event_lock));
920 if ( !IS_PRIV(current->domain) )
921 return -EPERM;
923 if ( pirq < 0 || pirq >= d->nr_pirqs || vector < 0 || vector >= NR_VECTORS )
924 {
925 dprintk(XENLOG_G_ERR, "dom%d: invalid pirq %d or vector %d\n",
926 d->domain_id, pirq, vector);
927 return -EINVAL;
928 }
930 old_vector = domain_irq_to_vector(d, pirq);
931 old_pirq = domain_vector_to_irq(d, vector);
933 if ( (old_vector && (old_vector != vector) ) ||
934 (old_pirq && (old_pirq != pirq)) )
935 {
936 dprintk(XENLOG_G_ERR, "dom%d: pirq %d or vector %d already mapped\n",
937 d->domain_id, pirq, vector);
938 return -EINVAL;
939 }
941 ret = irq_permit_access(d, pirq);
942 if ( ret )
943 {
944 dprintk(XENLOG_G_ERR, "dom%d: could not permit access to irq %d\n",
945 d->domain_id, pirq);
946 return ret;
947 }
949 desc = &irq_desc[vector];
951 if ( type == MAP_PIRQ_TYPE_MSI )
952 {
953 struct msi_info *msi = (struct msi_info *)data;
955 ret = -ENODEV;
956 if ( !cpu_has_apic )
957 goto done;
959 pdev = pci_get_pdev(msi->bus, msi->devfn);
960 ret = pci_enable_msi(msi, &msi_desc);
961 if ( ret )
962 goto done;
964 spin_lock_irqsave(&desc->lock, flags);
966 if ( desc->handler != &no_irq_type )
967 dprintk(XENLOG_G_ERR, "dom%d: vector %d in use\n",
968 d->domain_id, vector);
969 desc->handler = &pci_msi_type;
970 d->arch.pirq_vector[pirq] = vector;
971 d->arch.vector_pirq[vector] = pirq;
972 setup_msi_irq(pdev, msi_desc);
973 spin_unlock_irqrestore(&desc->lock, flags);
974 } else
975 {
976 spin_lock_irqsave(&desc->lock, flags);
977 d->arch.pirq_vector[pirq] = vector;
978 d->arch.vector_pirq[vector] = pirq;
979 spin_unlock_irqrestore(&desc->lock, flags);
980 }
982 done:
983 return ret;
984 }
986 /* The pirq should have been unbound before this call. */
987 int unmap_domain_pirq(struct domain *d, int pirq)
988 {
989 unsigned long flags;
990 irq_desc_t *desc;
991 int vector, ret = 0;
992 bool_t forced_unbind;
993 struct msi_desc *msi_desc = NULL;
995 if ( (pirq < 0) || (pirq >= d->nr_pirqs) )
996 return -EINVAL;
998 if ( !IS_PRIV(current->domain) )
999 return -EINVAL;
1001 ASSERT(spin_is_locked(&pcidevs_lock));
1002 ASSERT(spin_is_locked(&d->event_lock));
1004 vector = domain_irq_to_vector(d, pirq);
1005 if ( vector <= 0 )
1007 dprintk(XENLOG_G_ERR, "dom%d: pirq %d not mapped\n",
1008 d->domain_id, pirq);
1009 ret = -EINVAL;
1010 goto done;
1013 forced_unbind = pirq_guest_force_unbind(d, pirq);
1014 if ( forced_unbind )
1015 dprintk(XENLOG_G_WARNING, "dom%d: forcing unbind of pirq %d\n",
1016 d->domain_id, pirq);
1018 desc = &irq_desc[vector];
1020 if ( (msi_desc = desc->msi_desc) != NULL )
1021 pci_disable_msi(msi_desc);
1023 spin_lock_irqsave(&desc->lock, flags);
1025 BUG_ON(vector != domain_irq_to_vector(d, pirq));
1027 if ( msi_desc )
1028 teardown_msi_vector(vector);
1030 if ( desc->handler == &pci_msi_type )
1031 desc->handler = &no_irq_type;
1033 if ( !forced_unbind )
1035 d->arch.pirq_vector[pirq] = 0;
1036 d->arch.vector_pirq[vector] = 0;
1038 else
1040 d->arch.pirq_vector[pirq] = -vector;
1041 d->arch.vector_pirq[vector] = -pirq;
1044 spin_unlock_irqrestore(&desc->lock, flags);
1045 if (msi_desc)
1047 msi_free_vector(msi_desc);
1048 free_irq_vector(vector);
1051 ret = irq_deny_access(d, pirq);
1052 if ( ret )
1053 dprintk(XENLOG_G_ERR, "dom%d: could not deny access to irq %d\n",
1054 d->domain_id, pirq);
1056 done:
1057 return ret;
1060 void free_domain_pirqs(struct domain *d)
1062 int i;
1064 spin_lock(&pcidevs_lock);
1065 spin_lock(&d->event_lock);
1067 for ( i = 0; i < d->nr_pirqs; i++ )
1068 if ( d->arch.pirq_vector[i] > 0 )
1069 unmap_domain_pirq(d, i);
1071 spin_unlock(&d->event_lock);
1072 spin_unlock(&pcidevs_lock);
1075 extern void dump_ioapic_irq_info(void);
1077 static void dump_irqs(unsigned char key)
1079 int i, glob_irq, irq, vector;
1080 irq_desc_t *desc;
1081 irq_guest_action_t *action;
1082 struct domain *d;
1083 unsigned long flags;
1085 printk("Guest interrupt information:\n");
1087 for ( vector = 0; vector < NR_VECTORS; vector++ )
1090 glob_irq = vector_to_irq(vector);
1092 desc = &irq_desc[vector];
1093 if ( desc == NULL || desc->handler == &no_irq_type )
1094 continue;
1096 spin_lock_irqsave(&desc->lock, flags);
1098 if ( !(desc->status & IRQ_GUEST) )
1099 printk(" Vec%3d IRQ%3d: type=%-15s status=%08x "
1100 "mapped, unbound\n",
1101 vector, glob_irq, desc->handler->typename, desc->status);
1102 else
1104 action = (irq_guest_action_t *)desc->action;
1106 printk(" Vec%3d IRQ%3d: type=%-15s status=%08x "
1107 "in-flight=%d domain-list=",
1108 vector, glob_irq, desc->handler->typename,
1109 desc->status, action->in_flight);
1111 for ( i = 0; i < action->nr_guests; i++ )
1113 d = action->guest[i];
1114 irq = domain_vector_to_irq(d, vector);
1115 printk("%u:%3d(%c%c%c%c)",
1116 d->domain_id, irq,
1117 (test_bit(d->pirq_to_evtchn[glob_irq],
1118 &shared_info(d, evtchn_pending)) ?
1119 'P' : '-'),
1120 (test_bit(d->pirq_to_evtchn[glob_irq] /
1121 BITS_PER_EVTCHN_WORD(d),
1122 &vcpu_info(d->vcpu[0], evtchn_pending_sel)) ?
1123 'S' : '-'),
1124 (test_bit(d->pirq_to_evtchn[glob_irq],
1125 &shared_info(d, evtchn_mask)) ?
1126 'M' : '-'),
1127 (test_bit(glob_irq, d->pirq_mask) ?
1128 'M' : '-'));
1129 if ( i != action->nr_guests )
1130 printk(",");
1133 printk("\n");
1136 spin_unlock_irqrestore(&desc->lock, flags);
1139 dump_ioapic_irq_info();
1142 static int __init setup_dump_irqs(void)
1144 register_keyhandler('i', dump_irqs, "dump interrupt bindings");
1145 return 0;
1147 __initcall(setup_dump_irqs);
1149 #ifdef CONFIG_HOTPLUG_CPU
1150 #include <asm/mach-generic/mach_apic.h>
1151 #include <xen/delay.h>
1153 void fixup_irqs(cpumask_t map)
1155 unsigned int vector, sp;
1156 static int warned;
1157 irq_guest_action_t *action;
1158 struct pending_eoi *peoi;
1159 irq_desc_t *desc;
1160 unsigned long flags;
1162 /* Direct all future interrupts away from this CPU. */
1163 for ( vector = 0; vector < NR_VECTORS; vector++ )
1165 cpumask_t mask;
1166 if ( vector_to_irq(vector) == 2 )
1167 continue;
1169 desc = &irq_desc[vector];
1171 spin_lock_irqsave(&desc->lock, flags);
1173 cpus_and(mask, desc->affinity, map);
1174 if ( any_online_cpu(mask) == NR_CPUS )
1176 printk("Breaking affinity for vector %u (irq %i)\n",
1177 vector, vector_to_irq(vector));
1178 mask = map;
1180 if ( desc->handler->set_affinity )
1181 desc->handler->set_affinity(vector, mask);
1182 else if ( desc->action && !(warned++) )
1183 printk("Cannot set affinity for vector %u (irq %i)\n",
1184 vector, vector_to_irq(vector));
1186 spin_unlock_irqrestore(&desc->lock, flags);
1189 /* Service any interrupts that beat us in the re-direction race. */
1190 local_irq_enable();
1191 mdelay(1);
1192 local_irq_disable();
1194 /* Clean up cpu_eoi_map of every interrupt to exclude this CPU. */
1195 for ( vector = 0; vector < NR_VECTORS; vector++ )
1197 if ( !(irq_desc[vector].status & IRQ_GUEST) )
1198 continue;
1199 action = (irq_guest_action_t *)irq_desc[vector].action;
1200 cpu_clear(smp_processor_id(), action->cpu_eoi_map);
1203 /* Flush the interrupt EOI stack. */
1204 peoi = this_cpu(pending_eoi);
1205 for ( sp = 0; sp < pending_eoi_sp(peoi); sp++ )
1206 peoi[sp].ready = 1;
1207 flush_ready_eoi();
1209 #endif