ia64/xen-unstable

view xen/arch/x86/hvm/platform.c @ 13910:ed6501070f37

Support INC/DEC in mmio decoder. Opcodes 0xFE and 0xFF.
Signed-off-by: Keir Fraser <keir@xensource.com>
author kfraser@localhost.localdomain
date Wed Feb 14 12:10:01 2007 +0000 (2007-02-14)
parents 6daa91dc9247
children d08c2af53804
line source
1 /*
2 * platform.c: handling x86 platform related MMIO instructions
3 *
4 * Copyright (c) 2004, Intel Corporation.
5 * Copyright (c) 2005, International Business Machines Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
18 * Place - Suite 330, Boston, MA 02111-1307 USA.
19 */
21 #include <xen/config.h>
22 #include <xen/types.h>
23 #include <xen/mm.h>
24 #include <xen/domain_page.h>
25 #include <asm/page.h>
26 #include <xen/event.h>
27 #include <xen/trace.h>
28 #include <xen/sched.h>
29 #include <asm/regs.h>
30 #include <asm/x86_emulate.h>
31 #include <asm/paging.h>
32 #include <asm/hvm/hvm.h>
33 #include <asm/hvm/support.h>
34 #include <asm/hvm/io.h>
35 #include <public/hvm/ioreq.h>
37 #include <xen/lib.h>
38 #include <xen/sched.h>
39 #include <asm/current.h>
41 #define DECODE_success 1
42 #define DECODE_failure 0
44 #define mk_operand(size_reg, index, seg, flag) \
45 (((size_reg) << 24) | ((index) << 16) | ((seg) << 8) | (flag))
47 #if defined (__x86_64__)
48 static inline long __get_reg_value(unsigned long reg, int size)
49 {
50 switch ( size ) {
51 case BYTE_64:
52 return (char)(reg & 0xFF);
53 case WORD:
54 return (short)(reg & 0xFFFF);
55 case LONG:
56 return (int)(reg & 0xFFFFFFFF);
57 case QUAD:
58 return (long)(reg);
59 default:
60 printk("Error: (__get_reg_value) Invalid reg size\n");
61 domain_crash_synchronous();
62 }
63 }
65 long get_reg_value(int size, int index, int seg, struct cpu_user_regs *regs)
66 {
67 if ( size == BYTE ) {
68 switch ( index ) {
69 case 0: /* %al */
70 return (char)(regs->rax & 0xFF);
71 case 1: /* %cl */
72 return (char)(regs->rcx & 0xFF);
73 case 2: /* %dl */
74 return (char)(regs->rdx & 0xFF);
75 case 3: /* %bl */
76 return (char)(regs->rbx & 0xFF);
77 case 4: /* %ah */
78 return (char)((regs->rax & 0xFF00) >> 8);
79 case 5: /* %ch */
80 return (char)((regs->rcx & 0xFF00) >> 8);
81 case 6: /* %dh */
82 return (char)((regs->rdx & 0xFF00) >> 8);
83 case 7: /* %bh */
84 return (char)((regs->rbx & 0xFF00) >> 8);
85 default:
86 printk("Error: (get_reg_value) Invalid index value\n");
87 domain_crash_synchronous();
88 }
89 /* NOTREACHED */
90 }
92 switch ( index ) {
93 case 0: return __get_reg_value(regs->rax, size);
94 case 1: return __get_reg_value(regs->rcx, size);
95 case 2: return __get_reg_value(regs->rdx, size);
96 case 3: return __get_reg_value(regs->rbx, size);
97 case 4: return __get_reg_value(regs->rsp, size);
98 case 5: return __get_reg_value(regs->rbp, size);
99 case 6: return __get_reg_value(regs->rsi, size);
100 case 7: return __get_reg_value(regs->rdi, size);
101 case 8: return __get_reg_value(regs->r8, size);
102 case 9: return __get_reg_value(regs->r9, size);
103 case 10: return __get_reg_value(regs->r10, size);
104 case 11: return __get_reg_value(regs->r11, size);
105 case 12: return __get_reg_value(regs->r12, size);
106 case 13: return __get_reg_value(regs->r13, size);
107 case 14: return __get_reg_value(regs->r14, size);
108 case 15: return __get_reg_value(regs->r15, size);
109 default:
110 printk("Error: (get_reg_value) Invalid index value\n");
111 domain_crash_synchronous();
112 }
113 }
114 #elif defined (__i386__)
115 static inline long __get_reg_value(unsigned long reg, int size)
116 {
117 switch ( size ) {
118 case WORD:
119 return (short)(reg & 0xFFFF);
120 case LONG:
121 return (int)(reg & 0xFFFFFFFF);
122 default:
123 printk("Error: (__get_reg_value) Invalid reg size\n");
124 domain_crash_synchronous();
125 }
126 }
128 long get_reg_value(int size, int index, int seg, struct cpu_user_regs *regs)
129 {
130 if ( size == BYTE ) {
131 switch ( index ) {
132 case 0: /* %al */
133 return (char)(regs->eax & 0xFF);
134 case 1: /* %cl */
135 return (char)(regs->ecx & 0xFF);
136 case 2: /* %dl */
137 return (char)(regs->edx & 0xFF);
138 case 3: /* %bl */
139 return (char)(regs->ebx & 0xFF);
140 case 4: /* %ah */
141 return (char)((regs->eax & 0xFF00) >> 8);
142 case 5: /* %ch */
143 return (char)((regs->ecx & 0xFF00) >> 8);
144 case 6: /* %dh */
145 return (char)((regs->edx & 0xFF00) >> 8);
146 case 7: /* %bh */
147 return (char)((regs->ebx & 0xFF00) >> 8);
148 default:
149 printk("Error: (get_reg_value) Invalid index value\n");
150 domain_crash_synchronous();
151 }
152 }
154 switch ( index ) {
155 case 0: return __get_reg_value(regs->eax, size);
156 case 1: return __get_reg_value(regs->ecx, size);
157 case 2: return __get_reg_value(regs->edx, size);
158 case 3: return __get_reg_value(regs->ebx, size);
159 case 4: return __get_reg_value(regs->esp, size);
160 case 5: return __get_reg_value(regs->ebp, size);
161 case 6: return __get_reg_value(regs->esi, size);
162 case 7: return __get_reg_value(regs->edi, size);
163 default:
164 printk("Error: (get_reg_value) Invalid index value\n");
165 domain_crash_synchronous();
166 }
167 }
168 #endif
170 static inline unsigned char *check_prefix(unsigned char *inst,
171 struct hvm_io_op *mmio_op,
172 unsigned char *ad_size,
173 unsigned char *op_size,
174 unsigned char *seg_sel,
175 unsigned char *rex_p)
176 {
177 while ( 1 ) {
178 switch ( *inst ) {
179 /* rex prefix for em64t instructions */
180 case 0x40 ... 0x4f:
181 *rex_p = *inst;
182 break;
183 case 0xf3: /* REPZ */
184 mmio_op->flags = REPZ;
185 break;
186 case 0xf2: /* REPNZ */
187 mmio_op->flags = REPNZ;
188 break;
189 case 0xf0: /* LOCK */
190 break;
191 case 0x2e: /* CS */
192 case 0x36: /* SS */
193 case 0x3e: /* DS */
194 case 0x26: /* ES */
195 case 0x64: /* FS */
196 case 0x65: /* GS */
197 *seg_sel = *inst;
198 break;
199 case 0x66: /* 32bit->16bit */
200 *op_size = WORD;
201 break;
202 case 0x67:
203 *ad_size = WORD;
204 break;
205 default:
206 return inst;
207 }
208 inst++;
209 }
210 }
212 static inline unsigned long get_immediate(int ad_size, const unsigned char *inst, int op_size)
213 {
214 int mod, reg, rm;
215 unsigned long val = 0;
216 int i;
218 mod = (*inst >> 6) & 3;
219 reg = (*inst >> 3) & 7;
220 rm = *inst & 7;
222 inst++; //skip ModR/M byte
223 if ( ad_size != WORD && mod != 3 && rm == 4 ) {
224 rm = *inst & 7;
225 inst++; //skip SIB byte
226 }
228 switch ( mod ) {
229 case 0:
230 if ( ad_size == WORD ) {
231 if ( rm == 6 )
232 inst = inst + 2; //disp16, skip 2 bytes
233 }
234 else {
235 if ( rm == 5 )
236 inst = inst + 4; //disp32, skip 4 bytes
237 }
238 break;
239 case 1:
240 inst++; //disp8, skip 1 byte
241 break;
242 case 2:
243 if ( ad_size == WORD )
244 inst = inst + 2; //disp16, skip 2 bytes
245 else
246 inst = inst + 4; //disp32, skip 4 bytes
247 break;
248 }
250 if ( op_size == QUAD )
251 op_size = LONG;
253 for ( i = 0; i < op_size; i++ ) {
254 val |= (*inst++ & 0xff) << (8 * i);
255 }
257 return val;
258 }
260 static inline int get_index(const unsigned char *inst, unsigned char rex)
261 {
262 int mod, reg, rm;
263 int rex_r, rex_b;
265 mod = (*inst >> 6) & 3;
266 reg = (*inst >> 3) & 7;
267 rm = *inst & 7;
269 rex_r = (rex >> 2) & 1;
270 rex_b = rex & 1;
272 //Only one operand in the instruction is register
273 if ( mod == 3 ) {
274 return (rm + (rex_b << 3));
275 } else {
276 return (reg + (rex_r << 3));
277 }
278 return 0;
279 }
281 static void init_instruction(struct hvm_io_op *mmio_op)
282 {
283 mmio_op->instr = 0;
285 mmio_op->flags = 0;
287 mmio_op->operand[0] = 0;
288 mmio_op->operand[1] = 0;
289 mmio_op->immediate = 0;
290 }
292 #define GET_OP_SIZE_FOR_BYTE(size_reg) \
293 do { \
294 if ( rex ) \
295 (size_reg) = BYTE_64; \
296 else \
297 (size_reg) = BYTE; \
298 } while( 0 )
300 #define GET_OP_SIZE_FOR_NONEBYTE(op_size) \
301 do { \
302 if ( rex & 0x8 ) \
303 (op_size) = QUAD; \
304 else if ( (op_size) != WORD ) \
305 (op_size) = LONG; \
306 } while( 0 )
309 /*
310 * Decode mem,accumulator operands (as in <opcode> m8/m16/m32, al,ax,eax)
311 */
312 static inline int mem_acc(unsigned char size, struct hvm_io_op *mmio)
313 {
314 mmio->operand[0] = mk_operand(size, 0, 0, MEMORY);
315 mmio->operand[1] = mk_operand(size, 0, 0, REGISTER);
316 return DECODE_success;
317 }
319 /*
320 * Decode accumulator,mem operands (as in <opcode> al,ax,eax, m8/m16/m32)
321 */
322 static inline int acc_mem(unsigned char size, struct hvm_io_op *mmio)
323 {
324 mmio->operand[0] = mk_operand(size, 0, 0, REGISTER);
325 mmio->operand[1] = mk_operand(size, 0, 0, MEMORY);
326 return DECODE_success;
327 }
329 /*
330 * Decode mem,reg operands (as in <opcode> r32/16, m32/16)
331 */
332 static int mem_reg(unsigned char size, unsigned char *opcode,
333 struct hvm_io_op *mmio_op, unsigned char rex)
334 {
335 int index = get_index(opcode + 1, rex);
337 mmio_op->operand[0] = mk_operand(size, 0, 0, MEMORY);
338 mmio_op->operand[1] = mk_operand(size, index, 0, REGISTER);
339 return DECODE_success;
340 }
342 /*
343 * Decode reg,mem operands (as in <opcode> m32/16, r32/16)
344 */
345 static int reg_mem(unsigned char size, unsigned char *opcode,
346 struct hvm_io_op *mmio_op, unsigned char rex)
347 {
348 int index = get_index(opcode + 1, rex);
350 mmio_op->operand[0] = mk_operand(size, index, 0, REGISTER);
351 mmio_op->operand[1] = mk_operand(size, 0, 0, MEMORY);
352 return DECODE_success;
353 }
355 static int mmio_decode(int address_bytes, unsigned char *opcode,
356 struct hvm_io_op *mmio_op,
357 unsigned char *ad_size, unsigned char *op_size,
358 unsigned char *seg_sel)
359 {
360 unsigned char size_reg = 0;
361 unsigned char rex = 0;
362 int index;
364 *ad_size = 0;
365 *op_size = 0;
366 *seg_sel = 0;
367 init_instruction(mmio_op);
369 opcode = check_prefix(opcode, mmio_op, ad_size, op_size, seg_sel, &rex);
371 switch ( address_bytes )
372 {
373 case 2:
374 if ( *op_size == WORD )
375 *op_size = LONG;
376 else if ( *op_size == LONG )
377 *op_size = WORD;
378 else if ( *op_size == 0 )
379 *op_size = WORD;
380 if ( *ad_size == WORD )
381 *ad_size = LONG;
382 else if ( *ad_size == LONG )
383 *ad_size = WORD;
384 else if ( *ad_size == 0 )
385 *ad_size = WORD;
386 break;
387 case 4:
388 if ( *op_size == 0 )
389 *op_size = LONG;
390 if ( *ad_size == 0 )
391 *ad_size = LONG;
392 break;
393 #ifdef __x86_64__
394 case 8:
395 if ( *op_size == 0 )
396 *op_size = rex & 0x8 ? QUAD : LONG;
397 if ( *ad_size == 0 )
398 *ad_size = QUAD;
399 break;
400 #endif
401 }
403 /* the operands order in comments conforms to AT&T convention */
405 switch ( *opcode ) {
407 case 0x00: /* add r8, m8 */
408 mmio_op->instr = INSTR_ADD;
409 *op_size = BYTE;
410 GET_OP_SIZE_FOR_BYTE(size_reg);
411 return reg_mem(size_reg, opcode, mmio_op, rex);
413 case 0x0A: /* or m8, r8 */
414 mmio_op->instr = INSTR_OR;
415 *op_size = BYTE;
416 GET_OP_SIZE_FOR_BYTE(size_reg);
417 return mem_reg(size_reg, opcode, mmio_op, rex);
419 case 0x0B: /* or m32/16, r32/16 */
420 mmio_op->instr = INSTR_OR;
421 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
422 return mem_reg(*op_size, opcode, mmio_op, rex);
424 case 0x20: /* and r8, m8 */
425 mmio_op->instr = INSTR_AND;
426 *op_size = BYTE;
427 GET_OP_SIZE_FOR_BYTE(size_reg);
428 return reg_mem(size_reg, opcode, mmio_op, rex);
430 case 0x21: /* and r32/16, m32/16 */
431 mmio_op->instr = INSTR_AND;
432 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
433 return reg_mem(*op_size, opcode, mmio_op, rex);
435 case 0x22: /* and m8, r8 */
436 mmio_op->instr = INSTR_AND;
437 *op_size = BYTE;
438 GET_OP_SIZE_FOR_BYTE(size_reg);
439 return mem_reg(size_reg, opcode, mmio_op, rex);
441 case 0x23: /* and m32/16, r32/16 */
442 mmio_op->instr = INSTR_AND;
443 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
444 return mem_reg(*op_size, opcode, mmio_op, rex);
446 case 0x2B: /* sub m32/16, r32/16 */
447 mmio_op->instr = INSTR_SUB;
448 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
449 return mem_reg(*op_size, opcode, mmio_op, rex);
451 case 0x30: /* xor r8, m8 */
452 mmio_op->instr = INSTR_XOR;
453 *op_size = BYTE;
454 GET_OP_SIZE_FOR_BYTE(size_reg);
455 return reg_mem(size_reg, opcode, mmio_op, rex);
457 case 0x31: /* xor r32/16, m32/16 */
458 mmio_op->instr = INSTR_XOR;
459 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
460 return reg_mem(*op_size, opcode, mmio_op, rex);
462 case 0x32: /* xor m8, r8 */
463 mmio_op->instr = INSTR_XOR;
464 *op_size = BYTE;
465 GET_OP_SIZE_FOR_BYTE(size_reg);
466 return mem_reg(size_reg, opcode, mmio_op, rex);
468 case 0x38: /* cmp r8, m8 */
469 mmio_op->instr = INSTR_CMP;
470 *op_size = BYTE;
471 GET_OP_SIZE_FOR_BYTE(size_reg);
472 return reg_mem(size_reg, opcode, mmio_op, rex);
474 case 0x39: /* cmp r32/16, m32/16 */
475 mmio_op->instr = INSTR_CMP;
476 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
477 return reg_mem(*op_size, opcode, mmio_op, rex);
479 case 0x3A: /* cmp m8, r8 */
480 mmio_op->instr = INSTR_CMP;
481 *op_size = BYTE;
482 GET_OP_SIZE_FOR_BYTE(size_reg);
483 return mem_reg(size_reg, opcode, mmio_op, rex);
485 case 0x3B: /* cmp m32/16, r32/16 */
486 mmio_op->instr = INSTR_CMP;
487 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
488 return mem_reg(*op_size, opcode, mmio_op, rex);
490 case 0x80:
491 case 0x81:
492 case 0x83:
493 {
494 unsigned char ins_subtype = (opcode[1] >> 3) & 7;
496 if ( opcode[0] == 0x80 ) {
497 *op_size = BYTE;
498 GET_OP_SIZE_FOR_BYTE(size_reg);
499 } else {
500 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
501 size_reg = *op_size;
502 }
504 /* opcode 0x83 always has a single byte operand */
505 if ( opcode[0] == 0x83 )
506 mmio_op->immediate =
507 (signed char)get_immediate(*ad_size, opcode + 1, BYTE);
508 else
509 mmio_op->immediate =
510 get_immediate(*ad_size, opcode + 1, *op_size);
512 mmio_op->operand[0] = mk_operand(size_reg, 0, 0, IMMEDIATE);
513 mmio_op->operand[1] = mk_operand(size_reg, 0, 0, MEMORY);
515 switch ( ins_subtype ) {
516 case 0: /* add $imm, m32/16 */
517 mmio_op->instr = INSTR_ADD;
518 return DECODE_success;
520 case 1: /* or $imm, m32/16 */
521 mmio_op->instr = INSTR_OR;
522 return DECODE_success;
524 case 4: /* and $imm, m32/16 */
525 mmio_op->instr = INSTR_AND;
526 return DECODE_success;
528 case 5: /* sub $imm, m32/16 */
529 mmio_op->instr = INSTR_SUB;
530 return DECODE_success;
532 case 6: /* xor $imm, m32/16 */
533 mmio_op->instr = INSTR_XOR;
534 return DECODE_success;
536 case 7: /* cmp $imm, m32/16 */
537 mmio_op->instr = INSTR_CMP;
538 return DECODE_success;
540 default:
541 printk("%x/%x, This opcode isn't handled yet!\n",
542 *opcode, ins_subtype);
543 return DECODE_failure;
544 }
545 }
547 case 0x84: /* test r8, m8 */
548 mmio_op->instr = INSTR_TEST;
549 *op_size = BYTE;
550 GET_OP_SIZE_FOR_BYTE(size_reg);
551 return reg_mem(size_reg, opcode, mmio_op, rex);
553 case 0x85: /* test r16/32, m16/32 */
554 mmio_op->instr = INSTR_TEST;
555 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
556 return reg_mem(*op_size, opcode, mmio_op, rex);
558 case 0x86: /* xchg m8, r8 */
559 mmio_op->instr = INSTR_XCHG;
560 *op_size = BYTE;
561 GET_OP_SIZE_FOR_BYTE(size_reg);
562 return reg_mem(size_reg, opcode, mmio_op, rex);
564 case 0x87: /* xchg m16/32, r16/32 */
565 mmio_op->instr = INSTR_XCHG;
566 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
567 return reg_mem(*op_size, opcode, mmio_op, rex);
569 case 0x88: /* mov r8, m8 */
570 mmio_op->instr = INSTR_MOV;
571 *op_size = BYTE;
572 GET_OP_SIZE_FOR_BYTE(size_reg);
573 return reg_mem(size_reg, opcode, mmio_op, rex);
575 case 0x89: /* mov r32/16, m32/16 */
576 mmio_op->instr = INSTR_MOV;
577 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
578 return reg_mem(*op_size, opcode, mmio_op, rex);
580 case 0x8A: /* mov m8, r8 */
581 mmio_op->instr = INSTR_MOV;
582 *op_size = BYTE;
583 GET_OP_SIZE_FOR_BYTE(size_reg);
584 return mem_reg(size_reg, opcode, mmio_op, rex);
586 case 0x8B: /* mov m32/16, r32/16 */
587 mmio_op->instr = INSTR_MOV;
588 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
589 return mem_reg(*op_size, opcode, mmio_op, rex);
591 case 0xA0: /* mov <addr>, al */
592 mmio_op->instr = INSTR_MOV;
593 *op_size = BYTE;
594 GET_OP_SIZE_FOR_BYTE(size_reg);
595 return mem_acc(size_reg, mmio_op);
597 case 0xA1: /* mov <addr>, ax/eax */
598 mmio_op->instr = INSTR_MOV;
599 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
600 return mem_acc(*op_size, mmio_op);
602 case 0xA2: /* mov al, <addr> */
603 mmio_op->instr = INSTR_MOV;
604 *op_size = BYTE;
605 GET_OP_SIZE_FOR_BYTE(size_reg);
606 return acc_mem(size_reg, mmio_op);
608 case 0xA3: /* mov ax/eax, <addr> */
609 mmio_op->instr = INSTR_MOV;
610 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
611 return acc_mem(*op_size, mmio_op);
613 case 0xA4: /* movsb */
614 mmio_op->instr = INSTR_MOVS;
615 *op_size = BYTE;
616 return DECODE_success;
618 case 0xA5: /* movsw/movsl */
619 mmio_op->instr = INSTR_MOVS;
620 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
621 return DECODE_success;
623 case 0xAA: /* stosb */
624 mmio_op->instr = INSTR_STOS;
625 *op_size = BYTE;
626 return DECODE_success;
628 case 0xAB: /* stosw/stosl */
629 mmio_op->instr = INSTR_STOS;
630 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
631 return DECODE_success;
633 case 0xAC: /* lodsb */
634 mmio_op->instr = INSTR_LODS;
635 *op_size = BYTE;
636 return DECODE_success;
638 case 0xAD: /* lodsw/lodsl */
639 mmio_op->instr = INSTR_LODS;
640 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
641 return DECODE_success;
643 case 0xC6:
644 if ( ((opcode[1] >> 3) & 7) == 0 ) { /* mov $imm8, m8 */
645 mmio_op->instr = INSTR_MOV;
646 *op_size = BYTE;
648 mmio_op->operand[0] = mk_operand(*op_size, 0, 0, IMMEDIATE);
649 mmio_op->immediate =
650 get_immediate(*ad_size, opcode + 1, *op_size);
651 mmio_op->operand[1] = mk_operand(*op_size, 0, 0, MEMORY);
653 return DECODE_success;
654 } else
655 return DECODE_failure;
657 case 0xC7:
658 if ( ((opcode[1] >> 3) & 7) == 0 ) { /* mov $imm16/32, m16/32 */
659 mmio_op->instr = INSTR_MOV;
660 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
662 mmio_op->operand[0] = mk_operand(*op_size, 0, 0, IMMEDIATE);
663 mmio_op->immediate =
664 get_immediate(*ad_size, opcode + 1, *op_size);
665 mmio_op->operand[1] = mk_operand(*op_size, 0, 0, MEMORY);
667 return DECODE_success;
668 } else
669 return DECODE_failure;
671 case 0xF6:
672 case 0xF7:
673 if ( ((opcode[1] >> 3) & 7) == 0 ) { /* test $imm8/16/32, m8/16/32 */
674 mmio_op->instr = INSTR_TEST;
676 if ( opcode[0] == 0xF6 ) {
677 *op_size = BYTE;
678 GET_OP_SIZE_FOR_BYTE(size_reg);
679 } else {
680 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
681 size_reg = *op_size;
682 }
684 mmio_op->operand[0] = mk_operand(size_reg, 0, 0, IMMEDIATE);
685 mmio_op->immediate =
686 get_immediate(*ad_size, opcode + 1, *op_size);
687 mmio_op->operand[1] = mk_operand(size_reg, 0, 0, MEMORY);
689 return DECODE_success;
690 } else
691 return DECODE_failure;
693 case 0xFE:
694 case 0xFF:
695 {
696 unsigned char ins_subtype = (opcode[1] >> 3) & 7;
698 if ( opcode[0] == 0xFE ) {
699 *op_size = BYTE;
700 GET_OP_SIZE_FOR_BYTE(size_reg);
701 } else {
702 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
703 size_reg = *op_size;
704 }
706 mmio_op->immediate = 1;
707 mmio_op->operand[0] = mk_operand(size_reg, 0, 0, IMMEDIATE);
708 mmio_op->operand[1] = mk_operand(size_reg, 0, 0, MEMORY);
710 switch ( ins_subtype ) {
711 case 0: /* inc */
712 mmio_op->instr = INSTR_ADD;
713 return DECODE_success;
715 case 1: /* dec */
716 mmio_op->instr = INSTR_OR;
717 return DECODE_success;
719 default:
720 printk("%x/%x, This opcode isn't handled yet!\n",
721 *opcode, ins_subtype);
722 return DECODE_failure;
723 }
724 }
726 case 0x0F:
727 break;
729 default:
730 printk("%x, This opcode isn't handled yet!\n", *opcode);
731 return DECODE_failure;
732 }
734 switch ( *++opcode ) {
735 case 0xB6: /* movzx m8, r16/r32/r64 */
736 mmio_op->instr = INSTR_MOVZX;
737 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
738 index = get_index(opcode + 1, rex);
739 mmio_op->operand[0] = mk_operand(BYTE, 0, 0, MEMORY);
740 mmio_op->operand[1] = mk_operand(*op_size, index, 0, REGISTER);
741 return DECODE_success;
743 case 0xB7: /* movzx m16, r32/r64 */
744 mmio_op->instr = INSTR_MOVZX;
745 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
746 index = get_index(opcode + 1, rex);
747 mmio_op->operand[0] = mk_operand(WORD, 0, 0, MEMORY);
748 mmio_op->operand[1] = mk_operand(*op_size, index, 0, REGISTER);
749 return DECODE_success;
751 case 0xBE: /* movsx m8, r16/r32/r64 */
752 mmio_op->instr = INSTR_MOVSX;
753 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
754 index = get_index(opcode + 1, rex);
755 mmio_op->operand[0] = mk_operand(BYTE, 0, 0, MEMORY);
756 mmio_op->operand[1] = mk_operand(*op_size, index, 0, REGISTER);
757 return DECODE_success;
759 case 0xBF: /* movsx m16, r32/r64 */
760 mmio_op->instr = INSTR_MOVSX;
761 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
762 index = get_index(opcode + 1, rex);
763 mmio_op->operand[0] = mk_operand(WORD, 0, 0, MEMORY);
764 mmio_op->operand[1] = mk_operand(*op_size, index, 0, REGISTER);
765 return DECODE_success;
767 case 0xA3: /* bt r32, m32 */
768 mmio_op->instr = INSTR_BT;
769 index = get_index(opcode + 1, rex);
770 *op_size = LONG;
771 mmio_op->operand[0] = mk_operand(*op_size, index, 0, REGISTER);
772 mmio_op->operand[1] = mk_operand(*op_size, 0, 0, MEMORY);
773 return DECODE_success;
775 case 0xBA:
776 if ( ((opcode[1] >> 3) & 7) == 4 ) /* BT $imm8, m16/32/64 */
777 {
778 mmio_op->instr = INSTR_BT;
779 GET_OP_SIZE_FOR_NONEBYTE(*op_size);
780 mmio_op->operand[0] = mk_operand(BYTE, 0, 0, IMMEDIATE);
781 mmio_op->immediate =
782 (signed char)get_immediate(*ad_size, opcode + 1, BYTE);
783 mmio_op->operand[1] = mk_operand(*op_size, 0, 0, MEMORY);
784 return DECODE_success;
785 }
786 else
787 {
788 printk("0f %x, This opcode subtype isn't handled yet\n", *opcode);
789 return DECODE_failure;
790 }
792 default:
793 printk("0f %x, This opcode isn't handled yet\n", *opcode);
794 return DECODE_failure;
795 }
796 }
798 int inst_copy_from_guest(unsigned char *buf, unsigned long guest_eip, int inst_len)
799 {
800 if ( inst_len > MAX_INST_LEN || inst_len <= 0 )
801 return 0;
802 if ( hvm_copy_from_guest_virt(buf, guest_eip, inst_len) )
803 return 0;
804 return inst_len;
805 }
807 void send_pio_req(unsigned long port, unsigned long count, int size,
808 long value, int dir, int df, int value_is_ptr)
809 {
810 struct vcpu *v = current;
811 vcpu_iodata_t *vio;
812 ioreq_t *p;
814 if ( size == 0 || count == 0 ) {
815 printk("null pio request? port %lx, count %lx, "
816 "size %d, value %lx, dir %d, value_is_ptr %d.\n",
817 port, count, size, value, dir, value_is_ptr);
818 }
820 vio = get_vio(v->domain, v->vcpu_id);
821 if ( vio == NULL ) {
822 printk("bad shared page: %lx\n", (unsigned long) vio);
823 domain_crash_synchronous();
824 }
826 p = &vio->vp_ioreq;
827 if ( p->state != STATE_IOREQ_NONE )
828 printk("WARNING: send pio with something already pending (%d)?\n",
829 p->state);
831 p->dir = dir;
832 p->data_is_ptr = value_is_ptr;
834 p->type = IOREQ_TYPE_PIO;
835 p->size = size;
836 p->addr = port;
837 p->count = count;
838 p->df = df;
840 p->io_count++;
842 if ( value_is_ptr ) /* get physical address of data */
843 {
844 if ( hvm_paging_enabled(current) )
845 p->data = paging_gva_to_gpa(current, value);
846 else
847 p->data = value; /* guest VA == guest PA */
848 }
849 else if ( dir == IOREQ_WRITE )
850 p->data = value;
852 if ( hvm_portio_intercept(p) )
853 {
854 p->state = STATE_IORESP_READY;
855 hvm_io_assist(v);
856 return;
857 }
859 hvm_send_assist_req(v);
860 }
862 static void send_mmio_req(unsigned char type, unsigned long gpa,
863 unsigned long count, int size, long value,
864 int dir, int df, int value_is_ptr)
865 {
866 struct vcpu *v = current;
867 vcpu_iodata_t *vio;
868 ioreq_t *p;
870 if ( size == 0 || count == 0 ) {
871 printk("null mmio request? type %d, gpa %lx, "
872 "count %lx, size %d, value %lx, dir %d, value_is_ptr %d.\n",
873 type, gpa, count, size, value, dir, value_is_ptr);
874 }
876 vio = get_vio(v->domain, v->vcpu_id);
877 if (vio == NULL) {
878 printk("bad shared page\n");
879 domain_crash_synchronous();
880 }
882 p = &vio->vp_ioreq;
884 if ( p->state != STATE_IOREQ_NONE )
885 printk("WARNING: send mmio with something already pending (%d)?\n",
886 p->state);
887 p->dir = dir;
888 p->data_is_ptr = value_is_ptr;
890 p->type = type;
891 p->size = size;
892 p->addr = gpa;
893 p->count = count;
894 p->df = df;
896 p->io_count++;
898 if ( value_is_ptr )
899 {
900 if ( hvm_paging_enabled(v) )
901 p->data = paging_gva_to_gpa(v, value);
902 else
903 p->data = value; /* guest VA == guest PA */
904 }
905 else
906 p->data = value;
908 if ( hvm_mmio_intercept(p) || hvm_buffered_io_intercept(p) )
909 {
910 p->state = STATE_IORESP_READY;
911 hvm_io_assist(v);
912 return;
913 }
915 hvm_send_assist_req(v);
916 }
918 static void mmio_operands(int type, unsigned long gpa,
919 struct hvm_io_op *mmio_op,
920 unsigned char op_size)
921 {
922 unsigned long value = 0;
923 int df, index, size_reg;
924 struct cpu_user_regs *regs = &mmio_op->io_context;
926 df = regs->eflags & X86_EFLAGS_DF ? 1 : 0;
928 size_reg = operand_size(mmio_op->operand[0]);
930 if ( mmio_op->operand[0] & REGISTER ) { /* dest is memory */
931 index = operand_index(mmio_op->operand[0]);
932 value = get_reg_value(size_reg, index, 0, regs);
933 send_mmio_req(type, gpa, 1, op_size, value, IOREQ_WRITE, df, 0);
934 } else if ( mmio_op->operand[0] & IMMEDIATE ) { /* dest is memory */
935 value = mmio_op->immediate;
936 send_mmio_req(type, gpa, 1, op_size, value, IOREQ_WRITE, df, 0);
937 } else if ( mmio_op->operand[0] & MEMORY ) { /* dest is register */
938 /* send the request and wait for the value */
939 if ( (mmio_op->instr == INSTR_MOVZX) ||
940 (mmio_op->instr == INSTR_MOVSX) )
941 send_mmio_req(type, gpa, 1, size_reg, 0, IOREQ_READ, df, 0);
942 else
943 send_mmio_req(type, gpa, 1, op_size, 0, IOREQ_READ, df, 0);
944 } else {
945 printk("%s: invalid dest mode.\n", __func__);
946 domain_crash_synchronous();
947 }
948 }
950 #define GET_REPEAT_COUNT() \
951 (mmio_op->flags & REPZ ? (ad_size == WORD ? regs->ecx & 0xFFFF : regs->ecx) : 1)
953 void handle_mmio(unsigned long gpa)
954 {
955 unsigned long inst_addr;
956 struct hvm_io_op *mmio_op;
957 struct cpu_user_regs *regs;
958 unsigned char inst[MAX_INST_LEN], ad_size, op_size, seg_sel;
959 int i, address_bytes, df, inst_len;
960 struct vcpu *v = current;
962 mmio_op = &v->arch.hvm_vcpu.io_op;
963 regs = &mmio_op->io_context;
965 /* Copy current guest state into io instruction state structure. */
966 memcpy(regs, guest_cpu_user_regs(), HVM_CONTEXT_STACK_BYTES);
967 hvm_store_cpu_guest_regs(v, regs, NULL);
969 df = regs->eflags & X86_EFLAGS_DF ? 1 : 0;
971 address_bytes = hvm_guest_x86_mode(v);
972 inst_addr = hvm_get_segment_base(v, x86_seg_cs) + regs->eip;
973 inst_len = hvm_instruction_length(inst_addr, address_bytes);
974 if ( inst_len <= 0 )
975 {
976 printk("handle_mmio: failed to get instruction length\n");
977 domain_crash_synchronous();
978 }
980 memset(inst, 0, MAX_INST_LEN);
981 if ( inst_copy_from_guest(inst, inst_addr, inst_len) != inst_len ) {
982 printk("handle_mmio: failed to copy instruction\n");
983 domain_crash_synchronous();
984 }
986 if ( mmio_decode(address_bytes, inst, mmio_op, &ad_size,
987 &op_size, &seg_sel) == DECODE_failure ) {
988 printk("handle_mmio: failed to decode instruction\n");
989 printk("mmio opcode: gpa 0x%lx, len %d:", gpa, inst_len);
990 for ( i = 0; i < inst_len; i++ )
991 printk(" %02x", inst[i] & 0xFF);
992 printk("\n");
993 domain_crash_synchronous();
994 }
996 regs->eip += inst_len; /* advance %eip */
998 switch ( mmio_op->instr ) {
999 case INSTR_MOV:
1000 mmio_operands(IOREQ_TYPE_COPY, gpa, mmio_op, op_size);
1001 break;
1003 case INSTR_MOVS:
1005 unsigned long count = GET_REPEAT_COUNT();
1006 int sign = regs->eflags & X86_EFLAGS_DF ? -1 : 1;
1007 unsigned long addr;
1008 int dir, size = op_size;
1010 ASSERT(count);
1012 /* determine non-MMIO address */
1013 addr = regs->edi;
1014 if ( ad_size == WORD )
1015 addr &= 0xFFFF;
1016 addr += hvm_get_segment_base(v, x86_seg_es);
1017 if ( paging_gva_to_gpa(v, addr) == gpa )
1019 enum x86_segment seg;
1021 dir = IOREQ_WRITE;
1022 addr = regs->esi;
1023 if ( ad_size == WORD )
1024 addr &= 0xFFFF;
1025 switch ( seg_sel )
1027 case 0x26: seg = x86_seg_es; break;
1028 case 0x2e: seg = x86_seg_cs; break;
1029 case 0x36: seg = x86_seg_ss; break;
1030 case 0:
1031 case 0x3e: seg = x86_seg_ds; break;
1032 case 0x64: seg = x86_seg_fs; break;
1033 case 0x65: seg = x86_seg_gs; break;
1034 default: domain_crash_synchronous();
1036 addr += hvm_get_segment_base(v, seg);
1038 else
1039 dir = IOREQ_READ;
1041 if ( addr & (size - 1) )
1042 gdprintk(XENLOG_WARNING,
1043 "Unaligned ioport access: %lx, %d\n", addr, size);
1045 /*
1046 * In case of a movs spanning multiple pages, we break the accesses
1047 * up into multiple pages (the device model works with non-continguous
1048 * physical guest pages). To copy just one page, we adjust %ecx and
1049 * do not advance %eip so that the next rep;movs copies the next page.
1050 * Unaligned accesses, for example movsl starting at PGSZ-2, are
1051 * turned into a single copy where we handle the overlapping memory
1052 * copy ourself. After this copy succeeds, "rep movs" is executed
1053 * again.
1054 */
1055 if ( (addr & PAGE_MASK) != ((addr + size - 1) & PAGE_MASK) ) {
1056 unsigned long value = 0;
1058 gdprintk(XENLOG_WARNING,
1059 "Single io request in a movs crossing page boundary.\n");
1060 mmio_op->flags |= OVERLAP;
1062 if ( dir == IOREQ_WRITE ) {
1063 if ( hvm_paging_enabled(v) )
1064 (void)hvm_copy_from_guest_virt(&value, addr, size);
1065 else
1066 (void)hvm_copy_from_guest_phys(&value, addr, size);
1067 } else
1068 mmio_op->addr = addr;
1070 if ( count != 1 )
1071 regs->eip -= inst_len; /* do not advance %eip */
1073 send_mmio_req(IOREQ_TYPE_COPY, gpa, 1, size, value, dir, df, 0);
1074 } else {
1075 unsigned long last_addr = sign > 0 ? addr + count * size - 1
1076 : addr - (count - 1) * size;
1078 if ( (addr & PAGE_MASK) != (last_addr & PAGE_MASK) )
1080 regs->eip -= inst_len; /* do not advance %eip */
1082 if ( sign > 0 )
1083 count = (PAGE_SIZE - (addr & ~PAGE_MASK)) / size;
1084 else
1085 count = (addr & ~PAGE_MASK) / size + 1;
1088 ASSERT(count);
1090 send_mmio_req(IOREQ_TYPE_COPY, gpa, count, size, addr, dir, df, 1);
1092 break;
1095 case INSTR_MOVZX:
1096 case INSTR_MOVSX:
1097 mmio_operands(IOREQ_TYPE_COPY, gpa, mmio_op, op_size);
1098 break;
1100 case INSTR_STOS:
1101 /*
1102 * Since the destination is always in (contiguous) mmio space we don't
1103 * need to break it up into pages.
1104 */
1105 send_mmio_req(IOREQ_TYPE_COPY, gpa,
1106 GET_REPEAT_COUNT(), op_size, regs->eax, IOREQ_WRITE, df, 0);
1107 break;
1109 case INSTR_LODS:
1110 /*
1111 * Since the source is always in (contiguous) mmio space we don't
1112 * need to break it up into pages.
1113 */
1114 send_mmio_req(IOREQ_TYPE_COPY, gpa,
1115 GET_REPEAT_COUNT(), op_size, 0, IOREQ_READ, df, 0);
1116 break;
1118 case INSTR_OR:
1119 mmio_operands(IOREQ_TYPE_OR, gpa, mmio_op, op_size);
1120 break;
1122 case INSTR_AND:
1123 mmio_operands(IOREQ_TYPE_AND, gpa, mmio_op, op_size);
1124 break;
1126 case INSTR_ADD:
1127 mmio_operands(IOREQ_TYPE_ADD, gpa, mmio_op, op_size);
1128 break;
1130 case INSTR_XOR:
1131 mmio_operands(IOREQ_TYPE_XOR, gpa, mmio_op, op_size);
1132 break;
1134 case INSTR_CMP: /* Pass through */
1135 case INSTR_TEST:
1136 case INSTR_SUB:
1137 /* send the request and wait for the value */
1138 send_mmio_req(IOREQ_TYPE_COPY, gpa, 1, op_size, 0, IOREQ_READ, df, 0);
1139 break;
1141 case INSTR_BT:
1143 unsigned long value = 0;
1144 int index, size;
1146 if ( mmio_op->operand[0] & REGISTER )
1148 index = operand_index(mmio_op->operand[0]);
1149 size = operand_size(mmio_op->operand[0]);
1150 value = get_reg_value(size, index, 0, regs);
1152 else if ( mmio_op->operand[0] & IMMEDIATE )
1154 mmio_op->immediate = mmio_op->immediate;
1155 value = mmio_op->immediate;
1157 send_mmio_req(IOREQ_TYPE_COPY, gpa + (value >> 5), 1,
1158 op_size, 0, IOREQ_READ, df, 0);
1159 break;
1162 case INSTR_XCHG:
1163 if ( mmio_op->operand[0] & REGISTER ) {
1164 long value;
1165 unsigned long operand = mmio_op->operand[0];
1166 value = get_reg_value(operand_size(operand),
1167 operand_index(operand), 0,
1168 regs);
1169 /* send the request and wait for the value */
1170 send_mmio_req(IOREQ_TYPE_XCHG, gpa, 1,
1171 op_size, value, IOREQ_WRITE, df, 0);
1172 } else {
1173 /* the destination is a register */
1174 long value;
1175 unsigned long operand = mmio_op->operand[1];
1176 value = get_reg_value(operand_size(operand),
1177 operand_index(operand), 0,
1178 regs);
1179 /* send the request and wait for the value */
1180 send_mmio_req(IOREQ_TYPE_XCHG, gpa, 1,
1181 op_size, value, IOREQ_WRITE, df, 0);
1183 break;
1185 default:
1186 printk("Unhandled MMIO instruction\n");
1187 domain_crash_synchronous();
1191 DEFINE_PER_CPU(int, guest_handles_in_xen_space);
1193 /* Note that copy_{to,from}_user_hvm don't set the A and D bits on
1194 PTEs, and require the PTE to be writable even when they're only
1195 trying to read from it. The guest is expected to deal with
1196 this. */
1197 unsigned long copy_to_user_hvm(void *to, const void *from, unsigned len)
1199 if ( this_cpu(guest_handles_in_xen_space) )
1201 memcpy(to, from, len);
1202 return 0;
1205 return hvm_copy_to_guest_virt((unsigned long)to, (void *)from, len);
1208 unsigned long copy_from_user_hvm(void *to, const void *from, unsigned len)
1210 if ( this_cpu(guest_handles_in_xen_space) )
1212 memcpy(to, from, len);
1213 return 0;
1216 return hvm_copy_from_guest_virt(to, (unsigned long)from, len);
1219 /*
1220 * Local variables:
1221 * mode: C
1222 * c-set-style: "BSD"
1223 * c-basic-offset: 4
1224 * tab-width: 4
1225 * indent-tabs-mode: nil
1226 * End:
1227 */