ia64/xen-unstable

view tools/ioemu/hw/vga_int.h @ 6946:e703abaf6e3d

Add behaviour to the remove methods to remove the transaction's path itself. This allows us to write Remove(path) to remove the specified path rather than having to slice the path ourselves.
author emellor@ewan
date Sun Sep 18 14:42:13 2005 +0100 (2005-09-18)
parents 8e5fc5fe636c
children 40d7eef7d3f5
line source
1 /*
2 * QEMU internal VGA defines.
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #define MSR_COLOR_EMULATION 0x01
25 #define MSR_PAGE_SELECT 0x20
27 #define ST01_V_RETRACE 0x08
28 #define ST01_DISP_ENABLE 0x01
30 /* bochs VBE support */
31 //#define CONFIG_BOCHS_VBE
33 #define VBE_DISPI_MAX_XRES 1024
34 #define VBE_DISPI_MAX_YRES 768
36 #define VBE_DISPI_INDEX_ID 0x0
37 #define VBE_DISPI_INDEX_XRES 0x1
38 #define VBE_DISPI_INDEX_YRES 0x2
39 #define VBE_DISPI_INDEX_BPP 0x3
40 #define VBE_DISPI_INDEX_ENABLE 0x4
41 #define VBE_DISPI_INDEX_BANK 0x5
42 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
43 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
44 #define VBE_DISPI_INDEX_X_OFFSET 0x8
45 #define VBE_DISPI_INDEX_Y_OFFSET 0x9
46 #define VBE_DISPI_INDEX_NB 0xa
48 #define VBE_DISPI_ID0 0xB0C0
49 #define VBE_DISPI_ID1 0xB0C1
50 #define VBE_DISPI_ID2 0xB0C2
52 #define VBE_DISPI_DISABLED 0x00
53 #define VBE_DISPI_ENABLED 0x01
54 #define VBE_DISPI_LFB_ENABLED 0x40
55 #define VBE_DISPI_NOCLEARMEM 0x80
57 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
59 #ifdef CONFIG_BOCHS_VBE
61 #define VGA_STATE_COMMON_BOCHS_VBE \
62 uint16_t vbe_index; \
63 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
64 uint32_t vbe_start_addr; \
65 uint32_t vbe_line_offset; \
66 uint32_t vbe_bank_mask;
68 #else
70 #define VGA_STATE_COMMON_BOCHS_VBE
72 #endif /* !CONFIG_BOCHS_VBE */
74 #define CH_ATTR_SIZE (160 * 100)
75 #define VGA_MAX_HEIGHT 1024
77 #define VGA_STATE_COMMON \
78 uint8_t *vram_ptr; \
79 unsigned long vram_offset; \
80 unsigned int vram_size; \
81 uint32_t latch; \
82 uint8_t sr_index; \
83 uint8_t sr[256]; \
84 uint8_t gr_index; \
85 uint8_t gr[256]; \
86 uint8_t ar_index; \
87 uint8_t ar[21]; \
88 int ar_flip_flop; \
89 uint8_t cr_index; \
90 uint8_t cr[256]; /* CRT registers */ \
91 uint8_t msr; /* Misc Output Register */ \
92 uint8_t fcr; /* Feature Control Register */ \
93 uint8_t st00; /* status 0 */ \
94 uint8_t st01; /* status 1 */ \
95 uint8_t dac_state; \
96 uint8_t dac_sub_index; \
97 uint8_t dac_read_index; \
98 uint8_t dac_write_index; \
99 uint8_t dac_cache[3]; /* used when writing */ \
100 uint8_t palette[768]; \
101 int32_t bank_offset; \
102 int (*get_bpp)(struct VGAState *s); \
103 void (*get_offsets)(struct VGAState *s, \
104 uint32_t *pline_offset, \
105 uint32_t *pstart_addr); \
106 void (*get_resolution)(struct VGAState *s, \
107 int *pwidth, \
108 int *pheight); \
109 VGA_STATE_COMMON_BOCHS_VBE \
110 /* display refresh support */ \
111 DisplayState *ds; \
112 uint32_t font_offsets[2]; \
113 int graphic_mode; \
114 uint8_t shift_control; \
115 uint8_t double_scan; \
116 uint32_t line_offset; \
117 uint32_t line_compare; \
118 uint32_t start_addr; \
119 uint32_t plane_updated; \
120 uint8_t last_cw, last_ch; \
121 uint32_t last_width, last_height; /* in chars or pixels */ \
122 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
123 uint8_t cursor_start, cursor_end; \
124 uint32_t cursor_offset; \
125 unsigned int (*rgb_to_pixel)(unsigned int r, \
126 unsigned int g, unsigned b); \
127 /* hardware mouse cursor support */ \
128 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
129 void (*cursor_invalidate)(struct VGAState *s); \
130 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
131 /* tell for each page if it has been updated since the last time */ \
132 uint32_t last_palette[256]; \
133 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
136 typedef struct VGAState {
137 VGA_STATE_COMMON
138 } VGAState;
140 static inline int c6_to_8(int v)
141 {
142 int b;
143 v &= 0x3f;
144 b = v & 1;
145 return (v << 2) | (b << 1) | b;
146 }
148 void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
149 unsigned long vga_ram_offset, int vga_ram_size);
150 uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
151 void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
152 void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
154 void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
155 int poffset, int w,
156 unsigned int color0, unsigned int color1,
157 unsigned int color_xor);
158 void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
159 int poffset, int w,
160 unsigned int color0, unsigned int color1,
161 unsigned int color_xor);
162 void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
163 int poffset, int w,
164 unsigned int color0, unsigned int color1,
165 unsigned int color_xor);
167 extern const uint8_t sr_mask[8];
168 extern const uint8_t gr_mask[16];