ia64/xen-unstable

view extras/mini-os/arch/ia64/gen_off.c @ 14069:dda691c7f25f

[IA64][MINIOS] Make mini-os ia64 cross compile-able

Signed-off-by: Tristan Gingold <tgingold@free.fr>
author awilliam@xenbuild2.aw
date Wed Feb 28 09:40:36 2007 -0700 (2007-02-28)
parents ac18d251df63
children
line source
1 /*
2 * Copyright (c) 2007 Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
3 *
4 ******************************************************************************
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28 #include "types.h"
29 #include "sched.h"
30 #include "xen/xen.h"
31 #include "xen/arch-ia64.h"
33 #define DEFINE(sym, val) \
34 asm volatile("\n->" sym " %0 /* " #val " */": : "i" (val))
35 #define DEFINE_STR2(sym, pfx, val) \
36 asm volatile("\n->" sym " " pfx "%0" : : "i"(val));
38 #define SZ(st,e) sizeof(((st *)0)->e)
39 #define OFF(st,e,d,o) \
40 DEFINE(#d, offsetof(st, e) + o); \
41 DEFINE(#d "_sz", SZ(st,e )); \
42 DEFINE_STR2(#d "_ld", "ld", SZ(st, e)); \
43 DEFINE_STR2(#d "_st", "st", SZ(st, e));
45 #define TFOFF(e,d) OFF(trap_frame_t, e, d, 0)
46 #define SIZE(st,d) DEFINE(#d, sizeof(st))
48 #define SWOFF(e,d) OFF(struct thread, e, d, 0)
50 /* shared_info_t from xen/xen.h */
51 #define SI_OFF(e, d) OFF(shared_info_t, e, d,0)
52 /* mapped_regs_t from xen/arch-ia64.h */
53 #define MR_OFF(e, d) OFF(mapped_regs_t, e, d, XMAPPEDREGS_OFS)
55 int
56 main(int argc, char ** argv)
57 {
58 TFOFF(cfm, TF_CFM);
59 TFOFF(pfs, TF_PFS);
60 TFOFF(bsp, TF_BSP);
61 TFOFF(rnat, TF_RNAT);
62 TFOFF(csd, TF_CSD);
63 TFOFF(ccv, TF_CCV);
64 TFOFF(unat, TF_UNAT);
65 TFOFF(fpsr, TF_FPSR);
66 TFOFF(pr, TF_PR);
68 TFOFF(sp, TF_SP);
69 TFOFF(gp, TF_GP);
70 TFOFF(tp, TF_TP);
72 TFOFF(r2, TF_GREG2);
73 TFOFF(r3, TF_GREG3);
74 TFOFF(r16, TF_GREG16);
75 TFOFF(r17, TF_GREG17);
77 TFOFF(b0, TF_BREG0);
78 TFOFF(b6, TF_BREG6);
79 TFOFF(b7, TF_BREG7);
81 TFOFF(f6, TF_FREG6);
82 TFOFF(f7, TF_FREG7);
84 TFOFF(rsc, TF_RSC);
85 TFOFF(ndirty, TF_NDIRTY);
86 TFOFF(ssd, TF_SSD);
87 TFOFF(iip, TF_IIP);
88 TFOFF(ipsr, TF_IPSR);
89 TFOFF(ifs, TF_IFS);
90 TFOFF(trap_num, TF_TRAP_NUM);
92 TFOFF(ifa, TF_IFA);
93 TFOFF(isr, TF_ISR);
94 TFOFF(iim, TF_IIM);
96 SIZE(trap_frame_t, TF_SIZE);
98 SIZE(struct thread, SW_SIZE);
99 SWOFF(regs.unat_b, SW_UNATB);
100 SWOFF(regs.sp, SW_SP);
101 SWOFF(regs.rp, SW_RP);
102 SWOFF(regs.pr, SW_PR);
103 SWOFF(regs.pfs, SW_PFS);
104 SWOFF(regs.bsp, SW_BSP);
105 SWOFF(regs.rnat, SW_RNAT);
106 SWOFF(regs.lc, SW_LC);
107 //SWOFF(regs.fpsr, SW_FPSR);
108 //SWOFF(regs.psr, SW_PSR);
109 //SWOFF(regs.gp, SW_GP);
110 SWOFF(regs.unat_a, SW_UNATA);
111 SWOFF(regs.r4, SW_R4);
112 SWOFF(regs.r5, SW_R5);
113 SWOFF(regs.r6, SW_R6);
114 SWOFF(regs.r7, SW_R7);
115 SWOFF(regs.b1, SW_B1);
116 SWOFF(regs.b2, SW_B2);
117 SWOFF(regs.b3, SW_B3);
118 SWOFF(regs.b4, SW_B4);
119 SWOFF(regs.b5, SW_B5);
120 SWOFF(regs.f2, SW_F2);
121 SWOFF(regs.f3, SW_F3);
122 SWOFF(regs.f4, SW_F4);
123 SWOFF(regs.f5, SW_F5);
125 SI_OFF(arch.start_info_pfn, START_INFO_PFN);
126 MR_OFF(interrupt_mask_addr, XSI_PSR_I_ADDR_OFS);
127 MR_OFF(interrupt_collection_enabled, XSI_PSR_IC_OFS);
128 MR_OFF(ipsr, XSI_IPSR_OFS);
129 MR_OFF(iip, XSI_IIP_OFS);
130 MR_OFF(ifs, XSI_IFS_OFS);
131 MR_OFF(ifa, XSI_IFA_OFS);
132 MR_OFF(iim, XSI_IIM_OFS);
133 MR_OFF(iim, XSI_IIM_OFS);
134 MR_OFF(iipa, XSI_IIPA_OFS);
135 MR_OFF(isr, XSI_ISR_OFS);
136 MR_OFF(banknum, XSI_BANKNUM_OFS);
137 MR_OFF(bank1_regs[0], XSI_BANK1_R16_OFS);
138 MR_OFF(precover_ifs, XSI_PRECOVER_IFS_OFS);
140 return 0;
141 }