ia64/xen-unstable

view xen/drivers/char/ns16550.c @ 8468:d966b7a00959

Allow non-privileged domains restricted access to
I/O memory and physical interrupts, under control
of domain0. Capabilities are maintained as rangesets
in Xen.

Signed-off-by: Ryan Wilson <hap9@epoch.ncsc.mil>
Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Sat Dec 31 14:15:22 2005 +0100 (2005-12-31)
parents 4369fd869f51
children c055d76ec559
line source
1 /******************************************************************************
2 * ns16550.c
3 *
4 * Driver for 16550-series UARTs. This driver is to be kept within Xen as
5 * it permits debugging of seriously-toasted machines (e.g., in situations
6 * where a device driver within a guest OS would be inaccessible).
7 *
8 * Copyright (c) 2003-2005, K A Fraser
9 */
11 #include <xen/config.h>
12 #include <xen/init.h>
13 #include <xen/irq.h>
14 #include <xen/sched.h>
15 #include <xen/serial.h>
16 #include <xen/iocap.h>
17 #include <asm/io.h>
19 /*
20 * Configure serial port with a string <baud>,DPS,<io-base>,<irq>.
21 * The tail of the string can be omitted if platform defaults are sufficient.
22 * If the baud rate is pre-configured, perhaps by a bootloader, then 'auto'
23 * can be specified in place of a numeric baud rate.
24 */
25 static char opt_com1[30] = "", opt_com2[30] = "";
26 string_param("com1", opt_com1);
27 string_param("com2", opt_com2);
29 static struct ns16550 {
30 int baud, data_bits, parity, stop_bits, irq;
31 unsigned long io_base; /* I/O port or memory-mapped I/O address. */
32 char *remapped_io_base; /* Remapped virtual address of mmap I/O. */
33 /* UART with IRQ line: interrupt-driven I/O. */
34 struct irqaction irqaction;
35 /* UART with no IRQ line: periodically-polled I/O. */
36 struct ac_timer timer;
37 unsigned int timeout_ms;
38 } ns16550_com[2] = { { 0 } };
40 /* Register offsets */
41 #define RBR 0x00 /* receive buffer */
42 #define THR 0x00 /* transmit holding */
43 #define IER 0x01 /* interrupt enable */
44 #define IIR 0x02 /* interrupt identity */
45 #define FCR 0x02 /* FIFO control */
46 #define LCR 0x03 /* line control */
47 #define MCR 0x04 /* Modem control */
48 #define LSR 0x05 /* line status */
49 #define MSR 0x06 /* Modem status */
50 #define DLL 0x00 /* divisor latch (ls) (DLAB=1) */
51 #define DLM 0x01 /* divisor latch (ms) (DLAB=1) */
53 /* Interrupt Enable Register */
54 #define IER_ERDAI 0x01 /* rx data recv'd */
55 #define IER_ETHREI 0x02 /* tx reg. empty */
56 #define IER_ELSI 0x04 /* rx line status */
57 #define IER_EMSI 0x08 /* MODEM status */
59 /* Interrupt Identification Register */
60 #define IIR_NOINT 0x01 /* no interrupt pending */
61 #define IIR_IMASK 0x06 /* interrupt identity: */
62 #define IIR_LSI 0x06 /* - rx line status */
63 #define IIR_RDAI 0x04 /* - rx data recv'd */
64 #define IIR_THREI 0x02 /* - tx reg. empty */
65 #define IIR_MSI 0x00 /* - MODEM status */
67 /* FIFO Control Register */
68 #define FCR_ENABLE 0x01 /* enable FIFO */
69 #define FCR_CLRX 0x02 /* clear Rx FIFO */
70 #define FCR_CLTX 0x04 /* clear Tx FIFO */
71 #define FCR_DMA 0x10 /* enter DMA mode */
72 #define FCR_TRG1 0x00 /* Rx FIFO trig lev 1 */
73 #define FCR_TRG4 0x40 /* Rx FIFO trig lev 4 */
74 #define FCR_TRG8 0x80 /* Rx FIFO trig lev 8 */
75 #define FCR_TRG14 0xc0 /* Rx FIFO trig lev 14 */
77 /* Line Control Register */
78 #define LCR_DLAB 0x80 /* Divisor Latch Access */
80 /* Modem Control Register */
81 #define MCR_DTR 0x01 /* Data Terminal Ready */
82 #define MCR_RTS 0x02 /* Request to Send */
83 #define MCR_OUT2 0x08 /* OUT2: interrupt mask */
85 /* Line Status Register */
86 #define LSR_DR 0x01 /* Data ready */
87 #define LSR_OE 0x02 /* Overrun */
88 #define LSR_PE 0x04 /* Parity error */
89 #define LSR_FE 0x08 /* Framing error */
90 #define LSR_BI 0x10 /* Break */
91 #define LSR_THRE 0x20 /* Xmit hold reg empty */
92 #define LSR_TEMT 0x40 /* Xmitter empty */
93 #define LSR_ERR 0x80 /* Error */
95 /* These parity settings can be ORed directly into the LCR. */
96 #define PARITY_NONE (0<<3)
97 #define PARITY_ODD (1<<3)
98 #define PARITY_EVEN (3<<3)
99 #define PARITY_MARK (5<<3)
100 #define PARITY_SPACE (7<<3)
102 static char ns_read_reg(struct ns16550 *uart, int reg)
103 {
104 if ( uart->remapped_io_base == NULL )
105 return inb(uart->io_base + reg);
106 return readb(uart->remapped_io_base + reg);
107 }
109 static void ns_write_reg(struct ns16550 *uart, int reg, char c)
110 {
111 if ( uart->remapped_io_base == NULL )
112 return outb(c, uart->io_base + reg);
113 writeb(c, uart->remapped_io_base + reg);
114 }
116 static void ns16550_interrupt(
117 int irq, void *dev_id, struct cpu_user_regs *regs)
118 {
119 struct serial_port *port = dev_id;
120 struct ns16550 *uart = port->uart;
122 while ( !(ns_read_reg(uart, IIR) & IIR_NOINT) )
123 {
124 serial_tx_interrupt(port, regs);
125 serial_rx_interrupt(port, regs);
126 }
127 }
129 static void ns16550_poll(void *data)
130 {
131 struct serial_port *port = data;
132 struct ns16550 *uart = port->uart;
133 struct cpu_user_regs *regs = guest_cpu_user_regs();
135 while ( ns_read_reg(uart, LSR) & LSR_DR )
136 serial_rx_interrupt(port, regs);
138 if ( ns_read_reg(uart, LSR) & LSR_THRE )
139 serial_tx_interrupt(port, regs);
141 set_ac_timer(&uart->timer, NOW() + MILLISECS(uart->timeout_ms));
142 }
144 static int ns16550_tx_empty(struct serial_port *port)
145 {
146 struct ns16550 *uart = port->uart;
147 return !!(ns_read_reg(uart, LSR) & LSR_THRE);
148 }
150 static void ns16550_putc(struct serial_port *port, char c)
151 {
152 struct ns16550 *uart = port->uart;
153 ns_write_reg(uart, THR, c);
154 }
156 static int ns16550_getc(struct serial_port *port, char *pc)
157 {
158 struct ns16550 *uart = port->uart;
160 if ( !(ns_read_reg(uart, LSR) & LSR_DR) )
161 return 0;
163 *pc = ns_read_reg(uart, RBR);
164 return 1;
165 }
167 static void ns16550_init_preirq(struct serial_port *port)
168 {
169 struct ns16550 *uart = port->uart;
170 unsigned char lcr;
172 /* I/O ports are distinguished by their size (16 bits). */
173 if ( uart->io_base >= 0x10000 )
174 uart->remapped_io_base = (char *)ioremap(uart->io_base, 8);
176 lcr = (uart->data_bits - 5) | ((uart->stop_bits - 1) << 2) | uart->parity;
178 /* No interrupts. */
179 ns_write_reg(uart, IER, 0);
181 /* Line control and baud-rate generator. */
182 if ( uart->baud != BAUD_AUTO )
183 {
184 ns_write_reg(uart, LCR, lcr | LCR_DLAB);
185 ns_write_reg(uart, DLL, 115200/uart->baud); /* baud lo */
186 ns_write_reg(uart, DLM, 0); /* baud hi */
187 }
188 ns_write_reg(uart, LCR, lcr); /* parity, data, stop */
190 /* No flow ctrl: DTR and RTS are both wedged high to keep remote happy. */
191 ns_write_reg(uart, MCR, MCR_DTR | MCR_RTS);
193 /* Enable and clear the FIFOs. Set a large trigger threshold. */
194 ns_write_reg(uart, FCR, FCR_ENABLE | FCR_CLRX | FCR_CLTX | FCR_TRG14);
196 /* Check this really is a 16550+. Otherwise we have no FIFOs. */
197 if ( (ns_read_reg(uart, IIR) & 0xc0) == 0xc0 )
198 port->tx_fifo_size = 16;
199 }
201 static void ns16550_init_postirq(struct serial_port *port)
202 {
203 struct ns16550 *uart = port->uart;
204 int rc, bits;
206 if ( uart->irq < 0 )
207 return;
209 serial_async_transmit(port);
211 if ( uart->irq == 0 )
212 {
213 /* Polled mode. Calculate time to fill RX FIFO and/or empty TX FIFO. */
214 bits = uart->data_bits + uart->stop_bits + !!uart->parity;
215 uart->timeout_ms = max_t(
216 unsigned int, 1, (bits * port->tx_fifo_size * 1000) / uart->baud);
217 init_ac_timer(&uart->timer, ns16550_poll, port, 0);
218 set_ac_timer(&uart->timer, NOW() + MILLISECS(uart->timeout_ms));
219 }
220 else
221 {
222 uart->irqaction.handler = ns16550_interrupt;
223 uart->irqaction.name = "ns16550";
224 uart->irqaction.dev_id = port;
225 if ( (rc = setup_irq(uart->irq, &uart->irqaction)) != 0 )
226 printk("ERROR: Failed to allocate na16550 IRQ %d\n", uart->irq);
228 /* Master interrupt enable; also keep DTR/RTS asserted. */
229 ns_write_reg(uart, MCR, MCR_OUT2 | MCR_DTR | MCR_RTS);
231 /* Enable receive and transmit interrupts. */
232 ns_write_reg(uart, IER, IER_ERDAI | IER_ETHREI);
233 }
234 }
236 #ifdef CONFIG_X86
237 static void ns16550_endboot(struct serial_port *port)
238 {
239 struct ns16550 *uart = port->uart;
240 if ( ioports_deny_access(dom0, uart->io_base, uart->io_base + 7) != 0 )
241 BUG();
242 }
243 #else
244 #define ns16550_endboot NULL
245 #endif
247 static struct uart_driver ns16550_driver = {
248 .init_preirq = ns16550_init_preirq,
249 .init_postirq = ns16550_init_postirq,
250 .endboot = ns16550_endboot,
251 .tx_empty = ns16550_tx_empty,
252 .putc = ns16550_putc,
253 .getc = ns16550_getc
254 };
256 static int parse_parity_char(int c)
257 {
258 switch ( c )
259 {
260 case 'n':
261 return PARITY_NONE;
262 case 'o':
263 return PARITY_ODD;
264 case 'e':
265 return PARITY_EVEN;
266 case 'm':
267 return PARITY_MARK;
268 case 's':
269 return PARITY_SPACE;
270 }
271 return 0;
272 }
274 #define PARSE_ERR(_f, _a...) \
275 do { \
276 printk( "ERROR: " _f "\n" , ## _a ); \
277 return; \
278 } while ( 0 )
280 static void ns16550_parse_port_config(struct ns16550 *uart, char *conf)
281 {
282 int baud;
284 /* No user-specified configuration? */
285 if ( (conf == NULL) || (*conf == '\0') )
286 {
287 /* Some platforms may automatically probe the UART configuartion. */
288 if ( uart->baud != 0 )
289 goto config_parsed;
290 return;
291 }
293 if ( strncmp(conf, "auto", 4) == 0 )
294 {
295 uart->baud = BAUD_AUTO;
296 conf += 4;
297 }
298 else if ( (baud = simple_strtoul(conf, &conf, 10)) != 0 )
299 uart->baud = baud;
301 if ( *conf != ',' )
302 goto config_parsed;
303 conf++;
305 uart->data_bits = simple_strtoul(conf, &conf, 10);
307 uart->parity = parse_parity_char(*conf);
308 conf++;
310 uart->stop_bits = simple_strtoul(conf, &conf, 10);
312 if ( *conf == ',' )
313 {
314 conf++;
315 uart->io_base = simple_strtoul(conf, &conf, 0);
317 if ( *conf == ',' )
318 {
319 conf++;
320 uart->irq = simple_strtoul(conf, &conf, 10);
321 }
322 }
324 config_parsed:
325 /* Sanity checks. */
326 if ( (uart->baud != BAUD_AUTO) &&
327 ((uart->baud < 1200) || (uart->baud > 115200)) )
328 PARSE_ERR("Baud rate %d outside supported range.", uart->baud);
329 if ( (uart->data_bits < 5) || (uart->data_bits > 8) )
330 PARSE_ERR("%d data bits are unsupported.", uart->data_bits);
331 if ( (uart->stop_bits < 1) || (uart->stop_bits > 2) )
332 PARSE_ERR("%d stop bits are unsupported.", uart->stop_bits);
333 if ( uart->io_base == 0 )
334 PARSE_ERR("I/O base address must be specified.");
336 /* Register with generic serial driver. */
337 serial_register_uart(uart - ns16550_com, &ns16550_driver, uart);
338 }
340 void ns16550_init(int index, struct ns16550_defaults *defaults)
341 {
342 struct ns16550 *uart = &ns16550_com[index];
344 if ( (index < 0) || (index > 1) )
345 return;
347 if ( defaults != NULL )
348 {
349 uart->baud = defaults->baud;
350 uart->data_bits = defaults->data_bits;
351 uart->parity = parse_parity_char(defaults->parity);
352 uart->stop_bits = defaults->stop_bits;
353 uart->irq = defaults->irq;
354 uart->io_base = defaults->io_base;
355 }
357 ns16550_parse_port_config(uart, (index == 0) ? opt_com1 : opt_com2);
358 }
360 /*
361 * Local variables:
362 * mode: C
363 * c-set-style: "BSD"
364 * c-basic-offset: 4
365 * tab-width: 4
366 * indent-tabs-mode: nil
367 * End:
368 */