ia64/xen-unstable

view old/xenolinux-2.4.16-sparse/include/asm-xeno/mmu_context.h @ 235:d7d0a23b2e07

bitkeeper revision 1.93 (3e5a4e6bkPheUp3x1uufN2MS3LAB7A)

Latest and Greatest version of XenoLinux based on the Linux-2.4.21-pre4
kernel.
author iap10@labyrinth.cl.cam.ac.uk
date Mon Feb 24 16:55:07 2003 +0000 (2003-02-24)
parents
children
line source
2 #ifndef __I386_MMU_CONTEXT_H
3 #define __I386_MMU_CONTEXT_H
5 #include <linux/config.h>
6 #include <asm/desc.h>
7 #include <asm/atomic.h>
8 #include <asm/pgalloc.h>
10 /*
11 * possibly do the LDT unload here?
12 */
14 extern int init_new_context(struct task_struct *tsk, struct mm_struct *);
15 extern void destroy_context(struct mm_struct *);
17 //#define destroy_context(mm) do { } while(0)
18 //#define init_new_context(tsk,mm) 0
20 #ifdef CONFIG_SMP
22 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
23 {
24 if(cpu_tlbstate[cpu].state == TLBSTATE_OK)
25 cpu_tlbstate[cpu].state = TLBSTATE_LAZY;
26 }
27 #else
28 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
29 {
30 }
31 #endif
33 extern pgd_t *cur_pgd;
35 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk, unsigned cpu)
36 {
37 if (prev != next) {
38 /* stop flush ipis for the previous mm */
39 clear_bit(cpu, &prev->cpu_vm_mask);
40 /*
41 * Re-load LDT if necessary
42 */
43 if (prev->context.segments != next->context.segments)
44 load_LDT(next);
45 #ifdef CONFIG_SMP
46 cpu_tlbstate[cpu].state = TLBSTATE_OK;
47 cpu_tlbstate[cpu].active_mm = next;
48 #endif
49 set_bit(cpu, &next->cpu_vm_mask);
50 set_bit(cpu, &next->context.cpuvalid);
51 /* Re-load page tables */
52 cur_pgd = next->pgd;
53 queue_pt_switch(__pa(cur_pgd));
54 XENO_flush_page_update_queue();
55 }
56 #ifdef CONFIG_SMP
57 else {
58 cpu_tlbstate[cpu].state = TLBSTATE_OK;
59 if(cpu_tlbstate[cpu].active_mm != next)
60 BUG();
61 if(!test_and_set_bit(cpu, &next->cpu_vm_mask)) {
62 /* We were in lazy tlb mode and leave_mm disabled
63 * tlb flush IPI delivery. We must flush our tlb.
64 */
65 local_flush_tlb();
66 }
67 if (!test_and_set_bit(cpu, &next->context.cpuvalid))
68 load_LDT(next);
69 }
70 #endif
71 }
73 #define activate_mm(prev, next) \
74 switch_mm((prev),(next),NULL,smp_processor_id())
76 #endif