ia64/xen-unstable

view linux-2.6-xen-sparse/arch/i386/kernel/irq-xen.c @ 9555:d76a7a40f3a9

Fix do_IRQ high bit masking.
Instead of setting the highest bit (which isn't easily done on native x86_64),
negate the interrupt vector stored in orig_{e,r}ax.
Also add patch for native build.

Signed-off-by: Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
author cl349@firebug.cl.cam.ac.uk
date Fri Mar 31 17:44:26 2006 +0100 (2006-03-31)
parents 4109c4e7804a
children 3adf00179a63
line source
1 /*
2 * linux/arch/i386/kernel/irq.c
3 *
4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
5 *
6 * This file contains the lowest level x86-specific interrupt
7 * entry, irq-stacks and irq statistics code. All the remaining
8 * irq logic is done by the generic kernel/irq/ code and
9 * by the x86-specific irq controller code. (e.g. i8259.c and
10 * io_apic.c.)
11 */
13 #include <asm/uaccess.h>
14 #include <linux/module.h>
15 #include <linux/seq_file.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 #include <linux/notifier.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
22 DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_internodealigned_in_smp;
23 EXPORT_PER_CPU_SYMBOL(irq_stat);
25 #ifndef CONFIG_X86_LOCAL_APIC
26 /*
27 * 'what should we do if we get a hw irq event on an illegal vector'.
28 * each architecture has to answer this themselves.
29 */
30 void ack_bad_irq(unsigned int irq)
31 {
32 printk("unexpected IRQ trap at vector %02x\n", irq);
33 }
34 #endif
36 #ifdef CONFIG_4KSTACKS
37 /*
38 * per-CPU IRQ handling contexts (thread information and stack)
39 */
40 union irq_ctx {
41 struct thread_info tinfo;
42 u32 stack[THREAD_SIZE/sizeof(u32)];
43 };
45 static union irq_ctx *hardirq_ctx[NR_CPUS];
46 static union irq_ctx *softirq_ctx[NR_CPUS];
47 #endif
49 /*
50 * do_IRQ handles all normal device IRQ's (the special
51 * SMP cross-CPU interrupts have their own specific
52 * handlers).
53 */
54 fastcall unsigned int do_IRQ(struct pt_regs *regs)
55 {
56 /* high bit used in ret_from_ code */
57 int irq = ~regs->orig_eax;
58 #ifdef CONFIG_4KSTACKS
59 union irq_ctx *curctx, *irqctx;
60 u32 *isp;
61 #endif
63 irq_enter();
64 #ifdef CONFIG_DEBUG_STACKOVERFLOW
65 /* Debugging check for stack overflow: is there less than 1KB free? */
66 {
67 long esp;
69 __asm__ __volatile__("andl %%esp,%0" :
70 "=r" (esp) : "0" (THREAD_SIZE - 1));
71 if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
72 printk("do_IRQ: stack overflow: %ld\n",
73 esp - sizeof(struct thread_info));
74 dump_stack();
75 }
76 }
77 #endif
79 #ifdef CONFIG_4KSTACKS
81 curctx = (union irq_ctx *) current_thread_info();
82 irqctx = hardirq_ctx[smp_processor_id()];
84 /*
85 * this is where we switch to the IRQ stack. However, if we are
86 * already using the IRQ stack (because we interrupted a hardirq
87 * handler) we can't do that and just have to keep using the
88 * current stack (which is the irq stack already after all)
89 */
90 if (curctx != irqctx) {
91 int arg1, arg2, ebx;
93 /* build the stack frame on the IRQ stack */
94 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
95 irqctx->tinfo.task = curctx->tinfo.task;
96 irqctx->tinfo.previous_esp = current_stack_pointer;
98 asm volatile(
99 " xchgl %%ebx,%%esp \n"
100 " call __do_IRQ \n"
101 " movl %%ebx,%%esp \n"
102 : "=a" (arg1), "=d" (arg2), "=b" (ebx)
103 : "0" (irq), "1" (regs), "2" (isp)
104 : "memory", "cc", "ecx"
105 );
106 } else
107 #endif
108 __do_IRQ(irq, regs);
110 irq_exit();
112 return 1;
113 }
115 #ifdef CONFIG_4KSTACKS
117 /*
118 * These should really be __section__(".bss.page_aligned") as well, but
119 * gcc's 3.0 and earlier don't handle that correctly.
120 */
121 static char softirq_stack[NR_CPUS * THREAD_SIZE]
122 __attribute__((__aligned__(THREAD_SIZE)));
124 static char hardirq_stack[NR_CPUS * THREAD_SIZE]
125 __attribute__((__aligned__(THREAD_SIZE)));
127 /*
128 * allocate per-cpu stacks for hardirq and for softirq processing
129 */
130 void irq_ctx_init(int cpu)
131 {
132 union irq_ctx *irqctx;
134 if (hardirq_ctx[cpu])
135 return;
137 irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
138 irqctx->tinfo.task = NULL;
139 irqctx->tinfo.exec_domain = NULL;
140 irqctx->tinfo.cpu = cpu;
141 irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
142 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
144 hardirq_ctx[cpu] = irqctx;
146 irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
147 irqctx->tinfo.task = NULL;
148 irqctx->tinfo.exec_domain = NULL;
149 irqctx->tinfo.cpu = cpu;
150 irqctx->tinfo.preempt_count = SOFTIRQ_OFFSET;
151 irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
153 softirq_ctx[cpu] = irqctx;
155 printk("CPU %u irqstacks, hard=%p soft=%p\n",
156 cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
157 }
159 void irq_ctx_exit(int cpu)
160 {
161 hardirq_ctx[cpu] = NULL;
162 }
164 extern asmlinkage void __do_softirq(void);
166 asmlinkage void do_softirq(void)
167 {
168 unsigned long flags;
169 struct thread_info *curctx;
170 union irq_ctx *irqctx;
171 u32 *isp;
173 if (in_interrupt())
174 return;
176 local_irq_save(flags);
178 if (local_softirq_pending()) {
179 curctx = current_thread_info();
180 irqctx = softirq_ctx[smp_processor_id()];
181 irqctx->tinfo.task = curctx->task;
182 irqctx->tinfo.previous_esp = current_stack_pointer;
184 /* build the stack frame on the softirq stack */
185 isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
187 asm volatile(
188 " xchgl %%ebx,%%esp \n"
189 " call __do_softirq \n"
190 " movl %%ebx,%%esp \n"
191 : "=b"(isp)
192 : "0"(isp)
193 : "memory", "cc", "edx", "ecx", "eax"
194 );
195 }
197 local_irq_restore(flags);
198 }
200 EXPORT_SYMBOL(do_softirq);
201 #endif
203 /*
204 * Interrupt statistics:
205 */
207 atomic_t irq_err_count;
209 /*
210 * /proc/interrupts printing:
211 */
213 int show_interrupts(struct seq_file *p, void *v)
214 {
215 int i = *(loff_t *) v, j;
216 struct irqaction * action;
217 unsigned long flags;
219 if (i == 0) {
220 seq_printf(p, " ");
221 for_each_online_cpu(j)
222 seq_printf(p, "CPU%d ",j);
223 seq_putc(p, '\n');
224 }
226 if (i < NR_IRQS) {
227 spin_lock_irqsave(&irq_desc[i].lock, flags);
228 action = irq_desc[i].action;
229 if (!action)
230 goto skip;
231 seq_printf(p, "%3d: ",i);
232 #ifndef CONFIG_SMP
233 seq_printf(p, "%10u ", kstat_irqs(i));
234 #else
235 for_each_online_cpu(j)
236 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
237 #endif
238 seq_printf(p, " %14s", irq_desc[i].handler->typename);
239 seq_printf(p, " %s", action->name);
241 for (action=action->next; action; action = action->next)
242 seq_printf(p, ", %s", action->name);
244 seq_putc(p, '\n');
245 skip:
246 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
247 } else if (i == NR_IRQS) {
248 seq_printf(p, "NMI: ");
249 for_each_online_cpu(j)
250 seq_printf(p, "%10u ", nmi_count(j));
251 seq_putc(p, '\n');
252 #ifdef CONFIG_X86_LOCAL_APIC
253 seq_printf(p, "LOC: ");
254 for_each_online_cpu(j)
255 seq_printf(p, "%10u ",
256 per_cpu(irq_stat,j).apic_timer_irqs);
257 seq_putc(p, '\n');
258 #endif
259 seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
260 #if defined(CONFIG_X86_IO_APIC)
261 seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
262 #endif
263 }
264 return 0;
265 }
267 #ifdef CONFIG_HOTPLUG_CPU
269 void fixup_irqs(cpumask_t map)
270 {
271 unsigned int irq;
272 static int warned;
274 for (irq = 0; irq < NR_IRQS; irq++) {
275 cpumask_t mask;
276 if (irq == 2)
277 continue;
279 cpus_and(mask, irq_affinity[irq], map);
280 if (any_online_cpu(mask) == NR_CPUS) {
281 /*printk("Breaking affinity for irq %i\n", irq);*/
282 mask = map;
283 }
284 if (irq_desc[irq].handler->set_affinity)
285 irq_desc[irq].handler->set_affinity(irq, mask);
286 else if (irq_desc[irq].action && !(warned++))
287 printk("Cannot set affinity for irq %i\n", irq);
288 }
290 #if 0
291 barrier();
292 /* Ingo Molnar says: "after the IO-APIC masks have been redirected
293 [note the nop - the interrupt-enable boundary on x86 is two
294 instructions from sti] - to flush out pending hardirqs and
295 IPIs. After this point nothing is supposed to reach this CPU." */
296 __asm__ __volatile__("sti; nop; cli");
297 barrier();
298 #else
299 /* That doesn't seem sufficient. Give it 1ms. */
300 local_irq_enable();
301 mdelay(1);
302 local_irq_disable();
303 #endif
304 }
305 #endif