ia64/xen-unstable

view xen/arch/x86/domain.c @ 14189:d5c4d43da89e

Change compat-check in set_vcpucontext again. Give caller leeway for
HVM guests only.
Signed-off-by: Keir Fraser <keir@xensource.com>
author kfraser@localhost.localdomain
date Thu Mar 01 10:01:51 2007 +0000 (2007-03-01)
parents b703aa29424f
children 3fb02f56c19f
line source
1 /******************************************************************************
2 * arch/x86/domain.c
3 *
4 * x86-specific domain handling (e.g., register setup and context switching).
5 */
7 /*
8 * Copyright (C) 1995 Linus Torvalds
9 *
10 * Pentium III FXSR, SSE support
11 * Gareth Hughes <gareth@valinux.com>, May 2000
12 */
14 #include <xen/config.h>
15 #include <xen/init.h>
16 #include <xen/lib.h>
17 #include <xen/errno.h>
18 #include <xen/sched.h>
19 #include <xen/domain.h>
20 #include <xen/smp.h>
21 #include <xen/delay.h>
22 #include <xen/softirq.h>
23 #include <xen/grant_table.h>
24 #include <xen/iocap.h>
25 #include <xen/kernel.h>
26 #include <xen/multicall.h>
27 #include <xen/irq.h>
28 #include <xen/event.h>
29 #include <xen/console.h>
30 #include <xen/percpu.h>
31 #include <asm/regs.h>
32 #include <asm/mc146818rtc.h>
33 #include <asm/system.h>
34 #include <asm/io.h>
35 #include <asm/processor.h>
36 #include <asm/desc.h>
37 #include <asm/i387.h>
38 #include <asm/mpspec.h>
39 #include <asm/ldt.h>
40 #include <asm/paging.h>
41 #include <asm/hvm/hvm.h>
42 #include <asm/hvm/support.h>
43 #include <asm/msr.h>
44 #ifdef CONFIG_COMPAT
45 #include <compat/vcpu.h>
46 #endif
48 DEFINE_PER_CPU(struct vcpu *, curr_vcpu);
50 static void paravirt_ctxt_switch_from(struct vcpu *v);
51 static void paravirt_ctxt_switch_to(struct vcpu *v);
53 static void vcpu_destroy_pagetables(struct vcpu *v);
55 static void continue_idle_domain(struct vcpu *v)
56 {
57 reset_stack_and_jump(idle_loop);
58 }
60 static void continue_nonidle_domain(struct vcpu *v)
61 {
62 reset_stack_and_jump(ret_from_intr);
63 }
65 static void default_idle(void)
66 {
67 local_irq_disable();
68 if ( !softirq_pending(smp_processor_id()) )
69 safe_halt();
70 else
71 local_irq_enable();
72 }
74 void idle_loop(void)
75 {
76 for ( ; ; )
77 {
78 page_scrub_schedule_work();
79 default_idle();
80 do_softirq();
81 }
82 }
84 void startup_cpu_idle_loop(void)
85 {
86 struct vcpu *v = current;
88 ASSERT(is_idle_vcpu(v));
89 cpu_set(smp_processor_id(), v->domain->domain_dirty_cpumask);
90 cpu_set(smp_processor_id(), v->vcpu_dirty_cpumask);
92 reset_stack_and_jump(idle_loop);
93 }
95 void dump_pageframe_info(struct domain *d)
96 {
97 struct page_info *page;
99 printk("Memory pages belonging to domain %u:\n", d->domain_id);
101 if ( d->tot_pages >= 10 )
102 {
103 printk(" DomPage list too long to display\n");
104 }
105 else
106 {
107 list_for_each_entry ( page, &d->page_list, list )
108 {
109 printk(" DomPage %p: mfn=%p, caf=%08x, taf=%" PRtype_info "\n",
110 _p(page_to_maddr(page)), _p(page_to_mfn(page)),
111 page->count_info, page->u.inuse.type_info);
112 }
113 }
115 list_for_each_entry ( page, &d->xenpage_list, list )
116 {
117 printk(" XenPage %p: mfn=%p, caf=%08x, taf=%" PRtype_info "\n",
118 _p(page_to_maddr(page)), _p(page_to_mfn(page)),
119 page->count_info, page->u.inuse.type_info);
120 }
121 }
123 struct vcpu *alloc_vcpu_struct(void)
124 {
125 struct vcpu *v;
126 if ( (v = xmalloc(struct vcpu)) != NULL )
127 memset(v, 0, sizeof(*v));
128 return v;
129 }
131 void free_vcpu_struct(struct vcpu *v)
132 {
133 xfree(v);
134 }
136 #ifdef CONFIG_COMPAT
138 int setup_arg_xlat_area(struct vcpu *v, l4_pgentry_t *l4tab)
139 {
140 struct domain *d = v->domain;
141 unsigned i;
142 struct page_info *pg;
144 if ( !d->arch.mm_arg_xlat_l3 )
145 {
146 pg = alloc_domheap_page(NULL);
147 if ( !pg )
148 return -ENOMEM;
149 d->arch.mm_arg_xlat_l3 = clear_page(page_to_virt(pg));
150 }
152 l4tab[l4_table_offset(COMPAT_ARG_XLAT_VIRT_BASE)] =
153 l4e_from_paddr(__pa(d->arch.mm_arg_xlat_l3), __PAGE_HYPERVISOR);
155 for ( i = 0; i < COMPAT_ARG_XLAT_PAGES; ++i )
156 {
157 unsigned long va = COMPAT_ARG_XLAT_VIRT_START(v->vcpu_id) + i * PAGE_SIZE;
158 l2_pgentry_t *l2tab;
159 l1_pgentry_t *l1tab;
161 if ( !l3e_get_intpte(d->arch.mm_arg_xlat_l3[l3_table_offset(va)]) )
162 {
163 pg = alloc_domheap_page(NULL);
164 if ( !pg )
165 return -ENOMEM;
166 clear_page(page_to_virt(pg));
167 d->arch.mm_arg_xlat_l3[l3_table_offset(va)] = l3e_from_page(pg, __PAGE_HYPERVISOR);
168 }
169 l2tab = l3e_to_l2e(d->arch.mm_arg_xlat_l3[l3_table_offset(va)]);
170 if ( !l2e_get_intpte(l2tab[l2_table_offset(va)]) )
171 {
172 pg = alloc_domheap_page(NULL);
173 if ( !pg )
174 return -ENOMEM;
175 clear_page(page_to_virt(pg));
176 l2tab[l2_table_offset(va)] = l2e_from_page(pg, __PAGE_HYPERVISOR);
177 }
178 l1tab = l2e_to_l1e(l2tab[l2_table_offset(va)]);
179 BUG_ON(l1e_get_intpte(l1tab[l1_table_offset(va)]));
180 pg = alloc_domheap_page(NULL);
181 if ( !pg )
182 return -ENOMEM;
183 l1tab[l1_table_offset(va)] = l1e_from_page(pg, PAGE_HYPERVISOR);
184 }
186 return 0;
187 }
189 static void release_arg_xlat_area(struct domain *d)
190 {
191 if ( d->arch.mm_arg_xlat_l3 )
192 {
193 unsigned l3;
195 for ( l3 = 0; l3 < L3_PAGETABLE_ENTRIES; ++l3 )
196 {
197 if ( l3e_get_intpte(d->arch.mm_arg_xlat_l3[l3]) )
198 {
199 l2_pgentry_t *l2tab = l3e_to_l2e(d->arch.mm_arg_xlat_l3[l3]);
200 unsigned l2;
202 for ( l2 = 0; l2 < L2_PAGETABLE_ENTRIES; ++l2 )
203 {
204 if ( l2e_get_intpte(l2tab[l2]) )
205 {
206 l1_pgentry_t *l1tab = l2e_to_l1e(l2tab[l2]);
207 unsigned l1;
209 for ( l1 = 0; l1 < L1_PAGETABLE_ENTRIES; ++l1 )
210 {
211 if ( l1e_get_intpte(l1tab[l1]) )
212 free_domheap_page(l1e_get_page(l1tab[l1]));
213 }
214 free_domheap_page(l2e_get_page(l2tab[l2]));
215 }
216 }
217 free_domheap_page(l3e_get_page(d->arch.mm_arg_xlat_l3[l3]));
218 }
219 }
220 free_domheap_page(virt_to_page(d->arch.mm_arg_xlat_l3));
221 }
222 }
224 static int setup_compat_l4(struct vcpu *v)
225 {
226 struct page_info *pg = alloc_domheap_page(NULL);
227 l4_pgentry_t *l4tab;
228 int rc;
230 if ( !pg )
231 return -ENOMEM;
233 /* This page needs to look like a pagetable so that it can be shadowed */
234 pg->u.inuse.type_info = PGT_l4_page_table|PGT_validated;
236 l4tab = copy_page(page_to_virt(pg), idle_pg_table);
237 l4tab[l4_table_offset(LINEAR_PT_VIRT_START)] =
238 l4e_from_page(pg, __PAGE_HYPERVISOR);
239 l4tab[l4_table_offset(PERDOMAIN_VIRT_START)] =
240 l4e_from_paddr(__pa(v->domain->arch.mm_perdomain_l3), __PAGE_HYPERVISOR);
241 v->arch.guest_table = pagetable_from_page(pg);
242 v->arch.guest_table_user = v->arch.guest_table;
244 if ( (rc = setup_arg_xlat_area(v, l4tab)) < 0 )
245 {
246 free_domheap_page(pg);
247 return rc;
248 }
250 return 0;
251 }
253 static void release_compat_l4(struct vcpu *v)
254 {
255 free_domheap_page(pagetable_get_page(v->arch.guest_table));
256 v->arch.guest_table = pagetable_null();
257 v->arch.guest_table_user = pagetable_null();
258 }
260 static inline int may_switch_mode(struct domain *d)
261 {
262 return (d->tot_pages == 0);
263 }
265 int switch_native(struct domain *d)
266 {
267 l1_pgentry_t gdt_l1e;
268 unsigned int vcpuid;
270 if ( d == NULL )
271 return -EINVAL;
272 if ( !may_switch_mode(d) )
273 return -EACCES;
274 if ( !IS_COMPAT(d) )
275 return 0;
277 clear_bit(_DOMF_compat, &d->domain_flags);
278 release_arg_xlat_area(d);
280 /* switch gdt */
281 gdt_l1e = l1e_from_page(virt_to_page(gdt_table), PAGE_HYPERVISOR);
282 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
283 {
284 d->arch.mm_perdomain_pt[((vcpuid << GDT_LDT_VCPU_SHIFT) +
285 FIRST_RESERVED_GDT_PAGE)] = gdt_l1e;
286 if (d->vcpu[vcpuid])
287 release_compat_l4(d->vcpu[vcpuid]);
288 }
290 d->arch.physaddr_bitsize = 64;
292 return 0;
293 }
295 int switch_compat(struct domain *d)
296 {
297 l1_pgentry_t gdt_l1e;
298 unsigned int vcpuid;
300 if ( d == NULL )
301 return -EINVAL;
302 if ( compat_disabled )
303 return -ENOSYS;
304 if ( !may_switch_mode(d) )
305 return -EACCES;
306 if ( IS_COMPAT(d) )
307 return 0;
309 set_bit(_DOMF_compat, &d->domain_flags);
311 /* switch gdt */
312 gdt_l1e = l1e_from_page(virt_to_page(compat_gdt_table), PAGE_HYPERVISOR);
313 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
314 {
315 d->arch.mm_perdomain_pt[((vcpuid << GDT_LDT_VCPU_SHIFT) +
316 FIRST_RESERVED_GDT_PAGE)] = gdt_l1e;
317 if (d->vcpu[vcpuid]
318 && setup_compat_l4(d->vcpu[vcpuid]) != 0)
319 return -ENOMEM;
320 }
322 d->arch.physaddr_bitsize =
323 fls((1UL << 32) - HYPERVISOR_COMPAT_VIRT_START(d)) - 1
324 + (PAGE_SIZE - 2);
326 return 0;
327 }
329 #else
330 #define release_arg_xlat_area(d) ((void)0)
331 #define setup_compat_l4(v) 0
332 #define release_compat_l4(v) ((void)0)
333 #endif
335 int vcpu_initialise(struct vcpu *v)
336 {
337 struct domain *d = v->domain;
338 int rc;
340 v->arch.flags = TF_kernel_mode;
342 pae_l3_cache_init(&v->arch.pae_l3_cache);
344 paging_vcpu_init(v);
346 if ( is_hvm_domain(d) )
347 {
348 if ( (rc = hvm_vcpu_initialise(v)) != 0 )
349 return rc;
350 }
351 else
352 {
353 /* PV guests get an emulated PIT too for video BIOSes to use. */
354 if ( !is_idle_domain(d) && (v->vcpu_id == 0) )
355 pit_init(v, cpu_khz);
357 v->arch.schedule_tail = continue_nonidle_domain;
358 v->arch.ctxt_switch_from = paravirt_ctxt_switch_from;
359 v->arch.ctxt_switch_to = paravirt_ctxt_switch_to;
361 if ( is_idle_domain(d) )
362 {
363 v->arch.schedule_tail = continue_idle_domain;
364 v->arch.cr3 = __pa(idle_pg_table);
365 }
366 }
368 v->arch.perdomain_ptes =
369 d->arch.mm_perdomain_pt + (v->vcpu_id << GDT_LDT_VCPU_SHIFT);
371 if ( IS_COMPAT(d) && (rc = setup_compat_l4(v)) != 0 )
372 return rc;
374 return 0;
375 }
377 void vcpu_destroy(struct vcpu *v)
378 {
379 if ( IS_COMPAT(v->domain) )
380 release_compat_l4(v);
381 }
383 int arch_domain_create(struct domain *d)
384 {
385 #ifdef __x86_64__
386 struct page_info *pg;
387 int i;
388 #endif
389 l1_pgentry_t gdt_l1e;
390 int vcpuid, pdpt_order;
391 int rc = -ENOMEM;
393 pdpt_order = get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t));
394 d->arch.mm_perdomain_pt = alloc_xenheap_pages(pdpt_order);
395 if ( d->arch.mm_perdomain_pt == NULL )
396 goto fail;
397 memset(d->arch.mm_perdomain_pt, 0, PAGE_SIZE << pdpt_order);
399 /*
400 * Map Xen segments into every VCPU's GDT, irrespective of whether every
401 * VCPU will actually be used. This avoids an NMI race during context
402 * switch: if we take an interrupt after switching CR3 but before switching
403 * GDT, and the old VCPU# is invalid in the new domain, we would otherwise
404 * try to load CS from an invalid table.
405 */
406 gdt_l1e = l1e_from_page(virt_to_page(gdt_table), PAGE_HYPERVISOR);
407 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
408 d->arch.mm_perdomain_pt[((vcpuid << GDT_LDT_VCPU_SHIFT) +
409 FIRST_RESERVED_GDT_PAGE)] = gdt_l1e;
411 #if defined(__i386__)
413 mapcache_init(d);
415 #else /* __x86_64__ */
417 if ( (pg = alloc_domheap_page(NULL)) == NULL )
418 goto fail;
419 d->arch.mm_perdomain_l2 = clear_page(page_to_virt(pg));
420 for ( i = 0; i < (1 << pdpt_order); i++ )
421 d->arch.mm_perdomain_l2[l2_table_offset(PERDOMAIN_VIRT_START)+i] =
422 l2e_from_page(virt_to_page(d->arch.mm_perdomain_pt)+i,
423 __PAGE_HYPERVISOR);
425 if ( (pg = alloc_domheap_page(NULL)) == NULL )
426 goto fail;
427 d->arch.mm_perdomain_l3 = clear_page(page_to_virt(pg));
428 d->arch.mm_perdomain_l3[l3_table_offset(PERDOMAIN_VIRT_START)] =
429 l3e_from_page(virt_to_page(d->arch.mm_perdomain_l2),
430 __PAGE_HYPERVISOR);
432 #endif /* __x86_64__ */
434 #ifdef CONFIG_COMPAT
435 HYPERVISOR_COMPAT_VIRT_START(d) = __HYPERVISOR_COMPAT_VIRT_START;
436 #endif
438 paging_domain_init(d);
440 if ( !is_idle_domain(d) )
441 {
442 d->arch.ioport_caps =
443 rangeset_new(d, "I/O Ports", RANGESETF_prettyprint_hex);
444 if ( d->arch.ioport_caps == NULL )
445 goto fail;
447 if ( (d->shared_info = alloc_xenheap_page()) == NULL )
448 goto fail;
450 memset(d->shared_info, 0, PAGE_SIZE);
451 share_xen_page_with_guest(
452 virt_to_page(d->shared_info), d, XENSHARE_writable);
453 }
455 return is_hvm_domain(d) ? hvm_domain_initialise(d) : 0;
457 fail:
458 free_xenheap_page(d->shared_info);
459 #ifdef __x86_64__
460 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
461 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
462 #endif
463 free_xenheap_pages(d->arch.mm_perdomain_pt, pdpt_order);
464 return rc;
465 }
467 void arch_domain_destroy(struct domain *d)
468 {
469 struct vcpu *v;
471 if ( is_hvm_domain(d) )
472 {
473 for_each_vcpu ( d, v )
474 hvm_vcpu_destroy(v);
475 hvm_domain_destroy(d);
476 }
478 paging_final_teardown(d);
480 free_xenheap_pages(
481 d->arch.mm_perdomain_pt,
482 get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t)));
484 #ifdef __x86_64__
485 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
486 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
487 #endif
489 if ( IS_COMPAT(d) )
490 release_arg_xlat_area(d);
492 free_xenheap_page(d->shared_info);
493 }
495 /* This is called by arch_final_setup_guest and do_boot_vcpu */
496 int arch_set_info_guest(
497 struct vcpu *v, vcpu_guest_context_u c)
498 {
499 struct domain *d = v->domain;
500 unsigned long cr3_pfn = INVALID_MFN;
501 unsigned long flags;
502 int i, rc = 0, compat;
504 /*
505 * HVM domain builder always builds caller-bitsize vcpu context.
506 * The PV builder is smarter and builds the appropriate type of context for
507 * the target domain. So the compat check here differs in the two cases.
508 */
509 compat = is_hvm_domain(d) ? IS_COMPAT(current->domain) : IS_COMPAT(d);
511 #ifdef CONFIG_COMPAT
512 #define c(fld) (compat ? (c.cmp->fld) : (c.nat->fld))
513 #else
514 #define c(fld) (c.nat->fld)
515 #endif
516 flags = c(flags);
518 if ( !is_hvm_vcpu(v) )
519 {
520 if ( !compat )
521 {
522 fixup_guest_stack_selector(d, c.nat->user_regs.ss);
523 fixup_guest_stack_selector(d, c.nat->kernel_ss);
524 fixup_guest_code_selector(d, c.nat->user_regs.cs);
525 #ifdef __i386__
526 fixup_guest_code_selector(d, c.nat->event_callback_cs);
527 fixup_guest_code_selector(d, c.nat->failsafe_callback_cs);
528 #endif
530 for ( i = 0; i < 256; i++ )
531 fixup_guest_code_selector(d, c.nat->trap_ctxt[i].cs);
533 /* LDT safety checks. */
534 if ( ((c.nat->ldt_base & (PAGE_SIZE-1)) != 0) ||
535 (c.nat->ldt_ents > 8192) ||
536 !array_access_ok(c.nat->ldt_base,
537 c.nat->ldt_ents,
538 LDT_ENTRY_SIZE) )
539 return -EINVAL;
540 }
541 #ifdef CONFIG_COMPAT
542 else
543 {
544 fixup_guest_stack_selector(d, c.cmp->user_regs.ss);
545 fixup_guest_stack_selector(d, c.cmp->kernel_ss);
546 fixup_guest_code_selector(d, c.cmp->user_regs.cs);
547 fixup_guest_code_selector(d, c.cmp->event_callback_cs);
548 fixup_guest_code_selector(d, c.cmp->failsafe_callback_cs);
550 for ( i = 0; i < 256; i++ )
551 fixup_guest_code_selector(d, c.cmp->trap_ctxt[i].cs);
553 /* LDT safety checks. */
554 if ( ((c.cmp->ldt_base & (PAGE_SIZE-1)) != 0) ||
555 (c.cmp->ldt_ents > 8192) ||
556 !compat_array_access_ok(c.cmp->ldt_base,
557 c.cmp->ldt_ents,
558 LDT_ENTRY_SIZE) )
559 return -EINVAL;
560 }
561 #endif
562 }
564 clear_bit(_VCPUF_fpu_initialised, &v->vcpu_flags);
565 if ( flags & VGCF_I387_VALID )
566 set_bit(_VCPUF_fpu_initialised, &v->vcpu_flags);
568 v->arch.flags &= ~TF_kernel_mode;
569 if ( (flags & VGCF_in_kernel) || is_hvm_vcpu(v)/*???*/ )
570 v->arch.flags |= TF_kernel_mode;
572 if ( !compat )
573 memcpy(&v->arch.guest_context, c.nat, sizeof(*c.nat));
574 #ifdef CONFIG_COMPAT
575 else
576 {
577 XLAT_vcpu_guest_context(&v->arch.guest_context, c.cmp);
578 }
579 #endif
581 /* Only CR0.TS is modifiable by guest or admin. */
582 v->arch.guest_context.ctrlreg[0] &= X86_CR0_TS;
583 v->arch.guest_context.ctrlreg[0] |= read_cr0() & ~X86_CR0_TS;
585 init_int80_direct_trap(v);
587 if ( !is_hvm_vcpu(v) )
588 {
589 /* IOPL privileges are virtualised. */
590 v->arch.iopl = (v->arch.guest_context.user_regs.eflags >> 12) & 3;
591 v->arch.guest_context.user_regs.eflags &= ~EF_IOPL;
593 /* Ensure real hardware interrupts are enabled. */
594 v->arch.guest_context.user_regs.eflags |= EF_IE;
595 }
596 else
597 {
598 hvm_load_cpu_guest_regs(v, &v->arch.guest_context.user_regs);
599 }
601 if ( test_bit(_VCPUF_initialised, &v->vcpu_flags) )
602 return 0;
604 memset(v->arch.guest_context.debugreg, 0,
605 sizeof(v->arch.guest_context.debugreg));
606 for ( i = 0; i < 8; i++ )
607 (void)set_debugreg(v, i, c(debugreg[i]));
609 if ( v->vcpu_id == 0 )
610 d->vm_assist = c(vm_assist);
612 if ( !is_hvm_vcpu(v) )
613 {
614 if ( !compat )
615 rc = (int)set_gdt(v, c.nat->gdt_frames, c.nat->gdt_ents);
616 #ifdef CONFIG_COMPAT
617 else
618 {
619 unsigned long gdt_frames[ARRAY_SIZE(c.cmp->gdt_frames)];
620 unsigned int i, n = (c.cmp->gdt_ents + 511) / 512;
622 if ( n > ARRAY_SIZE(c.cmp->gdt_frames) )
623 return -EINVAL;
624 for ( i = 0; i < n; ++i )
625 gdt_frames[i] = c.cmp->gdt_frames[i];
626 rc = (int)set_gdt(v, gdt_frames, c.cmp->gdt_ents);
627 }
628 #endif
629 if ( rc != 0 )
630 return rc;
632 if ( !compat )
633 {
634 cr3_pfn = gmfn_to_mfn(d, xen_cr3_to_pfn(c.nat->ctrlreg[3]));
636 if ( paging_mode_refcounts(d)
637 ? !get_page(mfn_to_page(cr3_pfn), d)
638 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
639 PGT_base_page_table) )
640 {
641 destroy_gdt(v);
642 return -EINVAL;
643 }
645 v->arch.guest_table = pagetable_from_pfn(cr3_pfn);
646 }
647 #ifdef CONFIG_COMPAT
648 else
649 {
650 l4_pgentry_t *l4tab;
652 cr3_pfn = gmfn_to_mfn(d, compat_cr3_to_pfn(c.cmp->ctrlreg[3]));
654 if ( paging_mode_refcounts(d)
655 ? !get_page(mfn_to_page(cr3_pfn), d)
656 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
657 PGT_l3_page_table) )
658 {
659 destroy_gdt(v);
660 return -EINVAL;
661 }
663 l4tab = __va(pagetable_get_paddr(v->arch.guest_table));
664 *l4tab = l4e_from_pfn(cr3_pfn, _PAGE_PRESENT|_PAGE_RW|_PAGE_USER|_PAGE_ACCESSED);
665 }
666 #endif
667 }
669 if ( v->vcpu_id == 0 )
670 update_domain_wallclock_time(d);
672 /* Don't redo final setup */
673 set_bit(_VCPUF_initialised, &v->vcpu_flags);
675 if ( paging_mode_enabled(d) )
676 paging_update_paging_modes(v);
678 update_cr3(v);
680 return 0;
681 #undef c
682 }
684 int arch_vcpu_reset(struct vcpu *v)
685 {
686 destroy_gdt(v);
687 vcpu_destroy_pagetables(v);
688 return 0;
689 }
691 long
692 arch_do_vcpu_op(
693 int cmd, struct vcpu *v, XEN_GUEST_HANDLE(void) arg)
694 {
695 long rc = 0;
697 switch ( cmd )
698 {
699 case VCPUOP_register_runstate_memory_area:
700 {
701 struct vcpu_register_runstate_memory_area area;
702 struct vcpu_runstate_info runstate;
704 rc = -EFAULT;
705 if ( copy_from_guest(&area, arg, 1) )
706 break;
708 if ( !guest_handle_okay(area.addr.h, 1) )
709 break;
711 rc = 0;
712 runstate_guest(v) = area.addr.h;
714 if ( v == current )
715 {
716 __copy_to_guest(runstate_guest(v), &v->runstate, 1);
717 }
718 else
719 {
720 vcpu_runstate_get(v, &runstate);
721 __copy_to_guest(runstate_guest(v), &runstate, 1);
722 }
724 break;
725 }
727 default:
728 rc = -ENOSYS;
729 break;
730 }
732 return rc;
733 }
735 #ifdef __x86_64__
737 #define loadsegment(seg,value) ({ \
738 int __r = 1; \
739 __asm__ __volatile__ ( \
740 "1: movl %k1,%%" #seg "\n2:\n" \
741 ".section .fixup,\"ax\"\n" \
742 "3: xorl %k0,%k0\n" \
743 " movl %k0,%%" #seg "\n" \
744 " jmp 2b\n" \
745 ".previous\n" \
746 ".section __ex_table,\"a\"\n" \
747 " .align 8\n" \
748 " .quad 1b,3b\n" \
749 ".previous" \
750 : "=r" (__r) : "r" (value), "0" (__r) );\
751 __r; })
753 /*
754 * save_segments() writes a mask of segments which are dirty (non-zero),
755 * allowing load_segments() to avoid some expensive segment loads and
756 * MSR writes.
757 */
758 static DEFINE_PER_CPU(unsigned int, dirty_segment_mask);
759 #define DIRTY_DS 0x01
760 #define DIRTY_ES 0x02
761 #define DIRTY_FS 0x04
762 #define DIRTY_GS 0x08
763 #define DIRTY_FS_BASE 0x10
764 #define DIRTY_GS_BASE_USER 0x20
766 static void load_segments(struct vcpu *n)
767 {
768 struct vcpu_guest_context *nctxt = &n->arch.guest_context;
769 int all_segs_okay = 1;
770 unsigned int dirty_segment_mask, cpu = smp_processor_id();
772 /* Load and clear the dirty segment mask. */
773 dirty_segment_mask = per_cpu(dirty_segment_mask, cpu);
774 per_cpu(dirty_segment_mask, cpu) = 0;
776 /* Either selector != 0 ==> reload. */
777 if ( unlikely((dirty_segment_mask & DIRTY_DS) | nctxt->user_regs.ds) )
778 all_segs_okay &= loadsegment(ds, nctxt->user_regs.ds);
780 /* Either selector != 0 ==> reload. */
781 if ( unlikely((dirty_segment_mask & DIRTY_ES) | nctxt->user_regs.es) )
782 all_segs_okay &= loadsegment(es, nctxt->user_regs.es);
784 /*
785 * Either selector != 0 ==> reload.
786 * Also reload to reset FS_BASE if it was non-zero.
787 */
788 if ( unlikely((dirty_segment_mask & (DIRTY_FS | DIRTY_FS_BASE)) |
789 nctxt->user_regs.fs) )
790 all_segs_okay &= loadsegment(fs, nctxt->user_regs.fs);
792 /*
793 * Either selector != 0 ==> reload.
794 * Also reload to reset GS_BASE if it was non-zero.
795 */
796 if ( unlikely((dirty_segment_mask & (DIRTY_GS | DIRTY_GS_BASE_USER)) |
797 nctxt->user_regs.gs) )
798 {
799 /* Reset GS_BASE with user %gs? */
800 if ( (dirty_segment_mask & DIRTY_GS) || !nctxt->gs_base_user )
801 all_segs_okay &= loadsegment(gs, nctxt->user_regs.gs);
802 }
804 if ( !IS_COMPAT(n->domain) )
805 {
806 /* This can only be non-zero if selector is NULL. */
807 if ( nctxt->fs_base )
808 wrmsr(MSR_FS_BASE,
809 nctxt->fs_base,
810 nctxt->fs_base>>32);
812 /* Most kernels have non-zero GS base, so don't bother testing. */
813 /* (This is also a serialising instruction, avoiding AMD erratum #88.) */
814 wrmsr(MSR_SHADOW_GS_BASE,
815 nctxt->gs_base_kernel,
816 nctxt->gs_base_kernel>>32);
818 /* This can only be non-zero if selector is NULL. */
819 if ( nctxt->gs_base_user )
820 wrmsr(MSR_GS_BASE,
821 nctxt->gs_base_user,
822 nctxt->gs_base_user>>32);
824 /* If in kernel mode then switch the GS bases around. */
825 if ( (n->arch.flags & TF_kernel_mode) )
826 __asm__ __volatile__ ( "swapgs" );
827 }
829 if ( unlikely(!all_segs_okay) )
830 {
831 struct cpu_user_regs *regs = guest_cpu_user_regs();
832 unsigned long *rsp =
833 (n->arch.flags & TF_kernel_mode) ?
834 (unsigned long *)regs->rsp :
835 (unsigned long *)nctxt->kernel_sp;
836 unsigned long cs_and_mask, rflags;
838 if ( IS_COMPAT(n->domain) )
839 {
840 unsigned int *esp = ring_1(regs) ?
841 (unsigned int *)regs->rsp :
842 (unsigned int *)nctxt->kernel_sp;
843 unsigned int cs_and_mask, eflags;
844 int ret = 0;
846 /* CS longword also contains full evtchn_upcall_mask. */
847 cs_and_mask = (unsigned short)regs->cs |
848 ((unsigned int)vcpu_info(n, evtchn_upcall_mask) << 16);
849 /* Fold upcall mask into RFLAGS.IF. */
850 eflags = regs->_eflags & ~X86_EFLAGS_IF;
851 eflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
853 if ( !ring_1(regs) )
854 {
855 ret = put_user(regs->ss, esp-1);
856 ret |= put_user(regs->_esp, esp-2);
857 esp -= 2;
858 }
860 if ( ret |
861 put_user(eflags, esp-1) |
862 put_user(cs_and_mask, esp-2) |
863 put_user(regs->_eip, esp-3) |
864 put_user(nctxt->user_regs.gs, esp-4) |
865 put_user(nctxt->user_regs.fs, esp-5) |
866 put_user(nctxt->user_regs.es, esp-6) |
867 put_user(nctxt->user_regs.ds, esp-7) )
868 {
869 gdprintk(XENLOG_ERR, "Error while creating compat "
870 "failsafe callback frame.\n");
871 domain_crash(n->domain);
872 }
874 if ( test_bit(_VGCF_failsafe_disables_events,
875 &n->arch.guest_context.flags) )
876 vcpu_info(n, evtchn_upcall_mask) = 1;
878 regs->entry_vector = TRAP_syscall;
879 regs->_eflags &= 0xFFFCBEFFUL;
880 regs->ss = FLAT_COMPAT_KERNEL_SS;
881 regs->_esp = (unsigned long)(esp-7);
882 regs->cs = FLAT_COMPAT_KERNEL_CS;
883 regs->_eip = nctxt->failsafe_callback_eip;
884 return;
885 }
887 if ( !(n->arch.flags & TF_kernel_mode) )
888 toggle_guest_mode(n);
889 else
890 regs->cs &= ~3;
892 /* CS longword also contains full evtchn_upcall_mask. */
893 cs_and_mask = (unsigned long)regs->cs |
894 ((unsigned long)vcpu_info(n, evtchn_upcall_mask) << 32);
896 /* Fold upcall mask into RFLAGS.IF. */
897 rflags = regs->rflags & ~X86_EFLAGS_IF;
898 rflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
900 if ( put_user(regs->ss, rsp- 1) |
901 put_user(regs->rsp, rsp- 2) |
902 put_user(rflags, rsp- 3) |
903 put_user(cs_and_mask, rsp- 4) |
904 put_user(regs->rip, rsp- 5) |
905 put_user(nctxt->user_regs.gs, rsp- 6) |
906 put_user(nctxt->user_regs.fs, rsp- 7) |
907 put_user(nctxt->user_regs.es, rsp- 8) |
908 put_user(nctxt->user_regs.ds, rsp- 9) |
909 put_user(regs->r11, rsp-10) |
910 put_user(regs->rcx, rsp-11) )
911 {
912 gdprintk(XENLOG_ERR, "Error while creating failsafe "
913 "callback frame.\n");
914 domain_crash(n->domain);
915 }
917 if ( test_bit(_VGCF_failsafe_disables_events,
918 &n->arch.guest_context.flags) )
919 vcpu_info(n, evtchn_upcall_mask) = 1;
921 regs->entry_vector = TRAP_syscall;
922 regs->rflags &= ~(X86_EFLAGS_AC|X86_EFLAGS_VM|X86_EFLAGS_RF|
923 X86_EFLAGS_NT|X86_EFLAGS_TF);
924 regs->ss = FLAT_KERNEL_SS;
925 regs->rsp = (unsigned long)(rsp-11);
926 regs->cs = FLAT_KERNEL_CS;
927 regs->rip = nctxt->failsafe_callback_eip;
928 }
929 }
931 static void save_segments(struct vcpu *v)
932 {
933 struct vcpu_guest_context *ctxt = &v->arch.guest_context;
934 struct cpu_user_regs *regs = &ctxt->user_regs;
935 unsigned int dirty_segment_mask = 0;
937 regs->ds = read_segment_register(ds);
938 regs->es = read_segment_register(es);
939 regs->fs = read_segment_register(fs);
940 regs->gs = read_segment_register(gs);
942 if ( regs->ds )
943 dirty_segment_mask |= DIRTY_DS;
945 if ( regs->es )
946 dirty_segment_mask |= DIRTY_ES;
948 if ( regs->fs || IS_COMPAT(v->domain) )
949 {
950 dirty_segment_mask |= DIRTY_FS;
951 ctxt->fs_base = 0; /* != 0 selector kills fs_base */
952 }
953 else if ( ctxt->fs_base )
954 {
955 dirty_segment_mask |= DIRTY_FS_BASE;
956 }
958 if ( regs->gs || IS_COMPAT(v->domain) )
959 {
960 dirty_segment_mask |= DIRTY_GS;
961 ctxt->gs_base_user = 0; /* != 0 selector kills gs_base_user */
962 }
963 else if ( ctxt->gs_base_user )
964 {
965 dirty_segment_mask |= DIRTY_GS_BASE_USER;
966 }
968 this_cpu(dirty_segment_mask) = dirty_segment_mask;
969 }
971 #define switch_kernel_stack(v) ((void)0)
973 #elif defined(__i386__)
975 #define load_segments(n) ((void)0)
976 #define save_segments(p) ((void)0)
978 static inline void switch_kernel_stack(struct vcpu *v)
979 {
980 struct tss_struct *tss = &init_tss[smp_processor_id()];
981 tss->esp1 = v->arch.guest_context.kernel_sp;
982 tss->ss1 = v->arch.guest_context.kernel_ss;
983 }
985 #endif /* __i386__ */
987 static void paravirt_ctxt_switch_from(struct vcpu *v)
988 {
989 save_segments(v);
990 }
992 static void paravirt_ctxt_switch_to(struct vcpu *v)
993 {
994 set_int80_direct_trap(v);
995 switch_kernel_stack(v);
996 }
998 #define loaddebug(_v,_reg) \
999 __asm__ __volatile__ ("mov %0,%%db" #_reg : : "r" ((_v)->debugreg[_reg]))
1001 static void __context_switch(void)
1003 struct cpu_user_regs *stack_regs = guest_cpu_user_regs();
1004 unsigned int cpu = smp_processor_id();
1005 struct vcpu *p = per_cpu(curr_vcpu, cpu);
1006 struct vcpu *n = current;
1008 ASSERT(p != n);
1009 ASSERT(cpus_empty(n->vcpu_dirty_cpumask));
1011 if ( !is_idle_vcpu(p) )
1013 memcpy(&p->arch.guest_context.user_regs,
1014 stack_regs,
1015 CTXT_SWITCH_STACK_BYTES);
1016 unlazy_fpu(p);
1017 p->arch.ctxt_switch_from(p);
1020 if ( !is_idle_vcpu(n) )
1022 memcpy(stack_regs,
1023 &n->arch.guest_context.user_regs,
1024 CTXT_SWITCH_STACK_BYTES);
1026 /* Maybe switch the debug registers. */
1027 if ( unlikely(n->arch.guest_context.debugreg[7]) )
1029 loaddebug(&n->arch.guest_context, 0);
1030 loaddebug(&n->arch.guest_context, 1);
1031 loaddebug(&n->arch.guest_context, 2);
1032 loaddebug(&n->arch.guest_context, 3);
1033 /* no 4 and 5 */
1034 loaddebug(&n->arch.guest_context, 6);
1035 loaddebug(&n->arch.guest_context, 7);
1037 n->arch.ctxt_switch_to(n);
1040 if ( p->domain != n->domain )
1041 cpu_set(cpu, n->domain->domain_dirty_cpumask);
1042 cpu_set(cpu, n->vcpu_dirty_cpumask);
1044 write_ptbase(n);
1046 if ( p->vcpu_id != n->vcpu_id )
1048 char gdt_load[10];
1049 *(unsigned short *)(&gdt_load[0]) = LAST_RESERVED_GDT_BYTE;
1050 *(unsigned long *)(&gdt_load[2]) = GDT_VIRT_START(n);
1051 __asm__ __volatile__ ( "lgdt %0" : "=m" (gdt_load) );
1054 if ( p->domain != n->domain )
1055 cpu_clear(cpu, p->domain->domain_dirty_cpumask);
1056 cpu_clear(cpu, p->vcpu_dirty_cpumask);
1058 per_cpu(curr_vcpu, cpu) = n;
1062 void context_switch(struct vcpu *prev, struct vcpu *next)
1064 unsigned int cpu = smp_processor_id();
1065 cpumask_t dirty_mask = next->vcpu_dirty_cpumask;
1067 ASSERT(local_irq_is_enabled());
1069 /* Allow at most one CPU at a time to be dirty. */
1070 ASSERT(cpus_weight(dirty_mask) <= 1);
1071 if ( unlikely(!cpu_isset(cpu, dirty_mask) && !cpus_empty(dirty_mask)) )
1073 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1074 if ( !cpus_empty(next->vcpu_dirty_cpumask) )
1075 flush_tlb_mask(next->vcpu_dirty_cpumask);
1078 local_irq_disable();
1080 if ( is_hvm_vcpu(prev) && !list_empty(&prev->arch.hvm_vcpu.tm_list) )
1081 pt_freeze_time(prev);
1083 set_current(next);
1085 if ( (per_cpu(curr_vcpu, cpu) == next) || is_idle_vcpu(next) )
1087 local_irq_enable();
1089 else
1091 __context_switch();
1093 #ifdef CONFIG_COMPAT
1094 if ( is_idle_vcpu(prev)
1095 || IS_COMPAT(prev->domain) != IS_COMPAT(next->domain) )
1097 uint32_t efer_lo, efer_hi;
1099 local_flush_tlb_one(GDT_VIRT_START(next) + FIRST_RESERVED_GDT_BYTE);
1101 rdmsr(MSR_EFER, efer_lo, efer_hi);
1102 if ( !IS_COMPAT(next->domain) == !(efer_lo & EFER_SCE) )
1104 efer_lo ^= EFER_SCE;
1105 wrmsr(MSR_EFER, efer_lo, efer_hi);
1108 #endif
1110 /* Re-enable interrupts before restoring state which may fault. */
1111 local_irq_enable();
1113 if ( !is_hvm_vcpu(next) )
1115 load_LDT(next);
1116 load_segments(next);
1120 context_saved(prev);
1122 /* Update per-VCPU guest runstate shared memory area (if registered). */
1123 if ( !guest_handle_is_null(runstate_guest(next)) )
1125 if ( !IS_COMPAT(next->domain) )
1126 __copy_to_guest(runstate_guest(next), &next->runstate, 1);
1127 #ifdef CONFIG_COMPAT
1128 else
1130 struct compat_vcpu_runstate_info info;
1132 XLAT_vcpu_runstate_info(&info, &next->runstate);
1133 __copy_to_guest(next->runstate_guest.compat, &info, 1);
1135 #endif
1138 schedule_tail(next);
1139 BUG();
1142 void continue_running(struct vcpu *same)
1144 schedule_tail(same);
1145 BUG();
1148 int __sync_lazy_execstate(void)
1150 unsigned long flags;
1151 int switch_required;
1153 local_irq_save(flags);
1155 switch_required = (this_cpu(curr_vcpu) != current);
1157 if ( switch_required )
1159 ASSERT(current == idle_vcpu[smp_processor_id()]);
1160 __context_switch();
1163 local_irq_restore(flags);
1165 return switch_required;
1168 void sync_vcpu_execstate(struct vcpu *v)
1170 if ( cpu_isset(smp_processor_id(), v->vcpu_dirty_cpumask) )
1171 (void)__sync_lazy_execstate();
1173 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1174 flush_tlb_mask(v->vcpu_dirty_cpumask);
1177 #define next_arg(fmt, args) ({ \
1178 unsigned long __arg; \
1179 switch ( *(fmt)++ ) \
1180 { \
1181 case 'i': __arg = (unsigned long)va_arg(args, unsigned int); break; \
1182 case 'l': __arg = (unsigned long)va_arg(args, unsigned long); break; \
1183 case 'h': __arg = (unsigned long)va_arg(args, void *); break; \
1184 default: __arg = 0; BUG(); \
1185 } \
1186 __arg; \
1187 })
1189 unsigned long hypercall_create_continuation(
1190 unsigned int op, const char *format, ...)
1192 struct mc_state *mcs = &this_cpu(mc_state);
1193 struct cpu_user_regs *regs;
1194 const char *p = format;
1195 unsigned long arg;
1196 unsigned int i;
1197 va_list args;
1199 va_start(args, format);
1201 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1203 __set_bit(_MCSF_call_preempted, &mcs->flags);
1205 for ( i = 0; *p != '\0'; i++ )
1206 mcs->call.args[i] = next_arg(p, args);
1207 if ( IS_COMPAT(current->domain) )
1209 for ( ; i < 6; i++ )
1210 mcs->call.args[i] = 0;
1213 else
1215 regs = guest_cpu_user_regs();
1216 regs->eax = op;
1217 regs->eip -= 2; /* re-execute 'syscall' / 'int 0x82' */
1219 #ifdef __x86_64__
1220 if ( !IS_COMPAT(current->domain) )
1222 for ( i = 0; *p != '\0'; i++ )
1224 arg = next_arg(p, args);
1225 switch ( i )
1227 case 0: regs->rdi = arg; break;
1228 case 1: regs->rsi = arg; break;
1229 case 2: regs->rdx = arg; break;
1230 case 3: regs->r10 = arg; break;
1231 case 4: regs->r8 = arg; break;
1232 case 5: regs->r9 = arg; break;
1236 else
1237 #endif
1239 if ( supervisor_mode_kernel || is_hvm_vcpu(current) )
1240 regs->eip &= ~31; /* re-execute entire hypercall entry stub */
1242 for ( i = 0; *p != '\0'; i++ )
1244 arg = next_arg(p, args);
1245 switch ( i )
1247 case 0: regs->ebx = arg; break;
1248 case 1: regs->ecx = arg; break;
1249 case 2: regs->edx = arg; break;
1250 case 3: regs->esi = arg; break;
1251 case 4: regs->edi = arg; break;
1252 case 5: regs->ebp = arg; break;
1258 va_end(args);
1260 return op;
1263 #ifdef CONFIG_COMPAT
1264 int hypercall_xlat_continuation(unsigned int *id, unsigned int mask, ...)
1266 int rc = 0;
1267 struct mc_state *mcs = &this_cpu(mc_state);
1268 struct cpu_user_regs *regs;
1269 unsigned int i, cval = 0;
1270 unsigned long nval = 0;
1271 va_list args;
1273 BUG_ON(*id > 5);
1274 BUG_ON(mask & (1U << *id));
1276 va_start(args, mask);
1278 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1280 if ( !test_bit(_MCSF_call_preempted, &mcs->flags) )
1281 return 0;
1282 for ( i = 0; i < 6; ++i, mask >>= 1 )
1284 if ( mask & 1 )
1286 nval = va_arg(args, unsigned long);
1287 cval = va_arg(args, unsigned int);
1288 if ( cval == nval )
1289 mask &= ~1U;
1290 else
1291 BUG_ON(nval == (unsigned int)nval);
1293 else if ( id && *id == i )
1295 *id = mcs->call.args[i];
1296 id = NULL;
1298 if ( (mask & 1) && mcs->call.args[i] == nval )
1299 ++rc;
1300 else
1302 cval = mcs->call.args[i];
1303 BUG_ON(mcs->call.args[i] != cval);
1305 mcs->compat_call.args[i] = cval;
1308 else
1310 regs = guest_cpu_user_regs();
1311 for ( i = 0; i < 6; ++i, mask >>= 1 )
1313 unsigned long *reg;
1315 switch ( i )
1317 case 0: reg = &regs->ebx; break;
1318 case 1: reg = &regs->ecx; break;
1319 case 2: reg = &regs->edx; break;
1320 case 3: reg = &regs->esi; break;
1321 case 4: reg = &regs->edi; break;
1322 case 5: reg = &regs->ebp; break;
1323 default: BUG(); reg = NULL; break;
1325 if ( (mask & 1) )
1327 nval = va_arg(args, unsigned long);
1328 cval = va_arg(args, unsigned int);
1329 if ( cval == nval )
1330 mask &= ~1U;
1331 else
1332 BUG_ON(nval == (unsigned int)nval);
1334 else if ( id && *id == i )
1336 *id = *reg;
1337 id = NULL;
1339 if ( (mask & 1) && *reg == nval )
1341 *reg = cval;
1342 ++rc;
1344 else
1345 BUG_ON(*reg != (unsigned int)*reg);
1349 va_end(args);
1351 return rc;
1353 #endif
1355 static void relinquish_memory(struct domain *d, struct list_head *list)
1357 struct list_head *ent;
1358 struct page_info *page;
1359 unsigned long x, y;
1361 /* Use a recursive lock, as we may enter 'free_domheap_page'. */
1362 spin_lock_recursive(&d->page_alloc_lock);
1364 ent = list->next;
1365 while ( ent != list )
1367 page = list_entry(ent, struct page_info, list);
1369 /* Grab a reference to the page so it won't disappear from under us. */
1370 if ( unlikely(!get_page(page, d)) )
1372 /* Couldn't get a reference -- someone is freeing this page. */
1373 ent = ent->next;
1374 continue;
1377 if ( test_and_clear_bit(_PGT_pinned, &page->u.inuse.type_info) )
1378 put_page_and_type(page);
1380 if ( test_and_clear_bit(_PGC_allocated, &page->count_info) )
1381 put_page(page);
1383 /*
1384 * Forcibly invalidate base page tables at this point to break circular
1385 * 'linear page table' references. This is okay because MMU structures
1386 * are not shared across domains and this domain is now dead. Thus base
1387 * tables are not in use so a non-zero count means circular reference.
1388 */
1389 y = page->u.inuse.type_info;
1390 for ( ; ; )
1392 x = y;
1393 if ( likely((x & (PGT_type_mask|PGT_validated)) !=
1394 (PGT_base_page_table|PGT_validated)) )
1395 break;
1397 y = cmpxchg(&page->u.inuse.type_info, x, x & ~PGT_validated);
1398 if ( likely(y == x) )
1400 free_page_type(page, PGT_base_page_table);
1401 break;
1405 /* Follow the list chain and /then/ potentially free the page. */
1406 ent = ent->next;
1407 put_page(page);
1410 spin_unlock_recursive(&d->page_alloc_lock);
1413 static void vcpu_destroy_pagetables(struct vcpu *v)
1415 struct domain *d = v->domain;
1416 unsigned long pfn;
1418 #ifdef CONFIG_COMPAT
1419 if ( IS_COMPAT(d) )
1421 if ( is_hvm_vcpu(v) )
1422 pfn = pagetable_get_pfn(v->arch.guest_table);
1423 else
1424 pfn = l4e_get_pfn(*(l4_pgentry_t *)
1425 __va(pagetable_get_paddr(v->arch.guest_table)));
1427 if ( pfn != 0 )
1429 if ( paging_mode_refcounts(d) )
1430 put_page(mfn_to_page(pfn));
1431 else
1432 put_page_and_type(mfn_to_page(pfn));
1435 if ( is_hvm_vcpu(v) )
1436 v->arch.guest_table = pagetable_null();
1437 else
1438 l4e_write(
1439 (l4_pgentry_t *) __va(pagetable_get_paddr(v->arch.guest_table)),
1440 l4e_empty());
1442 v->arch.cr3 = 0;
1443 return;
1445 #endif
1447 pfn = pagetable_get_pfn(v->arch.guest_table);
1448 if ( pfn != 0 )
1450 if ( paging_mode_refcounts(d) )
1451 put_page(mfn_to_page(pfn));
1452 else
1453 put_page_and_type(mfn_to_page(pfn));
1454 #ifdef __x86_64__
1455 if ( pfn == pagetable_get_pfn(v->arch.guest_table_user) )
1456 v->arch.guest_table_user = pagetable_null();
1457 #endif
1458 v->arch.guest_table = pagetable_null();
1461 #ifdef __x86_64__
1462 /* Drop ref to guest_table_user (from MMUEXT_NEW_USER_BASEPTR) */
1463 pfn = pagetable_get_pfn(v->arch.guest_table_user);
1464 if ( pfn != 0 )
1466 if ( paging_mode_refcounts(d) )
1467 put_page(mfn_to_page(pfn));
1468 else
1469 put_page_and_type(mfn_to_page(pfn));
1470 v->arch.guest_table_user = pagetable_null();
1472 #endif
1474 v->arch.cr3 = 0;
1477 void domain_relinquish_resources(struct domain *d)
1479 struct vcpu *v;
1481 BUG_ON(!cpus_empty(d->domain_dirty_cpumask));
1483 /* Drop the in-use references to page-table bases. */
1484 for_each_vcpu ( d, v )
1485 vcpu_destroy_pagetables(v);
1487 /* Tear down paging-assistance stuff. */
1488 paging_teardown(d);
1490 /*
1491 * Relinquish GDT mappings. No need for explicit unmapping of the LDT as
1492 * it automatically gets squashed when the guest's mappings go away.
1493 */
1494 for_each_vcpu(d, v)
1495 destroy_gdt(v);
1497 /* Relinquish every page of memory. */
1498 relinquish_memory(d, &d->xenpage_list);
1499 relinquish_memory(d, &d->page_list);
1501 /* Free page used by xen oprofile buffer */
1502 free_xenoprof_pages(d);
1505 void arch_dump_domain_info(struct domain *d)
1507 paging_dump_domain_info(d);
1510 void arch_dump_vcpu_info(struct vcpu *v)
1512 paging_dump_vcpu_info(v);
1515 /*
1516 * Local variables:
1517 * mode: C
1518 * c-set-style: "BSD"
1519 * c-basic-offset: 4
1520 * tab-width: 4
1521 * indent-tabs-mode: nil
1522 * End:
1523 */