ia64/xen-unstable

view xenolinux-2.4.22-sparse/include/asm-xeno/hypervisor.h @ 877:d1833d5b387b

bitkeeper revision 1.546.1.1 (3fa3e1b4UwJQtnD-lZcvMsbqR-XhSA)

sched hypercall unification -- tidying things up in
anticipation of suspend/resume
author akw27@labyrinth.cl.cam.ac.uk
date Sat Nov 01 16:39:16 2003 +0000 (2003-11-01)
parents 4c4ccae6252f
children 61c3759bc7be
line source
1 /******************************************************************************
2 * hypervisor.h
3 *
4 * Linux-specific hypervisor handling.
5 *
6 * Copyright (c) 2002, K A Fraser
7 */
9 #ifndef __HYPERVISOR_H__
10 #define __HYPERVISOR_H__
12 #include <linux/types.h>
13 #include <asm/hypervisor-ifs/hypervisor-if.h>
14 #include <asm/ptrace.h>
15 #include <asm/page.h>
17 /* arch/xeno/kernel/setup.c */
18 union start_info_union
19 {
20 start_info_t start_info;
21 char padding[512];
22 };
23 extern union start_info_union start_info_union;
24 #define start_info (start_info_union.start_info)
26 /* arch/xeno/kernel/hypervisor.c */
27 void do_hypervisor_callback(struct pt_regs *regs);
30 /* arch/xeno/mm/hypervisor.c */
31 /*
32 * NB. ptr values should be PHYSICAL, not MACHINE. 'vals' should be already
33 * be MACHINE addresses.
34 */
36 extern unsigned int mmu_update_queue_idx;
38 void queue_l1_entry_update(pte_t *ptr, unsigned long val);
39 void queue_l2_entry_update(pmd_t *ptr, unsigned long val);
40 void queue_pt_switch(unsigned long ptr);
41 void queue_tlb_flush(void);
42 void queue_invlpg(unsigned long ptr);
43 void queue_pgd_pin(unsigned long ptr);
44 void queue_pgd_unpin(unsigned long ptr);
45 void queue_pte_pin(unsigned long ptr);
46 void queue_pte_unpin(unsigned long ptr);
47 void queue_set_ldt(unsigned long ptr, unsigned long bytes);
48 #define MMU_UPDATE_DEBUG 0
50 #define queue_unchecked_mmu_update(_p,_v) queue_l1_entry_update( \
51 (pte_t *)((unsigned long)(_p)|MMU_UNCHECKED_PT_UPDATE),(_v))
53 #if MMU_UPDATE_DEBUG > 0
54 typedef struct {
55 void *ptr;
56 unsigned long val, pteval;
57 void *ptep;
58 int line; char *file;
59 } page_update_debug_t;
60 extern page_update_debug_t update_debug_queue[];
61 #define queue_l1_entry_update(_p,_v) ({ \
62 update_debug_queue[mmu_update_queue_idx].ptr = (_p); \
63 update_debug_queue[mmu_update_queue_idx].val = (_v); \
64 update_debug_queue[mmu_update_queue_idx].line = __LINE__; \
65 update_debug_queue[mmu_update_queue_idx].file = __FILE__; \
66 queue_l1_entry_update((_p),(_v)); \
67 })
68 #define queue_l2_entry_update(_p,_v) ({ \
69 update_debug_queue[mmu_update_queue_idx].ptr = (_p); \
70 update_debug_queue[mmu_update_queue_idx].val = (_v); \
71 update_debug_queue[mmu_update_queue_idx].line = __LINE__; \
72 update_debug_queue[mmu_update_queue_idx].file = __FILE__; \
73 queue_l2_entry_update((_p),(_v)); \
74 })
75 #endif
77 #if MMU_UPDATE_DEBUG > 1
78 #undef queue_l1_entry_update
79 #undef queue_l2_entry_update
80 #define queue_l1_entry_update(_p,_v) ({ \
81 update_debug_queue[mmu_update_queue_idx].ptr = (_p); \
82 update_debug_queue[mmu_update_queue_idx].val = (_v); \
83 update_debug_queue[mmu_update_queue_idx].line = __LINE__; \
84 update_debug_queue[mmu_update_queue_idx].file = __FILE__; \
85 printk("L1 %s %d: %08lx (%08lx -> %08lx)\n", __FILE__, __LINE__, \
86 (_p), pte_val(_p), \
87 (unsigned long)(_v)); \
88 queue_l1_entry_update((_p),(_v)); \
89 })
90 #define queue_l2_entry_update(_p,_v) ({ \
91 update_debug_queue[mmu_update_queue_idx].ptr = (_p); \
92 update_debug_queue[mmu_update_queue_idx].val = (_v); \
93 update_debug_queue[mmu_update_queue_idx].line = __LINE__; \
94 update_debug_queue[mmu_update_queue_idx].file = __FILE__; \
95 printk("L2 %s %d: %08lx (%08lx -> %08lx)\n", __FILE__, __LINE__, \
96 (_p), pmd_val(_p), \
97 (unsigned long)(_v)); \
98 queue_l2_entry_update((_p),(_v)); \
99 })
100 #define queue_pt_switch(_p) ({ \
101 printk("PTSWITCH %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
102 queue_pt_switch(_p); \
103 })
104 #define queue_tlb_flush() ({ \
105 printk("TLB FLUSH %s %d\n", __FILE__, __LINE__); \
106 queue_tlb_flush(); \
107 })
108 #define queue_invlpg(_p) ({ \
109 printk("INVLPG %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
110 queue_invlpg(_p); \
111 })
112 #define queue_pgd_pin(_p) ({ \
113 printk("PGD PIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
114 queue_pgd_pin(_p); \
115 })
116 #define queue_pgd_unpin(_p) ({ \
117 printk("PGD UNPIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
118 queue_pgd_unpin(_p); \
119 })
120 #define queue_pte_pin(_p) ({ \
121 printk("PTE PIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
122 queue_pte_pin(_p); \
123 })
124 #define queue_pte_unpin(_p) ({ \
125 printk("PTE UNPIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
126 queue_pte_unpin(_p); \
127 })
128 #define queue_set_ldt(_p,_l) ({ \
129 printk("SETL LDT %s %d: %08lx %d\n", __FILE__, __LINE__, (_p), (_l)); \
130 queue_set_ldt((_p), (_l)); \
131 })
132 #endif
134 void _flush_page_update_queue(void);
135 static inline int flush_page_update_queue(void)
136 {
137 unsigned int idx = mmu_update_queue_idx;
138 if ( idx != 0 ) _flush_page_update_queue();
139 return idx;
140 }
141 #define XENO_flush_page_update_queue() (_flush_page_update_queue())
142 void MULTICALL_flush_page_update_queue(void);
145 /*
146 * Assembler stubs for hyper-calls.
147 */
149 static inline int HYPERVISOR_set_trap_table(trap_info_t *table)
150 {
151 int ret;
152 __asm__ __volatile__ (
153 TRAP_INSTR
154 : "=a" (ret) : "0" (__HYPERVISOR_set_trap_table),
155 "b" (table) );
157 return ret;
158 }
161 static inline int HYPERVISOR_mmu_update(mmu_update_t *req, int count)
162 {
163 int ret;
164 __asm__ __volatile__ (
165 TRAP_INSTR
166 : "=a" (ret) : "0" (__HYPERVISOR_mmu_update),
167 "b" (req), "c" (count) );
169 return ret;
170 }
173 static inline int HYPERVISOR_console_write(const char *str, int count)
174 {
175 int ret;
176 __asm__ __volatile__ (
177 TRAP_INSTR
178 : "=a" (ret) : "0" (__HYPERVISOR_console_write),
179 "b" (str), "c" (count) );
182 return ret;
183 }
185 static inline int HYPERVISOR_set_gdt(unsigned long *frame_list, int entries)
186 {
187 int ret;
188 __asm__ __volatile__ (
189 TRAP_INSTR
190 : "=a" (ret) : "0" (__HYPERVISOR_set_gdt),
191 "b" (frame_list), "c" (entries) );
194 return ret;
195 }
197 static inline int HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp)
198 {
199 int ret;
200 __asm__ __volatile__ (
201 TRAP_INSTR
202 : "=a" (ret) : "0" (__HYPERVISOR_stack_switch),
203 "b" (ss), "c" (esp) : "memory" );
205 return ret;
206 }
208 static inline int HYPERVISOR_set_callbacks(
209 unsigned long event_selector, unsigned long event_address,
210 unsigned long failsafe_selector, unsigned long failsafe_address)
211 {
212 int ret;
213 __asm__ __volatile__ (
214 TRAP_INSTR
215 : "=a" (ret) : "0" (__HYPERVISOR_set_callbacks),
216 "b" (event_selector), "c" (event_address),
217 "d" (failsafe_selector), "S" (failsafe_address) : "memory" );
219 return ret;
220 }
222 static inline int HYPERVISOR_net_io_op(unsigned int op, unsigned int idx)
223 {
224 int ret;
225 __asm__ __volatile__ (
226 TRAP_INSTR
227 : "=a" (ret) : "0" (__HYPERVISOR_net_io_op),
228 "b" (op), "c" (idx) );
230 return ret;
231 }
233 static inline int HYPERVISOR_fpu_taskswitch(void)
234 {
235 int ret;
236 __asm__ __volatile__ (
237 TRAP_INSTR
238 : "=a" (ret) : "0" (__HYPERVISOR_fpu_taskswitch) );
240 return ret;
241 }
243 static inline int HYPERVISOR_yield(void)
244 {
245 int ret;
246 __asm__ __volatile__ (
247 TRAP_INSTR
248 : "=a" (ret) : "0" (__HYPERVISOR_sched_op),
249 "b" (SCHEDOP_yield) );
251 return ret;
252 }
254 static inline int HYPERVISOR_exit(void)
255 {
256 int ret;
257 __asm__ __volatile__ (
258 TRAP_INSTR
259 : "=a" (ret) : "0" (__HYPERVISOR_sched_op),
260 "b" (SCHEDOP_exit) );
262 return ret;
263 }
265 static inline int HYPERVISOR_dom0_op(void *dom0_op)
266 {
267 int ret;
268 __asm__ __volatile__ (
269 TRAP_INSTR
270 : "=a" (ret) : "0" (__HYPERVISOR_dom0_op),
271 "b" (dom0_op) : "memory" );
273 return ret;
274 }
276 static inline int HYPERVISOR_network_op(void *network_op)
277 {
278 int ret;
279 __asm__ __volatile__ (
280 TRAP_INSTR
281 : "=a" (ret) : "0" (__HYPERVISOR_network_op),
282 "b" (network_op) );
284 return ret;
285 }
287 static inline int HYPERVISOR_block_io_op(void * block_io_op)
288 {
289 int ret;
290 __asm__ __volatile__ (
291 TRAP_INSTR
292 : "=a" (ret) : "0" (__HYPERVISOR_block_io_op),
293 "b" (block_io_op) );
295 return ret;
296 }
298 static inline int HYPERVISOR_set_debugreg(int reg, unsigned long value)
299 {
300 int ret;
301 __asm__ __volatile__ (
302 TRAP_INSTR
303 : "=a" (ret) : "0" (__HYPERVISOR_set_debugreg),
304 "b" (reg), "c" (value) );
306 return ret;
307 }
309 static inline unsigned long HYPERVISOR_get_debugreg(int reg)
310 {
311 unsigned long ret;
312 __asm__ __volatile__ (
313 TRAP_INSTR
314 : "=a" (ret) : "0" (__HYPERVISOR_get_debugreg),
315 "b" (reg) );
317 return ret;
318 }
320 static inline int HYPERVISOR_update_descriptor(
321 unsigned long pa, unsigned long word1, unsigned long word2)
322 {
323 int ret;
324 __asm__ __volatile__ (
325 TRAP_INSTR
326 : "=a" (ret) : "0" (__HYPERVISOR_update_descriptor),
327 "b" (pa), "c" (word1), "d" (word2) );
329 return ret;
330 }
332 static inline int HYPERVISOR_set_fast_trap(int idx)
333 {
334 int ret;
335 __asm__ __volatile__ (
336 TRAP_INSTR
337 : "=a" (ret) : "0" (__HYPERVISOR_set_fast_trap),
338 "b" (idx) );
340 return ret;
341 }
343 static inline int HYPERVISOR_dom_mem_op(void *dom_mem_op)
344 {
345 int ret;
346 __asm__ __volatile__ (
347 TRAP_INSTR
348 : "=a" (ret) : "0" (__HYPERVISOR_dom_mem_op),
349 "b" (dom_mem_op) : "memory" );
351 return ret;
352 }
354 static inline int HYPERVISOR_multicall(void *call_list, int nr_calls)
355 {
356 int ret;
357 __asm__ __volatile__ (
358 TRAP_INSTR
359 : "=a" (ret) : "0" (__HYPERVISOR_multicall),
360 "b" (call_list), "c" (nr_calls) : "memory" );
362 return ret;
363 }
365 static inline long HYPERVISOR_kbd_op(unsigned char op, unsigned char val)
366 {
367 int ret;
368 __asm__ __volatile__ (
369 TRAP_INSTR
370 : "=a" (ret) : "0" (__HYPERVISOR_kbd_op),
371 "b" (op), "c" (val) );
373 return ret;
374 }
376 static inline int HYPERVISOR_update_va_mapping(
377 unsigned long page_nr, pte_t new_val, unsigned long flags)
378 {
379 int ret;
380 __asm__ __volatile__ (
381 TRAP_INSTR
382 : "=a" (ret) : "0" (__HYPERVISOR_update_va_mapping),
383 "b" (page_nr), "c" ((new_val).pte_low), "d" (flags) );
385 return ret;
386 }
388 #endif /* __HYPERVISOR_H__ */