ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-ia64/hw_irq.h @ 13672:d14da87feed6

[IA64] New resend_irq_on_evtchn() params

Signed-off-by: Alex Williamson <alex.williamson@hp.com>
author awilliam@xenbuild2.aw
date Sun Jan 28 16:33:18 2007 -0700 (2007-01-28)
parents 3adf00179a63
children
line source
1 #ifndef _ASM_IA64_HW_IRQ_H
2 #define _ASM_IA64_HW_IRQ_H
4 /*
5 * Copyright (C) 2001-2003 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
9 #include <linux/interrupt.h>
10 #include <linux/sched.h>
11 #include <linux/types.h>
12 #include <linux/profile.h>
14 #include <asm/machvec.h>
15 #include <asm/ptrace.h>
16 #include <asm/smp.h>
18 #ifndef CONFIG_XEN
19 typedef u8 ia64_vector;
20 #else
21 typedef u16 ia64_vector;
22 #endif
24 /*
25 * 0 special
26 *
27 * 1,3-14 are reserved from firmware
28 *
29 * 16-255 (vectored external interrupts) are available
30 *
31 * 15 spurious interrupt (see IVR)
32 *
33 * 16 lowest priority, 255 highest priority
34 *
35 * 15 classes of 16 interrupts each.
36 */
37 #define IA64_MIN_VECTORED_IRQ 16
38 #define IA64_MAX_VECTORED_IRQ 255
39 #define IA64_NUM_VECTORS 256
41 #define AUTO_ASSIGN -1
43 #define IA64_SPURIOUS_INT_VECTOR 0x0f
45 /*
46 * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI.
47 */
48 #define IA64_CPEP_VECTOR 0x1c /* corrected platform error polling vector */
49 #define IA64_CMCP_VECTOR 0x1d /* corrected machine-check polling vector */
50 #define IA64_CPE_VECTOR 0x1e /* corrected platform error interrupt vector */
51 #define IA64_CMC_VECTOR 0x1f /* corrected machine-check interrupt vector */
52 /*
53 * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
54 * Use vectors 0x30-0xe7 as the default device vector range for ia64.
55 * Platforms may choose to reduce this range in platform_irq_setup, but the
56 * platform range must fall within
57 * [IA64_DEF_FIRST_DEVICE_VECTOR..IA64_DEF_LAST_DEVICE_VECTOR]
58 */
59 extern int ia64_first_device_vector;
60 extern int ia64_last_device_vector;
62 #define IA64_DEF_FIRST_DEVICE_VECTOR 0x30
63 #define IA64_DEF_LAST_DEVICE_VECTOR 0xe7
64 #define IA64_FIRST_DEVICE_VECTOR ia64_first_device_vector
65 #define IA64_LAST_DEVICE_VECTOR ia64_last_device_vector
66 #define IA64_MAX_DEVICE_VECTORS (IA64_DEF_LAST_DEVICE_VECTOR - IA64_DEF_FIRST_DEVICE_VECTOR + 1)
67 #define IA64_NUM_DEVICE_VECTORS (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1)
69 #define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */
70 #define IA64_PERFMON_VECTOR 0xee /* performanc monitor interrupt vector */
71 #define IA64_TIMER_VECTOR 0xef /* use highest-prio group 15 interrupt for timer */
72 #define IA64_MCA_WAKEUP_VECTOR 0xf0 /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */
73 #define IA64_IPI_RESCHEDULE 0xfd /* SMP reschedule */
74 #define IA64_IPI_VECTOR 0xfe /* inter-processor interrupt vector */
76 /* Used for encoding redirected irqs */
78 #define IA64_IRQ_REDIRECTED (1 << 31)
80 /* IA64 inter-cpu interrupt related definitions */
82 #define IA64_IPI_DEFAULT_BASE_ADDR 0xfee00000
84 /* Delivery modes for inter-cpu interrupts */
85 enum {
86 IA64_IPI_DM_INT = 0x0, /* pend an external interrupt */
87 IA64_IPI_DM_PMI = 0x2, /* pend a PMI */
88 IA64_IPI_DM_NMI = 0x4, /* pend an NMI (vector 2) */
89 IA64_IPI_DM_INIT = 0x5, /* pend an INIT interrupt */
90 IA64_IPI_DM_EXTINT = 0x7, /* pend an 8259-compatible interrupt. */
91 };
93 extern __u8 isa_irq_to_vector_map[16];
94 #define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)]
96 extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */
98 extern int assign_irq_vector (int irq); /* allocate a free vector */
99 extern void free_irq_vector (int vector);
100 extern int reserve_irq_vector (int vector);
101 extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
102 extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
104 static inline void ia64_resend_irq(unsigned int vector)
105 {
106 #ifdef CONFIG_XEN
107 extern int resend_irq_on_evtchn(unsigned int i);
108 if (is_running_on_xen())
109 resend_irq_on_evtchn(vector);
110 else
111 #endif /* CONFIG_XEN */
112 platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
113 }
115 /*
116 * Default implementations for the irq-descriptor API:
117 */
119 extern irq_desc_t irq_desc[NR_IRQS];
121 #ifndef CONFIG_IA64_GENERIC
122 static inline unsigned int
123 __ia64_local_vector_to_irq (ia64_vector vec)
124 {
125 return (unsigned int) vec;
126 }
127 #endif
129 /*
130 * Next follows the irq descriptor interface. On IA-64, each CPU supports 256 interrupt
131 * vectors. On smaller systems, there is a one-to-one correspondence between interrupt
132 * vectors and the Linux irq numbers. However, larger systems may have multiple interrupt
133 * domains meaning that the translation from vector number to irq number depends on the
134 * interrupt domain that a CPU belongs to. This API abstracts such platform-dependent
135 * differences and provides a uniform means to translate between vector and irq numbers
136 * and to obtain the irq descriptor for a given irq number.
137 */
139 /* Extract the IA-64 vector that corresponds to IRQ. */
140 static inline ia64_vector
141 irq_to_vector (int irq)
142 {
143 return (ia64_vector) irq;
144 }
146 /*
147 * Convert the local IA-64 vector to the corresponding irq number. This translation is
148 * done in the context of the interrupt domain that the currently executing CPU belongs
149 * to.
150 */
151 static inline unsigned int
152 local_vector_to_irq (ia64_vector vec)
153 {
154 return platform_local_vector_to_irq(vec);
155 }
157 #endif /* _ASM_IA64_HW_IRQ_H */