ia64/xen-unstable

view xen/arch/ia64/linux-xen/tlb.c @ 9770:ced37bea0647

[IA64] FPH enabling + cleanup

Move contents of switch_to macro from xensystem.h to context_switch function.
Initialize FPU on all processors. FPH is always enabled in Xen.
Speed up context-switch (a little bit!) by not enabling/disabling FPH.
Cleanup (unused function/variablesi/fields, debug printf...)
vmx_ia64_switch_to removed (was unused).

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
author awilliam@xenbuild.aw
date Tue Apr 25 22:35:41 2006 -0600 (2006-04-25)
parents 212eb6a2d8cd
children 7538ae7ea365
line source
1 /*
2 * TLB support routines.
3 *
4 * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 *
7 * 08/02/00 A. Mallick <asit.k.mallick@intel.com>
8 * Modified RID allocation for SMP
9 * Goutham Rao <goutham.rao@intel.com>
10 * IPI based ptc implementation and A-step IPI implementation.
11 */
12 #include <linux/config.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/sched.h>
17 #include <linux/smp.h>
18 #include <linux/mm.h>
20 #include <asm/delay.h>
21 #include <asm/mmu_context.h>
22 #include <asm/pgalloc.h>
23 #include <asm/pal.h>
24 #include <asm/tlbflush.h>
26 static struct {
27 unsigned long mask; /* mask of supported purge page-sizes */
28 unsigned long max_bits; /* log2() of largest supported purge page-size */
29 } purge;
31 #ifndef XEN
32 struct ia64_ctx ia64_ctx = {
33 .lock = SPIN_LOCK_UNLOCKED,
34 .next = 1,
35 .limit = (1 << 15) - 1, /* start out with the safe (architected) limit */
36 .max_ctx = ~0U
37 };
39 DEFINE_PER_CPU(u8, ia64_need_tlb_flush);
41 /*
42 * Acquire the ia64_ctx.lock before calling this function!
43 */
44 void
45 wrap_mmu_context (struct mm_struct *mm)
46 {
47 unsigned long tsk_context, max_ctx = ia64_ctx.max_ctx;
48 struct task_struct *tsk;
49 int i;
51 if (ia64_ctx.next > max_ctx)
52 ia64_ctx.next = 300; /* skip daemons */
53 ia64_ctx.limit = max_ctx + 1;
55 /*
56 * Scan all the task's mm->context and set proper safe range
57 */
59 read_lock(&tasklist_lock);
60 repeat:
61 for_each_process(tsk) {
62 if (!tsk->mm)
63 continue;
64 tsk_context = tsk->mm->context;
65 if (tsk_context == ia64_ctx.next) {
66 if (++ia64_ctx.next >= ia64_ctx.limit) {
67 /* empty range: reset the range limit and start over */
68 if (ia64_ctx.next > max_ctx)
69 ia64_ctx.next = 300;
70 ia64_ctx.limit = max_ctx + 1;
71 goto repeat;
72 }
73 }
74 if ((tsk_context > ia64_ctx.next) && (tsk_context < ia64_ctx.limit))
75 ia64_ctx.limit = tsk_context;
76 }
77 read_unlock(&tasklist_lock);
78 /* can't call flush_tlb_all() here because of race condition with O(1) scheduler [EF] */
79 {
80 int cpu = get_cpu(); /* prevent preemption/migration */
81 for (i = 0; i < NR_CPUS; ++i)
82 if (cpu_online(i) && (i != cpu))
83 per_cpu(ia64_need_tlb_flush, i) = 1;
84 put_cpu();
85 }
86 local_flush_tlb_all();
87 }
88 #endif /* XEN */
90 void
91 ia64_global_tlb_purge (unsigned long start, unsigned long end, unsigned long nbits)
92 {
93 static DEFINE_SPINLOCK(ptcg_lock);
95 /* HW requires global serialization of ptc.ga. */
96 spin_lock(&ptcg_lock);
97 {
98 do {
99 /*
100 * Flush ALAT entries also.
101 */
102 ia64_ptcga(start, (nbits<<2));
103 ia64_srlz_i();
104 start += (1UL << nbits);
105 } while (start < end);
106 }
107 spin_unlock(&ptcg_lock);
108 }
110 void
111 local_flush_tlb_all (void)
112 {
113 unsigned long i, j, flags, count0, count1, stride0, stride1, addr;
115 addr = local_cpu_data->ptce_base;
116 count0 = local_cpu_data->ptce_count[0];
117 count1 = local_cpu_data->ptce_count[1];
118 stride0 = local_cpu_data->ptce_stride[0];
119 stride1 = local_cpu_data->ptce_stride[1];
121 local_irq_save(flags);
122 for (i = 0; i < count0; ++i) {
123 for (j = 0; j < count1; ++j) {
124 ia64_ptce(addr);
125 addr += stride1;
126 }
127 addr += stride0;
128 }
129 local_irq_restore(flags);
130 ia64_srlz_i(); /* srlz.i implies srlz.d */
131 }
132 EXPORT_SYMBOL(local_flush_tlb_all);
134 #ifndef XEN
135 void
136 flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end)
137 {
138 struct mm_struct *mm = vma->vm_mm;
139 unsigned long size = end - start;
140 unsigned long nbits;
142 if (mm != current->active_mm) {
143 /* this does happen, but perhaps it's not worth optimizing for? */
144 #ifdef CONFIG_SMP
145 flush_tlb_all();
146 #else
147 mm->context = 0;
148 #endif
149 return;
150 }
152 nbits = ia64_fls(size + 0xfff);
153 while (unlikely (((1UL << nbits) & purge.mask) == 0) && (nbits < purge.max_bits))
154 ++nbits;
155 if (nbits > purge.max_bits)
156 nbits = purge.max_bits;
157 start &= ~((1UL << nbits) - 1);
159 # ifdef CONFIG_SMP
160 platform_global_tlb_purge(start, end, nbits);
161 # else
162 do {
163 ia64_ptcl(start, (nbits<<2));
164 start += (1UL << nbits);
165 } while (start < end);
166 # endif
168 ia64_srlz_i(); /* srlz.i implies srlz.d */
169 }
170 EXPORT_SYMBOL(flush_tlb_range);
171 #endif
173 void __devinit
174 ia64_tlb_init (void)
175 {
176 ia64_ptce_info_t ptce_info;
177 unsigned long tr_pgbits;
178 long status;
180 if ((status = ia64_pal_vm_page_size(&tr_pgbits, &purge.mask)) != 0) {
181 printk(KERN_ERR "PAL_VM_PAGE_SIZE failed with status=%ld;"
182 "defaulting to architected purge page-sizes.\n", status);
183 purge.mask = 0x115557000UL;
184 }
185 purge.max_bits = ia64_fls(purge.mask);
187 ia64_get_ptce(&ptce_info);
188 local_cpu_data->ptce_base = ptce_info.base;
189 local_cpu_data->ptce_count[0] = ptce_info.count[0];
190 local_cpu_data->ptce_count[1] = ptce_info.count[1];
191 local_cpu_data->ptce_stride[0] = ptce_info.stride[0];
192 local_cpu_data->ptce_stride[1] = ptce_info.stride[1];
194 local_flush_tlb_all(); /* nuke left overs from bootstrapping... */
195 }