ia64/xen-unstable

view xen/arch/ia64/linux-xen/entry.S @ 9770:ced37bea0647

[IA64] FPH enabling + cleanup

Move contents of switch_to macro from xensystem.h to context_switch function.
Initialize FPU on all processors. FPH is always enabled in Xen.
Speed up context-switch (a little bit!) by not enabling/disabling FPH.
Cleanup (unused function/variablesi/fields, debug printf...)
vmx_ia64_switch_to removed (was unused).

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
author awilliam@xenbuild.aw
date Tue Apr 25 22:35:41 2006 -0600 (2006-04-25)
parents 815758308556
children 4174856876f9
line source
1 /*
2 * ia64/kernel/entry.S
3 *
4 * Kernel entry points.
5 *
6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999, 2002-2003
9 * Asit Mallick <Asit.K.Mallick@intel.com>
10 * Don Dugger <Don.Dugger@intel.com>
11 * Suresh Siddha <suresh.b.siddha@intel.com>
12 * Fenghua Yu <fenghua.yu@intel.com>
13 * Copyright (C) 1999 VA Linux Systems
14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
15 */
16 /*
17 * ia64_switch_to now places correct virtual mapping in in TR2 for
18 * kernel stack. This allows us to handle interrupts without changing
19 * to physical mode.
20 *
21 * Jonathan Nicklin <nicklin@missioncriticallinux.com>
22 * Patrick O'Rourke <orourke@missioncriticallinux.com>
23 * 11/07/2000
24 */
25 /*
26 * Global (preserved) predicate usage on syscall entry/exit path:
27 *
28 * pKStk: See entry.h.
29 * pUStk: See entry.h.
30 * pSys: See entry.h.
31 * pNonSys: !pSys
32 */
34 #include <linux/config.h>
36 #include <asm/asmmacro.h>
37 #include <asm/cache.h>
38 #ifdef XEN
39 #include <xen/errno.h>
40 #else
41 #include <asm/errno.h>
42 #endif
43 #include <asm/kregs.h>
44 #include <asm/offsets.h>
45 #include <asm/pgtable.h>
46 #include <asm/percpu.h>
47 #include <asm/processor.h>
48 #include <asm/thread_info.h>
49 #include <asm/unistd.h>
51 #include "minstate.h"
53 #ifndef XEN
54 /*
55 * execve() is special because in case of success, we need to
56 * setup a null register window frame.
57 */
58 ENTRY(ia64_execve)
59 /*
60 * Allocate 8 input registers since ptrace() may clobber them
61 */
62 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
63 alloc loc1=ar.pfs,8,2,4,0
64 mov loc0=rp
65 .body
66 mov out0=in0 // filename
67 ;; // stop bit between alloc and call
68 mov out1=in1 // argv
69 mov out2=in2 // envp
70 add out3=16,sp // regs
71 br.call.sptk.many rp=sys_execve
72 .ret0:
73 #ifdef CONFIG_IA32_SUPPORT
74 /*
75 * Check if we're returning to ia32 mode. If so, we need to restore ia32 registers
76 * from pt_regs.
77 */
78 adds r16=PT(CR_IPSR)+16,sp
79 ;;
80 ld8 r16=[r16]
81 #endif
82 cmp4.ge p6,p7=r8,r0
83 mov ar.pfs=loc1 // restore ar.pfs
84 sxt4 r8=r8 // return 64-bit result
85 ;;
86 stf.spill [sp]=f0
87 (p6) cmp.ne pKStk,pUStk=r0,r0 // a successful execve() lands us in user-mode...
88 mov rp=loc0
89 (p6) mov ar.pfs=r0 // clear ar.pfs on success
90 (p7) br.ret.sptk.many rp
92 /*
93 * In theory, we'd have to zap this state only to prevent leaking of
94 * security sensitive state (e.g., if current->mm->dumpable is zero). However,
95 * this executes in less than 20 cycles even on Itanium, so it's not worth
96 * optimizing for...).
97 */
98 mov ar.unat=0; mov ar.lc=0
99 mov r4=0; mov f2=f0; mov b1=r0
100 mov r5=0; mov f3=f0; mov b2=r0
101 mov r6=0; mov f4=f0; mov b3=r0
102 mov r7=0; mov f5=f0; mov b4=r0
103 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
104 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
105 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
106 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
107 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
108 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
109 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
110 #ifdef CONFIG_IA32_SUPPORT
111 tbit.nz p6,p0=r16, IA64_PSR_IS_BIT
112 movl loc0=ia64_ret_from_ia32_execve
113 ;;
114 (p6) mov rp=loc0
115 #endif
116 br.ret.sptk.many rp
117 END(ia64_execve)
119 /*
120 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
121 * u64 tls)
122 */
123 GLOBAL_ENTRY(sys_clone2)
124 /*
125 * Allocate 8 input registers since ptrace() may clobber them
126 */
127 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
128 alloc r16=ar.pfs,8,2,6,0
129 DO_SAVE_SWITCH_STACK
130 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
131 mov loc0=rp
132 mov loc1=r16 // save ar.pfs across do_fork
133 .body
134 mov out1=in1
135 mov out3=in2
136 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
137 mov out4=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
138 ;;
139 (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
140 mov out5=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
141 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
142 mov out0=in0 // out0 = clone_flags
143 br.call.sptk.many rp=do_fork
144 .ret1: .restore sp
145 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
146 mov ar.pfs=loc1
147 mov rp=loc0
148 br.ret.sptk.many rp
149 END(sys_clone2)
151 /*
152 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
153 * Deprecated. Use sys_clone2() instead.
154 */
155 GLOBAL_ENTRY(sys_clone)
156 /*
157 * Allocate 8 input registers since ptrace() may clobber them
158 */
159 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
160 alloc r16=ar.pfs,8,2,6,0
161 DO_SAVE_SWITCH_STACK
162 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
163 mov loc0=rp
164 mov loc1=r16 // save ar.pfs across do_fork
165 .body
166 mov out1=in1
167 mov out3=16 // stacksize (compensates for 16-byte scratch area)
168 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
169 mov out4=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
170 ;;
171 (p6) st8 [r2]=in4 // store TLS in r13 (tp)
172 mov out5=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
173 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
174 mov out0=in0 // out0 = clone_flags
175 br.call.sptk.many rp=do_fork
176 .ret2: .restore sp
177 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
178 mov ar.pfs=loc1
179 mov rp=loc0
180 br.ret.sptk.many rp
181 END(sys_clone)
182 #endif
184 /*
185 * prev_task <- ia64_switch_to(struct task_struct *next)
186 * With Ingo's new scheduler, interrupts are disabled when this routine gets
187 * called. The code starting at .map relies on this. The rest of the code
188 * doesn't care about the interrupt masking status.
189 */
190 GLOBAL_ENTRY(ia64_switch_to)
191 .prologue
192 alloc r16=ar.pfs,1,0,0,0
193 DO_SAVE_SWITCH_STACK
194 .body
196 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
197 movl r25=init_task
198 #ifdef XEN
199 movl r27=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
200 ld8 r27=[r27]
201 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
202 dep r20=0,in0,60,4 // physical address of "next"
203 #else
204 mov r27=IA64_KR(CURRENT_STACK)
205 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
206 dep r20=0,in0,61,3 // physical address of "next"
207 #endif
208 ;;
209 st8 [r22]=sp // save kernel stack pointer of old task
210 shr.u r26=r20,IA64_GRANULE_SHIFT
211 cmp.eq p7,p6=r25,in0
212 ;;
213 /*
214 * If we've already mapped this task's page, we can skip doing it again.
215 */
216 (p6) cmp.eq p7,p6=r26,r27
217 (p6) br.cond.dpnt .map
218 ;;
219 .done:
220 (p6) ssm psr.ic // if we had to map, reenable the psr.ic bit FIRST!!!
221 ;;
222 (p6) srlz.d
223 ld8 sp=[r21] // load kernel stack pointer of new task
224 #ifdef XEN
225 movl r8=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
226 st8 [r8]=in0
227 #else
228 mov IA64_KR(CURRENT)=in0 // update "current" application register
229 #endif
230 #ifdef XEN //for VTI domain current is save to 21 of bank0
231 ;;
232 bsw.0
233 ;;
234 mov r8=r13 // return pointer to previously running task
235 mov r13=in0 // set "current" pointer
236 mov r21=in0
237 ;;
238 bsw.1
239 ;;
240 #else
241 mov r8=r13 // return pointer to previously running task
242 mov r13=in0 // set "current" pointer
243 #endif
244 DO_LOAD_SWITCH_STACK
246 #ifdef CONFIG_SMP
247 sync.i // ensure "fc"s done by this CPU are visible on other CPUs
248 #endif
249 br.ret.sptk.many rp // boogie on out in new context
251 .map:
252 #ifdef XEN
253 // avoid overlapping with kernel TR
254 movl r25=KERNEL_START
255 dep r23=0,in0,0,KERNEL_TR_PAGE_SHIFT
256 ;;
257 cmp.eq p7,p0=r25,r23
258 ;;
259 (p7) movl r8=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
260 (p7) st8 [r8]=r26
261 (p7) br.cond.sptk .done
262 #endif
263 rsm psr.ic // interrupts (psr.i) are already disabled here
264 movl r25=PAGE_KERNEL
265 ;;
266 srlz.d
267 or r23=r25,r20 // construct PA | page properties
268 mov r25=IA64_GRANULE_SHIFT<<2
269 ;;
270 mov cr.itir=r25
271 mov cr.ifa=in0 // VA of next task...
272 ;;
273 mov r25=IA64_TR_CURRENT_STACK
274 #ifdef XEN
275 movl r8=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_STACK_OFFSET;;
276 st8 [r8]=r26
278 #else
279 mov IA64_KR(CURRENT_STACK)=r26 // remember last page we mapped...
280 #endif
281 ;;
282 itr.d dtr[r25]=r23 // wire in new mapping...
283 br.cond.sptk .done
284 END(ia64_switch_to)
286 /*
287 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
288 * means that we may get an interrupt with "sp" pointing to the new kernel stack while
289 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
290 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
291 * problem. Also, we don't need to specify unwind information for preserved registers
292 * that are not modified in save_switch_stack as the right unwind information is already
293 * specified at the call-site of save_switch_stack.
294 */
296 /*
297 * save_switch_stack:
298 * - r16 holds ar.pfs
299 * - b7 holds address to return to
300 * - rp (b0) holds return address to save
301 */
302 GLOBAL_ENTRY(save_switch_stack)
303 .prologue
304 .altrp b7
305 flushrs // flush dirty regs to backing store (must be first in insn group)
306 .save @priunat,r17
307 mov r17=ar.unat // preserve caller's
308 .body
309 #ifdef CONFIG_ITANIUM
310 adds r2=16+128,sp
311 adds r3=16+64,sp
312 adds r14=SW(R4)+16,sp
313 ;;
314 st8.spill [r14]=r4,16 // spill r4
315 lfetch.fault.excl.nt1 [r3],128
316 ;;
317 lfetch.fault.excl.nt1 [r2],128
318 lfetch.fault.excl.nt1 [r3],128
319 ;;
320 lfetch.fault.excl [r2]
321 lfetch.fault.excl [r3]
322 adds r15=SW(R5)+16,sp
323 #else
324 add r2=16+3*128,sp
325 add r3=16,sp
326 add r14=SW(R4)+16,sp
327 ;;
328 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
329 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
330 ;;
331 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
332 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
333 ;;
334 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
335 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
336 adds r15=SW(R5)+16,sp
337 #endif
338 ;;
339 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
340 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
341 add r2=SW(F2)+16,sp // r2 = &sw->f2
342 ;;
343 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
344 mov.m r18=ar.fpsr // preserve fpsr
345 add r3=SW(F3)+16,sp // r3 = &sw->f3
346 ;;
347 stf.spill [r2]=f2,32
348 mov.m r19=ar.rnat
349 mov r21=b0
351 stf.spill [r3]=f3,32
352 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
353 mov r22=b1
354 ;;
355 // since we're done with the spills, read and save ar.unat:
356 mov.m r29=ar.unat
357 mov.m r20=ar.bspstore
358 mov r23=b2
359 stf.spill [r2]=f4,32
360 stf.spill [r3]=f5,32
361 mov r24=b3
362 ;;
363 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
364 st8 [r15]=r23,SW(B3)-SW(B2) // save b2
365 mov r25=b4
366 mov r26=b5
367 ;;
368 st8 [r14]=r22,SW(B4)-SW(B1) // save b1
369 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
370 mov r21=ar.lc // I-unit
371 stf.spill [r2]=f12,32
372 stf.spill [r3]=f13,32
373 ;;
374 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
375 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
376 stf.spill [r2]=f14,32
377 stf.spill [r3]=f15,32
378 ;;
379 st8 [r14]=r26 // save b5
380 st8 [r15]=r21 // save ar.lc
381 stf.spill [r2]=f16,32
382 stf.spill [r3]=f17,32
383 ;;
384 stf.spill [r2]=f18,32
385 stf.spill [r3]=f19,32
386 ;;
387 stf.spill [r2]=f20,32
388 stf.spill [r3]=f21,32
389 ;;
390 stf.spill [r2]=f22,32
391 stf.spill [r3]=f23,32
392 ;;
393 stf.spill [r2]=f24,32
394 stf.spill [r3]=f25,32
395 ;;
396 stf.spill [r2]=f26,32
397 stf.spill [r3]=f27,32
398 ;;
399 stf.spill [r2]=f28,32
400 stf.spill [r3]=f29,32
401 ;;
402 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
403 stf.spill [r3]=f31,SW(PR)-SW(F31)
404 add r14=SW(CALLER_UNAT)+16,sp
405 ;;
406 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
407 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
408 mov r21=pr
409 ;;
410 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
411 st8 [r3]=r21 // save predicate registers
412 ;;
413 st8 [r2]=r20 // save ar.bspstore
414 st8 [r14]=r18 // save fpsr
415 mov ar.rsc=3 // put RSE back into eager mode, pl 0
416 br.cond.sptk.many b7
417 END(save_switch_stack)
419 /*
420 * load_switch_stack:
421 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
422 * - b7 holds address to return to
423 * - must not touch r8-r11
424 */
425 #ifdef XEN
426 GLOBAL_ENTRY(load_switch_stack)
427 #else
428 ENTRY(load_switch_stack)
429 #endif
430 .prologue
431 .altrp b7
433 .body
434 lfetch.fault.nt1 [sp]
435 adds r2=SW(AR_BSPSTORE)+16,sp
436 adds r3=SW(AR_UNAT)+16,sp
437 mov ar.rsc=0 // put RSE into enforced lazy mode
438 adds r14=SW(CALLER_UNAT)+16,sp
439 adds r15=SW(AR_FPSR)+16,sp
440 ;;
441 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
442 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
443 ;;
444 ld8 r21=[r2],16 // restore b0
445 ld8 r22=[r3],16 // restore b1
446 ;;
447 ld8 r23=[r2],16 // restore b2
448 ld8 r24=[r3],16 // restore b3
449 ;;
450 ld8 r25=[r2],16 // restore b4
451 ld8 r26=[r3],16 // restore b5
452 ;;
453 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
454 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
455 ;;
456 ld8 r28=[r2] // restore pr
457 ld8 r30=[r3] // restore rnat
458 ;;
459 ld8 r18=[r14],16 // restore caller's unat
460 ld8 r19=[r15],24 // restore fpsr
461 ;;
462 ldf.fill f2=[r14],32
463 ldf.fill f3=[r15],32
464 ;;
465 ldf.fill f4=[r14],32
466 ldf.fill f5=[r15],32
467 ;;
468 ldf.fill f12=[r14],32
469 ldf.fill f13=[r15],32
470 ;;
471 ldf.fill f14=[r14],32
472 ldf.fill f15=[r15],32
473 ;;
474 ldf.fill f16=[r14],32
475 ldf.fill f17=[r15],32
476 ;;
477 ldf.fill f18=[r14],32
478 ldf.fill f19=[r15],32
479 mov b0=r21
480 ;;
481 ldf.fill f20=[r14],32
482 ldf.fill f21=[r15],32
483 mov b1=r22
484 ;;
485 ldf.fill f22=[r14],32
486 ldf.fill f23=[r15],32
487 mov b2=r23
488 ;;
489 mov ar.bspstore=r27
490 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
491 mov b3=r24
492 ;;
493 ldf.fill f24=[r14],32
494 ldf.fill f25=[r15],32
495 mov b4=r25
496 ;;
497 ldf.fill f26=[r14],32
498 ldf.fill f27=[r15],32
499 mov b5=r26
500 ;;
501 ldf.fill f28=[r14],32
502 ldf.fill f29=[r15],32
503 mov ar.pfs=r16
504 ;;
505 ldf.fill f30=[r14],32
506 ldf.fill f31=[r15],24
507 mov ar.lc=r17
508 ;;
509 ld8.fill r4=[r14],16
510 ld8.fill r5=[r15],16
511 mov pr=r28,-1
512 ;;
513 ld8.fill r6=[r14],16
514 ld8.fill r7=[r15],16
516 mov ar.unat=r18 // restore caller's unat
517 mov ar.rnat=r30 // must restore after bspstore but before rsc!
518 mov ar.fpsr=r19 // restore fpsr
519 mov ar.rsc=3 // put RSE back into eager mode, pl 0
520 br.cond.sptk.many b7
521 END(load_switch_stack)
523 #ifndef XEN
524 GLOBAL_ENTRY(execve)
525 mov r15=__NR_execve // put syscall number in place
526 break __BREAK_SYSCALL
527 br.ret.sptk.many rp
528 END(execve)
530 GLOBAL_ENTRY(clone)
531 mov r15=__NR_clone // put syscall number in place
532 break __BREAK_SYSCALL
533 br.ret.sptk.many rp
534 END(clone)
536 /*
537 * Invoke a system call, but do some tracing before and after the call.
538 * We MUST preserve the current register frame throughout this routine
539 * because some system calls (such as ia64_execve) directly
540 * manipulate ar.pfs.
541 */
542 GLOBAL_ENTRY(ia64_trace_syscall)
543 PT_REGS_UNWIND_INFO(0)
544 /*
545 * We need to preserve the scratch registers f6-f11 in case the system
546 * call is sigreturn.
547 */
548 adds r16=PT(F6)+16,sp
549 adds r17=PT(F7)+16,sp
550 ;;
551 stf.spill [r16]=f6,32
552 stf.spill [r17]=f7,32
553 ;;
554 stf.spill [r16]=f8,32
555 stf.spill [r17]=f9,32
556 ;;
557 stf.spill [r16]=f10
558 stf.spill [r17]=f11
559 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
560 adds r16=PT(F6)+16,sp
561 adds r17=PT(F7)+16,sp
562 ;;
563 ldf.fill f6=[r16],32
564 ldf.fill f7=[r17],32
565 ;;
566 ldf.fill f8=[r16],32
567 ldf.fill f9=[r17],32
568 ;;
569 ldf.fill f10=[r16]
570 ldf.fill f11=[r17]
571 // the syscall number may have changed, so re-load it and re-calculate the
572 // syscall entry-point:
573 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
574 ;;
575 ld8 r15=[r15]
576 mov r3=NR_syscalls - 1
577 ;;
578 adds r15=-1024,r15
579 movl r16=sys_call_table
580 ;;
581 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
582 cmp.leu p6,p7=r15,r3
583 ;;
584 (p6) ld8 r20=[r20] // load address of syscall entry point
585 (p7) movl r20=sys_ni_syscall
586 ;;
587 mov b6=r20
588 br.call.sptk.many rp=b6 // do the syscall
589 .strace_check_retval:
590 cmp.lt p6,p0=r8,r0 // syscall failed?
591 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
592 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
593 mov r10=0
594 (p6) br.cond.sptk strace_error // syscall failed ->
595 ;; // avoid RAW on r10
596 .strace_save_retval:
597 .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
598 .mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
599 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
600 .ret3: br.cond.sptk .work_pending_syscall_end
602 strace_error:
603 ld8 r3=[r2] // load pt_regs.r8
604 sub r9=0,r8 // negate return value to get errno value
605 ;;
606 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
607 adds r3=16,r2 // r3=&pt_regs.r10
608 ;;
609 (p6) mov r10=-1
610 (p6) mov r8=r9
611 br.cond.sptk .strace_save_retval
612 END(ia64_trace_syscall)
614 /*
615 * When traced and returning from sigreturn, we invoke syscall_trace but then
616 * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
617 */
618 GLOBAL_ENTRY(ia64_strace_leave_kernel)
619 PT_REGS_UNWIND_INFO(0)
620 { /*
621 * Some versions of gas generate bad unwind info if the first instruction of a
622 * procedure doesn't go into the first slot of a bundle. This is a workaround.
623 */
624 nop.m 0
625 nop.i 0
626 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
627 }
628 .ret4: br.cond.sptk ia64_leave_kernel
629 END(ia64_strace_leave_kernel)
630 #endif
632 GLOBAL_ENTRY(ia64_ret_from_clone)
633 PT_REGS_UNWIND_INFO(0)
634 { /*
635 * Some versions of gas generate bad unwind info if the first instruction of a
636 * procedure doesn't go into the first slot of a bundle. This is a workaround.
637 */
638 nop.m 0
639 nop.i 0
640 /*
641 * We need to call schedule_tail() to complete the scheduling process.
642 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
643 * address of the previously executing task.
644 */
645 br.call.sptk.many rp=ia64_invoke_schedule_tail
646 }
647 #ifdef XEN
648 // new domains are cloned but not exec'ed so switch to user mode here
649 cmp.ne pKStk,pUStk=r0,r0
650 adds r16 = IA64_VCPU_FLAGS_OFFSET, r13
651 ;;
652 ld8 r16 = [r16]
653 ;;
654 cmp.ne p6,p7 = r16, r0
655 (p6) br.cond.spnt ia64_leave_hypervisor
656 (p7) br.cond.spnt ia64_leave_kernel
657 ;;
658 // adds r16 = IA64_VCPU_FLAGS_OFFSET, r13
659 // ;;
660 // ld8 r16 = [r16]
661 // ;;
662 // cmp.ne p6,p7 = r16, r0
663 // (p6) br.cond.spnt ia64_leave_hypervisor
664 // (p7) br.cond.spnt ia64_leave_kernel
665 // ;;
666 #else
667 .ret8:
668 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
669 ;;
670 ld4 r2=[r2]
671 ;;
672 mov r8=0
673 and r2=_TIF_SYSCALL_TRACEAUDIT,r2
674 ;;
675 cmp.ne p6,p0=r2,r0
676 (p6) br.cond.spnt .strace_check_retval
677 #endif
678 ;; // added stop bits to prevent r8 dependency
679 END(ia64_ret_from_clone)
680 // fall through
681 GLOBAL_ENTRY(ia64_ret_from_syscall)
682 PT_REGS_UNWIND_INFO(0)
683 cmp.ge p6,p7=r8,r0 // syscall executed successfully?
684 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
685 mov r10=r0 // clear error indication in r10
686 (p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
687 END(ia64_ret_from_syscall)
688 // fall through
689 /*
690 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
691 * need to switch to bank 0 and doesn't restore the scratch registers.
692 * To avoid leaking kernel bits, the scratch registers are set to
693 * the following known-to-be-safe values:
694 *
695 * r1: restored (global pointer)
696 * r2: cleared
697 * r3: 1 (when returning to user-level)
698 * r8-r11: restored (syscall return value(s))
699 * r12: restored (user-level stack pointer)
700 * r13: restored (user-level thread pointer)
701 * r14: set to __kernel_syscall_via_epc
702 * r15: restored (syscall #)
703 * r16-r17: cleared
704 * r18: user-level b6
705 * r19: cleared
706 * r20: user-level ar.fpsr
707 * r21: user-level b0
708 * r22: cleared
709 * r23: user-level ar.bspstore
710 * r24: user-level ar.rnat
711 * r25: user-level ar.unat
712 * r26: user-level ar.pfs
713 * r27: user-level ar.rsc
714 * r28: user-level ip
715 * r29: user-level psr
716 * r30: user-level cfm
717 * r31: user-level pr
718 * f6-f11: cleared
719 * pr: restored (user-level pr)
720 * b0: restored (user-level rp)
721 * b6: restored
722 * b7: set to __kernel_syscall_via_epc
723 * ar.unat: restored (user-level ar.unat)
724 * ar.pfs: restored (user-level ar.pfs)
725 * ar.rsc: restored (user-level ar.rsc)
726 * ar.rnat: restored (user-level ar.rnat)
727 * ar.bspstore: restored (user-level ar.bspstore)
728 * ar.fpsr: restored (user-level ar.fpsr)
729 * ar.ccv: cleared
730 * ar.csd: cleared
731 * ar.ssd: cleared
732 */
733 ENTRY(ia64_leave_syscall)
734 PT_REGS_UNWIND_INFO(0)
735 /*
736 * work.need_resched etc. mustn't get changed by this CPU before it returns to
737 * user- or fsys-mode, hence we disable interrupts early on.
738 *
739 * p6 controls whether current_thread_info()->flags needs to be check for
740 * extra work. We always check for extra work when returning to user-level.
741 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
742 * is 0. After extra work processing has been completed, execution
743 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
744 * needs to be redone.
745 */
746 #ifdef CONFIG_PREEMPT
747 rsm psr.i // disable interrupts
748 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
749 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
750 ;;
751 .pred.rel.mutex pUStk,pKStk
752 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
753 (pUStk) mov r21=0 // r21 <- 0
754 ;;
755 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
756 #else /* !CONFIG_PREEMPT */
757 (pUStk) rsm psr.i
758 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
759 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
760 #endif
761 .work_processed_syscall:
762 adds r2=PT(LOADRS)+16,r12
763 adds r3=PT(AR_BSPSTORE)+16,r12
764 #ifdef XEN
765 ;;
766 #else
767 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
768 ;;
769 (p6) ld4 r31=[r18] // load current_thread_info()->flags
770 #endif
771 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
772 nop.i 0
773 ;;
774 mov r16=ar.bsp // M2 get existing backing store pointer
775 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
776 #ifndef XEN
777 (p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
778 #endif
779 ;;
780 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
781 #ifndef XEN
782 (p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
783 (p6) br.cond.spnt .work_pending_syscall
784 #endif
785 ;;
786 // start restoring the state saved on the kernel stack (struct pt_regs):
787 ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
788 ld8 r11=[r3],PT(CR_IIP)-PT(R11)
789 (pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
790 ;;
791 invala // M0|1 invalidate ALAT
792 rsm psr.i | psr.ic // M2 turn off interrupts and interruption collection
793 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
795 ld8 r29=[r2],16 // M0|1 load cr.ipsr
796 ld8 r28=[r3],16 // M0|1 load cr.iip
797 mov r22=r0 // A clear r22
798 ;;
799 ld8 r30=[r2],16 // M0|1 load cr.ifs
800 ld8 r25=[r3],16 // M0|1 load ar.unat
801 (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
802 ;;
803 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
804 (pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled
805 nop 0
806 ;;
807 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
808 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
809 mov f6=f0 // F clear f6
810 ;;
811 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
812 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
813 mov f7=f0 // F clear f7
814 ;;
815 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
816 ld8.fill r1=[r3],16 // M0|1 load r1
817 (pUStk) mov r17=1 // A
818 ;;
819 (pUStk) st1 [r14]=r17 // M2|3
820 ld8.fill r13=[r3],16 // M0|1
821 mov f8=f0 // F clear f8
822 ;;
823 ld8.fill r12=[r2] // M0|1 restore r12 (sp)
824 ld8.fill r15=[r3] // M0|1 restore r15
825 mov b6=r18 // I0 restore b6
827 #ifdef XEN
828 movl r17=THIS_CPU(ia64_phys_stacked_size_p8) // A
829 #else
830 addl r17=THIS_CPU(ia64_phys_stacked_size_p8),r0 // A
831 #endif
832 mov f9=f0 // F clear f9
833 (pKStk) br.cond.dpnt.many skip_rbs_switch // B
835 srlz.d // M0 ensure interruption collection is off (for cover)
836 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
837 cover // B add current frame into dirty partition & set cr.ifs
838 ;;
839 (pUStk) ld4 r17=[r17] // M0|1 r17 = cpu_data->phys_stacked_size_p8
840 mov r19=ar.bsp // M2 get new backing store pointer
841 mov f10=f0 // F clear f10
843 nop.m 0
844 #ifdef XEN
845 mov r14=r0
846 #else
847 movl r14=__kernel_syscall_via_epc // X
848 #endif
849 ;;
850 mov.m ar.csd=r0 // M2 clear ar.csd
851 mov.m ar.ccv=r0 // M2 clear ar.ccv
852 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
854 mov.m ar.ssd=r0 // M2 clear ar.ssd
855 mov f11=f0 // F clear f11
856 br.cond.sptk.many rbs_switch // B
857 END(ia64_leave_syscall)
859 #ifdef CONFIG_IA32_SUPPORT
860 GLOBAL_ENTRY(ia64_ret_from_ia32_execve)
861 PT_REGS_UNWIND_INFO(0)
862 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
863 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
864 ;;
865 .mem.offset 0,0
866 st8.spill [r2]=r8 // store return value in slot for r8 and set unat bit
867 .mem.offset 8,0
868 st8.spill [r3]=r0 // clear error indication in slot for r10 and set unat bit
869 END(ia64_ret_from_ia32_execve)
870 // fall through
871 #endif /* CONFIG_IA32_SUPPORT */
872 GLOBAL_ENTRY(ia64_leave_kernel)
873 PT_REGS_UNWIND_INFO(0)
874 /*
875 * work.need_resched etc. mustn't get changed by this CPU before it returns to
876 * user- or fsys-mode, hence we disable interrupts early on.
877 *
878 * p6 controls whether current_thread_info()->flags needs to be check for
879 * extra work. We always check for extra work when returning to user-level.
880 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
881 * is 0. After extra work processing has been completed, execution
882 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
883 * needs to be redone.
884 */
885 #ifdef CONFIG_PREEMPT
886 rsm psr.i // disable interrupts
887 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
888 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
889 ;;
890 .pred.rel.mutex pUStk,pKStk
891 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
892 (pUStk) mov r21=0 // r21 <- 0
893 ;;
894 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
895 #else
896 (pUStk) rsm psr.i
897 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
898 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
899 #endif
900 .work_processed_kernel:
901 #ifdef XEN
902 (pUStk) ssm psr.i
903 (pUStk) br.call.sptk.many b0=process_soft_irq
904 (pUStk) rsm psr.i
905 ;;
906 alloc loc0=ar.pfs,0,1,1,0
907 adds out0=16,r12
908 adds r7 = PT(EML_UNAT)+16,r12
909 ;;
910 ld8 r7 = [r7]
911 ;;
912 #if 0
913 leave_kernel_self:
914 cmp.ne p8,p0 = r0, r7
915 (p8) br.sptk.few leave_kernel_self
916 ;;
917 #endif
918 (pUStk) br.call.sptk.many b0=deliver_pending_interrupt
919 ;;
920 mov ar.pfs=loc0
921 mov ar.unat=r7 /* load eml_unat */
922 mov r31=r0
925 #else
926 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
927 ;;
928 (p6) ld4 r31=[r17] // load current_thread_info()->flags
929 #endif
930 adds r21=PT(PR)+16,r12
931 ;;
933 lfetch [r21],PT(CR_IPSR)-PT(PR)
934 adds r2=PT(B6)+16,r12
935 adds r3=PT(R16)+16,r12
936 ;;
937 lfetch [r21]
938 ld8 r28=[r2],8 // load b6
939 adds r29=PT(R24)+16,r12
941 #ifdef XEN
942 ld8.fill r16=[r3]
943 adds r3=PT(AR_CSD)-PT(R16),r3
944 #else
945 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
946 #endif
947 adds r30=PT(AR_CCV)+16,r12
948 (p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
949 ;;
950 ld8.fill r24=[r29]
951 ld8 r15=[r30] // load ar.ccv
952 (p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
953 ;;
954 ld8 r29=[r2],16 // load b7
955 ld8 r30=[r3],16 // load ar.csd
956 #ifndef XEN
957 (p6) br.cond.spnt .work_pending
958 #endif
959 ;;
960 ld8 r31=[r2],16 // load ar.ssd
961 ld8.fill r8=[r3],16
962 ;;
963 ld8.fill r9=[r2],16
964 ld8.fill r10=[r3],PT(R17)-PT(R10)
965 ;;
966 ld8.fill r11=[r2],PT(R18)-PT(R11)
967 ld8.fill r17=[r3],16
968 ;;
969 ld8.fill r18=[r2],16
970 ld8.fill r19=[r3],16
971 ;;
972 ld8.fill r20=[r2],16
973 ld8.fill r21=[r3],16
974 mov ar.csd=r30
975 mov ar.ssd=r31
976 ;;
977 rsm psr.i | psr.ic // initiate turning off of interrupt and interruption collection
978 invala // invalidate ALAT
979 ;;
980 ld8.fill r22=[r2],24
981 ld8.fill r23=[r3],24
982 mov b6=r28
983 ;;
984 ld8.fill r25=[r2],16
985 ld8.fill r26=[r3],16
986 mov b7=r29
987 ;;
988 ld8.fill r27=[r2],16
989 ld8.fill r28=[r3],16
990 ;;
991 ld8.fill r29=[r2],16
992 ld8.fill r30=[r3],24
993 ;;
994 ld8.fill r31=[r2],PT(F9)-PT(R31)
995 adds r3=PT(F10)-PT(F6),r3
996 ;;
997 ldf.fill f9=[r2],PT(F6)-PT(F9)
998 ldf.fill f10=[r3],PT(F8)-PT(F10)
999 ;;
1000 ldf.fill f6=[r2],PT(F7)-PT(F6)
1001 ;;
1002 ldf.fill f7=[r2],PT(F11)-PT(F7)
1003 #ifdef XEN
1004 ldf.fill f8=[r3],PT(R5)-PT(F8)
1005 ;;
1006 ldf.fill f11=[r2],PT(R4)-PT(F11)
1007 mov ar.ccv=r15
1008 ;;
1009 ld8.fill r4=[r2],16
1010 ld8.fill r5=[r3],16
1011 ;;
1012 ld8.fill r6=[r2]
1013 ld8.fill r7=[r3]
1014 ;;
1015 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
1016 ;;
1017 bsw.0 // switch back to bank 0 (no stop bit required beforehand...)
1018 ;;
1019 #else
1020 ldf.fill f8=[r3],32
1021 ;;
1022 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
1023 mov ar.ccv=r15
1024 ;;
1025 ldf.fill f11=[r2]
1026 bsw.0 // switch back to bank 0 (no stop bit required beforehand...)
1027 ;;
1028 #endif
1029 #ifdef XEN
1030 (pUStk) movl r18=THIS_CPU(cpu_kr)+IA64_KR_CURRENT_OFFSET;;
1031 (pUStk) ld8 r18=[r18]
1032 #else
1033 (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
1034 #endif
1035 adds r16=PT(CR_IPSR)+16,r12
1036 adds r17=PT(CR_IIP)+16,r12
1038 (pKStk) mov r22=psr // M2 read PSR now that interrupts are disabled
1039 nop.i 0
1040 nop.i 0
1041 ;;
1042 ld8 r29=[r16],16 // load cr.ipsr
1043 ld8 r28=[r17],16 // load cr.iip
1044 ;;
1045 ld8 r30=[r16],16 // load cr.ifs
1046 ld8 r25=[r17],16 // load ar.unat
1047 ;;
1048 ld8 r26=[r16],16 // load ar.pfs
1049 ld8 r27=[r17],16 // load ar.rsc
1050 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
1051 ;;
1052 ld8 r24=[r16],16 // load ar.rnat (may be garbage)
1053 ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
1054 ;;
1055 ld8 r31=[r16],16 // load predicates
1056 ld8 r21=[r17],16 // load b0
1057 ;;
1058 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
1059 ld8.fill r1=[r17],16 // load r1
1060 ;;
1061 ld8.fill r12=[r16],16
1062 ld8.fill r13=[r17],16
1063 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
1064 ;;
1065 ld8 r20=[r16],16 // ar.fpsr
1066 ld8.fill r15=[r17],16
1067 ;;
1068 ld8.fill r14=[r16],16
1069 ld8.fill r2=[r17]
1070 (pUStk) mov r17=1
1071 ;;
1072 ld8.fill r3=[r16]
1073 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1074 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1075 ;;
1076 mov r16=ar.bsp // get existing backing store pointer
1077 #ifdef XEN
1078 movl r17=THIS_CPU(ia64_phys_stacked_size_p8)
1079 #else
1080 addl r17=THIS_CPU(ia64_phys_stacked_size_p8),r0
1081 #endif
1082 ;;
1083 ld4 r17=[r17] // r17 = cpu_data->phys_stacked_size_p8
1084 (pKStk) br.cond.dpnt skip_rbs_switch
1086 /*
1087 * Restore user backing store.
1089 * NOTE: alloc, loadrs, and cover can't be predicated.
1090 */
1091 (pNonSys) br.cond.dpnt dont_preserve_current_frame
1092 cover // add current frame into dirty partition and set cr.ifs
1093 ;;
1094 mov r19=ar.bsp // get new backing store pointer
1095 rbs_switch:
1096 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1097 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
1098 ;;
1099 sub r19=r19,r16 // calculate total byte size of dirty partition
1100 add r18=64,r18 // don't force in0-in7 into memory...
1101 ;;
1102 shl r19=r19,16 // shift size of dirty partition into loadrs position
1103 ;;
1104 dont_preserve_current_frame:
1105 /*
1106 * To prevent leaking bits between the kernel and user-space,
1107 * we must clear the stacked registers in the "invalid" partition here.
1108 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1109 * 5 registers/cycle on McKinley).
1110 */
1111 # define pRecurse p6
1112 # define pReturn p7
1113 #ifdef CONFIG_ITANIUM
1114 # define Nregs 10
1115 #else
1116 # define Nregs 14
1117 #endif
1118 alloc loc0=ar.pfs,2,Nregs-2,2,0
1119 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1120 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1121 ;;
1122 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1123 shladd in0=loc1,3,r17
1124 mov in1=0
1125 ;;
1126 TEXT_ALIGN(32)
1127 rse_clear_invalid:
1128 #ifdef CONFIG_ITANIUM
1129 // cycle 0
1130 { .mii
1131 alloc loc0=ar.pfs,2,Nregs-2,2,0
1132 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1133 add out0=-Nregs*8,in0
1134 }{ .mfb
1135 add out1=1,in1 // increment recursion count
1136 nop.f 0
1137 nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
1138 ;;
1139 }{ .mfi // cycle 1
1140 mov loc1=0
1141 nop.f 0
1142 mov loc2=0
1143 }{ .mib
1144 mov loc3=0
1145 mov loc4=0
1146 (pRecurse) br.call.sptk.many b0=rse_clear_invalid
1148 }{ .mfi // cycle 2
1149 mov loc5=0
1150 nop.f 0
1151 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1152 }{ .mib
1153 mov loc6=0
1154 mov loc7=0
1155 (pReturn) br.ret.sptk.many b0
1157 #else /* !CONFIG_ITANIUM */
1158 alloc loc0=ar.pfs,2,Nregs-2,2,0
1159 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1160 add out0=-Nregs*8,in0
1161 add out1=1,in1 // increment recursion count
1162 mov loc1=0
1163 mov loc2=0
1164 ;;
1165 mov loc3=0
1166 mov loc4=0
1167 mov loc5=0
1168 mov loc6=0
1169 mov loc7=0
1170 (pRecurse) br.call.dptk.few b0=rse_clear_invalid
1171 ;;
1172 mov loc8=0
1173 mov loc9=0
1174 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1175 mov loc10=0
1176 mov loc11=0
1177 (pReturn) br.ret.dptk.many b0
1178 #endif /* !CONFIG_ITANIUM */
1179 # undef pRecurse
1180 # undef pReturn
1181 ;;
1182 alloc r17=ar.pfs,0,0,0,0 // drop current register frame
1183 ;;
1184 loadrs
1185 ;;
1186 skip_rbs_switch:
1187 mov ar.unat=r25 // M2
1188 (pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1189 (pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
1190 ;;
1191 (pUStk) mov ar.bspstore=r23 // M2
1192 (pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
1193 (pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1194 ;;
1195 mov cr.ipsr=r29 // M2
1196 mov ar.pfs=r26 // I0
1197 (pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
1199 (p9) mov cr.ifs=r30 // M2
1200 mov b0=r21 // I0
1201 (pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
1203 mov ar.fpsr=r20 // M2
1204 mov cr.iip=r28 // M2
1205 nop 0
1206 ;;
1207 (pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
1208 nop 0
1209 (pLvSys)mov r2=r0
1211 mov ar.rsc=r27 // M2
1212 mov pr=r31,-1 // I0
1213 rfi // B
1215 #ifndef XEN
1216 /*
1217 * On entry:
1218 * r20 = &current->thread_info->pre_count (if CONFIG_PREEMPT)
1219 * r31 = current->thread_info->flags
1220 * On exit:
1221 * p6 = TRUE if work-pending-check needs to be redone
1222 */
1223 .work_pending_syscall:
1224 add r2=-8,r2
1225 add r3=-8,r3
1226 ;;
1227 st8 [r2]=r8
1228 st8 [r3]=r10
1229 .work_pending:
1230 tbit.nz p6,p0=r31,TIF_SIGDELAYED // signal delayed from MCA/INIT/NMI/PMI context?
1231 (p6) br.cond.sptk.few .sigdelayed
1232 ;;
1233 tbit.z p6,p0=r31,TIF_NEED_RESCHED // current_thread_info()->need_resched==0?
1234 (p6) br.cond.sptk.few .notify
1235 #ifdef CONFIG_PREEMPT
1236 (pKStk) dep r21=-1,r0,PREEMPT_ACTIVE_BIT,1
1237 ;;
1238 (pKStk) st4 [r20]=r21
1239 ssm psr.i // enable interrupts
1240 #endif
1241 br.call.spnt.many rp=schedule
1242 .ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1
1243 rsm psr.i // disable interrupts
1244 ;;
1245 #ifdef CONFIG_PREEMPT
1246 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
1247 ;;
1248 (pKStk) st4 [r20]=r0 // preempt_count() <- 0
1249 #endif
1250 (pLvSys)br.cond.sptk.few .work_pending_syscall_end
1251 br.cond.sptk.many .work_processed_kernel // re-check
1253 .notify:
1254 (pUStk) br.call.spnt.many rp=notify_resume_user
1255 .ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0
1256 (pLvSys)br.cond.sptk.few .work_pending_syscall_end
1257 br.cond.sptk.many .work_processed_kernel // don't re-check
1259 // There is a delayed signal that was detected in MCA/INIT/NMI/PMI context where
1260 // it could not be delivered. Deliver it now. The signal might be for us and
1261 // may set TIF_SIGPENDING, so redrive ia64_leave_* after processing the delayed
1262 // signal.
1264 .sigdelayed:
1265 br.call.sptk.many rp=do_sigdelayed
1266 cmp.eq p6,p0=r0,r0 // p6 <- 1, always re-check
1267 (pLvSys)br.cond.sptk.few .work_pending_syscall_end
1268 br.cond.sptk.many .work_processed_kernel // re-check
1270 .work_pending_syscall_end:
1271 adds r2=PT(R8)+16,r12
1272 adds r3=PT(R10)+16,r12
1273 ;;
1274 ld8 r8=[r2]
1275 ld8 r10=[r3]
1276 br.cond.sptk.many .work_processed_syscall // re-check
1277 #endif
1279 END(ia64_leave_kernel)
1281 ENTRY(handle_syscall_error)
1282 /*
1283 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1284 * lead us to mistake a negative return value as a failed syscall. Those syscall
1285 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
1286 * pt_regs.r8 is zero, we assume that the call completed successfully.
1287 */
1288 PT_REGS_UNWIND_INFO(0)
1289 ld8 r3=[r2] // load pt_regs.r8
1290 ;;
1291 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
1292 ;;
1293 (p7) mov r10=-1
1294 (p7) sub r8=0,r8 // negate return value to get errno
1295 br.cond.sptk ia64_leave_syscall
1296 END(handle_syscall_error)
1298 /*
1299 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1300 * in case a system call gets restarted.
1301 */
1302 GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1303 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1304 alloc loc1=ar.pfs,8,2,1,0
1305 mov loc0=rp
1306 mov out0=r8 // Address of previous task
1307 ;;
1308 br.call.sptk.many rp=schedule_tail
1309 .ret11: mov ar.pfs=loc1
1310 mov rp=loc0
1311 br.ret.sptk.many rp
1312 END(ia64_invoke_schedule_tail)
1314 #ifndef XEN
1315 /*
1316 * Setup stack and call do_notify_resume_user(). Note that pSys and pNonSys need to
1317 * be set up by the caller. We declare 8 input registers so the system call
1318 * args get preserved, in case we need to restart a system call.
1319 */
1320 ENTRY(notify_resume_user)
1321 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1322 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1323 mov r9=ar.unat
1324 mov loc0=rp // save return address
1325 mov out0=0 // there is no "oldset"
1326 adds out1=8,sp // out1=&sigscratch->ar_pfs
1327 (pSys) mov out2=1 // out2==1 => we're in a syscall
1328 ;;
1329 (pNonSys) mov out2=0 // out2==0 => not a syscall
1330 .fframe 16
1331 .spillsp ar.unat, 16
1332 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1333 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1334 .body
1335 br.call.sptk.many rp=do_notify_resume_user
1336 .ret15: .restore sp
1337 adds sp=16,sp // pop scratch stack space
1338 ;;
1339 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
1340 mov rp=loc0
1341 ;;
1342 mov ar.unat=r9
1343 mov ar.pfs=loc1
1344 br.ret.sptk.many rp
1345 END(notify_resume_user)
1347 GLOBAL_ENTRY(sys_rt_sigsuspend)
1348 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1349 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1350 mov r9=ar.unat
1351 mov loc0=rp // save return address
1352 mov out0=in0 // mask
1353 mov out1=in1 // sigsetsize
1354 adds out2=8,sp // out2=&sigscratch->ar_pfs
1355 ;;
1356 .fframe 16
1357 .spillsp ar.unat, 16
1358 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1359 st8 [out2]=loc1,-8 // save ar.pfs, out2=&sigscratch
1360 .body
1361 br.call.sptk.many rp=ia64_rt_sigsuspend
1362 .ret17: .restore sp
1363 adds sp=16,sp // pop scratch stack space
1364 ;;
1365 ld8 r9=[sp] // load new unat from sw->caller_unat
1366 mov rp=loc0
1367 ;;
1368 mov ar.unat=r9
1369 mov ar.pfs=loc1
1370 br.ret.sptk.many rp
1371 END(sys_rt_sigsuspend)
1373 ENTRY(sys_rt_sigreturn)
1374 PT_REGS_UNWIND_INFO(0)
1375 /*
1376 * Allocate 8 input registers since ptrace() may clobber them
1377 */
1378 alloc r2=ar.pfs,8,0,1,0
1379 .prologue
1380 PT_REGS_SAVES(16)
1381 adds sp=-16,sp
1382 .body
1383 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
1384 ;;
1385 /*
1386 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1387 * syscall-entry path does not save them we save them here instead. Note: we
1388 * don't need to save any other registers that are not saved by the stream-lined
1389 * syscall path, because restore_sigcontext() restores them.
1390 */
1391 adds r16=PT(F6)+32,sp
1392 adds r17=PT(F7)+32,sp
1393 ;;
1394 stf.spill [r16]=f6,32
1395 stf.spill [r17]=f7,32
1396 ;;
1397 stf.spill [r16]=f8,32
1398 stf.spill [r17]=f9,32
1399 ;;
1400 stf.spill [r16]=f10
1401 stf.spill [r17]=f11
1402 adds out0=16,sp // out0 = &sigscratch
1403 br.call.sptk.many rp=ia64_rt_sigreturn
1404 .ret19: .restore sp,0
1405 adds sp=16,sp
1406 ;;
1407 ld8 r9=[sp] // load new ar.unat
1408 mov.sptk b7=r8,ia64_leave_kernel
1409 ;;
1410 mov ar.unat=r9
1411 br.many b7
1412 END(sys_rt_sigreturn)
1413 #endif
1415 GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1416 .prologue
1417 /*
1418 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1419 */
1420 mov r16=r0
1421 DO_SAVE_SWITCH_STACK
1422 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
1423 .ret21: .body
1424 DO_LOAD_SWITCH_STACK
1425 br.cond.sptk.many rp // goes to ia64_leave_kernel
1426 END(ia64_prepare_handle_unaligned)
1428 //
1429 // unw_init_running(void (*callback)(info, arg), void *arg)
1430 //
1431 # define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1433 GLOBAL_ENTRY(unw_init_running)
1434 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1435 alloc loc1=ar.pfs,2,3,3,0
1436 ;;
1437 ld8 loc2=[in0],8
1438 mov loc0=rp
1439 mov r16=loc1
1440 DO_SAVE_SWITCH_STACK
1441 .body
1443 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1444 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1445 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1446 adds sp=-EXTRA_FRAME_SIZE,sp
1447 .body
1448 ;;
1449 adds out0=16,sp // &info
1450 mov out1=r13 // current
1451 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
1452 br.call.sptk.many rp=unw_init_frame_info
1453 1: adds out0=16,sp // &info
1454 mov b6=loc2
1455 mov loc2=gp // save gp across indirect function call
1456 ;;
1457 ld8 gp=[in0]
1458 mov out1=in1 // arg
1459 br.call.sptk.many rp=b6 // invoke the callback function
1460 1: mov gp=loc2 // restore gp
1462 // For now, we don't allow changing registers from within
1463 // unw_init_running; if we ever want to allow that, we'd
1464 // have to do a load_switch_stack here:
1465 .restore sp
1466 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1468 mov ar.pfs=loc1
1469 mov rp=loc0
1470 br.ret.sptk.many rp
1471 END(unw_init_running)
1473 #ifndef XEN
1474 .rodata
1475 .align 8
1476 .globl sys_call_table
1477 sys_call_table:
1478 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
1479 data8 sys_exit // 1025
1480 data8 sys_read
1481 data8 sys_write
1482 data8 sys_open
1483 data8 sys_close
1484 data8 sys_creat // 1030
1485 data8 sys_link
1486 data8 sys_unlink
1487 data8 ia64_execve
1488 data8 sys_chdir
1489 data8 sys_fchdir // 1035
1490 data8 sys_utimes
1491 data8 sys_mknod
1492 data8 sys_chmod
1493 data8 sys_chown
1494 data8 sys_lseek // 1040
1495 data8 sys_getpid
1496 data8 sys_getppid
1497 data8 sys_mount
1498 data8 sys_umount
1499 data8 sys_setuid // 1045
1500 data8 sys_getuid
1501 data8 sys_geteuid
1502 data8 sys_ptrace
1503 data8 sys_access
1504 data8 sys_sync // 1050
1505 data8 sys_fsync
1506 data8 sys_fdatasync
1507 data8 sys_kill
1508 data8 sys_rename
1509 data8 sys_mkdir // 1055
1510 data8 sys_rmdir
1511 data8 sys_dup
1512 data8 sys_pipe
1513 data8 sys_times
1514 data8 ia64_brk // 1060
1515 data8 sys_setgid
1516 data8 sys_getgid
1517 data8 sys_getegid
1518 data8 sys_acct
1519 data8 sys_ioctl // 1065
1520 data8 sys_fcntl
1521 data8 sys_umask
1522 data8 sys_chroot
1523 data8 sys_ustat
1524 data8 sys_dup2 // 1070
1525 data8 sys_setreuid
1526 data8 sys_setregid
1527 data8 sys_getresuid
1528 data8 sys_setresuid
1529 data8 sys_getresgid // 1075
1530 data8 sys_setresgid
1531 data8 sys_getgroups
1532 data8 sys_setgroups
1533 data8 sys_getpgid
1534 data8 sys_setpgid // 1080
1535 data8 sys_setsid
1536 data8 sys_getsid
1537 data8 sys_sethostname
1538 data8 sys_setrlimit
1539 data8 sys_getrlimit // 1085
1540 data8 sys_getrusage
1541 data8 sys_gettimeofday
1542 data8 sys_settimeofday
1543 data8 sys_select
1544 data8 sys_poll // 1090
1545 data8 sys_symlink
1546 data8 sys_readlink
1547 data8 sys_uselib
1548 data8 sys_swapon
1549 data8 sys_swapoff // 1095
1550 data8 sys_reboot
1551 data8 sys_truncate
1552 data8 sys_ftruncate
1553 data8 sys_fchmod
1554 data8 sys_fchown // 1100
1555 data8 ia64_getpriority
1556 data8 sys_setpriority
1557 data8 sys_statfs
1558 data8 sys_fstatfs
1559 data8 sys_gettid // 1105
1560 data8 sys_semget
1561 data8 sys_semop
1562 data8 sys_semctl
1563 data8 sys_msgget
1564 data8 sys_msgsnd // 1110
1565 data8 sys_msgrcv
1566 data8 sys_msgctl
1567 data8 sys_shmget
1568 data8 sys_shmat
1569 data8 sys_shmdt // 1115
1570 data8 sys_shmctl
1571 data8 sys_syslog
1572 data8 sys_setitimer
1573 data8 sys_getitimer
1574 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
1575 data8 sys_ni_syscall /* was: ia64_oldlstat */
1576 data8 sys_ni_syscall /* was: ia64_oldfstat */
1577 data8 sys_vhangup
1578 data8 sys_lchown
1579 data8 sys_remap_file_pages // 1125
1580 data8 sys_wait4
1581 data8 sys_sysinfo
1582 data8 sys_clone
1583 data8 sys_setdomainname
1584 data8 sys_newuname // 1130
1585 data8 sys_adjtimex
1586 data8 sys_ni_syscall /* was: ia64_create_module */
1587 data8 sys_init_module
1588 data8 sys_delete_module
1589 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
1590 data8 sys_ni_syscall /* was: sys_query_module */
1591 data8 sys_quotactl
1592 data8 sys_bdflush
1593 data8 sys_sysfs
1594 data8 sys_personality // 1140
1595 data8 sys_ni_syscall // sys_afs_syscall
1596 data8 sys_setfsuid
1597 data8 sys_setfsgid
1598 data8 sys_getdents
1599 data8 sys_flock // 1145
1600 data8 sys_readv
1601 data8 sys_writev
1602 data8 sys_pread64
1603 data8 sys_pwrite64
1604 data8 sys_sysctl // 1150
1605 data8 sys_mmap
1606 data8 sys_munmap
1607 data8 sys_mlock
1608 data8 sys_mlockall
1609 data8 sys_mprotect // 1155
1610 data8 ia64_mremap
1611 data8 sys_msync
1612 data8 sys_munlock
1613 data8 sys_munlockall
1614 data8 sys_sched_getparam // 1160
1615 data8 sys_sched_setparam
1616 data8 sys_sched_getscheduler
1617 data8 sys_sched_setscheduler
1618 data8 sys_sched_yield
1619 data8 sys_sched_get_priority_max // 1165
1620 data8 sys_sched_get_priority_min
1621 data8 sys_sched_rr_get_interval
1622 data8 sys_nanosleep
1623 data8 sys_nfsservctl
1624 data8 sys_prctl // 1170
1625 data8 sys_getpagesize
1626 data8 sys_mmap2
1627 data8 sys_pciconfig_read
1628 data8 sys_pciconfig_write
1629 data8 sys_perfmonctl // 1175
1630 data8 sys_sigaltstack
1631 data8 sys_rt_sigaction
1632 data8 sys_rt_sigpending
1633 data8 sys_rt_sigprocmask
1634 data8 sys_rt_sigqueueinfo // 1180
1635 data8 sys_rt_sigreturn
1636 data8 sys_rt_sigsuspend
1637 data8 sys_rt_sigtimedwait
1638 data8 sys_getcwd
1639 data8 sys_capget // 1185
1640 data8 sys_capset
1641 data8 sys_sendfile64
1642 data8 sys_ni_syscall // sys_getpmsg (STREAMS)
1643 data8 sys_ni_syscall // sys_putpmsg (STREAMS)
1644 data8 sys_socket // 1190
1645 data8 sys_bind
1646 data8 sys_connect
1647 data8 sys_listen
1648 data8 sys_accept
1649 data8 sys_getsockname // 1195
1650 data8 sys_getpeername
1651 data8 sys_socketpair
1652 data8 sys_send
1653 data8 sys_sendto
1654 data8 sys_recv // 1200
1655 data8 sys_recvfrom
1656 data8 sys_shutdown
1657 data8 sys_setsockopt
1658 data8 sys_getsockopt
1659 data8 sys_sendmsg // 1205
1660 data8 sys_recvmsg
1661 data8 sys_pivot_root
1662 data8 sys_mincore
1663 data8 sys_madvise
1664 data8 sys_newstat // 1210
1665 data8 sys_newlstat
1666 data8 sys_newfstat
1667 data8 sys_clone2
1668 data8 sys_getdents64
1669 data8 sys_getunwind // 1215
1670 data8 sys_readahead
1671 data8 sys_setxattr
1672 data8 sys_lsetxattr
1673 data8 sys_fsetxattr
1674 data8 sys_getxattr // 1220
1675 data8 sys_lgetxattr
1676 data8 sys_fgetxattr
1677 data8 sys_listxattr
1678 data8 sys_llistxattr
1679 data8 sys_flistxattr // 1225
1680 data8 sys_removexattr
1681 data8 sys_lremovexattr
1682 data8 sys_fremovexattr
1683 data8 sys_tkill
1684 data8 sys_futex // 1230
1685 data8 sys_sched_setaffinity
1686 data8 sys_sched_getaffinity
1687 data8 sys_set_tid_address
1688 data8 sys_fadvise64_64
1689 data8 sys_tgkill // 1235
1690 data8 sys_exit_group
1691 data8 sys_lookup_dcookie
1692 data8 sys_io_setup
1693 data8 sys_io_destroy
1694 data8 sys_io_getevents // 1240
1695 data8 sys_io_submit
1696 data8 sys_io_cancel
1697 data8 sys_epoll_create
1698 data8 sys_epoll_ctl
1699 data8 sys_epoll_wait // 1245
1700 data8 sys_restart_syscall
1701 data8 sys_semtimedop
1702 data8 sys_timer_create
1703 data8 sys_timer_settime
1704 data8 sys_timer_gettime // 1250
1705 data8 sys_timer_getoverrun
1706 data8 sys_timer_delete
1707 data8 sys_clock_settime
1708 data8 sys_clock_gettime
1709 data8 sys_clock_getres // 1255
1710 data8 sys_clock_nanosleep
1711 data8 sys_fstatfs64
1712 data8 sys_statfs64
1713 data8 sys_mbind
1714 data8 sys_get_mempolicy // 1260
1715 data8 sys_set_mempolicy
1716 data8 sys_mq_open
1717 data8 sys_mq_unlink
1718 data8 sys_mq_timedsend
1719 data8 sys_mq_timedreceive // 1265
1720 data8 sys_mq_notify
1721 data8 sys_mq_getsetattr
1722 data8 sys_ni_syscall // reserved for kexec_load
1723 data8 sys_ni_syscall // reserved for vserver
1724 data8 sys_waitid // 1270
1725 data8 sys_add_key
1726 data8 sys_request_key
1727 data8 sys_keyctl
1728 data8 sys_ioprio_set
1729 data8 sys_ioprio_get // 1275
1730 data8 sys_ni_syscall
1731 data8 sys_inotify_init
1732 data8 sys_inotify_add_watch
1733 data8 sys_inotify_rm_watch
1735 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1736 #endif