ia64/xen-unstable

view xen/arch/x86/domain.c @ 19787:cecc76506afc

x86_64: don't allocate L1 per-domain page table pages in a single chunk

Instead, allocate them on demand, and adjust the consumer to no longer
assume the allocated space is contiguous.

This another prerequisite to extend to number of vCPU-s the hypervisor
can support per guest.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Jun 18 10:05:23 2009 +0100 (2009-06-18)
parents 822ea2bf0c54
children 2f9e1348aa98
line source
1 /******************************************************************************
2 * arch/x86/domain.c
3 *
4 * x86-specific domain handling (e.g., register setup and context switching).
5 */
7 /*
8 * Copyright (C) 1995 Linus Torvalds
9 *
10 * Pentium III FXSR, SSE support
11 * Gareth Hughes <gareth@valinux.com>, May 2000
12 */
14 #include <xen/config.h>
15 #include <xen/init.h>
16 #include <xen/lib.h>
17 #include <xen/errno.h>
18 #include <xen/sched.h>
19 #include <xen/domain.h>
20 #include <xen/smp.h>
21 #include <xen/delay.h>
22 #include <xen/softirq.h>
23 #include <xen/grant_table.h>
24 #include <xen/iocap.h>
25 #include <xen/kernel.h>
26 #include <xen/multicall.h>
27 #include <xen/irq.h>
28 #include <xen/event.h>
29 #include <xen/console.h>
30 #include <xen/percpu.h>
31 #include <xen/compat.h>
32 #include <xen/acpi.h>
33 #include <xen/pci.h>
34 #include <xen/paging.h>
35 #include <asm/regs.h>
36 #include <asm/mc146818rtc.h>
37 #include <asm/system.h>
38 #include <asm/io.h>
39 #include <asm/processor.h>
40 #include <asm/desc.h>
41 #include <asm/i387.h>
42 #include <asm/mpspec.h>
43 #include <asm/ldt.h>
44 #include <asm/hypercall.h>
45 #include <asm/hvm/hvm.h>
46 #include <asm/hvm/support.h>
47 #include <asm/debugreg.h>
48 #include <asm/msr.h>
49 #include <asm/traps.h>
50 #include <asm/nmi.h>
51 #include <xen/numa.h>
52 #include <xen/iommu.h>
53 #ifdef CONFIG_COMPAT
54 #include <compat/vcpu.h>
55 #endif
57 DEFINE_PER_CPU(struct vcpu *, curr_vcpu);
58 DEFINE_PER_CPU(u64, efer);
59 DEFINE_PER_CPU(unsigned long, cr4);
61 static void default_idle(void);
62 static void default_dead_idle(void);
63 void (*pm_idle) (void) = default_idle;
64 void (*dead_idle) (void) = default_dead_idle;
66 static void paravirt_ctxt_switch_from(struct vcpu *v);
67 static void paravirt_ctxt_switch_to(struct vcpu *v);
69 static void vcpu_destroy_pagetables(struct vcpu *v);
71 static void continue_idle_domain(struct vcpu *v)
72 {
73 reset_stack_and_jump(idle_loop);
74 }
76 static void continue_nonidle_domain(struct vcpu *v)
77 {
78 reset_stack_and_jump(ret_from_intr);
79 }
81 static void default_idle(void)
82 {
83 local_irq_disable();
84 if ( !softirq_pending(smp_processor_id()) )
85 safe_halt();
86 else
87 local_irq_enable();
88 }
90 static void default_dead_idle(void)
91 {
92 for ( ; ; )
93 halt();
94 }
96 static void play_dead(void)
97 {
98 /*
99 * Flush pending softirqs if any. They can be queued up before this CPU
100 * was taken out of cpu_online_map in __cpu_disable().
101 */
102 do_softirq();
104 /* This must be done before dead CPU ack */
105 cpu_exit_clear();
106 hvm_cpu_down();
107 wbinvd();
108 mb();
109 /* Ack it */
110 __get_cpu_var(cpu_state) = CPU_DEAD;
112 /* With physical CPU hotplug, we should halt the cpu. */
113 local_irq_disable();
114 (*dead_idle)();
115 }
117 void idle_loop(void)
118 {
119 for ( ; ; )
120 {
121 if ( cpu_is_offline(smp_processor_id()) )
122 play_dead();
123 page_scrub_schedule_work();
124 (*pm_idle)();
125 do_softirq();
126 }
127 }
129 void startup_cpu_idle_loop(void)
130 {
131 struct vcpu *v = current;
133 ASSERT(is_idle_vcpu(v));
134 cpu_set(smp_processor_id(), v->domain->domain_dirty_cpumask);
135 cpu_set(smp_processor_id(), v->vcpu_dirty_cpumask);
137 reset_stack_and_jump(idle_loop);
138 }
140 void dump_pageframe_info(struct domain *d)
141 {
142 struct page_info *page;
144 printk("Memory pages belonging to domain %u:\n", d->domain_id);
146 if ( d->tot_pages >= 10 )
147 {
148 printk(" DomPage list too long to display\n");
149 }
150 else
151 {
152 page_list_for_each ( page, &d->page_list )
153 {
154 printk(" DomPage %p: caf=%08lx, taf=%" PRtype_info "\n",
155 _p(page_to_mfn(page)),
156 page->count_info, page->u.inuse.type_info);
157 }
158 }
160 if ( is_hvm_domain(d) )
161 {
162 p2m_pod_dump_data(d);
163 }
165 page_list_for_each ( page, &d->xenpage_list )
166 {
167 printk(" XenPage %p: caf=%08lx, taf=%" PRtype_info "\n",
168 _p(page_to_mfn(page)),
169 page->count_info, page->u.inuse.type_info);
170 }
171 }
173 struct domain *alloc_domain_struct(void)
174 {
175 struct domain *d;
176 /*
177 * We pack the MFN of the domain structure into a 32-bit field within
178 * the page_info structure. Hence the MEMF_bits() restriction.
179 */
180 d = alloc_xenheap_pages(
181 get_order_from_bytes(sizeof(*d)), MEMF_bits(32 + PAGE_SHIFT));
182 if ( d != NULL )
183 memset(d, 0, sizeof(*d));
184 return d;
185 }
187 void free_domain_struct(struct domain *d)
188 {
189 free_xenheap_pages(d, get_order_from_bytes(sizeof(*d)));
190 }
192 struct vcpu *alloc_vcpu_struct(void)
193 {
194 struct vcpu *v;
195 /*
196 * This structure contains embedded PAE PDPTEs, used when an HVM guest
197 * runs on shadow pagetables outside of 64-bit mode. In this case the CPU
198 * may require that the shadow CR3 points below 4GB, and hence the whole
199 * structure must satisfy this restriction. Thus we specify MEMF_bits(32).
200 */
201 v = alloc_xenheap_pages(get_order_from_bytes(sizeof(*v)), MEMF_bits(32));
202 if ( v != NULL )
203 memset(v, 0, sizeof(*v));
204 return v;
205 }
207 void free_vcpu_struct(struct vcpu *v)
208 {
209 free_xenheap_pages(v, get_order_from_bytes(sizeof(*v)));
210 }
212 #ifdef CONFIG_COMPAT
214 static int setup_compat_l4(struct vcpu *v)
215 {
216 struct page_info *pg;
217 l4_pgentry_t *l4tab;
219 pg = alloc_domheap_page(NULL, MEMF_node(vcpu_to_node(v)));
220 if ( pg == NULL )
221 return -ENOMEM;
223 /* This page needs to look like a pagetable so that it can be shadowed */
224 pg->u.inuse.type_info = PGT_l4_page_table|PGT_validated|1;
226 l4tab = page_to_virt(pg);
227 copy_page(l4tab, idle_pg_table);
228 l4tab[0] = l4e_empty();
229 l4tab[l4_table_offset(LINEAR_PT_VIRT_START)] =
230 l4e_from_page(pg, __PAGE_HYPERVISOR);
231 l4tab[l4_table_offset(PERDOMAIN_VIRT_START)] =
232 l4e_from_paddr(__pa(v->domain->arch.mm_perdomain_l3),
233 __PAGE_HYPERVISOR);
235 v->arch.guest_table = pagetable_from_page(pg);
236 v->arch.guest_table_user = v->arch.guest_table;
238 return 0;
239 }
241 static void release_compat_l4(struct vcpu *v)
242 {
243 free_domheap_page(pagetable_get_page(v->arch.guest_table));
244 v->arch.guest_table = pagetable_null();
245 v->arch.guest_table_user = pagetable_null();
246 }
248 static inline int may_switch_mode(struct domain *d)
249 {
250 return (!is_hvm_domain(d) && (d->tot_pages == 0));
251 }
253 int switch_native(struct domain *d)
254 {
255 unsigned int vcpuid;
257 if ( d == NULL )
258 return -EINVAL;
259 if ( !may_switch_mode(d) )
260 return -EACCES;
261 if ( !is_pv_32on64_domain(d) )
262 return 0;
264 d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
266 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
267 {
268 if (d->vcpu[vcpuid])
269 release_compat_l4(d->vcpu[vcpuid]);
270 }
272 return 0;
273 }
275 int switch_compat(struct domain *d)
276 {
277 unsigned int vcpuid;
279 if ( d == NULL )
280 return -EINVAL;
281 if ( !may_switch_mode(d) )
282 return -EACCES;
283 if ( is_pv_32on64_domain(d) )
284 return 0;
286 d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 1;
288 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
289 {
290 if ( (d->vcpu[vcpuid] != NULL) &&
291 (setup_compat_l4(d->vcpu[vcpuid]) != 0) )
292 goto undo_and_fail;
293 }
295 domain_set_alloc_bitsize(d);
297 return 0;
299 undo_and_fail:
300 d->arch.is_32bit_pv = d->arch.has_32bit_shinfo = 0;
301 while ( vcpuid-- != 0 )
302 {
303 if ( d->vcpu[vcpuid] != NULL )
304 release_compat_l4(d->vcpu[vcpuid]);
305 }
306 return -ENOMEM;
307 }
309 #else
310 #define setup_compat_l4(v) 0
311 #define release_compat_l4(v) ((void)0)
312 #endif
314 int vcpu_initialise(struct vcpu *v)
315 {
316 struct domain *d = v->domain;
317 int rc;
319 v->arch.vcpu_info_mfn = INVALID_MFN;
321 v->arch.flags = TF_kernel_mode;
323 #if defined(__i386__)
324 mapcache_vcpu_init(v);
325 #else
326 {
327 unsigned int idx = perdomain_pt_pgidx(v);
328 struct page_info *pg;
330 if ( !perdomain_pt_page(d, idx) )
331 {
332 pg = alloc_domheap_page(NULL, MEMF_node(vcpu_to_node(v)));
333 if ( !pg )
334 return -ENOMEM;
335 clear_page(page_to_virt(pg));
336 perdomain_pt_page(d, idx) = pg;
337 d->arch.mm_perdomain_l2[l2_table_offset(PERDOMAIN_VIRT_START)+idx]
338 = l2e_from_page(pg, __PAGE_HYPERVISOR);
339 }
340 }
341 #endif
343 pae_l3_cache_init(&v->arch.pae_l3_cache);
345 paging_vcpu_init(v);
347 if ( is_hvm_domain(d) )
348 {
349 if ( (rc = hvm_vcpu_initialise(v)) != 0 )
350 return rc;
351 }
352 else
353 {
354 /* PV guests by default have a 100Hz ticker. */
355 if ( !is_idle_domain(d) )
356 v->periodic_period = MILLISECS(10);
358 /* PV guests get an emulated PIT too for video BIOSes to use. */
359 if ( !is_idle_domain(d) && (v->vcpu_id == 0) )
360 pit_init(v, cpu_khz);
362 v->arch.schedule_tail = continue_nonidle_domain;
363 v->arch.ctxt_switch_from = paravirt_ctxt_switch_from;
364 v->arch.ctxt_switch_to = paravirt_ctxt_switch_to;
366 if ( is_idle_domain(d) )
367 {
368 v->arch.schedule_tail = continue_idle_domain;
369 v->arch.cr3 = __pa(idle_pg_table);
370 }
372 v->arch.guest_context.ctrlreg[4] =
373 real_cr4_to_pv_guest_cr4(mmu_cr4_features);
374 }
376 v->arch.perdomain_ptes = perdomain_ptes(d, v);
378 spin_lock_init(&v->arch.shadow_ldt_lock);
380 return (is_pv_32on64_vcpu(v) ? setup_compat_l4(v) : 0);
381 }
383 void vcpu_destroy(struct vcpu *v)
384 {
385 if ( is_pv_32on64_vcpu(v) )
386 release_compat_l4(v);
388 if ( is_hvm_vcpu(v) )
389 hvm_vcpu_destroy(v);
390 }
392 int arch_domain_create(struct domain *d, unsigned int domcr_flags)
393 {
394 #ifdef __x86_64__
395 struct page_info *pg;
396 #else
397 int pdpt_order;
398 #endif
399 int i, paging_initialised = 0;
400 int rc = -ENOMEM;
402 d->arch.hvm_domain.hap_enabled =
403 is_hvm_domain(d) &&
404 hvm_funcs.hap_supported &&
405 (domcr_flags & DOMCRF_hap);
407 d->arch.s3_integrity = !!(domcr_flags & DOMCRF_s3_integrity);
409 INIT_LIST_HEAD(&d->arch.pdev_list);
411 d->arch.relmem = RELMEM_not_started;
412 INIT_PAGE_LIST_HEAD(&d->arch.relmem_list);
414 #if defined(__i386__)
416 pdpt_order = get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t));
417 d->arch.mm_perdomain_pt = alloc_xenheap_pages(pdpt_order, 0);
418 if ( d->arch.mm_perdomain_pt == NULL )
419 goto fail;
420 memset(d->arch.mm_perdomain_pt, 0, PAGE_SIZE << pdpt_order);
422 mapcache_domain_init(d);
424 #else /* __x86_64__ */
426 d->arch.mm_perdomain_pt_pages = xmalloc_array(struct page_info *,
427 PDPT_L2_ENTRIES);
428 if ( !d->arch.mm_perdomain_pt_pages )
429 goto fail;
430 memset(d->arch.mm_perdomain_pt_pages, 0,
431 PDPT_L2_ENTRIES * sizeof(*d->arch.mm_perdomain_pt_pages));
433 pg = alloc_domheap_page(NULL, MEMF_node(domain_to_node(d)));
434 if ( pg == NULL )
435 goto fail;
436 d->arch.mm_perdomain_l2 = page_to_virt(pg);
437 clear_page(d->arch.mm_perdomain_l2);
439 pg = alloc_domheap_page(NULL, MEMF_node(domain_to_node(d)));
440 if ( pg == NULL )
441 goto fail;
442 d->arch.mm_perdomain_l3 = page_to_virt(pg);
443 clear_page(d->arch.mm_perdomain_l3);
444 d->arch.mm_perdomain_l3[l3_table_offset(PERDOMAIN_VIRT_START)] =
445 l3e_from_page(virt_to_page(d->arch.mm_perdomain_l2),
446 __PAGE_HYPERVISOR);
448 #endif /* __x86_64__ */
450 #ifdef CONFIG_COMPAT
451 HYPERVISOR_COMPAT_VIRT_START(d) = __HYPERVISOR_COMPAT_VIRT_START;
452 #endif
454 if ( (rc = paging_domain_init(d)) != 0 )
455 goto fail;
456 paging_initialised = 1;
458 if ( !is_idle_domain(d) )
459 {
460 d->arch.ioport_caps =
461 rangeset_new(d, "I/O Ports", RANGESETF_prettyprint_hex);
462 rc = -ENOMEM;
463 if ( d->arch.ioport_caps == NULL )
464 goto fail;
466 /*
467 * The shared_info machine address must fit in a 32-bit field within a
468 * 32-bit guest's start_info structure. Hence we specify MEMF_bits(32).
469 */
470 if ( (d->shared_info = alloc_xenheap_pages(0, MEMF_bits(32))) == NULL )
471 goto fail;
473 clear_page(d->shared_info);
474 share_xen_page_with_guest(
475 virt_to_page(d->shared_info), d, XENSHARE_writable);
477 d->arch.pirq_vector = xmalloc_array(s16, d->nr_pirqs);
478 if ( !d->arch.pirq_vector )
479 goto fail;
480 memset(d->arch.pirq_vector, 0,
481 d->nr_pirqs * sizeof(*d->arch.pirq_vector));
483 if ( (rc = iommu_domain_init(d)) != 0 )
484 goto fail;
486 /* For Guest vMCE MSRs virtualization */
487 if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
488 intel_mce_init_msr(d);
489 }
491 if ( is_hvm_domain(d) )
492 {
493 if ( (rc = hvm_domain_initialise(d)) != 0 )
494 {
495 iommu_domain_destroy(d);
496 goto fail;
497 }
498 }
499 else
500 {
501 /* 32-bit PV guest by default only if Xen is not 64-bit. */
502 d->arch.is_32bit_pv = d->arch.has_32bit_shinfo =
503 (CONFIG_PAGING_LEVELS != 4);
504 }
506 memset(d->arch.cpuids, 0, sizeof(d->arch.cpuids));
507 for ( i = 0; i < MAX_CPUID_INPUT; i++ )
508 {
509 d->arch.cpuids[i].input[0] = XEN_CPUID_INPUT_UNUSED;
510 d->arch.cpuids[i].input[1] = XEN_CPUID_INPUT_UNUSED;
511 }
513 return 0;
515 fail:
516 d->is_dying = DOMDYING_dead;
517 xfree(d->arch.pirq_vector);
518 free_xenheap_page(d->shared_info);
519 if ( paging_initialised )
520 paging_final_teardown(d);
521 #ifdef __x86_64__
522 if ( d->arch.mm_perdomain_l2 )
523 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
524 if ( d->arch.mm_perdomain_l3 )
525 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
526 xfree(d->arch.mm_perdomain_pt_pages);
527 #else
528 free_xenheap_pages(d->arch.mm_perdomain_pt, pdpt_order);
529 #endif
530 return rc;
531 }
533 void arch_domain_destroy(struct domain *d)
534 {
535 #ifdef __x86_64__
536 unsigned int i;
537 #endif
539 if ( is_hvm_domain(d) )
540 hvm_domain_destroy(d);
542 pci_release_devices(d);
543 free_domain_pirqs(d);
544 if ( !is_idle_domain(d) )
545 iommu_domain_destroy(d);
547 paging_final_teardown(d);
549 #ifdef __i386__
550 free_xenheap_pages(
551 d->arch.mm_perdomain_pt,
552 get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t)));
553 #else
554 for ( i = 0; i < PDPT_L2_ENTRIES; ++i )
555 {
556 if ( perdomain_pt_page(d, i) )
557 free_domheap_page(perdomain_pt_page(d, i));
558 }
559 xfree(d->arch.mm_perdomain_pt_pages);
560 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
561 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
562 #endif
564 free_xenheap_page(d->shared_info);
565 xfree(d->arch.pirq_vector);
566 }
568 unsigned long pv_guest_cr4_fixup(unsigned long guest_cr4)
569 {
570 unsigned long hv_cr4_mask, hv_cr4 = real_cr4_to_pv_guest_cr4(read_cr4());
572 hv_cr4_mask = ~X86_CR4_TSD;
573 if ( cpu_has_de )
574 hv_cr4_mask &= ~X86_CR4_DE;
576 if ( (guest_cr4 & hv_cr4_mask) != (hv_cr4 & hv_cr4_mask) )
577 gdprintk(XENLOG_WARNING,
578 "Attempt to change CR4 flags %08lx -> %08lx\n",
579 hv_cr4, guest_cr4);
581 return (hv_cr4 & hv_cr4_mask) | (guest_cr4 & ~hv_cr4_mask);
582 }
584 /* This is called by arch_final_setup_guest and do_boot_vcpu */
585 int arch_set_info_guest(
586 struct vcpu *v, vcpu_guest_context_u c)
587 {
588 struct domain *d = v->domain;
589 unsigned long cr3_pfn = INVALID_MFN;
590 unsigned long flags, cr4;
591 int i, rc = 0, compat;
593 /* The context is a compat-mode one if the target domain is compat-mode;
594 * we expect the tools to DTRT even in compat-mode callers. */
595 compat = is_pv_32on64_domain(d);
597 #ifdef CONFIG_COMPAT
598 #define c(fld) (compat ? (c.cmp->fld) : (c.nat->fld))
599 #else
600 #define c(fld) (c.nat->fld)
601 #endif
602 flags = c(flags);
604 if ( !is_hvm_vcpu(v) )
605 {
606 if ( !compat )
607 {
608 fixup_guest_stack_selector(d, c.nat->user_regs.ss);
609 fixup_guest_stack_selector(d, c.nat->kernel_ss);
610 fixup_guest_code_selector(d, c.nat->user_regs.cs);
611 #ifdef __i386__
612 fixup_guest_code_selector(d, c.nat->event_callback_cs);
613 fixup_guest_code_selector(d, c.nat->failsafe_callback_cs);
614 #endif
616 for ( i = 0; i < 256; i++ )
617 fixup_guest_code_selector(d, c.nat->trap_ctxt[i].cs);
619 /* LDT safety checks. */
620 if ( ((c.nat->ldt_base & (PAGE_SIZE-1)) != 0) ||
621 (c.nat->ldt_ents > 8192) ||
622 !array_access_ok(c.nat->ldt_base,
623 c.nat->ldt_ents,
624 LDT_ENTRY_SIZE) )
625 return -EINVAL;
626 }
627 #ifdef CONFIG_COMPAT
628 else
629 {
630 fixup_guest_stack_selector(d, c.cmp->user_regs.ss);
631 fixup_guest_stack_selector(d, c.cmp->kernel_ss);
632 fixup_guest_code_selector(d, c.cmp->user_regs.cs);
633 fixup_guest_code_selector(d, c.cmp->event_callback_cs);
634 fixup_guest_code_selector(d, c.cmp->failsafe_callback_cs);
636 for ( i = 0; i < 256; i++ )
637 fixup_guest_code_selector(d, c.cmp->trap_ctxt[i].cs);
639 /* LDT safety checks. */
640 if ( ((c.cmp->ldt_base & (PAGE_SIZE-1)) != 0) ||
641 (c.cmp->ldt_ents > 8192) ||
642 !compat_array_access_ok(c.cmp->ldt_base,
643 c.cmp->ldt_ents,
644 LDT_ENTRY_SIZE) )
645 return -EINVAL;
646 }
647 #endif
648 }
650 v->fpu_initialised = !!(flags & VGCF_I387_VALID);
652 v->arch.flags &= ~TF_kernel_mode;
653 if ( (flags & VGCF_in_kernel) || is_hvm_vcpu(v)/*???*/ )
654 v->arch.flags |= TF_kernel_mode;
656 if ( !compat )
657 memcpy(&v->arch.guest_context, c.nat, sizeof(*c.nat));
658 #ifdef CONFIG_COMPAT
659 else
660 XLAT_vcpu_guest_context(&v->arch.guest_context, c.cmp);
661 #endif
663 v->arch.guest_context.user_regs.eflags |= 2;
665 if ( is_hvm_vcpu(v) )
666 {
667 hvm_set_info_guest(v);
668 goto out;
669 }
671 /* Only CR0.TS is modifiable by guest or admin. */
672 v->arch.guest_context.ctrlreg[0] &= X86_CR0_TS;
673 v->arch.guest_context.ctrlreg[0] |= read_cr0() & ~X86_CR0_TS;
675 init_int80_direct_trap(v);
677 /* IOPL privileges are virtualised. */
678 v->arch.iopl = (v->arch.guest_context.user_regs.eflags >> 12) & 3;
679 v->arch.guest_context.user_regs.eflags &= ~EF_IOPL;
681 /* Ensure real hardware interrupts are enabled. */
682 v->arch.guest_context.user_regs.eflags |= EF_IE;
684 cr4 = v->arch.guest_context.ctrlreg[4];
685 v->arch.guest_context.ctrlreg[4] = cr4 ? pv_guest_cr4_fixup(cr4) :
686 real_cr4_to_pv_guest_cr4(mmu_cr4_features);
688 memset(v->arch.guest_context.debugreg, 0,
689 sizeof(v->arch.guest_context.debugreg));
690 for ( i = 0; i < 8; i++ )
691 (void)set_debugreg(v, i, c(debugreg[i]));
693 if ( v->is_initialised )
694 goto out;
696 if ( v->vcpu_id == 0 )
697 d->vm_assist = c(vm_assist);
699 if ( !compat )
700 rc = (int)set_gdt(v, c.nat->gdt_frames, c.nat->gdt_ents);
701 #ifdef CONFIG_COMPAT
702 else
703 {
704 unsigned long gdt_frames[ARRAY_SIZE(c.cmp->gdt_frames)];
705 unsigned int i, n = (c.cmp->gdt_ents + 511) / 512;
707 if ( n > ARRAY_SIZE(c.cmp->gdt_frames) )
708 return -EINVAL;
709 for ( i = 0; i < n; ++i )
710 gdt_frames[i] = c.cmp->gdt_frames[i];
711 rc = (int)set_gdt(v, gdt_frames, c.cmp->gdt_ents);
712 }
713 #endif
714 if ( rc != 0 )
715 return rc;
717 if ( !compat )
718 {
719 cr3_pfn = gmfn_to_mfn(d, xen_cr3_to_pfn(c.nat->ctrlreg[3]));
721 if ( !mfn_valid(cr3_pfn) ||
722 (paging_mode_refcounts(d)
723 ? !get_page(mfn_to_page(cr3_pfn), d)
724 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
725 PGT_base_page_table)) )
726 {
727 destroy_gdt(v);
728 return -EINVAL;
729 }
731 v->arch.guest_table = pagetable_from_pfn(cr3_pfn);
733 #ifdef __x86_64__
734 if ( c.nat->ctrlreg[1] )
735 {
736 cr3_pfn = gmfn_to_mfn(d, xen_cr3_to_pfn(c.nat->ctrlreg[1]));
738 if ( !mfn_valid(cr3_pfn) ||
739 (paging_mode_refcounts(d)
740 ? !get_page(mfn_to_page(cr3_pfn), d)
741 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
742 PGT_base_page_table)) )
743 {
744 cr3_pfn = pagetable_get_pfn(v->arch.guest_table);
745 v->arch.guest_table = pagetable_null();
746 if ( paging_mode_refcounts(d) )
747 put_page(mfn_to_page(cr3_pfn));
748 else
749 put_page_and_type(mfn_to_page(cr3_pfn));
750 destroy_gdt(v);
751 return -EINVAL;
752 }
754 v->arch.guest_table_user = pagetable_from_pfn(cr3_pfn);
755 }
756 #endif
757 }
758 #ifdef CONFIG_COMPAT
759 else
760 {
761 l4_pgentry_t *l4tab;
763 cr3_pfn = gmfn_to_mfn(d, compat_cr3_to_pfn(c.cmp->ctrlreg[3]));
765 if ( !mfn_valid(cr3_pfn) ||
766 (paging_mode_refcounts(d)
767 ? !get_page(mfn_to_page(cr3_pfn), d)
768 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
769 PGT_l3_page_table)) )
770 {
771 destroy_gdt(v);
772 return -EINVAL;
773 }
775 l4tab = __va(pagetable_get_paddr(v->arch.guest_table));
776 *l4tab = l4e_from_pfn(
777 cr3_pfn, _PAGE_PRESENT|_PAGE_RW|_PAGE_USER|_PAGE_ACCESSED);
778 }
779 #endif
781 if ( v->vcpu_id == 0 )
782 update_domain_wallclock_time(d);
784 /* Don't redo final setup */
785 v->is_initialised = 1;
787 if ( paging_mode_enabled(d) )
788 paging_update_paging_modes(v);
790 update_cr3(v);
792 out:
793 if ( flags & VGCF_online )
794 clear_bit(_VPF_down, &v->pause_flags);
795 else
796 set_bit(_VPF_down, &v->pause_flags);
797 return 0;
798 #undef c
799 }
801 void arch_vcpu_reset(struct vcpu *v)
802 {
803 if ( !is_hvm_vcpu(v) )
804 {
805 destroy_gdt(v);
806 vcpu_destroy_pagetables(v);
807 }
808 else
809 {
810 vcpu_end_shutdown_deferral(v);
811 }
812 }
814 /*
815 * Unmap the vcpu info page if the guest decided to place it somewhere
816 * else. This is only used from arch_domain_destroy, so there's no
817 * need to do anything clever.
818 */
819 static void
820 unmap_vcpu_info(struct vcpu *v)
821 {
822 struct domain *d = v->domain;
823 unsigned long mfn;
825 if ( v->arch.vcpu_info_mfn == INVALID_MFN )
826 return;
828 mfn = v->arch.vcpu_info_mfn;
829 unmap_domain_page_global(v->vcpu_info);
831 v->vcpu_info = (void *)&shared_info(d, vcpu_info[v->vcpu_id]);
832 v->arch.vcpu_info_mfn = INVALID_MFN;
834 put_page_and_type(mfn_to_page(mfn));
835 }
837 /*
838 * Map a guest page in and point the vcpu_info pointer at it. This
839 * makes sure that the vcpu_info is always pointing at a valid piece
840 * of memory, and it sets a pending event to make sure that a pending
841 * event doesn't get missed.
842 */
843 static int
844 map_vcpu_info(struct vcpu *v, unsigned long mfn, unsigned offset)
845 {
846 struct domain *d = v->domain;
847 void *mapping;
848 vcpu_info_t *new_info;
849 int i;
851 if ( offset > (PAGE_SIZE - sizeof(vcpu_info_t)) )
852 return -EINVAL;
854 if ( v->arch.vcpu_info_mfn != INVALID_MFN )
855 return -EINVAL;
857 /* Run this command on yourself or on other offline VCPUS. */
858 if ( (v != current) && !test_bit(_VPF_down, &v->pause_flags) )
859 return -EINVAL;
861 mfn = gmfn_to_mfn(d, mfn);
862 if ( !mfn_valid(mfn) ||
863 !get_page_and_type(mfn_to_page(mfn), d, PGT_writable_page) )
864 return -EINVAL;
866 mapping = map_domain_page_global(mfn);
867 if ( mapping == NULL )
868 {
869 put_page_and_type(mfn_to_page(mfn));
870 return -ENOMEM;
871 }
873 new_info = (vcpu_info_t *)(mapping + offset);
875 memcpy(new_info, v->vcpu_info, sizeof(*new_info));
877 v->vcpu_info = new_info;
878 v->arch.vcpu_info_mfn = mfn;
880 /* Set new vcpu_info pointer /before/ setting pending flags. */
881 wmb();
883 /*
884 * Mark everything as being pending just to make sure nothing gets
885 * lost. The domain will get a spurious event, but it can cope.
886 */
887 vcpu_info(v, evtchn_upcall_pending) = 1;
888 for ( i = 0; i < BITS_PER_EVTCHN_WORD(d); i++ )
889 set_bit(i, &vcpu_info(v, evtchn_pending_sel));
891 return 0;
892 }
894 long
895 arch_do_vcpu_op(
896 int cmd, struct vcpu *v, XEN_GUEST_HANDLE(void) arg)
897 {
898 long rc = 0;
900 switch ( cmd )
901 {
902 case VCPUOP_register_runstate_memory_area:
903 {
904 struct vcpu_register_runstate_memory_area area;
905 struct vcpu_runstate_info runstate;
907 rc = -EFAULT;
908 if ( copy_from_guest(&area, arg, 1) )
909 break;
911 if ( !guest_handle_okay(area.addr.h, 1) )
912 break;
914 rc = 0;
915 runstate_guest(v) = area.addr.h;
917 if ( v == current )
918 {
919 __copy_to_guest(runstate_guest(v), &v->runstate, 1);
920 }
921 else
922 {
923 vcpu_runstate_get(v, &runstate);
924 __copy_to_guest(runstate_guest(v), &runstate, 1);
925 }
927 break;
928 }
930 case VCPUOP_register_vcpu_info:
931 {
932 struct domain *d = v->domain;
933 struct vcpu_register_vcpu_info info;
935 rc = -EFAULT;
936 if ( copy_from_guest(&info, arg, 1) )
937 break;
939 domain_lock(d);
940 rc = map_vcpu_info(v, info.mfn, info.offset);
941 domain_unlock(d);
943 break;
944 }
946 case VCPUOP_get_physid:
947 {
948 struct vcpu_get_physid cpu_id;
950 rc = -EINVAL;
951 if ( !v->domain->is_pinned )
952 break;
954 cpu_id.phys_id =
955 (uint64_t)x86_cpu_to_apicid[v->vcpu_id] |
956 ((uint64_t)acpi_get_processor_id(v->vcpu_id) << 32);
958 rc = -EFAULT;
959 if ( copy_to_guest(arg, &cpu_id, 1) )
960 break;
962 rc = 0;
963 break;
964 }
966 default:
967 rc = -ENOSYS;
968 break;
969 }
971 return rc;
972 }
974 #ifdef __x86_64__
976 #define loadsegment(seg,value) ({ \
977 int __r = 1; \
978 asm volatile ( \
979 "1: movl %k1,%%" #seg "\n2:\n" \
980 ".section .fixup,\"ax\"\n" \
981 "3: xorl %k0,%k0\n" \
982 " movl %k0,%%" #seg "\n" \
983 " jmp 2b\n" \
984 ".previous\n" \
985 ".section __ex_table,\"a\"\n" \
986 " .align 8\n" \
987 " .quad 1b,3b\n" \
988 ".previous" \
989 : "=r" (__r) : "r" (value), "0" (__r) );\
990 __r; })
992 /*
993 * save_segments() writes a mask of segments which are dirty (non-zero),
994 * allowing load_segments() to avoid some expensive segment loads and
995 * MSR writes.
996 */
997 static DEFINE_PER_CPU(unsigned int, dirty_segment_mask);
998 #define DIRTY_DS 0x01
999 #define DIRTY_ES 0x02
1000 #define DIRTY_FS 0x04
1001 #define DIRTY_GS 0x08
1002 #define DIRTY_FS_BASE 0x10
1003 #define DIRTY_GS_BASE_USER 0x20
1005 static void load_segments(struct vcpu *n)
1007 struct vcpu_guest_context *nctxt = &n->arch.guest_context;
1008 int all_segs_okay = 1;
1009 unsigned int dirty_segment_mask, cpu = smp_processor_id();
1011 /* Load and clear the dirty segment mask. */
1012 dirty_segment_mask = per_cpu(dirty_segment_mask, cpu);
1013 per_cpu(dirty_segment_mask, cpu) = 0;
1015 /* Either selector != 0 ==> reload. */
1016 if ( unlikely((dirty_segment_mask & DIRTY_DS) | nctxt->user_regs.ds) )
1017 all_segs_okay &= loadsegment(ds, nctxt->user_regs.ds);
1019 /* Either selector != 0 ==> reload. */
1020 if ( unlikely((dirty_segment_mask & DIRTY_ES) | nctxt->user_regs.es) )
1021 all_segs_okay &= loadsegment(es, nctxt->user_regs.es);
1023 /*
1024 * Either selector != 0 ==> reload.
1025 * Also reload to reset FS_BASE if it was non-zero.
1026 */
1027 if ( unlikely((dirty_segment_mask & (DIRTY_FS | DIRTY_FS_BASE)) |
1028 nctxt->user_regs.fs) )
1029 all_segs_okay &= loadsegment(fs, nctxt->user_regs.fs);
1031 /*
1032 * Either selector != 0 ==> reload.
1033 * Also reload to reset GS_BASE if it was non-zero.
1034 */
1035 if ( unlikely((dirty_segment_mask & (DIRTY_GS | DIRTY_GS_BASE_USER)) |
1036 nctxt->user_regs.gs) )
1038 /* Reset GS_BASE with user %gs? */
1039 if ( (dirty_segment_mask & DIRTY_GS) || !nctxt->gs_base_user )
1040 all_segs_okay &= loadsegment(gs, nctxt->user_regs.gs);
1043 if ( !is_pv_32on64_domain(n->domain) )
1045 /* This can only be non-zero if selector is NULL. */
1046 if ( nctxt->fs_base )
1047 wrmsr(MSR_FS_BASE,
1048 nctxt->fs_base,
1049 nctxt->fs_base>>32);
1051 /* Most kernels have non-zero GS base, so don't bother testing. */
1052 /* (This is also a serialising instruction, avoiding AMD erratum #88.) */
1053 wrmsr(MSR_SHADOW_GS_BASE,
1054 nctxt->gs_base_kernel,
1055 nctxt->gs_base_kernel>>32);
1057 /* This can only be non-zero if selector is NULL. */
1058 if ( nctxt->gs_base_user )
1059 wrmsr(MSR_GS_BASE,
1060 nctxt->gs_base_user,
1061 nctxt->gs_base_user>>32);
1063 /* If in kernel mode then switch the GS bases around. */
1064 if ( (n->arch.flags & TF_kernel_mode) )
1065 asm volatile ( "swapgs" );
1068 if ( unlikely(!all_segs_okay) )
1070 struct cpu_user_regs *regs = guest_cpu_user_regs();
1071 unsigned long *rsp =
1072 (n->arch.flags & TF_kernel_mode) ?
1073 (unsigned long *)regs->rsp :
1074 (unsigned long *)nctxt->kernel_sp;
1075 unsigned long cs_and_mask, rflags;
1077 if ( is_pv_32on64_domain(n->domain) )
1079 unsigned int *esp = ring_1(regs) ?
1080 (unsigned int *)regs->rsp :
1081 (unsigned int *)nctxt->kernel_sp;
1082 unsigned int cs_and_mask, eflags;
1083 int ret = 0;
1085 /* CS longword also contains full evtchn_upcall_mask. */
1086 cs_and_mask = (unsigned short)regs->cs |
1087 ((unsigned int)vcpu_info(n, evtchn_upcall_mask) << 16);
1088 /* Fold upcall mask into RFLAGS.IF. */
1089 eflags = regs->_eflags & ~X86_EFLAGS_IF;
1090 eflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
1092 if ( !ring_1(regs) )
1094 ret = put_user(regs->ss, esp-1);
1095 ret |= put_user(regs->_esp, esp-2);
1096 esp -= 2;
1099 if ( ret |
1100 put_user(eflags, esp-1) |
1101 put_user(cs_and_mask, esp-2) |
1102 put_user(regs->_eip, esp-3) |
1103 put_user(nctxt->user_regs.gs, esp-4) |
1104 put_user(nctxt->user_regs.fs, esp-5) |
1105 put_user(nctxt->user_regs.es, esp-6) |
1106 put_user(nctxt->user_regs.ds, esp-7) )
1108 gdprintk(XENLOG_ERR, "Error while creating compat "
1109 "failsafe callback frame.\n");
1110 domain_crash(n->domain);
1113 if ( test_bit(_VGCF_failsafe_disables_events,
1114 &n->arch.guest_context.flags) )
1115 vcpu_info(n, evtchn_upcall_mask) = 1;
1117 regs->entry_vector = TRAP_syscall;
1118 regs->_eflags &= 0xFFFCBEFFUL;
1119 regs->ss = FLAT_COMPAT_KERNEL_SS;
1120 regs->_esp = (unsigned long)(esp-7);
1121 regs->cs = FLAT_COMPAT_KERNEL_CS;
1122 regs->_eip = nctxt->failsafe_callback_eip;
1123 return;
1126 if ( !(n->arch.flags & TF_kernel_mode) )
1127 toggle_guest_mode(n);
1128 else
1129 regs->cs &= ~3;
1131 /* CS longword also contains full evtchn_upcall_mask. */
1132 cs_and_mask = (unsigned long)regs->cs |
1133 ((unsigned long)vcpu_info(n, evtchn_upcall_mask) << 32);
1135 /* Fold upcall mask into RFLAGS.IF. */
1136 rflags = regs->rflags & ~X86_EFLAGS_IF;
1137 rflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
1139 if ( put_user(regs->ss, rsp- 1) |
1140 put_user(regs->rsp, rsp- 2) |
1141 put_user(rflags, rsp- 3) |
1142 put_user(cs_and_mask, rsp- 4) |
1143 put_user(regs->rip, rsp- 5) |
1144 put_user(nctxt->user_regs.gs, rsp- 6) |
1145 put_user(nctxt->user_regs.fs, rsp- 7) |
1146 put_user(nctxt->user_regs.es, rsp- 8) |
1147 put_user(nctxt->user_regs.ds, rsp- 9) |
1148 put_user(regs->r11, rsp-10) |
1149 put_user(regs->rcx, rsp-11) )
1151 gdprintk(XENLOG_ERR, "Error while creating failsafe "
1152 "callback frame.\n");
1153 domain_crash(n->domain);
1156 if ( test_bit(_VGCF_failsafe_disables_events,
1157 &n->arch.guest_context.flags) )
1158 vcpu_info(n, evtchn_upcall_mask) = 1;
1160 regs->entry_vector = TRAP_syscall;
1161 regs->rflags &= ~(X86_EFLAGS_AC|X86_EFLAGS_VM|X86_EFLAGS_RF|
1162 X86_EFLAGS_NT|X86_EFLAGS_TF);
1163 regs->ss = FLAT_KERNEL_SS;
1164 regs->rsp = (unsigned long)(rsp-11);
1165 regs->cs = FLAT_KERNEL_CS;
1166 regs->rip = nctxt->failsafe_callback_eip;
1170 static void save_segments(struct vcpu *v)
1172 struct vcpu_guest_context *ctxt = &v->arch.guest_context;
1173 struct cpu_user_regs *regs = &ctxt->user_regs;
1174 unsigned int dirty_segment_mask = 0;
1176 regs->ds = read_segment_register(ds);
1177 regs->es = read_segment_register(es);
1178 regs->fs = read_segment_register(fs);
1179 regs->gs = read_segment_register(gs);
1181 if ( regs->ds )
1182 dirty_segment_mask |= DIRTY_DS;
1184 if ( regs->es )
1185 dirty_segment_mask |= DIRTY_ES;
1187 if ( regs->fs || is_pv_32on64_domain(v->domain) )
1189 dirty_segment_mask |= DIRTY_FS;
1190 ctxt->fs_base = 0; /* != 0 selector kills fs_base */
1192 else if ( ctxt->fs_base )
1194 dirty_segment_mask |= DIRTY_FS_BASE;
1197 if ( regs->gs || is_pv_32on64_domain(v->domain) )
1199 dirty_segment_mask |= DIRTY_GS;
1200 ctxt->gs_base_user = 0; /* != 0 selector kills gs_base_user */
1202 else if ( ctxt->gs_base_user )
1204 dirty_segment_mask |= DIRTY_GS_BASE_USER;
1207 this_cpu(dirty_segment_mask) = dirty_segment_mask;
1210 #define switch_kernel_stack(v) ((void)0)
1212 #elif defined(__i386__)
1214 #define load_segments(n) ((void)0)
1215 #define save_segments(p) ((void)0)
1217 static inline void switch_kernel_stack(struct vcpu *v)
1219 struct tss_struct *tss = &init_tss[smp_processor_id()];
1220 tss->esp1 = v->arch.guest_context.kernel_sp;
1221 tss->ss1 = v->arch.guest_context.kernel_ss;
1224 #endif /* __i386__ */
1226 static void paravirt_ctxt_switch_from(struct vcpu *v)
1228 save_segments(v);
1230 /*
1231 * Disable debug breakpoints. We do this aggressively because if we switch
1232 * to an HVM guest we may load DR0-DR3 with values that can cause #DE
1233 * inside Xen, before we get a chance to reload DR7, and this cannot always
1234 * safely be handled.
1235 */
1236 if ( unlikely(v->arch.guest_context.debugreg[7] & DR7_ACTIVE_MASK) )
1237 write_debugreg(7, 0);
1240 static void paravirt_ctxt_switch_to(struct vcpu *v)
1242 unsigned long cr4;
1244 set_int80_direct_trap(v);
1245 switch_kernel_stack(v);
1247 cr4 = pv_guest_cr4_to_real_cr4(v->arch.guest_context.ctrlreg[4]);
1248 if ( unlikely(cr4 != read_cr4()) )
1249 write_cr4(cr4);
1251 if ( unlikely(v->arch.guest_context.debugreg[7] & DR7_ACTIVE_MASK) )
1253 write_debugreg(0, v->arch.guest_context.debugreg[0]);
1254 write_debugreg(1, v->arch.guest_context.debugreg[1]);
1255 write_debugreg(2, v->arch.guest_context.debugreg[2]);
1256 write_debugreg(3, v->arch.guest_context.debugreg[3]);
1257 write_debugreg(6, v->arch.guest_context.debugreg[6]);
1258 write_debugreg(7, v->arch.guest_context.debugreg[7]);
1262 static inline int need_full_gdt(struct vcpu *v)
1264 return (!is_hvm_vcpu(v) && !is_idle_vcpu(v));
1267 static void __context_switch(void)
1269 struct cpu_user_regs *stack_regs = guest_cpu_user_regs();
1270 unsigned int cpu = smp_processor_id();
1271 struct vcpu *p = per_cpu(curr_vcpu, cpu);
1272 struct vcpu *n = current;
1273 struct desc_struct *gdt;
1274 struct desc_ptr gdt_desc;
1276 ASSERT(p != n);
1277 ASSERT(cpus_empty(n->vcpu_dirty_cpumask));
1279 if ( !is_idle_vcpu(p) )
1281 memcpy(&p->arch.guest_context.user_regs,
1282 stack_regs,
1283 CTXT_SWITCH_STACK_BYTES);
1284 unlazy_fpu(p);
1285 p->arch.ctxt_switch_from(p);
1288 if ( !is_idle_vcpu(n) )
1290 memcpy(stack_regs,
1291 &n->arch.guest_context.user_regs,
1292 CTXT_SWITCH_STACK_BYTES);
1293 n->arch.ctxt_switch_to(n);
1296 if ( p->domain != n->domain )
1297 cpu_set(cpu, n->domain->domain_dirty_cpumask);
1298 cpu_set(cpu, n->vcpu_dirty_cpumask);
1300 gdt = !is_pv_32on64_vcpu(n) ? per_cpu(gdt_table, cpu) :
1301 per_cpu(compat_gdt_table, cpu);
1302 if ( need_full_gdt(n) )
1304 struct page_info *page = virt_to_page(gdt);
1305 unsigned int i;
1306 for ( i = 0; i < NR_RESERVED_GDT_PAGES; i++ )
1307 l1e_write(n->arch.perdomain_ptes +
1308 FIRST_RESERVED_GDT_PAGE + i,
1309 l1e_from_page(page + i, __PAGE_HYPERVISOR));
1312 if ( need_full_gdt(p) &&
1313 ((p->vcpu_id != n->vcpu_id) || !need_full_gdt(n)) )
1315 gdt_desc.limit = LAST_RESERVED_GDT_BYTE;
1316 gdt_desc.base = (unsigned long)(gdt - FIRST_RESERVED_GDT_ENTRY);
1317 asm volatile ( "lgdt %0" : : "m" (gdt_desc) );
1320 write_ptbase(n);
1322 if ( need_full_gdt(n) &&
1323 ((p->vcpu_id != n->vcpu_id) || !need_full_gdt(p)) )
1325 gdt_desc.limit = LAST_RESERVED_GDT_BYTE;
1326 gdt_desc.base = GDT_VIRT_START(n);
1327 asm volatile ( "lgdt %0" : : "m" (gdt_desc) );
1330 if ( p->domain != n->domain )
1331 cpu_clear(cpu, p->domain->domain_dirty_cpumask);
1332 cpu_clear(cpu, p->vcpu_dirty_cpumask);
1334 per_cpu(curr_vcpu, cpu) = n;
1338 void context_switch(struct vcpu *prev, struct vcpu *next)
1340 unsigned int cpu = smp_processor_id();
1341 cpumask_t dirty_mask = next->vcpu_dirty_cpumask;
1343 ASSERT(local_irq_is_enabled());
1345 /* Allow at most one CPU at a time to be dirty. */
1346 ASSERT(cpus_weight(dirty_mask) <= 1);
1347 if ( unlikely(!cpu_isset(cpu, dirty_mask) && !cpus_empty(dirty_mask)) )
1349 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1350 flush_tlb_mask(&dirty_mask);
1353 if ( is_hvm_vcpu(prev) && !list_empty(&prev->arch.hvm_vcpu.tm_list) )
1354 pt_save_timer(prev);
1356 local_irq_disable();
1358 set_current(next);
1360 if ( (per_cpu(curr_vcpu, cpu) == next) || is_idle_vcpu(next) )
1362 local_irq_enable();
1364 else
1366 __context_switch();
1368 #ifdef CONFIG_COMPAT
1369 if ( !is_hvm_vcpu(next) &&
1370 (is_idle_vcpu(prev) ||
1371 is_hvm_vcpu(prev) ||
1372 is_pv_32on64_vcpu(prev) != is_pv_32on64_vcpu(next)) )
1374 uint64_t efer = read_efer();
1375 if ( !(efer & EFER_SCE) )
1376 write_efer(efer | EFER_SCE);
1378 #endif
1380 /* Re-enable interrupts before restoring state which may fault. */
1381 local_irq_enable();
1383 if ( !is_hvm_vcpu(next) )
1385 load_LDT(next);
1386 load_segments(next);
1390 context_saved(prev);
1392 /* Update per-VCPU guest runstate shared memory area (if registered). */
1393 if ( !guest_handle_is_null(runstate_guest(next)) )
1395 if ( !is_pv_32on64_domain(next->domain) )
1396 __copy_to_guest(runstate_guest(next), &next->runstate, 1);
1397 #ifdef CONFIG_COMPAT
1398 else
1400 struct compat_vcpu_runstate_info info;
1402 XLAT_vcpu_runstate_info(&info, &next->runstate);
1403 __copy_to_guest(next->runstate_guest.compat, &info, 1);
1405 #endif
1408 schedule_tail(next);
1409 BUG();
1412 void continue_running(struct vcpu *same)
1414 schedule_tail(same);
1415 BUG();
1418 int __sync_lazy_execstate(void)
1420 unsigned long flags;
1421 int switch_required;
1423 local_irq_save(flags);
1425 switch_required = (this_cpu(curr_vcpu) != current);
1427 if ( switch_required )
1429 ASSERT(current == idle_vcpu[smp_processor_id()]);
1430 __context_switch();
1433 local_irq_restore(flags);
1435 return switch_required;
1438 void sync_vcpu_execstate(struct vcpu *v)
1440 if ( cpu_isset(smp_processor_id(), v->vcpu_dirty_cpumask) )
1441 (void)__sync_lazy_execstate();
1443 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1444 flush_tlb_mask(&v->vcpu_dirty_cpumask);
1447 struct migrate_info {
1448 long (*func)(void *data);
1449 void *data;
1450 void (*saved_schedule_tail)(struct vcpu *);
1451 cpumask_t saved_affinity;
1452 unsigned int nest;
1453 };
1455 static void continue_hypercall_on_cpu_helper(struct vcpu *v)
1457 struct cpu_user_regs *regs = guest_cpu_user_regs();
1458 struct migrate_info *info = v->arch.continue_info;
1459 cpumask_t mask = info->saved_affinity;
1460 void (*saved_schedule_tail)(struct vcpu *) = info->saved_schedule_tail;
1462 regs->eax = info->func(info->data);
1464 if ( info->nest-- == 0 )
1466 xfree(info);
1467 v->arch.schedule_tail = saved_schedule_tail;
1468 v->arch.continue_info = NULL;
1469 vcpu_unlock_affinity(v, &mask);
1472 (*saved_schedule_tail)(v);
1475 int continue_hypercall_on_cpu(int cpu, long (*func)(void *data), void *data)
1477 struct vcpu *v = current;
1478 struct migrate_info *info;
1479 cpumask_t mask = cpumask_of_cpu(cpu);
1480 int rc;
1482 if ( cpu == smp_processor_id() )
1483 return func(data);
1485 info = v->arch.continue_info;
1486 if ( info == NULL )
1488 info = xmalloc(struct migrate_info);
1489 if ( info == NULL )
1490 return -ENOMEM;
1492 rc = vcpu_lock_affinity(v, &mask);
1493 if ( rc )
1495 xfree(info);
1496 return rc;
1499 info->saved_schedule_tail = v->arch.schedule_tail;
1500 info->saved_affinity = mask;
1501 info->nest = 0;
1503 v->arch.schedule_tail = continue_hypercall_on_cpu_helper;
1504 v->arch.continue_info = info;
1506 else
1508 BUG_ON(info->nest != 0);
1509 rc = vcpu_locked_change_affinity(v, &mask);
1510 if ( rc )
1511 return rc;
1512 info->nest++;
1515 info->func = func;
1516 info->data = data;
1518 /* Dummy return value will be overwritten by new schedule_tail. */
1519 BUG_ON(!test_bit(SCHEDULE_SOFTIRQ, &softirq_pending(smp_processor_id())));
1520 return 0;
1523 #define next_arg(fmt, args) ({ \
1524 unsigned long __arg; \
1525 switch ( *(fmt)++ ) \
1526 { \
1527 case 'i': __arg = (unsigned long)va_arg(args, unsigned int); break; \
1528 case 'l': __arg = (unsigned long)va_arg(args, unsigned long); break; \
1529 case 'h': __arg = (unsigned long)va_arg(args, void *); break; \
1530 default: __arg = 0; BUG(); \
1531 } \
1532 __arg; \
1533 })
1535 DEFINE_PER_CPU(char, hc_preempted);
1537 unsigned long hypercall_create_continuation(
1538 unsigned int op, const char *format, ...)
1540 struct mc_state *mcs = &this_cpu(mc_state);
1541 struct cpu_user_regs *regs;
1542 const char *p = format;
1543 unsigned long arg;
1544 unsigned int i;
1545 va_list args;
1547 va_start(args, format);
1549 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1551 __set_bit(_MCSF_call_preempted, &mcs->flags);
1553 for ( i = 0; *p != '\0'; i++ )
1554 mcs->call.args[i] = next_arg(p, args);
1555 if ( is_pv_32on64_domain(current->domain) )
1557 for ( ; i < 6; i++ )
1558 mcs->call.args[i] = 0;
1561 else
1563 regs = guest_cpu_user_regs();
1564 regs->eax = op;
1565 /*
1566 * For PV guest, we update EIP to re-execute 'syscall' / 'int 0x82';
1567 * HVM does not need this since 'vmcall' / 'vmmcall' is fault-like.
1568 */
1569 if ( !is_hvm_vcpu(current) )
1570 regs->eip -= 2; /* re-execute 'syscall' / 'int 0x82' */
1572 #ifdef __x86_64__
1573 if ( !is_hvm_vcpu(current) ?
1574 !is_pv_32on64_vcpu(current) :
1575 (hvm_guest_x86_mode(current) == 8) )
1577 for ( i = 0; *p != '\0'; i++ )
1579 arg = next_arg(p, args);
1580 switch ( i )
1582 case 0: regs->rdi = arg; break;
1583 case 1: regs->rsi = arg; break;
1584 case 2: regs->rdx = arg; break;
1585 case 3: regs->r10 = arg; break;
1586 case 4: regs->r8 = arg; break;
1587 case 5: regs->r9 = arg; break;
1591 else
1592 #endif
1594 if ( supervisor_mode_kernel )
1595 regs->eip &= ~31; /* re-execute entire hypercall entry stub */
1597 for ( i = 0; *p != '\0'; i++ )
1599 arg = next_arg(p, args);
1600 switch ( i )
1602 case 0: regs->ebx = arg; break;
1603 case 1: regs->ecx = arg; break;
1604 case 2: regs->edx = arg; break;
1605 case 3: regs->esi = arg; break;
1606 case 4: regs->edi = arg; break;
1607 case 5: regs->ebp = arg; break;
1612 this_cpu(hc_preempted) = 1;
1615 va_end(args);
1617 return op;
1620 #ifdef CONFIG_COMPAT
1621 int hypercall_xlat_continuation(unsigned int *id, unsigned int mask, ...)
1623 int rc = 0;
1624 struct mc_state *mcs = &this_cpu(mc_state);
1625 struct cpu_user_regs *regs;
1626 unsigned int i, cval = 0;
1627 unsigned long nval = 0;
1628 va_list args;
1630 BUG_ON(*id > 5);
1631 BUG_ON(mask & (1U << *id));
1633 va_start(args, mask);
1635 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1637 if ( !test_bit(_MCSF_call_preempted, &mcs->flags) )
1638 return 0;
1639 for ( i = 0; i < 6; ++i, mask >>= 1 )
1641 if ( mask & 1 )
1643 nval = va_arg(args, unsigned long);
1644 cval = va_arg(args, unsigned int);
1645 if ( cval == nval )
1646 mask &= ~1U;
1647 else
1648 BUG_ON(nval == (unsigned int)nval);
1650 else if ( id && *id == i )
1652 *id = mcs->call.args[i];
1653 id = NULL;
1655 if ( (mask & 1) && mcs->call.args[i] == nval )
1657 mcs->call.args[i] = cval;
1658 ++rc;
1660 else
1661 BUG_ON(mcs->call.args[i] != (unsigned int)mcs->call.args[i]);
1664 else
1666 regs = guest_cpu_user_regs();
1667 for ( i = 0; i < 6; ++i, mask >>= 1 )
1669 unsigned long *reg;
1671 switch ( i )
1673 case 0: reg = &regs->ebx; break;
1674 case 1: reg = &regs->ecx; break;
1675 case 2: reg = &regs->edx; break;
1676 case 3: reg = &regs->esi; break;
1677 case 4: reg = &regs->edi; break;
1678 case 5: reg = &regs->ebp; break;
1679 default: BUG(); reg = NULL; break;
1681 if ( (mask & 1) )
1683 nval = va_arg(args, unsigned long);
1684 cval = va_arg(args, unsigned int);
1685 if ( cval == nval )
1686 mask &= ~1U;
1687 else
1688 BUG_ON(nval == (unsigned int)nval);
1690 else if ( id && *id == i )
1692 *id = *reg;
1693 id = NULL;
1695 if ( (mask & 1) && *reg == nval )
1697 *reg = cval;
1698 ++rc;
1700 else
1701 BUG_ON(*reg != (unsigned int)*reg);
1705 va_end(args);
1707 return rc;
1709 #endif
1711 static int relinquish_memory(
1712 struct domain *d, struct page_list_head *list, unsigned long type)
1714 struct page_info *page;
1715 unsigned long x, y;
1716 int ret = 0;
1718 /* Use a recursive lock, as we may enter 'free_domheap_page'. */
1719 spin_lock_recursive(&d->page_alloc_lock);
1721 while ( (page = page_list_remove_head(list)) )
1723 /* Grab a reference to the page so it won't disappear from under us. */
1724 if ( unlikely(!get_page(page, d)) )
1726 /* Couldn't get a reference -- someone is freeing this page. */
1727 page_list_add_tail(page, &d->arch.relmem_list);
1728 continue;
1731 if ( test_and_clear_bit(_PGT_pinned, &page->u.inuse.type_info) )
1732 ret = put_page_and_type_preemptible(page, 1);
1733 switch ( ret )
1735 case 0:
1736 break;
1737 case -EAGAIN:
1738 case -EINTR:
1739 page_list_add(page, list);
1740 set_bit(_PGT_pinned, &page->u.inuse.type_info);
1741 put_page(page);
1742 goto out;
1743 default:
1744 BUG();
1747 if ( test_and_clear_bit(_PGC_allocated, &page->count_info) )
1748 put_page(page);
1750 /*
1751 * Forcibly invalidate top-most, still valid page tables at this point
1752 * to break circular 'linear page table' references as well as clean up
1753 * partially validated pages. This is okay because MMU structures are
1754 * not shared across domains and this domain is now dead. Thus top-most
1755 * valid tables are not in use so a non-zero count means circular
1756 * reference or partially validated.
1757 */
1758 y = page->u.inuse.type_info;
1759 for ( ; ; )
1761 x = y;
1762 if ( likely((x & PGT_type_mask) != type) ||
1763 likely(!(x & (PGT_validated|PGT_partial))) )
1764 break;
1766 y = cmpxchg(&page->u.inuse.type_info, x,
1767 x & ~(PGT_validated|PGT_partial));
1768 if ( likely(y == x) )
1770 /* No need for atomic update of type_info here: noone else updates it. */
1771 switch ( ret = free_page_type(page, x, 1) )
1773 case 0:
1774 break;
1775 case -EINTR:
1776 page_list_add(page, list);
1777 page->u.inuse.type_info |= PGT_validated;
1778 if ( x & PGT_partial )
1779 put_page(page);
1780 put_page(page);
1781 ret = -EAGAIN;
1782 goto out;
1783 case -EAGAIN:
1784 page_list_add(page, list);
1785 page->u.inuse.type_info |= PGT_partial;
1786 if ( x & PGT_partial )
1787 put_page(page);
1788 goto out;
1789 default:
1790 BUG();
1792 if ( x & PGT_partial )
1794 page->u.inuse.type_info--;
1795 put_page(page);
1797 break;
1801 /* Put the page on the list and /then/ potentially free it. */
1802 page_list_add_tail(page, &d->arch.relmem_list);
1803 put_page(page);
1805 if ( hypercall_preempt_check() )
1807 ret = -EAGAIN;
1808 goto out;
1812 /* list is empty at this point. */
1813 if ( !page_list_empty(&d->arch.relmem_list) )
1815 *list = d->arch.relmem_list;
1816 INIT_PAGE_LIST_HEAD(&d->arch.relmem_list);
1819 out:
1820 spin_unlock_recursive(&d->page_alloc_lock);
1821 return ret;
1824 static void vcpu_destroy_pagetables(struct vcpu *v)
1826 struct domain *d = v->domain;
1827 unsigned long pfn;
1829 #ifdef __x86_64__
1830 if ( is_pv_32on64_vcpu(v) )
1832 pfn = l4e_get_pfn(*(l4_pgentry_t *)
1833 __va(pagetable_get_paddr(v->arch.guest_table)));
1835 if ( pfn != 0 )
1837 if ( paging_mode_refcounts(d) )
1838 put_page(mfn_to_page(pfn));
1839 else
1840 put_page_and_type(mfn_to_page(pfn));
1843 l4e_write(
1844 (l4_pgentry_t *)__va(pagetable_get_paddr(v->arch.guest_table)),
1845 l4e_empty());
1847 v->arch.cr3 = 0;
1848 return;
1850 #endif
1852 pfn = pagetable_get_pfn(v->arch.guest_table);
1853 if ( pfn != 0 )
1855 if ( paging_mode_refcounts(d) )
1856 put_page(mfn_to_page(pfn));
1857 else
1858 put_page_and_type(mfn_to_page(pfn));
1859 v->arch.guest_table = pagetable_null();
1862 #ifdef __x86_64__
1863 /* Drop ref to guest_table_user (from MMUEXT_NEW_USER_BASEPTR) */
1864 pfn = pagetable_get_pfn(v->arch.guest_table_user);
1865 if ( pfn != 0 )
1867 if ( !is_pv_32bit_vcpu(v) )
1869 if ( paging_mode_refcounts(d) )
1870 put_page(mfn_to_page(pfn));
1871 else
1872 put_page_and_type(mfn_to_page(pfn));
1874 v->arch.guest_table_user = pagetable_null();
1876 #endif
1878 v->arch.cr3 = 0;
1881 int domain_relinquish_resources(struct domain *d)
1883 int ret;
1884 struct vcpu *v;
1886 BUG_ON(!cpus_empty(d->domain_dirty_cpumask));
1888 switch ( d->arch.relmem )
1890 case RELMEM_not_started:
1891 /* Tear down paging-assistance stuff. */
1892 paging_teardown(d);
1894 for_each_vcpu ( d, v )
1896 /* Drop the in-use references to page-table bases. */
1897 vcpu_destroy_pagetables(v);
1899 /*
1900 * Relinquish GDT mappings. No need for explicit unmapping of the
1901 * LDT as it automatically gets squashed with the guest mappings.
1902 */
1903 destroy_gdt(v);
1905 unmap_vcpu_info(v);
1908 if ( d->arch.pirq_eoi_map != NULL )
1910 unmap_domain_page_global(d->arch.pirq_eoi_map);
1911 put_page_and_type(mfn_to_page(d->arch.pirq_eoi_map_mfn));
1912 d->arch.pirq_eoi_map = NULL;
1915 d->arch.relmem = RELMEM_xen;
1916 /* fallthrough */
1918 /* Relinquish every page of memory. */
1919 case RELMEM_xen:
1920 ret = relinquish_memory(d, &d->xenpage_list, ~0UL);
1921 if ( ret )
1922 return ret;
1923 #if CONFIG_PAGING_LEVELS >= 4
1924 d->arch.relmem = RELMEM_l4;
1925 /* fallthrough */
1927 case RELMEM_l4:
1928 ret = relinquish_memory(d, &d->page_list, PGT_l4_page_table);
1929 if ( ret )
1930 return ret;
1931 #endif
1932 #if CONFIG_PAGING_LEVELS >= 3
1933 d->arch.relmem = RELMEM_l3;
1934 /* fallthrough */
1936 case RELMEM_l3:
1937 ret = relinquish_memory(d, &d->page_list, PGT_l3_page_table);
1938 if ( ret )
1939 return ret;
1940 #endif
1941 d->arch.relmem = RELMEM_l2;
1942 /* fallthrough */
1944 case RELMEM_l2:
1945 ret = relinquish_memory(d, &d->page_list, PGT_l2_page_table);
1946 if ( ret )
1947 return ret;
1948 d->arch.relmem = RELMEM_done;
1949 /* fallthrough */
1951 case RELMEM_done:
1952 break;
1954 default:
1955 BUG();
1958 if ( is_hvm_domain(d) )
1959 hvm_domain_relinquish_resources(d);
1961 return 0;
1964 void arch_dump_domain_info(struct domain *d)
1966 paging_dump_domain_info(d);
1969 void arch_dump_vcpu_info(struct vcpu *v)
1971 paging_dump_vcpu_info(v);
1974 void domain_cpuid(
1975 struct domain *d,
1976 unsigned int input,
1977 unsigned int sub_input,
1978 unsigned int *eax,
1979 unsigned int *ebx,
1980 unsigned int *ecx,
1981 unsigned int *edx)
1983 cpuid_input_t *cpuid;
1984 int i;
1986 for ( i = 0; i < MAX_CPUID_INPUT; i++ )
1988 cpuid = &d->arch.cpuids[i];
1990 if ( (cpuid->input[0] == input) &&
1991 ((cpuid->input[1] == XEN_CPUID_INPUT_UNUSED) ||
1992 (cpuid->input[1] == sub_input)) )
1994 *eax = cpuid->eax;
1995 *ebx = cpuid->ebx;
1996 *ecx = cpuid->ecx;
1997 *edx = cpuid->edx;
1998 return;
2002 *eax = *ebx = *ecx = *edx = 0;
2005 void vcpu_kick(struct vcpu *v)
2007 /*
2008 * NB1. 'pause_flags' and 'processor' must be checked /after/ update of
2009 * pending flag. These values may fluctuate (after all, we hold no
2010 * locks) but the key insight is that each change will cause
2011 * evtchn_upcall_pending to be polled.
2013 * NB2. We save the running flag across the unblock to avoid a needless
2014 * IPI for domains that we IPI'd to unblock.
2015 */
2016 bool_t running = v->is_running;
2017 vcpu_unblock(v);
2018 if ( running && (in_irq() || (v != current)) )
2019 cpu_raise_softirq(v->processor, VCPU_KICK_SOFTIRQ);
2022 void vcpu_mark_events_pending(struct vcpu *v)
2024 int already_pending = test_and_set_bit(
2025 0, (unsigned long *)&vcpu_info(v, evtchn_upcall_pending));
2027 if ( already_pending )
2028 return;
2030 if ( is_hvm_vcpu(v) )
2031 hvm_assert_evtchn_irq(v);
2032 else
2033 vcpu_kick(v);
2036 static void vcpu_kick_softirq(void)
2038 /*
2039 * Nothing to do here: we merely prevent notifiers from racing with checks
2040 * executed on return to guest context with interrupts enabled. See, for
2041 * example, xxx_intr_assist() executed on return to HVM guest context.
2042 */
2045 static int __init init_vcpu_kick_softirq(void)
2047 open_softirq(VCPU_KICK_SOFTIRQ, vcpu_kick_softirq);
2048 return 0;
2050 __initcall(init_vcpu_kick_softirq);
2053 /*
2054 * Local variables:
2055 * mode: C
2056 * c-set-style: "BSD"
2057 * c-basic-offset: 4
2058 * tab-width: 4
2059 * indent-tabs-mode: nil
2060 * End:
2061 */