ia64/xen-unstable

view tools/ioemu/vl.h @ 15841:c5f735271e22

[IA64] Foreign p2m: Fix vti domain builder.

It should set arch_domain::convmem_end.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Alex Williamson <alex.williamson@hp.com>
date Thu Sep 06 13:48:43 2007 -0600 (2007-09-06)
parents 3805cc382dbe
children acfa9290746f
line source
1 /*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24 #ifndef VL_H
25 #define VL_H
27 /* we put basic includes here to avoid repeating them in device drivers */
28 #include <stdlib.h>
29 #include <stdio.h>
30 #include <stdarg.h>
31 #include <string.h>
32 #include <inttypes.h>
33 #include <limits.h>
34 #include <time.h>
35 #include <ctype.h>
36 #include <errno.h>
37 #include <unistd.h>
38 #include <fcntl.h>
39 #include <sys/stat.h>
40 #include "xenctrl.h"
41 #include "xs.h"
43 #ifndef O_LARGEFILE
44 #define O_LARGEFILE 0
45 #endif
46 #ifndef O_BINARY
47 #define O_BINARY 0
48 #endif
50 #ifndef ENOMEDIUM
51 #define ENOMEDIUM ENODEV
52 #endif
54 #ifdef _WIN32
55 #include <windows.h>
56 #define fsync _commit
57 #define lseek _lseeki64
58 #define ENOTSUP 4096
59 extern int qemu_ftruncate64(int, int64_t);
60 #define ftruncate qemu_ftruncate64
63 static inline char *realpath(const char *path, char *resolved_path)
64 {
65 _fullpath(resolved_path, path, _MAX_PATH);
66 return resolved_path;
67 }
69 #define PRId64 "I64d"
70 #define PRIx64 "I64x"
71 #define PRIu64 "I64u"
72 #define PRIo64 "I64o"
73 #endif
75 #ifdef QEMU_TOOL
77 /* we use QEMU_TOOL in the command line tools which do not depend on
78 the target CPU type */
79 #include "config-host.h"
80 #include <setjmp.h>
81 #include "osdep.h"
82 #include "bswap.h"
84 #else
86 #include "audio/audio.h"
87 #include "cpu.h"
89 #endif /* !defined(QEMU_TOOL) */
91 #ifndef glue
92 #define xglue(x, y) x ## y
93 #define glue(x, y) xglue(x, y)
94 #define stringify(s) tostring(s)
95 #define tostring(s) #s
96 #endif
98 #ifndef MIN
99 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
100 #endif
101 #ifndef MAX
102 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
103 #endif
105 /* cutils.c */
106 void pstrcpy(char *buf, int buf_size, const char *str);
107 char *pstrcat(char *buf, int buf_size, const char *s);
108 int strstart(const char *str, const char *val, const char **ptr);
109 int stristart(const char *str, const char *val, const char **ptr);
111 /* vl.c */
112 uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
114 void hw_error(const char *fmt, ...);
116 extern const char *bios_dir;
118 extern int vm_running;
120 typedef struct vm_change_state_entry VMChangeStateEntry;
121 typedef void VMChangeStateHandler(void *opaque, int running);
122 typedef void VMStopHandler(void *opaque, int reason);
124 VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
125 void *opaque);
126 void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
128 int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
129 void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
131 void vm_start(void);
132 void vm_stop(int reason);
134 typedef void QEMUResetHandler(void *opaque);
136 void qemu_register_reset(QEMUResetHandler *func, void *opaque);
137 void qemu_system_reset_request(void);
138 void qemu_system_reset(void);
139 void qemu_system_shutdown_request(void);
140 void qemu_system_powerdown_request(void);
141 #if !defined(TARGET_SPARC)
142 // Please implement a power failure function to signal the OS
143 #define qemu_system_powerdown() do{}while(0)
144 #else
145 void qemu_system_powerdown(void);
146 #endif
148 extern int reset_requested;
150 void main_loop_wait(int timeout);
152 int unset_mm_mapping(int xc_handle, uint32_t domid, unsigned long nr_pages,
153 unsigned int address_bits, unsigned long *extent_start);
154 int set_mm_mapping(int xc_handle, uint32_t domid, unsigned long nr_pages,
155 unsigned int address_bits, unsigned long *extent_start);
157 extern void *shared_vram;
159 extern FILE *logfile;
162 #if defined(__i386__) || defined(__x86_64__)
163 #define MAPCACHE
164 uint8_t *qemu_map_cache(target_phys_addr_t phys_addr);
165 void qemu_invalidate_map_cache(void);
166 #else
167 #define qemu_invalidate_map_cache() ((void)0)
168 #endif
170 #define mapcache_lock() ((void)0)
171 #define mapcache_unlock() ((void)0)
173 extern int xc_handle;
174 extern int domid;
176 extern uint64_t ram_size;
177 extern int bios_size;
178 extern int rtc_utc;
179 extern int cirrus_vga_enabled;
180 extern int graphic_width;
181 extern int graphic_height;
182 extern int graphic_depth;
183 extern const char *keyboard_layout;
184 extern int kqemu_allowed;
185 extern int win2k_install_hack;
186 extern int usb_enabled;
187 extern int acpi_enabled;
188 extern int smp_cpus;
189 extern int no_quit;
190 extern int semihosting_enabled;
191 extern int autostart;
193 #define MAX_OPTION_ROMS 16
194 extern const char *option_rom[MAX_OPTION_ROMS];
195 extern int nb_option_roms;
197 /* XXX: make it dynamic */
198 #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
199 #define BIOS_SIZE ((512 + 32) * 1024)
200 #elif defined(TARGET_MIPS)
201 #define BIOS_SIZE (4 * 1024 * 1024)
202 #else
203 #define BIOS_SIZE ((256 + 64) * 1024)
204 #endif
206 /* keyboard/mouse support */
208 #define MOUSE_EVENT_LBUTTON 0x01
209 #define MOUSE_EVENT_RBUTTON 0x02
210 #define MOUSE_EVENT_MBUTTON 0x04
212 typedef void QEMUPutKBDEvent(void *opaque, int keycode);
213 typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
215 typedef struct QEMUPutMouseEntry {
216 QEMUPutMouseEvent *qemu_put_mouse_event;
217 void *qemu_put_mouse_event_opaque;
218 int qemu_put_mouse_event_absolute;
219 char *qemu_put_mouse_event_name;
221 /* used internally by qemu for handling mice */
222 struct QEMUPutMouseEntry *next;
223 } QEMUPutMouseEntry;
225 void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
226 QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
227 void *opaque, int absolute,
228 const char *name);
229 void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
231 void kbd_put_keycode(int keycode);
232 void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
233 int kbd_mouse_is_absolute(void);
235 void do_info_mice(void);
236 void do_mouse_set(int index);
238 /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
239 constants) */
240 #define QEMU_KEY_ESC1(c) ((c) | 0xe100)
241 #define QEMU_KEY_BACKSPACE 0x007f
242 #define QEMU_KEY_UP QEMU_KEY_ESC1('A')
243 #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
244 #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
245 #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
246 #define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
247 #define QEMU_KEY_END QEMU_KEY_ESC1(4)
248 #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
249 #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
250 #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
252 #define QEMU_KEY_CTRL_UP 0xe400
253 #define QEMU_KEY_CTRL_DOWN 0xe401
254 #define QEMU_KEY_CTRL_LEFT 0xe402
255 #define QEMU_KEY_CTRL_RIGHT 0xe403
256 #define QEMU_KEY_CTRL_HOME 0xe404
257 #define QEMU_KEY_CTRL_END 0xe405
258 #define QEMU_KEY_CTRL_PAGEUP 0xe406
259 #define QEMU_KEY_CTRL_PAGEDOWN 0xe407
261 void kbd_put_keysym(int keysym);
263 /* async I/O support */
265 typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
266 typedef int IOCanRWHandler(void *opaque);
267 typedef void IOHandler(void *opaque);
269 int qemu_set_fd_handler2(int fd,
270 IOCanRWHandler *fd_read_poll,
271 IOHandler *fd_read,
272 IOHandler *fd_write,
273 void *opaque);
274 int qemu_set_fd_handler(int fd,
275 IOHandler *fd_read,
276 IOHandler *fd_write,
277 void *opaque);
279 /* Polling handling */
281 /* return TRUE if no sleep should be done afterwards */
282 typedef int PollingFunc(void *opaque);
284 int qemu_add_polling_cb(PollingFunc *func, void *opaque);
285 void qemu_del_polling_cb(PollingFunc *func, void *opaque);
287 #ifdef _WIN32
288 /* Wait objects handling */
289 typedef void WaitObjectFunc(void *opaque);
291 int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
292 void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
293 #endif
295 typedef struct QEMUBH QEMUBH;
297 /* character device */
299 #define CHR_EVENT_BREAK 0 /* serial break char */
300 #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
301 #define CHR_EVENT_RESET 2 /* new connection established */
304 #define CHR_IOCTL_SERIAL_SET_PARAMS 1
305 typedef struct {
306 int speed;
307 int parity;
308 int data_bits;
309 int stop_bits;
310 } QEMUSerialSetParams;
312 #define CHR_IOCTL_SERIAL_SET_BREAK 2
314 #define CHR_IOCTL_PP_READ_DATA 3
315 #define CHR_IOCTL_PP_WRITE_DATA 4
316 #define CHR_IOCTL_PP_READ_CONTROL 5
317 #define CHR_IOCTL_PP_WRITE_CONTROL 6
318 #define CHR_IOCTL_PP_READ_STATUS 7
320 typedef void IOEventHandler(void *opaque, int event);
322 typedef struct CharDriverState {
323 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
324 void (*chr_update_read_handler)(struct CharDriverState *s);
325 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
326 IOEventHandler *chr_event;
327 IOCanRWHandler *chr_can_read;
328 IOReadHandler *chr_read;
329 void *handler_opaque;
330 void (*chr_send_event)(struct CharDriverState *chr, int event);
331 void (*chr_close)(struct CharDriverState *chr);
332 void *opaque;
333 QEMUBH *bh;
334 } CharDriverState;
336 CharDriverState *qemu_chr_open(const char *filename);
337 void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
338 int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
339 void qemu_chr_send_event(CharDriverState *s, int event);
340 void qemu_chr_add_handlers(CharDriverState *s,
341 IOCanRWHandler *fd_can_read,
342 IOReadHandler *fd_read,
343 IOEventHandler *fd_event,
344 void *opaque);
345 int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
346 void qemu_chr_reset(CharDriverState *s);
347 int qemu_chr_can_read(CharDriverState *s);
348 void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
350 /* consoles */
352 typedef struct DisplayState DisplayState;
353 typedef struct TextConsole TextConsole;
355 typedef void (*vga_hw_update_ptr)(void *);
356 typedef void (*vga_hw_invalidate_ptr)(void *);
357 typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
359 TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
360 vga_hw_invalidate_ptr invalidate,
361 vga_hw_screen_dump_ptr screen_dump,
362 void *opaque);
363 void vga_hw_update(void);
364 void vga_hw_invalidate(void);
365 void vga_hw_screen_dump(const char *filename);
367 int is_graphic_console(void);
368 CharDriverState *text_console_init(DisplayState *ds);
369 void console_select(unsigned int index);
370 void set_color_table(DisplayState *ds);
372 /* serial ports */
374 #define MAX_SERIAL_PORTS 4
376 extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
378 /* parallel ports */
380 #define MAX_PARALLEL_PORTS 3
382 extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
384 /* VLANs support */
386 typedef struct VLANClientState VLANClientState;
388 struct VLANClientState {
389 IOReadHandler *fd_read;
390 /* Packets may still be sent if this returns zero. It's used to
391 rate-limit the slirp code. */
392 IOCanRWHandler *fd_can_read;
393 void *opaque;
394 struct VLANClientState *next;
395 struct VLANState *vlan;
396 char info_str[256];
397 };
399 typedef struct VLANState {
400 int id;
401 VLANClientState *first_client;
402 struct VLANState *next;
403 } VLANState;
405 VLANState *qemu_find_vlan(int id);
406 VLANClientState *qemu_new_vlan_client(VLANState *vlan,
407 IOReadHandler *fd_read,
408 IOCanRWHandler *fd_can_read,
409 void *opaque);
410 int qemu_can_send_packet(VLANClientState *vc);
411 void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
412 void qemu_handler_true(void *opaque);
414 void do_info_network(void);
416 /* TAP win32 */
417 int tap_win32_init(VLANState *vlan, const char *ifname);
419 /* NIC info */
421 #define MAX_NICS 8
423 typedef struct NICInfo {
424 uint8_t macaddr[6];
425 const char *model;
426 VLANState *vlan;
427 } NICInfo;
429 extern int nb_nics;
430 extern NICInfo nd_table[MAX_NICS];
432 /* timers */
434 typedef struct QEMUClock QEMUClock;
435 typedef struct QEMUTimer QEMUTimer;
436 typedef void QEMUTimerCB(void *opaque);
438 /* The real time clock should be used only for stuff which does not
439 change the virtual machine state, as it is run even if the virtual
440 machine is stopped. The real time clock has a frequency of 1000
441 Hz. */
442 extern QEMUClock *rt_clock;
444 /* The virtual clock is only run during the emulation. It is stopped
445 when the virtual machine is stopped. Virtual timers use a high
446 precision clock, usually cpu cycles (use ticks_per_sec). */
447 extern QEMUClock *vm_clock;
449 int64_t qemu_get_clock(QEMUClock *clock);
451 QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
452 void qemu_free_timer(QEMUTimer *ts);
453 void qemu_del_timer(QEMUTimer *ts);
454 void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
455 void qemu_advance_timer(QEMUTimer *ts, int64_t expire_time);
456 int qemu_timer_pending(QEMUTimer *ts);
458 extern int64_t ticks_per_sec;
459 extern int pit_min_timer_count;
461 int64_t cpu_get_ticks(void);
462 void cpu_enable_ticks(void);
463 void cpu_disable_ticks(void);
465 /* VM Load/Save */
467 typedef struct QEMUFile QEMUFile;
469 QEMUFile *qemu_fopen(const char *filename, const char *mode);
470 void qemu_fflush(QEMUFile *f);
471 void qemu_fclose(QEMUFile *f);
472 void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
473 void qemu_put_byte(QEMUFile *f, int v);
474 void qemu_put_be16(QEMUFile *f, unsigned int v);
475 void qemu_put_be32(QEMUFile *f, unsigned int v);
476 void qemu_put_be64(QEMUFile *f, uint64_t v);
477 int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
478 int qemu_get_byte(QEMUFile *f);
479 unsigned int qemu_get_be16(QEMUFile *f);
480 unsigned int qemu_get_be32(QEMUFile *f);
481 uint64_t qemu_get_be64(QEMUFile *f);
483 static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
484 {
485 qemu_put_be64(f, *pv);
486 }
488 static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
489 {
490 qemu_put_be32(f, *pv);
491 }
493 static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
494 {
495 qemu_put_be16(f, *pv);
496 }
498 static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
499 {
500 qemu_put_byte(f, *pv);
501 }
503 static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
504 {
505 *pv = qemu_get_be64(f);
506 }
508 static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
509 {
510 *pv = qemu_get_be32(f);
511 }
513 static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
514 {
515 *pv = qemu_get_be16(f);
516 }
518 static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
519 {
520 *pv = qemu_get_byte(f);
521 }
523 #if TARGET_LONG_BITS == 64
524 #define qemu_put_betl qemu_put_be64
525 #define qemu_get_betl qemu_get_be64
526 #define qemu_put_betls qemu_put_be64s
527 #define qemu_get_betls qemu_get_be64s
528 #else
529 #define qemu_put_betl qemu_put_be32
530 #define qemu_get_betl qemu_get_be32
531 #define qemu_put_betls qemu_put_be32s
532 #define qemu_get_betls qemu_get_be32s
533 #endif
535 int64_t qemu_ftell(QEMUFile *f);
536 int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
538 typedef void SaveStateHandler(QEMUFile *f, void *opaque);
539 typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
541 int register_savevm(const char *idstr,
542 int instance_id,
543 int version_id,
544 SaveStateHandler *save_state,
545 LoadStateHandler *load_state,
546 void *opaque);
547 void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
548 void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
550 void cpu_save(QEMUFile *f, void *opaque);
551 int cpu_load(QEMUFile *f, void *opaque, int version_id);
553 void do_savevm(const char *name);
554 void do_loadvm(const char *name);
555 void do_delvm(const char *name);
556 void do_info_snapshots(void);
558 /* bottom halves */
559 typedef void QEMUBHFunc(void *opaque);
561 QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
562 void qemu_bh_schedule(QEMUBH *bh);
563 void qemu_bh_cancel(QEMUBH *bh);
564 void qemu_bh_delete(QEMUBH *bh);
565 int qemu_bh_poll(void);
567 /* block.c */
568 typedef struct BlockDriverState BlockDriverState;
569 typedef struct BlockDriver BlockDriver;
571 extern BlockDriver bdrv_raw;
572 extern BlockDriver bdrv_host_device;
573 extern BlockDriver bdrv_cow;
574 extern BlockDriver bdrv_qcow;
575 extern BlockDriver bdrv_vmdk;
576 extern BlockDriver bdrv_cloop;
577 extern BlockDriver bdrv_dmg;
578 extern BlockDriver bdrv_bochs;
579 extern BlockDriver bdrv_vpc;
580 extern BlockDriver bdrv_vvfat;
581 extern BlockDriver bdrv_qcow2;
583 typedef struct BlockDriverInfo {
584 /* in bytes, 0 if irrelevant */
585 int cluster_size;
586 /* offset at which the VM state can be saved (0 if not possible) */
587 int64_t vm_state_offset;
588 } BlockDriverInfo;
590 typedef struct QEMUSnapshotInfo {
591 char id_str[128]; /* unique snapshot id */
592 /* the following fields are informative. They are not needed for
593 the consistency of the snapshot */
594 char name[256]; /* user choosen name */
595 uint32_t vm_state_size; /* VM state info size */
596 uint32_t date_sec; /* UTC date of the snapshot */
597 uint32_t date_nsec;
598 uint64_t vm_clock_nsec; /* VM clock relative to boot */
599 } QEMUSnapshotInfo;
601 #define BDRV_O_RDONLY 0x0000
602 #define BDRV_O_RDWR 0x0002
603 #define BDRV_O_ACCESS 0x0003
604 #define BDRV_O_CREAT 0x0004 /* create an empty file */
605 #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
606 #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
607 use a disk image format on top of
608 it (default for
609 bdrv_file_open()) */
611 void bdrv_init(void);
612 BlockDriver *bdrv_find_format(const char *format_name);
613 int bdrv_create(BlockDriver *drv,
614 const char *filename, int64_t size_in_sectors,
615 const char *backing_file, int flags);
616 BlockDriverState *bdrv_new(const char *device_name);
617 void bdrv_delete(BlockDriverState *bs);
618 int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
619 int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
620 int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
621 BlockDriver *drv);
622 void bdrv_close(BlockDriverState *bs);
623 int bdrv_read(BlockDriverState *bs, int64_t sector_num,
624 uint8_t *buf, int nb_sectors);
625 int bdrv_write(BlockDriverState *bs, int64_t sector_num,
626 const uint8_t *buf, int nb_sectors);
627 int bdrv_pread(BlockDriverState *bs, int64_t offset,
628 void *buf, int count);
629 int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
630 const void *buf, int count);
631 int bdrv_truncate(BlockDriverState *bs, int64_t offset);
632 int64_t bdrv_getlength(BlockDriverState *bs);
633 void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
634 int bdrv_commit(BlockDriverState *bs);
635 void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
636 /* async block I/O */
637 typedef struct BlockDriverAIOCB BlockDriverAIOCB;
638 typedef void BlockDriverCompletionFunc(void *opaque, int ret);
640 BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
641 uint8_t *buf, int nb_sectors,
642 BlockDriverCompletionFunc *cb, void *opaque);
643 BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
644 const uint8_t *buf, int nb_sectors,
645 BlockDriverCompletionFunc *cb, void *opaque);
646 void bdrv_aio_cancel(BlockDriverAIOCB *acb);
648 void qemu_aio_init(void);
649 void qemu_aio_poll(void);
650 void qemu_aio_flush(void);
651 void qemu_aio_wait_start(void);
652 void qemu_aio_wait(void);
653 void qemu_aio_wait_end(void);
655 /* Ensure contents are flushed to disk. */
656 void bdrv_flush(BlockDriverState *bs);
658 #define BDRV_TYPE_HD 0
659 #define BDRV_TYPE_CDROM 1
660 #define BDRV_TYPE_FLOPPY 2
661 #define BIOS_ATA_TRANSLATION_AUTO 0
662 #define BIOS_ATA_TRANSLATION_NONE 1
663 #define BIOS_ATA_TRANSLATION_LBA 2
664 #define BIOS_ATA_TRANSLATION_LARGE 3
665 #define BIOS_ATA_TRANSLATION_RECHS 4
667 void bdrv_set_geometry_hint(BlockDriverState *bs,
668 int cyls, int heads, int secs);
669 void bdrv_set_type_hint(BlockDriverState *bs, int type);
670 void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
671 void bdrv_get_geometry_hint(BlockDriverState *bs,
672 int *pcyls, int *pheads, int *psecs);
673 int bdrv_get_type_hint(BlockDriverState *bs);
674 int bdrv_get_translation_hint(BlockDriverState *bs);
675 int bdrv_is_removable(BlockDriverState *bs);
676 int bdrv_is_read_only(BlockDriverState *bs);
677 int bdrv_is_inserted(BlockDriverState *bs);
678 int bdrv_media_changed(BlockDriverState *bs);
679 int bdrv_is_locked(BlockDriverState *bs);
680 void bdrv_set_locked(BlockDriverState *bs, int locked);
681 void bdrv_eject(BlockDriverState *bs, int eject_flag);
682 void bdrv_set_change_cb(BlockDriverState *bs,
683 void (*change_cb)(void *opaque), void *opaque);
684 void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
685 void bdrv_info(void);
686 BlockDriverState *bdrv_find(const char *name);
687 void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
688 int bdrv_is_encrypted(BlockDriverState *bs);
689 int bdrv_set_key(BlockDriverState *bs, const char *key);
690 void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
691 void *opaque);
692 const char *bdrv_get_device_name(BlockDriverState *bs);
693 int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
694 const uint8_t *buf, int nb_sectors);
695 int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
697 void bdrv_get_backing_filename(BlockDriverState *bs,
698 char *filename, int filename_size);
699 int bdrv_snapshot_create(BlockDriverState *bs,
700 QEMUSnapshotInfo *sn_info);
701 int bdrv_snapshot_goto(BlockDriverState *bs,
702 const char *snapshot_id);
703 int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
704 int bdrv_snapshot_list(BlockDriverState *bs,
705 QEMUSnapshotInfo **psn_info);
706 char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
708 char *get_human_readable_size(char *buf, int buf_size, int64_t size);
709 int path_is_absolute(const char *path);
710 void path_combine(char *dest, int dest_size,
711 const char *base_path,
712 const char *filename);
714 #ifndef QEMU_TOOL
716 typedef void QEMUMachineInitFunc(uint64_t ram_size, int vga_ram_size,
717 char *boot_device,
718 DisplayState *ds, const char **fd_filename, int snapshot,
719 const char *kernel_filename, const char *kernel_cmdline,
720 const char *initrd_filename);
722 typedef struct QEMUMachine {
723 const char *name;
724 const char *desc;
725 QEMUMachineInitFunc *init;
726 struct QEMUMachine *next;
727 } QEMUMachine;
729 int qemu_register_machine(QEMUMachine *m);
731 typedef void SetIRQFunc(void *opaque, int irq_num, int level);
732 typedef void IRQRequestFunc(void *opaque, int level);
734 /* ISA bus */
736 extern target_phys_addr_t isa_mem_base;
738 typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
739 typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
741 int register_ioport_read(int start, int length, int size,
742 IOPortReadFunc *func, void *opaque);
743 int register_ioport_write(int start, int length, int size,
744 IOPortWriteFunc *func, void *opaque);
745 void isa_unassign_ioport(int start, int length);
747 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
749 /* PCI bus */
751 extern target_phys_addr_t pci_mem_base;
753 typedef struct PCIBus PCIBus;
754 typedef struct PCIDevice PCIDevice;
756 typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
757 uint32_t address, uint32_t data, int len);
758 typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
759 uint32_t address, int len);
760 typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
761 uint32_t addr, uint32_t size, int type);
763 #define PCI_ADDRESS_SPACE_MEM 0x00
764 #define PCI_ADDRESS_SPACE_IO 0x01
765 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
767 typedef struct PCIIORegion {
768 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
769 uint32_t size;
770 uint8_t type;
771 PCIMapIORegionFunc *map_func;
772 } PCIIORegion;
774 #define PCI_ROM_SLOT 6
775 #define PCI_NUM_REGIONS 7
777 #define PCI_DEVICES_MAX 64
779 #define PCI_VENDOR_ID 0x00 /* 16 bits */
780 #define PCI_DEVICE_ID 0x02 /* 16 bits */
781 #define PCI_COMMAND 0x04 /* 16 bits */
782 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
783 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
784 #define PCI_CLASS_DEVICE 0x0a /* Device class */
785 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
786 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
787 #define PCI_MIN_GNT 0x3e /* 8 bits */
788 #define PCI_MAX_LAT 0x3f /* 8 bits */
790 struct PCIDevice {
791 /*
792 * PCI config space. The 4 extra bytes are a safety buffer for guest
793 * word/dword writes that can extend past byte 0xff.
794 */
795 uint8_t config[256+4];
797 /* the following fields are read only */
798 PCIBus *bus;
799 int devfn;
800 char name[64];
801 PCIIORegion io_regions[PCI_NUM_REGIONS];
803 /* do not access the following fields */
804 PCIConfigReadFunc *config_read;
805 PCIConfigWriteFunc *config_write;
806 /* ??? This is a PC-specific hack, and should be removed. */
807 int irq_index;
809 /* Current IRQ levels. Used internally by the generic PCI code. */
810 int irq_state[4];
811 };
813 PCIDevice *pci_register_device(PCIBus *bus, const char *name,
814 int instance_size, int devfn,
815 PCIConfigReadFunc *config_read,
816 PCIConfigWriteFunc *config_write);
818 void pci_register_io_region(PCIDevice *pci_dev, int region_num,
819 uint32_t size, int type,
820 PCIMapIORegionFunc *map_func);
822 void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
824 uint32_t pci_default_read_config(PCIDevice *d,
825 uint32_t address, int len);
826 void pci_default_write_config(PCIDevice *d,
827 uint32_t address, uint32_t val, int len);
828 void pci_device_save(PCIDevice *s, QEMUFile *f);
829 int pci_device_load(PCIDevice *s, QEMUFile *f);
831 typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
832 typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
833 PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
834 void *pic, int devfn_min, int nirq);
836 void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
837 void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
838 uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
839 int pci_bus_num(PCIBus *s);
840 void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
842 void pci_info(void);
843 PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
844 pci_map_irq_fn map_irq, const char *name);
846 /* prep_pci.c */
847 PCIBus *pci_prep_init(void);
849 /* grackle_pci.c */
850 PCIBus *pci_grackle_init(uint32_t base, void *pic);
852 /* unin_pci.c */
853 PCIBus *pci_pmac_init(void *pic);
855 /* apb_pci.c */
856 PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
857 void *pic);
859 PCIBus *pci_vpb_init(void *pic, int irq, int realview);
861 /* piix_pci.c */
862 PCIBus *i440fx_init(PCIDevice **pi440fx_state);
863 void i440fx_set_smm(PCIDevice *d, int val);
864 int piix3_init(PCIBus *bus, int devfn);
865 void i440fx_init_memory_mappings(PCIDevice *d);
867 int piix4_init(PCIBus *bus, int devfn);
869 /* openpic.c */
870 typedef struct openpic_t openpic_t;
871 void openpic_set_irq(void *opaque, int n_IRQ, int level);
872 openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
873 CPUState **envp);
875 /* heathrow_pic.c */
876 typedef struct HeathrowPICS HeathrowPICS;
877 void heathrow_pic_set_irq(void *opaque, int num, int level);
878 HeathrowPICS *heathrow_pic_init(int *pmem_index);
880 /* gt64xxx.c */
881 PCIBus *pci_gt64120_init(void *pic);
883 #ifdef HAS_AUDIO
884 struct soundhw {
885 const char *name;
886 const char *descr;
887 int enabled;
888 int isa;
889 union {
890 int (*init_isa) (AudioState *s);
891 int (*init_pci) (PCIBus *bus, AudioState *s);
892 } init;
893 };
895 extern struct soundhw soundhw[];
896 #endif
898 /* vga.c */
900 #define VGA_RAM_SIZE (8192 * 1024)
902 struct DisplayState {
903 uint8_t *data;
904 int linesize;
905 int depth;
906 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
907 int width;
908 int height;
909 void *opaque;
911 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
912 void (*dpy_resize)(struct DisplayState *s, int w, int h);
913 void (*dpy_refresh)(struct DisplayState *s);
914 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
915 };
917 static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
918 {
919 s->dpy_update(s, x, y, w, h);
920 }
922 static inline void dpy_resize(DisplayState *s, int w, int h)
923 {
924 s->dpy_resize(s, w, h);
925 }
927 int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
928 unsigned long vga_ram_offset, int vga_ram_size);
929 int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
930 unsigned long vga_ram_offset, int vga_ram_size,
931 unsigned long vga_bios_offset, int vga_bios_size);
933 /* cirrus_vga.c */
934 void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
935 unsigned long vga_ram_offset, int vga_ram_size);
936 void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
937 unsigned long vga_ram_offset, int vga_ram_size);
939 /* sdl.c */
940 void sdl_display_init(DisplayState *ds, int full_screen);
942 /* cocoa.m */
943 void cocoa_display_init(DisplayState *ds, int full_screen);
945 /* vnc.c */
946 int vnc_display_init(DisplayState *ds, const char *display, int find_unused);
947 void do_info_vnc(void);
948 int vnc_start_viewer(int port);
950 /* x_keymap.c */
951 extern uint8_t _translate_keycode(const int key);
953 /* ide.c */
954 #define MAX_DISKS 4
955 #define MAX_SCSI_DISKS 7
957 extern BlockDriverState *bs_table[MAX_DISKS + MAX_SCSI_DISKS + 1];
959 void isa_ide_init(int iobase, int iobase2, int irq,
960 BlockDriverState *hd0, BlockDriverState *hd1);
961 void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
962 int secondary_ide_enabled);
963 void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
964 int pmac_ide_init (BlockDriverState **hd_table,
965 SetIRQFunc *set_irq, void *irq_opaque, int irq);
967 /* cdrom.c */
968 int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
969 int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
971 /* es1370.c */
972 int es1370_init (PCIBus *bus, AudioState *s);
974 /* sb16.c */
975 int SB16_init (AudioState *s);
977 /* adlib.c */
978 int Adlib_init (AudioState *s);
980 /* gus.c */
981 int GUS_init (AudioState *s);
983 /* dma.c */
984 typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
985 int DMA_get_channel_mode (int nchan);
986 int DMA_read_memory (int nchan, void *buf, int pos, int size);
987 int DMA_write_memory (int nchan, void *buf, int pos, int size);
988 void DMA_hold_DREQ (int nchan);
989 void DMA_release_DREQ (int nchan);
990 void DMA_schedule(int nchan);
991 void DMA_run (void);
992 void DMA_init (int high_page_enable);
993 void DMA_register_channel (int nchan,
994 DMA_transfer_handler transfer_handler,
995 void *opaque);
996 /* fdc.c */
997 #define MAX_FD 2
998 extern BlockDriverState *fd_table[MAX_FD];
1000 typedef struct fdctrl_t fdctrl_t;
1002 fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
1003 uint32_t io_base,
1004 BlockDriverState **fds);
1005 int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
1007 /* ne2000.c */
1009 void isa_ne2000_init(int base, int irq, NICInfo *nd);
1010 void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
1012 /* rtl8139.c */
1014 void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
1016 /* pcnet.c */
1018 void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
1019 void pcnet_h_reset(void *opaque);
1020 void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
1023 /* pckbd.c */
1025 void kbd_init(void);
1027 /* mc146818rtc.c */
1029 typedef struct RTCState RTCState;
1031 RTCState *rtc_init(int base, int irq);
1032 void rtc_set_memory(RTCState *s, int addr, int val);
1033 void rtc_set_date(RTCState *s, const struct tm *tm);
1035 /* serial.c */
1037 typedef struct SerialState SerialState;
1038 SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
1039 int base, int irq, CharDriverState *chr);
1040 SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
1041 target_ulong base, int it_shift,
1042 int irq, CharDriverState *chr);
1044 /* parallel.c */
1046 typedef struct ParallelState ParallelState;
1047 ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
1049 /* i8259.c */
1051 typedef struct PicState2 PicState2;
1052 extern PicState2 *isa_pic;
1053 void pic_set_irq(int irq, int level);
1054 void pic_set_irq_new(void *opaque, int irq, int level);
1055 PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
1056 void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1057 void *alt_irq_opaque);
1058 int pic_read_irq(PicState2 *s);
1059 void pic_update_irq(PicState2 *s);
1060 uint32_t pic_intack_read(PicState2 *s);
1061 void pic_info(void);
1062 void irq_info(void);
1063 void sp_info(void);
1065 /* APIC */
1066 typedef struct IOAPICState IOAPICState;
1068 int apic_init(CPUState *env);
1069 int apic_get_interrupt(CPUState *env);
1070 IOAPICState *ioapic_init(void);
1071 void ioapic_set_irq(void *opaque, int vector, int level);
1073 /* i8254.c */
1075 #define PIT_FREQ 1193182
1077 typedef struct PITState PITState;
1079 PITState *pit_init(int base, int irq);
1080 void pit_set_gate(PITState *pit, int channel, int val);
1081 int pit_get_gate(PITState *pit, int channel);
1082 int pit_get_initial_count(PITState *pit, int channel);
1083 int pit_get_mode(PITState *pit, int channel);
1084 int pit_get_out(PITState *pit, int channel, int64_t current_time);
1086 /* pcspk.c */
1087 void pcspk_init(PITState *);
1088 int pcspk_audio_init(AudioState *);
1090 #include "hw/smbus.h"
1092 /* acpi.c */
1093 extern int acpi_enabled;
1094 void piix4_pm_init(PCIBus *bus, int devfn);
1095 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
1096 void acpi_bios_init(void);
1098 /* smbus_eeprom.c */
1099 SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf);
1101 /* tpm_tis.c */
1102 int has_tpm_device(void);
1103 void tpm_tis_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1105 /* piix4acpi.c */
1106 extern void pci_piix4_acpi_init(PCIBus *bus, int devfn);
1108 /* pc.c */
1109 extern QEMUMachine pc_machine;
1110 extern QEMUMachine isapc_machine;
1111 extern int fd_bootchk;
1113 void ioport_set_a20(int enable);
1114 int ioport_get_a20(void);
1116 /* ppc.c */
1117 extern QEMUMachine prep_machine;
1118 extern QEMUMachine core99_machine;
1119 extern QEMUMachine heathrow_machine;
1121 /* mips_r4k.c */
1122 extern QEMUMachine mips_machine;
1124 /* mips_malta.c */
1125 extern QEMUMachine mips_malta_machine;
1127 /* mips_int */
1128 extern void cpu_mips_irq_request(void *opaque, int irq, int level);
1130 /* mips_timer.c */
1131 extern void cpu_mips_clock_init(CPUState *);
1132 extern void cpu_mips_irqctrl_init (void);
1134 /* shix.c */
1135 extern QEMUMachine shix_machine;
1137 #ifdef TARGET_PPC
1138 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1139 #endif
1140 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
1142 extern CPUWriteMemoryFunc *PPC_io_write[];
1143 extern CPUReadMemoryFunc *PPC_io_read[];
1144 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1146 /* sun4m.c */
1147 extern QEMUMachine sun4m_machine;
1148 void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
1150 /* iommu.c */
1151 void *iommu_init(uint32_t addr);
1152 void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
1153 uint8_t *buf, int len, int is_write);
1154 static inline void sparc_iommu_memory_read(void *opaque,
1155 target_phys_addr_t addr,
1156 uint8_t *buf, int len)
1158 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1161 static inline void sparc_iommu_memory_write(void *opaque,
1162 target_phys_addr_t addr,
1163 uint8_t *buf, int len)
1165 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1168 /* tcx.c */
1169 void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
1170 unsigned long vram_offset, int vram_size, int width, int height);
1172 /* slavio_intctl.c */
1173 void *slavio_intctl_init(void);
1174 void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
1175 void slavio_pic_info(void *opaque);
1176 void slavio_irq_info(void *opaque);
1177 void slavio_pic_set_irq(void *opaque, int irq, int level);
1178 void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
1180 /* loader.c */
1181 int get_image_size(const char *filename);
1182 int load_image(const char *filename, uint8_t *addr);
1183 int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
1184 int load_aout(const char *filename, uint8_t *addr);
1186 /* slavio_timer.c */
1187 void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
1189 /* slavio_serial.c */
1190 SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1191 void slavio_serial_ms_kbd_init(int base, int irq);
1193 /* slavio_misc.c */
1194 void *slavio_misc_init(uint32_t base, int irq);
1195 void slavio_set_power_fail(void *opaque, int power_failing);
1197 /* esp.c */
1198 void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1199 void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1200 void esp_reset(void *opaque);
1202 /* sparc32_dma.c */
1203 void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1204 void *intctl);
1205 void ledma_set_irq(void *opaque, int isr);
1206 void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1207 uint8_t *buf, int len, int do_bswap);
1208 void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1209 uint8_t *buf, int len, int do_bswap);
1210 void espdma_raise_irq(void *opaque);
1211 void espdma_clear_irq(void *opaque);
1212 void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1213 void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1214 void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1215 void *lance_opaque);
1217 /* cs4231.c */
1218 void cs_init(target_phys_addr_t base, int irq, void *intctl);
1220 /* sun4u.c */
1221 extern QEMUMachine sun4u_machine;
1223 /* NVRAM helpers */
1224 #include "hw/m48t59.h"
1226 void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1227 uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1228 void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1229 uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1230 void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1231 uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1232 void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1233 const unsigned char *str, uint32_t max);
1234 int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1235 void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1236 uint32_t start, uint32_t count);
1237 int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1238 const unsigned char *arch,
1239 uint32_t RAM_size, char *boot_device,
1240 uint32_t kernel_image, uint32_t kernel_size,
1241 const char *cmdline,
1242 uint32_t initrd_image, uint32_t initrd_size,
1243 uint32_t NVRAM_image,
1244 int width, int height, int depth);
1246 /* adb.c */
1248 #define MAX_ADB_DEVICES 16
1250 #define ADB_MAX_OUT_LEN 16
1252 typedef struct ADBDevice ADBDevice;
1254 /* buf = NULL means polling */
1255 typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1256 const uint8_t *buf, int len);
1257 typedef int ADBDeviceReset(ADBDevice *d);
1259 struct ADBDevice {
1260 struct ADBBusState *bus;
1261 int devaddr;
1262 int handler;
1263 ADBDeviceRequest *devreq;
1264 ADBDeviceReset *devreset;
1265 void *opaque;
1266 };
1268 typedef struct ADBBusState {
1269 ADBDevice devices[MAX_ADB_DEVICES];
1270 int nb_devices;
1271 int poll_index;
1272 } ADBBusState;
1274 int adb_request(ADBBusState *s, uint8_t *buf_out,
1275 const uint8_t *buf, int len);
1276 int adb_poll(ADBBusState *s, uint8_t *buf_out);
1278 ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
1279 ADBDeviceRequest *devreq,
1280 ADBDeviceReset *devreset,
1281 void *opaque);
1282 void adb_kbd_init(ADBBusState *bus);
1283 void adb_mouse_init(ADBBusState *bus);
1285 /* cuda.c */
1287 extern ADBBusState adb_bus;
1288 int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
1290 #include "hw/usb.h"
1292 /* usb ports of the VM */
1294 void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1295 usb_attachfn attach);
1297 #define VM_USB_HUB_SIZE 8
1299 void do_usb_add(const char *devname);
1300 void do_usb_del(const char *devname);
1301 void usb_info(void);
1303 /* scsi-disk.c */
1304 enum scsi_reason {
1305 SCSI_REASON_DONE, /* Command complete. */
1306 SCSI_REASON_DATA /* Transfer complete, more data required. */
1307 };
1309 typedef struct SCSIDevice SCSIDevice;
1310 typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1311 uint32_t arg);
1313 SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1314 int tcq,
1315 scsi_completionfn completion,
1316 void *opaque);
1317 void scsi_disk_destroy(SCSIDevice *s);
1319 int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
1320 /* SCSI data transfers are asynchrnonous. However, unlike the block IO
1321 layer the completion routine may be called directly by
1322 scsi_{read,write}_data. */
1323 void scsi_read_data(SCSIDevice *s, uint32_t tag);
1324 int scsi_write_data(SCSIDevice *s, uint32_t tag);
1325 void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1326 uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
1328 /* lsi53c895a.c */
1329 void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1330 void *lsi_scsi_init(PCIBus *bus, int devfn);
1332 /* integratorcp.c */
1333 extern QEMUMachine integratorcp926_machine;
1334 extern QEMUMachine integratorcp1026_machine;
1336 /* versatilepb.c */
1337 extern QEMUMachine versatilepb_machine;
1338 extern QEMUMachine versatileab_machine;
1340 /* realview.c */
1341 extern QEMUMachine realview_machine;
1343 /* ps2.c */
1344 void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1345 void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1346 void ps2_write_mouse(void *, int val);
1347 void ps2_write_keyboard(void *, int val);
1348 uint32_t ps2_read_data(void *);
1349 void ps2_queue(void *, int b);
1350 void ps2_keyboard_set_translation(void *opaque, int mode);
1352 /* smc91c111.c */
1353 void smc91c111_init(NICInfo *, uint32_t, void *, int);
1355 /* pl110.c */
1356 void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
1358 /* pl011.c */
1359 void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1361 /* pl050.c */
1362 void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1364 /* pl080.c */
1365 void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
1367 /* pl190.c */
1368 void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1370 /* arm-timer.c */
1371 void sp804_init(uint32_t base, void *pic, int irq);
1372 void icp_pit_init(uint32_t base, void *pic, int irq);
1374 /* arm_sysctl.c */
1375 void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1377 /* arm_gic.c */
1378 void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1380 /* arm_boot.c */
1382 void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
1383 const char *kernel_cmdline, const char *initrd_filename,
1384 int board_id);
1386 /* sh7750.c */
1387 struct SH7750State;
1389 struct SH7750State *sh7750_init(CPUState * cpu);
1391 typedef struct {
1392 /* The callback will be triggered if any of the designated lines change */
1393 uint16_t portamask_trigger;
1394 uint16_t portbmask_trigger;
1395 /* Return 0 if no action was taken */
1396 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1397 uint16_t * periph_pdtra,
1398 uint16_t * periph_portdira,
1399 uint16_t * periph_pdtrb,
1400 uint16_t * periph_portdirb);
1401 } sh7750_io_device;
1403 int sh7750_register_io_device(struct SH7750State *s,
1404 sh7750_io_device * device);
1405 /* tc58128.c */
1406 int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1408 /* NOR flash devices */
1409 typedef struct pflash_t pflash_t;
1411 pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1412 BlockDriverState *bs,
1413 target_ulong sector_len, int nb_blocs, int width,
1414 uint16_t id0, uint16_t id1,
1415 uint16_t id2, uint16_t id3);
1417 #include "gdbstub.h"
1419 #endif /* defined(QEMU_TOOL) */
1421 /* monitor.c */
1422 void monitor_init(CharDriverState *hd, int show_banner);
1423 void term_puts(const char *str);
1424 void term_vprintf(const char *fmt, va_list ap);
1425 void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
1426 void term_print_filename(const char *filename);
1427 void term_flush(void);
1428 void term_print_help(void);
1429 void monitor_readline(const char *prompt, int is_password,
1430 char *buf, int buf_size);
1431 void do_eject(int force, const char *filename);
1432 void do_change(const char *device, const char *filename);
1434 /* readline.c */
1435 typedef void ReadLineFunc(void *opaque, const char *str);
1437 extern int completion_index;
1438 void add_completion(const char *str);
1439 void readline_handle_byte(int ch);
1440 void readline_find_completion(const char *cmdline);
1441 const char *readline_get_history(unsigned int index);
1442 void readline_start(const char *prompt, int is_password,
1443 ReadLineFunc *readline_func, void *opaque);
1445 /* xenstore.c */
1446 void xenstore_parse_domain_config(int domid);
1447 int xenstore_fd(void);
1448 void xenstore_process_event(void *opaque);
1449 void xenstore_record_dm_state(char *state);
1450 void xenstore_check_new_media_present(int timeout);
1451 void xenstore_write_vncport(int vnc_display);
1452 int xenstore_read_vncpasswd(int domid);
1454 int xenstore_domain_has_devtype(struct xs_handle *handle,
1455 const char *devtype);
1456 char **xenstore_domain_get_devices(struct xs_handle *handle,
1457 const char *devtype, unsigned int *num);
1458 char *xenstore_read_hotplug_status(struct xs_handle *handle,
1459 const char *devtype, const char *inst);
1460 char *xenstore_backend_read_variable(struct xs_handle *,
1461 const char *devtype, const char *inst,
1462 const char *var);
1463 int xenstore_subscribe_to_hotplug_status(struct xs_handle *handle,
1464 const char *devtype,
1465 const char *inst,
1466 const char *token);
1467 int xenstore_unsubscribe_from_hotplug_status(struct xs_handle *handle,
1468 const char *devtype,
1469 const char *inst,
1470 const char *token);
1472 int xenstore_vm_write(int domid, char *key, char *val);
1473 char *xenstore_vm_read(int domid, char *key, int *len);
1475 /* helper2.c */
1476 extern long time_offset;
1477 void timeoffset_get(void);
1479 /* xen_platform.c */
1480 void pci_xen_platform_init(PCIBus *bus);
1483 void kqemu_record_dump(void);
1485 extern char domain_name[];
1487 void destroy_hvm_domain(void);
1489 /* VNC Authentication */
1490 #define AUTHCHALLENGESIZE 16
1492 #ifdef __ia64__
1493 static inline void xc_domain_shutdown_hook(int xc_handle, uint32_t domid)
1495 xc_ia64_save_to_nvram(xc_handle, domid);
1497 #else
1498 #define xc_domain_shutdown_hook(xc_handle, domid) do {} while (0)
1499 #endif
1501 #endif /* VL_H */