ia64/xen-unstable

view xen/arch/x86/domain.c @ 14188:b703aa29424f

[XEN] Fix cset 14166
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
author Tim Deegan <Tim.Deegan@xensource.com>
date Thu Mar 01 09:52:40 2007 +0000 (2007-03-01)
parents 0f0ac445bf82
children d5c4d43da89e
line source
1 /******************************************************************************
2 * arch/x86/domain.c
3 *
4 * x86-specific domain handling (e.g., register setup and context switching).
5 */
7 /*
8 * Copyright (C) 1995 Linus Torvalds
9 *
10 * Pentium III FXSR, SSE support
11 * Gareth Hughes <gareth@valinux.com>, May 2000
12 */
14 #include <xen/config.h>
15 #include <xen/init.h>
16 #include <xen/lib.h>
17 #include <xen/errno.h>
18 #include <xen/sched.h>
19 #include <xen/domain.h>
20 #include <xen/smp.h>
21 #include <xen/delay.h>
22 #include <xen/softirq.h>
23 #include <xen/grant_table.h>
24 #include <xen/iocap.h>
25 #include <xen/kernel.h>
26 #include <xen/multicall.h>
27 #include <xen/irq.h>
28 #include <xen/event.h>
29 #include <xen/console.h>
30 #include <xen/percpu.h>
31 #include <asm/regs.h>
32 #include <asm/mc146818rtc.h>
33 #include <asm/system.h>
34 #include <asm/io.h>
35 #include <asm/processor.h>
36 #include <asm/desc.h>
37 #include <asm/i387.h>
38 #include <asm/mpspec.h>
39 #include <asm/ldt.h>
40 #include <asm/paging.h>
41 #include <asm/hvm/hvm.h>
42 #include <asm/hvm/support.h>
43 #include <asm/msr.h>
44 #ifdef CONFIG_COMPAT
45 #include <compat/vcpu.h>
46 #endif
48 DEFINE_PER_CPU(struct vcpu *, curr_vcpu);
50 static void paravirt_ctxt_switch_from(struct vcpu *v);
51 static void paravirt_ctxt_switch_to(struct vcpu *v);
53 static void vcpu_destroy_pagetables(struct vcpu *v);
55 static void continue_idle_domain(struct vcpu *v)
56 {
57 reset_stack_and_jump(idle_loop);
58 }
60 static void continue_nonidle_domain(struct vcpu *v)
61 {
62 reset_stack_and_jump(ret_from_intr);
63 }
65 static void default_idle(void)
66 {
67 local_irq_disable();
68 if ( !softirq_pending(smp_processor_id()) )
69 safe_halt();
70 else
71 local_irq_enable();
72 }
74 void idle_loop(void)
75 {
76 for ( ; ; )
77 {
78 page_scrub_schedule_work();
79 default_idle();
80 do_softirq();
81 }
82 }
84 void startup_cpu_idle_loop(void)
85 {
86 struct vcpu *v = current;
88 ASSERT(is_idle_vcpu(v));
89 cpu_set(smp_processor_id(), v->domain->domain_dirty_cpumask);
90 cpu_set(smp_processor_id(), v->vcpu_dirty_cpumask);
92 reset_stack_and_jump(idle_loop);
93 }
95 void dump_pageframe_info(struct domain *d)
96 {
97 struct page_info *page;
99 printk("Memory pages belonging to domain %u:\n", d->domain_id);
101 if ( d->tot_pages >= 10 )
102 {
103 printk(" DomPage list too long to display\n");
104 }
105 else
106 {
107 list_for_each_entry ( page, &d->page_list, list )
108 {
109 printk(" DomPage %p: mfn=%p, caf=%08x, taf=%" PRtype_info "\n",
110 _p(page_to_maddr(page)), _p(page_to_mfn(page)),
111 page->count_info, page->u.inuse.type_info);
112 }
113 }
115 list_for_each_entry ( page, &d->xenpage_list, list )
116 {
117 printk(" XenPage %p: mfn=%p, caf=%08x, taf=%" PRtype_info "\n",
118 _p(page_to_maddr(page)), _p(page_to_mfn(page)),
119 page->count_info, page->u.inuse.type_info);
120 }
121 }
123 struct vcpu *alloc_vcpu_struct(void)
124 {
125 struct vcpu *v;
126 if ( (v = xmalloc(struct vcpu)) != NULL )
127 memset(v, 0, sizeof(*v));
128 return v;
129 }
131 void free_vcpu_struct(struct vcpu *v)
132 {
133 xfree(v);
134 }
136 #ifdef CONFIG_COMPAT
138 int setup_arg_xlat_area(struct vcpu *v, l4_pgentry_t *l4tab)
139 {
140 struct domain *d = v->domain;
141 unsigned i;
142 struct page_info *pg;
144 if ( !d->arch.mm_arg_xlat_l3 )
145 {
146 pg = alloc_domheap_page(NULL);
147 if ( !pg )
148 return -ENOMEM;
149 d->arch.mm_arg_xlat_l3 = clear_page(page_to_virt(pg));
150 }
152 l4tab[l4_table_offset(COMPAT_ARG_XLAT_VIRT_BASE)] =
153 l4e_from_paddr(__pa(d->arch.mm_arg_xlat_l3), __PAGE_HYPERVISOR);
155 for ( i = 0; i < COMPAT_ARG_XLAT_PAGES; ++i )
156 {
157 unsigned long va = COMPAT_ARG_XLAT_VIRT_START(v->vcpu_id) + i * PAGE_SIZE;
158 l2_pgentry_t *l2tab;
159 l1_pgentry_t *l1tab;
161 if ( !l3e_get_intpte(d->arch.mm_arg_xlat_l3[l3_table_offset(va)]) )
162 {
163 pg = alloc_domheap_page(NULL);
164 if ( !pg )
165 return -ENOMEM;
166 clear_page(page_to_virt(pg));
167 d->arch.mm_arg_xlat_l3[l3_table_offset(va)] = l3e_from_page(pg, __PAGE_HYPERVISOR);
168 }
169 l2tab = l3e_to_l2e(d->arch.mm_arg_xlat_l3[l3_table_offset(va)]);
170 if ( !l2e_get_intpte(l2tab[l2_table_offset(va)]) )
171 {
172 pg = alloc_domheap_page(NULL);
173 if ( !pg )
174 return -ENOMEM;
175 clear_page(page_to_virt(pg));
176 l2tab[l2_table_offset(va)] = l2e_from_page(pg, __PAGE_HYPERVISOR);
177 }
178 l1tab = l2e_to_l1e(l2tab[l2_table_offset(va)]);
179 BUG_ON(l1e_get_intpte(l1tab[l1_table_offset(va)]));
180 pg = alloc_domheap_page(NULL);
181 if ( !pg )
182 return -ENOMEM;
183 l1tab[l1_table_offset(va)] = l1e_from_page(pg, PAGE_HYPERVISOR);
184 }
186 return 0;
187 }
189 static void release_arg_xlat_area(struct domain *d)
190 {
191 if ( d->arch.mm_arg_xlat_l3 )
192 {
193 unsigned l3;
195 for ( l3 = 0; l3 < L3_PAGETABLE_ENTRIES; ++l3 )
196 {
197 if ( l3e_get_intpte(d->arch.mm_arg_xlat_l3[l3]) )
198 {
199 l2_pgentry_t *l2tab = l3e_to_l2e(d->arch.mm_arg_xlat_l3[l3]);
200 unsigned l2;
202 for ( l2 = 0; l2 < L2_PAGETABLE_ENTRIES; ++l2 )
203 {
204 if ( l2e_get_intpte(l2tab[l2]) )
205 {
206 l1_pgentry_t *l1tab = l2e_to_l1e(l2tab[l2]);
207 unsigned l1;
209 for ( l1 = 0; l1 < L1_PAGETABLE_ENTRIES; ++l1 )
210 {
211 if ( l1e_get_intpte(l1tab[l1]) )
212 free_domheap_page(l1e_get_page(l1tab[l1]));
213 }
214 free_domheap_page(l2e_get_page(l2tab[l2]));
215 }
216 }
217 free_domheap_page(l3e_get_page(d->arch.mm_arg_xlat_l3[l3]));
218 }
219 }
220 free_domheap_page(virt_to_page(d->arch.mm_arg_xlat_l3));
221 }
222 }
224 static int setup_compat_l4(struct vcpu *v)
225 {
226 struct page_info *pg = alloc_domheap_page(NULL);
227 l4_pgentry_t *l4tab;
228 int rc;
230 if ( !pg )
231 return -ENOMEM;
233 /* This page needs to look like a pagetable so that it can be shadowed */
234 pg->u.inuse.type_info = PGT_l4_page_table|PGT_validated;
236 l4tab = copy_page(page_to_virt(pg), idle_pg_table);
237 l4tab[l4_table_offset(LINEAR_PT_VIRT_START)] =
238 l4e_from_page(pg, __PAGE_HYPERVISOR);
239 l4tab[l4_table_offset(PERDOMAIN_VIRT_START)] =
240 l4e_from_paddr(__pa(v->domain->arch.mm_perdomain_l3), __PAGE_HYPERVISOR);
241 v->arch.guest_table = pagetable_from_page(pg);
242 v->arch.guest_table_user = v->arch.guest_table;
244 if ( (rc = setup_arg_xlat_area(v, l4tab)) < 0 )
245 {
246 free_domheap_page(pg);
247 return rc;
248 }
250 return 0;
251 }
253 static void release_compat_l4(struct vcpu *v)
254 {
255 free_domheap_page(pagetable_get_page(v->arch.guest_table));
256 v->arch.guest_table = pagetable_null();
257 v->arch.guest_table_user = pagetable_null();
258 }
260 static inline int may_switch_mode(struct domain *d)
261 {
262 return (d->tot_pages == 0);
263 }
265 int switch_native(struct domain *d)
266 {
267 l1_pgentry_t gdt_l1e;
268 unsigned int vcpuid;
270 if ( d == NULL )
271 return -EINVAL;
272 if ( !may_switch_mode(d) )
273 return -EACCES;
274 if ( !IS_COMPAT(d) )
275 return 0;
277 clear_bit(_DOMF_compat, &d->domain_flags);
278 release_arg_xlat_area(d);
280 /* switch gdt */
281 gdt_l1e = l1e_from_page(virt_to_page(gdt_table), PAGE_HYPERVISOR);
282 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
283 {
284 d->arch.mm_perdomain_pt[((vcpuid << GDT_LDT_VCPU_SHIFT) +
285 FIRST_RESERVED_GDT_PAGE)] = gdt_l1e;
286 if (d->vcpu[vcpuid])
287 release_compat_l4(d->vcpu[vcpuid]);
288 }
290 d->arch.physaddr_bitsize = 64;
292 return 0;
293 }
295 int switch_compat(struct domain *d)
296 {
297 l1_pgentry_t gdt_l1e;
298 unsigned int vcpuid;
300 if ( d == NULL )
301 return -EINVAL;
302 if ( compat_disabled )
303 return -ENOSYS;
304 if ( !may_switch_mode(d) )
305 return -EACCES;
306 if ( IS_COMPAT(d) )
307 return 0;
309 set_bit(_DOMF_compat, &d->domain_flags);
311 /* switch gdt */
312 gdt_l1e = l1e_from_page(virt_to_page(compat_gdt_table), PAGE_HYPERVISOR);
313 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
314 {
315 d->arch.mm_perdomain_pt[((vcpuid << GDT_LDT_VCPU_SHIFT) +
316 FIRST_RESERVED_GDT_PAGE)] = gdt_l1e;
317 if (d->vcpu[vcpuid]
318 && setup_compat_l4(d->vcpu[vcpuid]) != 0)
319 return -ENOMEM;
320 }
322 d->arch.physaddr_bitsize =
323 fls((1UL << 32) - HYPERVISOR_COMPAT_VIRT_START(d)) - 1
324 + (PAGE_SIZE - 2);
326 return 0;
327 }
329 #else
330 #define release_arg_xlat_area(d) ((void)0)
331 #define setup_compat_l4(v) 0
332 #define release_compat_l4(v) ((void)0)
333 #endif
335 int vcpu_initialise(struct vcpu *v)
336 {
337 struct domain *d = v->domain;
338 int rc;
340 v->arch.flags = TF_kernel_mode;
342 pae_l3_cache_init(&v->arch.pae_l3_cache);
344 paging_vcpu_init(v);
346 if ( is_hvm_domain(d) )
347 {
348 if ( (rc = hvm_vcpu_initialise(v)) != 0 )
349 return rc;
350 }
351 else
352 {
353 /* PV guests get an emulated PIT too for video BIOSes to use. */
354 if ( !is_idle_domain(d) && (v->vcpu_id == 0) )
355 pit_init(v, cpu_khz);
357 v->arch.schedule_tail = continue_nonidle_domain;
358 v->arch.ctxt_switch_from = paravirt_ctxt_switch_from;
359 v->arch.ctxt_switch_to = paravirt_ctxt_switch_to;
361 if ( is_idle_domain(d) )
362 {
363 v->arch.schedule_tail = continue_idle_domain;
364 v->arch.cr3 = __pa(idle_pg_table);
365 }
366 }
368 v->arch.perdomain_ptes =
369 d->arch.mm_perdomain_pt + (v->vcpu_id << GDT_LDT_VCPU_SHIFT);
371 if ( IS_COMPAT(d) && (rc = setup_compat_l4(v)) != 0 )
372 return rc;
374 return 0;
375 }
377 void vcpu_destroy(struct vcpu *v)
378 {
379 if ( IS_COMPAT(v->domain) )
380 release_compat_l4(v);
381 }
383 int arch_domain_create(struct domain *d)
384 {
385 #ifdef __x86_64__
386 struct page_info *pg;
387 int i;
388 #endif
389 l1_pgentry_t gdt_l1e;
390 int vcpuid, pdpt_order;
391 int rc = -ENOMEM;
393 pdpt_order = get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t));
394 d->arch.mm_perdomain_pt = alloc_xenheap_pages(pdpt_order);
395 if ( d->arch.mm_perdomain_pt == NULL )
396 goto fail;
397 memset(d->arch.mm_perdomain_pt, 0, PAGE_SIZE << pdpt_order);
399 /*
400 * Map Xen segments into every VCPU's GDT, irrespective of whether every
401 * VCPU will actually be used. This avoids an NMI race during context
402 * switch: if we take an interrupt after switching CR3 but before switching
403 * GDT, and the old VCPU# is invalid in the new domain, we would otherwise
404 * try to load CS from an invalid table.
405 */
406 gdt_l1e = l1e_from_page(virt_to_page(gdt_table), PAGE_HYPERVISOR);
407 for ( vcpuid = 0; vcpuid < MAX_VIRT_CPUS; vcpuid++ )
408 d->arch.mm_perdomain_pt[((vcpuid << GDT_LDT_VCPU_SHIFT) +
409 FIRST_RESERVED_GDT_PAGE)] = gdt_l1e;
411 #if defined(__i386__)
413 mapcache_init(d);
415 #else /* __x86_64__ */
417 if ( (pg = alloc_domheap_page(NULL)) == NULL )
418 goto fail;
419 d->arch.mm_perdomain_l2 = clear_page(page_to_virt(pg));
420 for ( i = 0; i < (1 << pdpt_order); i++ )
421 d->arch.mm_perdomain_l2[l2_table_offset(PERDOMAIN_VIRT_START)+i] =
422 l2e_from_page(virt_to_page(d->arch.mm_perdomain_pt)+i,
423 __PAGE_HYPERVISOR);
425 if ( (pg = alloc_domheap_page(NULL)) == NULL )
426 goto fail;
427 d->arch.mm_perdomain_l3 = clear_page(page_to_virt(pg));
428 d->arch.mm_perdomain_l3[l3_table_offset(PERDOMAIN_VIRT_START)] =
429 l3e_from_page(virt_to_page(d->arch.mm_perdomain_l2),
430 __PAGE_HYPERVISOR);
432 #endif /* __x86_64__ */
434 #ifdef CONFIG_COMPAT
435 HYPERVISOR_COMPAT_VIRT_START(d) = __HYPERVISOR_COMPAT_VIRT_START;
436 #endif
438 paging_domain_init(d);
440 if ( !is_idle_domain(d) )
441 {
442 d->arch.ioport_caps =
443 rangeset_new(d, "I/O Ports", RANGESETF_prettyprint_hex);
444 if ( d->arch.ioport_caps == NULL )
445 goto fail;
447 if ( (d->shared_info = alloc_xenheap_page()) == NULL )
448 goto fail;
450 memset(d->shared_info, 0, PAGE_SIZE);
451 share_xen_page_with_guest(
452 virt_to_page(d->shared_info), d, XENSHARE_writable);
453 }
455 return is_hvm_domain(d) ? hvm_domain_initialise(d) : 0;
457 fail:
458 free_xenheap_page(d->shared_info);
459 #ifdef __x86_64__
460 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
461 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
462 #endif
463 free_xenheap_pages(d->arch.mm_perdomain_pt, pdpt_order);
464 return rc;
465 }
467 void arch_domain_destroy(struct domain *d)
468 {
469 struct vcpu *v;
471 if ( is_hvm_domain(d) )
472 {
473 for_each_vcpu ( d, v )
474 hvm_vcpu_destroy(v);
475 hvm_domain_destroy(d);
476 }
478 paging_final_teardown(d);
480 free_xenheap_pages(
481 d->arch.mm_perdomain_pt,
482 get_order_from_bytes(PDPT_L1_ENTRIES * sizeof(l1_pgentry_t)));
484 #ifdef __x86_64__
485 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l2));
486 free_domheap_page(virt_to_page(d->arch.mm_perdomain_l3));
487 #endif
489 if ( IS_COMPAT(d) )
490 release_arg_xlat_area(d);
492 free_xenheap_page(d->shared_info);
493 }
495 /* This is called by arch_final_setup_guest and do_boot_vcpu */
496 int arch_set_info_guest(
497 struct vcpu *v, vcpu_guest_context_u c)
498 {
499 struct domain *d = v->domain;
500 unsigned long cr3_pfn = INVALID_MFN;
501 unsigned long flags;
502 int i, rc = 0, compat;
504 /* The context is a compat-mode one if the target domain is compat-mode;
505 * we expect the tools to DTRT even in compat-mode callers. */
506 compat = IS_COMPAT(d);
508 #ifdef CONFIG_COMPAT
509 #define c(fld) (compat ? (c.cmp->fld) : (c.nat->fld))
510 #else
511 #define c(fld) (c.nat->fld)
512 #endif
513 flags = c(flags);
515 if ( !is_hvm_vcpu(v) )
516 {
517 if ( !compat )
518 {
519 fixup_guest_stack_selector(d, c.nat->user_regs.ss);
520 fixup_guest_stack_selector(d, c.nat->kernel_ss);
521 fixup_guest_code_selector(d, c.nat->user_regs.cs);
522 #ifdef __i386__
523 fixup_guest_code_selector(d, c.nat->event_callback_cs);
524 fixup_guest_code_selector(d, c.nat->failsafe_callback_cs);
525 #endif
527 for ( i = 0; i < 256; i++ )
528 fixup_guest_code_selector(d, c.nat->trap_ctxt[i].cs);
530 /* LDT safety checks. */
531 if ( ((c.nat->ldt_base & (PAGE_SIZE-1)) != 0) ||
532 (c.nat->ldt_ents > 8192) ||
533 !array_access_ok(c.nat->ldt_base,
534 c.nat->ldt_ents,
535 LDT_ENTRY_SIZE) )
536 return -EINVAL;
537 }
538 #ifdef CONFIG_COMPAT
539 else
540 {
541 fixup_guest_stack_selector(d, c.cmp->user_regs.ss);
542 fixup_guest_stack_selector(d, c.cmp->kernel_ss);
543 fixup_guest_code_selector(d, c.cmp->user_regs.cs);
544 fixup_guest_code_selector(d, c.cmp->event_callback_cs);
545 fixup_guest_code_selector(d, c.cmp->failsafe_callback_cs);
547 for ( i = 0; i < 256; i++ )
548 fixup_guest_code_selector(d, c.cmp->trap_ctxt[i].cs);
550 /* LDT safety checks. */
551 if ( ((c.cmp->ldt_base & (PAGE_SIZE-1)) != 0) ||
552 (c.cmp->ldt_ents > 8192) ||
553 !compat_array_access_ok(c.cmp->ldt_base,
554 c.cmp->ldt_ents,
555 LDT_ENTRY_SIZE) )
556 return -EINVAL;
557 }
558 #endif
559 }
561 clear_bit(_VCPUF_fpu_initialised, &v->vcpu_flags);
562 if ( flags & VGCF_I387_VALID )
563 set_bit(_VCPUF_fpu_initialised, &v->vcpu_flags);
565 v->arch.flags &= ~TF_kernel_mode;
566 if ( (flags & VGCF_in_kernel) || is_hvm_vcpu(v)/*???*/ )
567 v->arch.flags |= TF_kernel_mode;
569 if ( !compat )
570 memcpy(&v->arch.guest_context, c.nat, sizeof(*c.nat));
571 #ifdef CONFIG_COMPAT
572 else
573 {
574 XLAT_vcpu_guest_context(&v->arch.guest_context, c.cmp);
575 }
576 #endif
578 /* Only CR0.TS is modifiable by guest or admin. */
579 v->arch.guest_context.ctrlreg[0] &= X86_CR0_TS;
580 v->arch.guest_context.ctrlreg[0] |= read_cr0() & ~X86_CR0_TS;
582 init_int80_direct_trap(v);
584 if ( !is_hvm_vcpu(v) )
585 {
586 /* IOPL privileges are virtualised. */
587 v->arch.iopl = (v->arch.guest_context.user_regs.eflags >> 12) & 3;
588 v->arch.guest_context.user_regs.eflags &= ~EF_IOPL;
590 /* Ensure real hardware interrupts are enabled. */
591 v->arch.guest_context.user_regs.eflags |= EF_IE;
592 }
593 else
594 {
595 hvm_load_cpu_guest_regs(v, &v->arch.guest_context.user_regs);
596 }
598 if ( test_bit(_VCPUF_initialised, &v->vcpu_flags) )
599 return 0;
601 memset(v->arch.guest_context.debugreg, 0,
602 sizeof(v->arch.guest_context.debugreg));
603 for ( i = 0; i < 8; i++ )
604 (void)set_debugreg(v, i, c(debugreg[i]));
606 if ( v->vcpu_id == 0 )
607 d->vm_assist = c(vm_assist);
609 if ( !is_hvm_vcpu(v) )
610 {
611 if ( !compat )
612 rc = (int)set_gdt(v, c.nat->gdt_frames, c.nat->gdt_ents);
613 #ifdef CONFIG_COMPAT
614 else
615 {
616 unsigned long gdt_frames[ARRAY_SIZE(c.cmp->gdt_frames)];
617 unsigned int i, n = (c.cmp->gdt_ents + 511) / 512;
619 if ( n > ARRAY_SIZE(c.cmp->gdt_frames) )
620 return -EINVAL;
621 for ( i = 0; i < n; ++i )
622 gdt_frames[i] = c.cmp->gdt_frames[i];
623 rc = (int)set_gdt(v, gdt_frames, c.cmp->gdt_ents);
624 }
625 #endif
626 if ( rc != 0 )
627 return rc;
629 if ( !compat )
630 {
631 cr3_pfn = gmfn_to_mfn(d, xen_cr3_to_pfn(c.nat->ctrlreg[3]));
633 if ( paging_mode_refcounts(d)
634 ? !get_page(mfn_to_page(cr3_pfn), d)
635 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
636 PGT_base_page_table) )
637 {
638 destroy_gdt(v);
639 return -EINVAL;
640 }
642 v->arch.guest_table = pagetable_from_pfn(cr3_pfn);
643 }
644 #ifdef CONFIG_COMPAT
645 else
646 {
647 l4_pgentry_t *l4tab;
649 cr3_pfn = gmfn_to_mfn(d, compat_cr3_to_pfn(c.cmp->ctrlreg[3]));
651 if ( paging_mode_refcounts(d)
652 ? !get_page(mfn_to_page(cr3_pfn), d)
653 : !get_page_and_type(mfn_to_page(cr3_pfn), d,
654 PGT_l3_page_table) )
655 {
656 destroy_gdt(v);
657 return -EINVAL;
658 }
660 l4tab = __va(pagetable_get_paddr(v->arch.guest_table));
661 *l4tab = l4e_from_pfn(cr3_pfn, _PAGE_PRESENT|_PAGE_RW|_PAGE_USER|_PAGE_ACCESSED);
662 }
663 #endif
664 }
666 if ( v->vcpu_id == 0 )
667 update_domain_wallclock_time(d);
669 /* Don't redo final setup */
670 set_bit(_VCPUF_initialised, &v->vcpu_flags);
672 if ( paging_mode_enabled(d) )
673 paging_update_paging_modes(v);
675 update_cr3(v);
677 return 0;
678 #undef c
679 }
681 int arch_vcpu_reset(struct vcpu *v)
682 {
683 destroy_gdt(v);
684 vcpu_destroy_pagetables(v);
685 return 0;
686 }
688 long
689 arch_do_vcpu_op(
690 int cmd, struct vcpu *v, XEN_GUEST_HANDLE(void) arg)
691 {
692 long rc = 0;
694 switch ( cmd )
695 {
696 case VCPUOP_register_runstate_memory_area:
697 {
698 struct vcpu_register_runstate_memory_area area;
699 struct vcpu_runstate_info runstate;
701 rc = -EFAULT;
702 if ( copy_from_guest(&area, arg, 1) )
703 break;
705 if ( !guest_handle_okay(area.addr.h, 1) )
706 break;
708 rc = 0;
709 runstate_guest(v) = area.addr.h;
711 if ( v == current )
712 {
713 __copy_to_guest(runstate_guest(v), &v->runstate, 1);
714 }
715 else
716 {
717 vcpu_runstate_get(v, &runstate);
718 __copy_to_guest(runstate_guest(v), &runstate, 1);
719 }
721 break;
722 }
724 default:
725 rc = -ENOSYS;
726 break;
727 }
729 return rc;
730 }
732 #ifdef __x86_64__
734 #define loadsegment(seg,value) ({ \
735 int __r = 1; \
736 __asm__ __volatile__ ( \
737 "1: movl %k1,%%" #seg "\n2:\n" \
738 ".section .fixup,\"ax\"\n" \
739 "3: xorl %k0,%k0\n" \
740 " movl %k0,%%" #seg "\n" \
741 " jmp 2b\n" \
742 ".previous\n" \
743 ".section __ex_table,\"a\"\n" \
744 " .align 8\n" \
745 " .quad 1b,3b\n" \
746 ".previous" \
747 : "=r" (__r) : "r" (value), "0" (__r) );\
748 __r; })
750 /*
751 * save_segments() writes a mask of segments which are dirty (non-zero),
752 * allowing load_segments() to avoid some expensive segment loads and
753 * MSR writes.
754 */
755 static DEFINE_PER_CPU(unsigned int, dirty_segment_mask);
756 #define DIRTY_DS 0x01
757 #define DIRTY_ES 0x02
758 #define DIRTY_FS 0x04
759 #define DIRTY_GS 0x08
760 #define DIRTY_FS_BASE 0x10
761 #define DIRTY_GS_BASE_USER 0x20
763 static void load_segments(struct vcpu *n)
764 {
765 struct vcpu_guest_context *nctxt = &n->arch.guest_context;
766 int all_segs_okay = 1;
767 unsigned int dirty_segment_mask, cpu = smp_processor_id();
769 /* Load and clear the dirty segment mask. */
770 dirty_segment_mask = per_cpu(dirty_segment_mask, cpu);
771 per_cpu(dirty_segment_mask, cpu) = 0;
773 /* Either selector != 0 ==> reload. */
774 if ( unlikely((dirty_segment_mask & DIRTY_DS) | nctxt->user_regs.ds) )
775 all_segs_okay &= loadsegment(ds, nctxt->user_regs.ds);
777 /* Either selector != 0 ==> reload. */
778 if ( unlikely((dirty_segment_mask & DIRTY_ES) | nctxt->user_regs.es) )
779 all_segs_okay &= loadsegment(es, nctxt->user_regs.es);
781 /*
782 * Either selector != 0 ==> reload.
783 * Also reload to reset FS_BASE if it was non-zero.
784 */
785 if ( unlikely((dirty_segment_mask & (DIRTY_FS | DIRTY_FS_BASE)) |
786 nctxt->user_regs.fs) )
787 all_segs_okay &= loadsegment(fs, nctxt->user_regs.fs);
789 /*
790 * Either selector != 0 ==> reload.
791 * Also reload to reset GS_BASE if it was non-zero.
792 */
793 if ( unlikely((dirty_segment_mask & (DIRTY_GS | DIRTY_GS_BASE_USER)) |
794 nctxt->user_regs.gs) )
795 {
796 /* Reset GS_BASE with user %gs? */
797 if ( (dirty_segment_mask & DIRTY_GS) || !nctxt->gs_base_user )
798 all_segs_okay &= loadsegment(gs, nctxt->user_regs.gs);
799 }
801 if ( !IS_COMPAT(n->domain) )
802 {
803 /* This can only be non-zero if selector is NULL. */
804 if ( nctxt->fs_base )
805 wrmsr(MSR_FS_BASE,
806 nctxt->fs_base,
807 nctxt->fs_base>>32);
809 /* Most kernels have non-zero GS base, so don't bother testing. */
810 /* (This is also a serialising instruction, avoiding AMD erratum #88.) */
811 wrmsr(MSR_SHADOW_GS_BASE,
812 nctxt->gs_base_kernel,
813 nctxt->gs_base_kernel>>32);
815 /* This can only be non-zero if selector is NULL. */
816 if ( nctxt->gs_base_user )
817 wrmsr(MSR_GS_BASE,
818 nctxt->gs_base_user,
819 nctxt->gs_base_user>>32);
821 /* If in kernel mode then switch the GS bases around. */
822 if ( (n->arch.flags & TF_kernel_mode) )
823 __asm__ __volatile__ ( "swapgs" );
824 }
826 if ( unlikely(!all_segs_okay) )
827 {
828 struct cpu_user_regs *regs = guest_cpu_user_regs();
829 unsigned long *rsp =
830 (n->arch.flags & TF_kernel_mode) ?
831 (unsigned long *)regs->rsp :
832 (unsigned long *)nctxt->kernel_sp;
833 unsigned long cs_and_mask, rflags;
835 if ( IS_COMPAT(n->domain) )
836 {
837 unsigned int *esp = ring_1(regs) ?
838 (unsigned int *)regs->rsp :
839 (unsigned int *)nctxt->kernel_sp;
840 unsigned int cs_and_mask, eflags;
841 int ret = 0;
843 /* CS longword also contains full evtchn_upcall_mask. */
844 cs_and_mask = (unsigned short)regs->cs |
845 ((unsigned int)vcpu_info(n, evtchn_upcall_mask) << 16);
846 /* Fold upcall mask into RFLAGS.IF. */
847 eflags = regs->_eflags & ~X86_EFLAGS_IF;
848 eflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
850 if ( !ring_1(regs) )
851 {
852 ret = put_user(regs->ss, esp-1);
853 ret |= put_user(regs->_esp, esp-2);
854 esp -= 2;
855 }
857 if ( ret |
858 put_user(eflags, esp-1) |
859 put_user(cs_and_mask, esp-2) |
860 put_user(regs->_eip, esp-3) |
861 put_user(nctxt->user_regs.gs, esp-4) |
862 put_user(nctxt->user_regs.fs, esp-5) |
863 put_user(nctxt->user_regs.es, esp-6) |
864 put_user(nctxt->user_regs.ds, esp-7) )
865 {
866 gdprintk(XENLOG_ERR, "Error while creating compat "
867 "failsafe callback frame.\n");
868 domain_crash(n->domain);
869 }
871 if ( test_bit(_VGCF_failsafe_disables_events,
872 &n->arch.guest_context.flags) )
873 vcpu_info(n, evtchn_upcall_mask) = 1;
875 regs->entry_vector = TRAP_syscall;
876 regs->_eflags &= 0xFFFCBEFFUL;
877 regs->ss = FLAT_COMPAT_KERNEL_SS;
878 regs->_esp = (unsigned long)(esp-7);
879 regs->cs = FLAT_COMPAT_KERNEL_CS;
880 regs->_eip = nctxt->failsafe_callback_eip;
881 return;
882 }
884 if ( !(n->arch.flags & TF_kernel_mode) )
885 toggle_guest_mode(n);
886 else
887 regs->cs &= ~3;
889 /* CS longword also contains full evtchn_upcall_mask. */
890 cs_and_mask = (unsigned long)regs->cs |
891 ((unsigned long)vcpu_info(n, evtchn_upcall_mask) << 32);
893 /* Fold upcall mask into RFLAGS.IF. */
894 rflags = regs->rflags & ~X86_EFLAGS_IF;
895 rflags |= !vcpu_info(n, evtchn_upcall_mask) << 9;
897 if ( put_user(regs->ss, rsp- 1) |
898 put_user(regs->rsp, rsp- 2) |
899 put_user(rflags, rsp- 3) |
900 put_user(cs_and_mask, rsp- 4) |
901 put_user(regs->rip, rsp- 5) |
902 put_user(nctxt->user_regs.gs, rsp- 6) |
903 put_user(nctxt->user_regs.fs, rsp- 7) |
904 put_user(nctxt->user_regs.es, rsp- 8) |
905 put_user(nctxt->user_regs.ds, rsp- 9) |
906 put_user(regs->r11, rsp-10) |
907 put_user(regs->rcx, rsp-11) )
908 {
909 gdprintk(XENLOG_ERR, "Error while creating failsafe "
910 "callback frame.\n");
911 domain_crash(n->domain);
912 }
914 if ( test_bit(_VGCF_failsafe_disables_events,
915 &n->arch.guest_context.flags) )
916 vcpu_info(n, evtchn_upcall_mask) = 1;
918 regs->entry_vector = TRAP_syscall;
919 regs->rflags &= ~(X86_EFLAGS_AC|X86_EFLAGS_VM|X86_EFLAGS_RF|
920 X86_EFLAGS_NT|X86_EFLAGS_TF);
921 regs->ss = FLAT_KERNEL_SS;
922 regs->rsp = (unsigned long)(rsp-11);
923 regs->cs = FLAT_KERNEL_CS;
924 regs->rip = nctxt->failsafe_callback_eip;
925 }
926 }
928 static void save_segments(struct vcpu *v)
929 {
930 struct vcpu_guest_context *ctxt = &v->arch.guest_context;
931 struct cpu_user_regs *regs = &ctxt->user_regs;
932 unsigned int dirty_segment_mask = 0;
934 regs->ds = read_segment_register(ds);
935 regs->es = read_segment_register(es);
936 regs->fs = read_segment_register(fs);
937 regs->gs = read_segment_register(gs);
939 if ( regs->ds )
940 dirty_segment_mask |= DIRTY_DS;
942 if ( regs->es )
943 dirty_segment_mask |= DIRTY_ES;
945 if ( regs->fs || IS_COMPAT(v->domain) )
946 {
947 dirty_segment_mask |= DIRTY_FS;
948 ctxt->fs_base = 0; /* != 0 selector kills fs_base */
949 }
950 else if ( ctxt->fs_base )
951 {
952 dirty_segment_mask |= DIRTY_FS_BASE;
953 }
955 if ( regs->gs || IS_COMPAT(v->domain) )
956 {
957 dirty_segment_mask |= DIRTY_GS;
958 ctxt->gs_base_user = 0; /* != 0 selector kills gs_base_user */
959 }
960 else if ( ctxt->gs_base_user )
961 {
962 dirty_segment_mask |= DIRTY_GS_BASE_USER;
963 }
965 this_cpu(dirty_segment_mask) = dirty_segment_mask;
966 }
968 #define switch_kernel_stack(v) ((void)0)
970 #elif defined(__i386__)
972 #define load_segments(n) ((void)0)
973 #define save_segments(p) ((void)0)
975 static inline void switch_kernel_stack(struct vcpu *v)
976 {
977 struct tss_struct *tss = &init_tss[smp_processor_id()];
978 tss->esp1 = v->arch.guest_context.kernel_sp;
979 tss->ss1 = v->arch.guest_context.kernel_ss;
980 }
982 #endif /* __i386__ */
984 static void paravirt_ctxt_switch_from(struct vcpu *v)
985 {
986 save_segments(v);
987 }
989 static void paravirt_ctxt_switch_to(struct vcpu *v)
990 {
991 set_int80_direct_trap(v);
992 switch_kernel_stack(v);
993 }
995 #define loaddebug(_v,_reg) \
996 __asm__ __volatile__ ("mov %0,%%db" #_reg : : "r" ((_v)->debugreg[_reg]))
998 static void __context_switch(void)
999 {
1000 struct cpu_user_regs *stack_regs = guest_cpu_user_regs();
1001 unsigned int cpu = smp_processor_id();
1002 struct vcpu *p = per_cpu(curr_vcpu, cpu);
1003 struct vcpu *n = current;
1005 ASSERT(p != n);
1006 ASSERT(cpus_empty(n->vcpu_dirty_cpumask));
1008 if ( !is_idle_vcpu(p) )
1010 memcpy(&p->arch.guest_context.user_regs,
1011 stack_regs,
1012 CTXT_SWITCH_STACK_BYTES);
1013 unlazy_fpu(p);
1014 p->arch.ctxt_switch_from(p);
1017 if ( !is_idle_vcpu(n) )
1019 memcpy(stack_regs,
1020 &n->arch.guest_context.user_regs,
1021 CTXT_SWITCH_STACK_BYTES);
1023 /* Maybe switch the debug registers. */
1024 if ( unlikely(n->arch.guest_context.debugreg[7]) )
1026 loaddebug(&n->arch.guest_context, 0);
1027 loaddebug(&n->arch.guest_context, 1);
1028 loaddebug(&n->arch.guest_context, 2);
1029 loaddebug(&n->arch.guest_context, 3);
1030 /* no 4 and 5 */
1031 loaddebug(&n->arch.guest_context, 6);
1032 loaddebug(&n->arch.guest_context, 7);
1034 n->arch.ctxt_switch_to(n);
1037 if ( p->domain != n->domain )
1038 cpu_set(cpu, n->domain->domain_dirty_cpumask);
1039 cpu_set(cpu, n->vcpu_dirty_cpumask);
1041 write_ptbase(n);
1043 if ( p->vcpu_id != n->vcpu_id )
1045 char gdt_load[10];
1046 *(unsigned short *)(&gdt_load[0]) = LAST_RESERVED_GDT_BYTE;
1047 *(unsigned long *)(&gdt_load[2]) = GDT_VIRT_START(n);
1048 __asm__ __volatile__ ( "lgdt %0" : "=m" (gdt_load) );
1051 if ( p->domain != n->domain )
1052 cpu_clear(cpu, p->domain->domain_dirty_cpumask);
1053 cpu_clear(cpu, p->vcpu_dirty_cpumask);
1055 per_cpu(curr_vcpu, cpu) = n;
1059 void context_switch(struct vcpu *prev, struct vcpu *next)
1061 unsigned int cpu = smp_processor_id();
1062 cpumask_t dirty_mask = next->vcpu_dirty_cpumask;
1064 ASSERT(local_irq_is_enabled());
1066 /* Allow at most one CPU at a time to be dirty. */
1067 ASSERT(cpus_weight(dirty_mask) <= 1);
1068 if ( unlikely(!cpu_isset(cpu, dirty_mask) && !cpus_empty(dirty_mask)) )
1070 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1071 if ( !cpus_empty(next->vcpu_dirty_cpumask) )
1072 flush_tlb_mask(next->vcpu_dirty_cpumask);
1075 local_irq_disable();
1077 if ( is_hvm_vcpu(prev) && !list_empty(&prev->arch.hvm_vcpu.tm_list) )
1078 pt_freeze_time(prev);
1080 set_current(next);
1082 if ( (per_cpu(curr_vcpu, cpu) == next) || is_idle_vcpu(next) )
1084 local_irq_enable();
1086 else
1088 __context_switch();
1090 #ifdef CONFIG_COMPAT
1091 if ( is_idle_vcpu(prev)
1092 || IS_COMPAT(prev->domain) != IS_COMPAT(next->domain) )
1094 uint32_t efer_lo, efer_hi;
1096 local_flush_tlb_one(GDT_VIRT_START(next) + FIRST_RESERVED_GDT_BYTE);
1098 rdmsr(MSR_EFER, efer_lo, efer_hi);
1099 if ( !IS_COMPAT(next->domain) == !(efer_lo & EFER_SCE) )
1101 efer_lo ^= EFER_SCE;
1102 wrmsr(MSR_EFER, efer_lo, efer_hi);
1105 #endif
1107 /* Re-enable interrupts before restoring state which may fault. */
1108 local_irq_enable();
1110 if ( !is_hvm_vcpu(next) )
1112 load_LDT(next);
1113 load_segments(next);
1117 context_saved(prev);
1119 /* Update per-VCPU guest runstate shared memory area (if registered). */
1120 if ( !guest_handle_is_null(runstate_guest(next)) )
1122 if ( !IS_COMPAT(next->domain) )
1123 __copy_to_guest(runstate_guest(next), &next->runstate, 1);
1124 #ifdef CONFIG_COMPAT
1125 else
1127 struct compat_vcpu_runstate_info info;
1129 XLAT_vcpu_runstate_info(&info, &next->runstate);
1130 __copy_to_guest(next->runstate_guest.compat, &info, 1);
1132 #endif
1135 schedule_tail(next);
1136 BUG();
1139 void continue_running(struct vcpu *same)
1141 schedule_tail(same);
1142 BUG();
1145 int __sync_lazy_execstate(void)
1147 unsigned long flags;
1148 int switch_required;
1150 local_irq_save(flags);
1152 switch_required = (this_cpu(curr_vcpu) != current);
1154 if ( switch_required )
1156 ASSERT(current == idle_vcpu[smp_processor_id()]);
1157 __context_switch();
1160 local_irq_restore(flags);
1162 return switch_required;
1165 void sync_vcpu_execstate(struct vcpu *v)
1167 if ( cpu_isset(smp_processor_id(), v->vcpu_dirty_cpumask) )
1168 (void)__sync_lazy_execstate();
1170 /* Other cpus call __sync_lazy_execstate from flush ipi handler. */
1171 flush_tlb_mask(v->vcpu_dirty_cpumask);
1174 #define next_arg(fmt, args) ({ \
1175 unsigned long __arg; \
1176 switch ( *(fmt)++ ) \
1177 { \
1178 case 'i': __arg = (unsigned long)va_arg(args, unsigned int); break; \
1179 case 'l': __arg = (unsigned long)va_arg(args, unsigned long); break; \
1180 case 'h': __arg = (unsigned long)va_arg(args, void *); break; \
1181 default: __arg = 0; BUG(); \
1182 } \
1183 __arg; \
1184 })
1186 unsigned long hypercall_create_continuation(
1187 unsigned int op, const char *format, ...)
1189 struct mc_state *mcs = &this_cpu(mc_state);
1190 struct cpu_user_regs *regs;
1191 const char *p = format;
1192 unsigned long arg;
1193 unsigned int i;
1194 va_list args;
1196 va_start(args, format);
1198 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1200 __set_bit(_MCSF_call_preempted, &mcs->flags);
1202 for ( i = 0; *p != '\0'; i++ )
1203 mcs->call.args[i] = next_arg(p, args);
1204 if ( IS_COMPAT(current->domain) )
1206 for ( ; i < 6; i++ )
1207 mcs->call.args[i] = 0;
1210 else
1212 regs = guest_cpu_user_regs();
1213 regs->eax = op;
1214 regs->eip -= 2; /* re-execute 'syscall' / 'int 0x82' */
1216 #ifdef __x86_64__
1217 if ( !IS_COMPAT(current->domain) )
1219 for ( i = 0; *p != '\0'; i++ )
1221 arg = next_arg(p, args);
1222 switch ( i )
1224 case 0: regs->rdi = arg; break;
1225 case 1: regs->rsi = arg; break;
1226 case 2: regs->rdx = arg; break;
1227 case 3: regs->r10 = arg; break;
1228 case 4: regs->r8 = arg; break;
1229 case 5: regs->r9 = arg; break;
1233 else
1234 #endif
1236 if ( supervisor_mode_kernel || is_hvm_vcpu(current) )
1237 regs->eip &= ~31; /* re-execute entire hypercall entry stub */
1239 for ( i = 0; *p != '\0'; i++ )
1241 arg = next_arg(p, args);
1242 switch ( i )
1244 case 0: regs->ebx = arg; break;
1245 case 1: regs->ecx = arg; break;
1246 case 2: regs->edx = arg; break;
1247 case 3: regs->esi = arg; break;
1248 case 4: regs->edi = arg; break;
1249 case 5: regs->ebp = arg; break;
1255 va_end(args);
1257 return op;
1260 #ifdef CONFIG_COMPAT
1261 int hypercall_xlat_continuation(unsigned int *id, unsigned int mask, ...)
1263 int rc = 0;
1264 struct mc_state *mcs = &this_cpu(mc_state);
1265 struct cpu_user_regs *regs;
1266 unsigned int i, cval = 0;
1267 unsigned long nval = 0;
1268 va_list args;
1270 BUG_ON(*id > 5);
1271 BUG_ON(mask & (1U << *id));
1273 va_start(args, mask);
1275 if ( test_bit(_MCSF_in_multicall, &mcs->flags) )
1277 if ( !test_bit(_MCSF_call_preempted, &mcs->flags) )
1278 return 0;
1279 for ( i = 0; i < 6; ++i, mask >>= 1 )
1281 if ( mask & 1 )
1283 nval = va_arg(args, unsigned long);
1284 cval = va_arg(args, unsigned int);
1285 if ( cval == nval )
1286 mask &= ~1U;
1287 else
1288 BUG_ON(nval == (unsigned int)nval);
1290 else if ( id && *id == i )
1292 *id = mcs->call.args[i];
1293 id = NULL;
1295 if ( (mask & 1) && mcs->call.args[i] == nval )
1296 ++rc;
1297 else
1299 cval = mcs->call.args[i];
1300 BUG_ON(mcs->call.args[i] != cval);
1302 mcs->compat_call.args[i] = cval;
1305 else
1307 regs = guest_cpu_user_regs();
1308 for ( i = 0; i < 6; ++i, mask >>= 1 )
1310 unsigned long *reg;
1312 switch ( i )
1314 case 0: reg = &regs->ebx; break;
1315 case 1: reg = &regs->ecx; break;
1316 case 2: reg = &regs->edx; break;
1317 case 3: reg = &regs->esi; break;
1318 case 4: reg = &regs->edi; break;
1319 case 5: reg = &regs->ebp; break;
1320 default: BUG(); reg = NULL; break;
1322 if ( (mask & 1) )
1324 nval = va_arg(args, unsigned long);
1325 cval = va_arg(args, unsigned int);
1326 if ( cval == nval )
1327 mask &= ~1U;
1328 else
1329 BUG_ON(nval == (unsigned int)nval);
1331 else if ( id && *id == i )
1333 *id = *reg;
1334 id = NULL;
1336 if ( (mask & 1) && *reg == nval )
1338 *reg = cval;
1339 ++rc;
1341 else
1342 BUG_ON(*reg != (unsigned int)*reg);
1346 va_end(args);
1348 return rc;
1350 #endif
1352 static void relinquish_memory(struct domain *d, struct list_head *list)
1354 struct list_head *ent;
1355 struct page_info *page;
1356 unsigned long x, y;
1358 /* Use a recursive lock, as we may enter 'free_domheap_page'. */
1359 spin_lock_recursive(&d->page_alloc_lock);
1361 ent = list->next;
1362 while ( ent != list )
1364 page = list_entry(ent, struct page_info, list);
1366 /* Grab a reference to the page so it won't disappear from under us. */
1367 if ( unlikely(!get_page(page, d)) )
1369 /* Couldn't get a reference -- someone is freeing this page. */
1370 ent = ent->next;
1371 continue;
1374 if ( test_and_clear_bit(_PGT_pinned, &page->u.inuse.type_info) )
1375 put_page_and_type(page);
1377 if ( test_and_clear_bit(_PGC_allocated, &page->count_info) )
1378 put_page(page);
1380 /*
1381 * Forcibly invalidate base page tables at this point to break circular
1382 * 'linear page table' references. This is okay because MMU structures
1383 * are not shared across domains and this domain is now dead. Thus base
1384 * tables are not in use so a non-zero count means circular reference.
1385 */
1386 y = page->u.inuse.type_info;
1387 for ( ; ; )
1389 x = y;
1390 if ( likely((x & (PGT_type_mask|PGT_validated)) !=
1391 (PGT_base_page_table|PGT_validated)) )
1392 break;
1394 y = cmpxchg(&page->u.inuse.type_info, x, x & ~PGT_validated);
1395 if ( likely(y == x) )
1397 free_page_type(page, PGT_base_page_table);
1398 break;
1402 /* Follow the list chain and /then/ potentially free the page. */
1403 ent = ent->next;
1404 put_page(page);
1407 spin_unlock_recursive(&d->page_alloc_lock);
1410 static void vcpu_destroy_pagetables(struct vcpu *v)
1412 struct domain *d = v->domain;
1413 unsigned long pfn;
1415 #ifdef CONFIG_COMPAT
1416 if ( IS_COMPAT(d) )
1418 if ( is_hvm_vcpu(v) )
1419 pfn = pagetable_get_pfn(v->arch.guest_table);
1420 else
1421 pfn = l4e_get_pfn(*(l4_pgentry_t *)
1422 __va(pagetable_get_paddr(v->arch.guest_table)));
1424 if ( pfn != 0 )
1426 if ( paging_mode_refcounts(d) )
1427 put_page(mfn_to_page(pfn));
1428 else
1429 put_page_and_type(mfn_to_page(pfn));
1432 if ( is_hvm_vcpu(v) )
1433 v->arch.guest_table = pagetable_null();
1434 else
1435 l4e_write(
1436 (l4_pgentry_t *) __va(pagetable_get_paddr(v->arch.guest_table)),
1437 l4e_empty());
1439 v->arch.cr3 = 0;
1440 return;
1442 #endif
1444 pfn = pagetable_get_pfn(v->arch.guest_table);
1445 if ( pfn != 0 )
1447 if ( paging_mode_refcounts(d) )
1448 put_page(mfn_to_page(pfn));
1449 else
1450 put_page_and_type(mfn_to_page(pfn));
1451 #ifdef __x86_64__
1452 if ( pfn == pagetable_get_pfn(v->arch.guest_table_user) )
1453 v->arch.guest_table_user = pagetable_null();
1454 #endif
1455 v->arch.guest_table = pagetable_null();
1458 #ifdef __x86_64__
1459 /* Drop ref to guest_table_user (from MMUEXT_NEW_USER_BASEPTR) */
1460 pfn = pagetable_get_pfn(v->arch.guest_table_user);
1461 if ( pfn != 0 )
1463 if ( paging_mode_refcounts(d) )
1464 put_page(mfn_to_page(pfn));
1465 else
1466 put_page_and_type(mfn_to_page(pfn));
1467 v->arch.guest_table_user = pagetable_null();
1469 #endif
1471 v->arch.cr3 = 0;
1474 void domain_relinquish_resources(struct domain *d)
1476 struct vcpu *v;
1478 BUG_ON(!cpus_empty(d->domain_dirty_cpumask));
1480 /* Drop the in-use references to page-table bases. */
1481 for_each_vcpu ( d, v )
1482 vcpu_destroy_pagetables(v);
1484 /* Tear down paging-assistance stuff. */
1485 paging_teardown(d);
1487 /*
1488 * Relinquish GDT mappings. No need for explicit unmapping of the LDT as
1489 * it automatically gets squashed when the guest's mappings go away.
1490 */
1491 for_each_vcpu(d, v)
1492 destroy_gdt(v);
1494 /* Relinquish every page of memory. */
1495 relinquish_memory(d, &d->xenpage_list);
1496 relinquish_memory(d, &d->page_list);
1498 /* Free page used by xen oprofile buffer */
1499 free_xenoprof_pages(d);
1502 void arch_dump_domain_info(struct domain *d)
1504 paging_dump_domain_info(d);
1507 void arch_dump_vcpu_info(struct vcpu *v)
1509 paging_dump_vcpu_info(v);
1512 /*
1513 * Local variables:
1514 * mode: C
1515 * c-set-style: "BSD"
1516 * c-basic-offset: 4
1517 * tab-width: 4
1518 * indent-tabs-mode: nil
1519 * End:
1520 */