ia64/xen-unstable

view linux-2.6-xen-sparse/arch/xen/x86_64/kernel/setup64.c @ 6432:b54144915ae6

merge?
author cl349@firebug.cl.cam.ac.uk
date Thu Aug 25 16:26:30 2005 +0000 (2005-08-25)
parents 3428d58a85e1 8d31f9a9c423
children 0610add7c3fe
line source
1 /*
2 * X86-64 specific CPU setup.
3 * Copyright (C) 1995 Linus Torvalds
4 * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
5 * See setup.c for older changelog.
6 * $Id: setup64.c,v 1.12 2002/03/21 10:09:17 ak Exp $
7 *
8 * Jun Nakajima <jun.nakajima@intel.com>
9 * Modified for Xen
10 *
11 */
12 #include <linux/config.h>
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/string.h>
17 #include <linux/bootmem.h>
18 #include <linux/bitops.h>
19 #include <asm/bootsetup.h>
20 #include <asm/pda.h>
21 #include <asm/pgtable.h>
22 #include <asm/processor.h>
23 #include <asm/desc.h>
24 #include <asm/atomic.h>
25 #include <asm/mmu_context.h>
26 #include <asm/smp.h>
27 #include <asm/i387.h>
28 #include <asm/percpu.h>
29 #include <asm/mtrr.h>
30 #include <asm/proto.h>
31 #include <asm/mman.h>
32 #include <asm/numa.h>
33 #ifdef CONFIG_XEN
34 #include <asm-xen/hypervisor.h>
35 #endif
36 char x86_boot_params[BOOT_PARAM_SIZE] __initdata = {0,};
38 cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
40 struct x8664_pda cpu_pda[NR_CPUS] __cacheline_aligned;
42 extern struct task_struct init_task;
44 extern unsigned char __per_cpu_start[], __per_cpu_end[];
46 extern struct desc_ptr cpu_gdt_descr[];
47 struct desc_ptr idt_descr = { 256 * 16, (unsigned long) idt_table };
49 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
51 unsigned long __supported_pte_mask = ~0UL;
52 static int do_not_nx __initdata = 0;
54 /* noexec=on|off
55 Control non executable mappings for 64bit processes.
57 on Enable(default)
58 off Disable
59 */
60 int __init nonx_setup(char *str)
61 {
62 if (!strncmp(str, "on", 2)) {
63 __supported_pte_mask |= _PAGE_NX;
64 do_not_nx = 0;
65 } else if (!strncmp(str, "off", 3)) {
66 do_not_nx = 1;
67 __supported_pte_mask &= ~_PAGE_NX;
68 }
69 return 0;
70 }
71 __setup("noexec=", nonx_setup); /* parsed early actually */
73 int force_personality32 = READ_IMPLIES_EXEC;
75 /* noexec32=on|off
76 Control non executable heap for 32bit processes.
77 To control the stack too use noexec=off
79 on PROT_READ does not imply PROT_EXEC for 32bit processes
80 off PROT_READ implies PROT_EXEC (default)
81 */
82 static int __init nonx32_setup(char *str)
83 {
84 if (!strcmp(str, "on"))
85 force_personality32 &= ~READ_IMPLIES_EXEC;
86 else if (!strcmp(str, "off"))
87 force_personality32 |= READ_IMPLIES_EXEC;
88 return 0;
89 }
90 __setup("noexec32=", nonx32_setup);
92 /*
93 * Great future plan:
94 * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
95 * Always point %gs to its beginning
96 */
97 void __init setup_per_cpu_areas(void)
98 {
99 int i;
100 unsigned long size;
102 /* Copy section for each CPU (we discard the original) */
103 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
104 #ifdef CONFIG_MODULES
105 if (size < PERCPU_ENOUGH_ROOM)
106 size = PERCPU_ENOUGH_ROOM;
107 #endif
109 for (i = 0; i < NR_CPUS; i++) {
110 unsigned char *ptr;
112 if (!NODE_DATA(cpu_to_node(i))) {
113 printk("cpu with no node %d, num_online_nodes %d\n",
114 i, num_online_nodes());
115 ptr = alloc_bootmem(size);
116 } else {
117 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
118 }
119 if (!ptr)
120 panic("Cannot allocate cpu data for CPU %d\n", i);
121 cpu_pda[i].data_offset = ptr - __per_cpu_start;
122 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
123 }
124 }
126 #ifdef CONFIG_XEN
127 static void switch_pt(void)
128 {
129 xen_pt_switch(__pa(init_level4_pgt));
130 xen_new_user_pt(__pa(init_level4_user_pgt));
131 }
133 void __init cpu_gdt_init(struct desc_ptr *gdt_descr)
134 {
135 unsigned long frames[16];
136 unsigned long va;
137 int f;
139 for (va = gdt_descr->address, f = 0;
140 va < gdt_descr->address + gdt_descr->size;
141 va += PAGE_SIZE, f++) {
142 frames[f] = virt_to_mfn(va);
143 make_page_readonly((void *)va);
144 }
145 if (HYPERVISOR_set_gdt(frames, gdt_descr->size /
146 sizeof (struct desc_struct)))
147 BUG();
148 }
149 #else
150 static void switch_pt(void)
151 {
152 asm volatile("movq %0,%%cr3" :: "r" (__pa_symbol(&init_level4_pgt)));
153 }
155 void __init cpu_gdt_init(struct desc_ptr *gdt_descr)
156 {
157 #ifdef CONFIG_SMP
158 int cpu = stack_smp_processor_id();
159 #else
160 int cpu = smp_processor_id();
161 #endif
163 asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
164 asm volatile("lidt %0" :: "m" (idt_descr));
165 }
166 #endif
169 void pda_init(int cpu)
170 {
171 struct x8664_pda *pda = &cpu_pda[cpu];
173 /* Setup up data that may be needed in __get_free_pages early */
174 asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
175 #ifndef CONFIG_XEN
176 wrmsrl(MSR_GS_BASE, cpu_pda + cpu);
177 #else
178 HYPERVISOR_set_segment_base(SEGBASE_GS_KERNEL,
179 (unsigned long)(cpu_pda + cpu));
180 #endif
181 pda->me = pda;
182 pda->cpunumber = cpu;
183 pda->irqcount = -1;
184 pda->kernelstack =
185 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
186 pda->active_mm = &init_mm;
187 pda->mmu_state = 0;
189 if (cpu == 0) {
190 #ifdef CONFIG_XEN
191 xen_init_pt();
192 #endif
193 /* others are initialized in smpboot.c */
194 pda->pcurrent = &init_task;
195 pda->irqstackptr = boot_cpu_stack;
196 } else {
197 pda->irqstackptr = (char *)
198 __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
199 if (!pda->irqstackptr)
200 panic("cannot allocate irqstack for cpu %d", cpu);
201 }
203 switch_pt();
204 pda->irqstackptr += IRQSTACKSIZE-64;
205 }
207 char boot_exception_stacks[N_EXCEPTION_STACKS * EXCEPTION_STKSZ]
208 __attribute__((section(".bss.page_aligned")));
210 /* May not be marked __init: used by software suspend */
211 void syscall_init(void)
212 {
213 #ifndef CONFIG_XEN
214 /*
215 * LSTAR and STAR live in a bit strange symbiosis.
216 * They both write to the same internal register. STAR allows to set CS/DS
217 * but only a 32bit target. LSTAR sets the 64bit rip.
218 */
219 wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
220 wrmsrl(MSR_LSTAR, system_call);
222 /* Flags to clear on syscall */
223 wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
224 #endif
225 #ifdef CONFIG_IA32_EMULATION
226 syscall32_cpu_init ();
227 #endif
228 }
230 void __init check_efer(void)
231 {
232 unsigned long efer;
234 rdmsrl(MSR_EFER, efer);
235 if (!(efer & EFER_NX) || do_not_nx) {
236 __supported_pte_mask &= ~_PAGE_NX;
237 }
238 }
240 /*
241 * cpu_init() initializes state that is per-CPU. Some data is already
242 * initialized (naturally) in the bootstrap process, such as the GDT
243 * and IDT. We reload them nevertheless, this function acts as a
244 * 'CPU state barrier', nothing should get across.
245 * A lot of state is already set up in PDA init.
246 */
247 void __init cpu_init (void)
248 {
249 #ifdef CONFIG_SMP
250 int cpu = stack_smp_processor_id();
251 #else
252 int cpu = smp_processor_id();
253 #endif
254 struct tss_struct *t = &per_cpu(init_tss, cpu);
255 unsigned long v;
256 char *estacks = NULL;
257 struct task_struct *me;
258 int i;
260 /* CPU 0 is initialised in head64.c */
261 if (cpu != 0) {
262 pda_init(cpu);
263 } else
264 estacks = boot_exception_stacks;
266 me = current;
268 if (cpu_test_and_set(cpu, cpu_initialized))
269 panic("CPU#%d already initialized!\n", cpu);
271 printk("Initializing CPU#%d\n", cpu);
273 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
275 /*
276 * Initialize the per-CPU GDT with the boot GDT,
277 * and set up the GDT descriptor:
278 */
279 #ifndef CONFIG_XEN
280 if (cpu) {
281 memcpy(cpu_gdt_table[cpu], cpu_gdt_table[0], GDT_SIZE);
282 }
284 cpu_gdt_descr[cpu].size = GDT_SIZE;
285 cpu_gdt_descr[cpu].address = (unsigned long)cpu_gdt_table[cpu];
287 memcpy(me->thread.tls_array, cpu_gdt_table[cpu], GDT_ENTRY_TLS_ENTRIES * 8);
288 #else
289 memcpy(me->thread.tls_array, &get_cpu_gdt_table(cpu)[GDT_ENTRY_TLS_MIN],
290 GDT_ENTRY_TLS_ENTRIES * 8);
292 cpu_gdt_init(&cpu_gdt_descr[cpu]);
293 #endif
295 /*
296 * Delete NT
297 */
299 asm volatile("pushfq ; popq %%rax ; btr $14,%%rax ; pushq %%rax ; popfq" ::: "eax");
301 syscall_init();
303 wrmsrl(MSR_FS_BASE, 0);
304 wrmsrl(MSR_KERNEL_GS_BASE, 0);
305 barrier();
307 check_efer();
309 /*
310 * set up and load the per-CPU TSS
311 */
312 for (v = 0; v < N_EXCEPTION_STACKS; v++) {
313 if (cpu) {
314 estacks = (char *)__get_free_pages(GFP_ATOMIC,
315 EXCEPTION_STACK_ORDER);
316 if (!estacks)
317 panic("Cannot allocate exception stack %ld %d\n",
318 v, cpu);
319 }
320 estacks += EXCEPTION_STKSZ;
321 t->ist[v] = (unsigned long)estacks;
322 }
324 t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
325 /*
326 * <= is required because the CPU will access up to
327 * 8 bits beyond the end of the IO permission bitmap.
328 */
329 for (i = 0; i <= IO_BITMAP_LONGS; i++)
330 t->io_bitmap[i] = ~0UL;
332 atomic_inc(&init_mm.mm_count);
333 me->active_mm = &init_mm;
334 if (me->mm)
335 BUG();
336 enter_lazy_tlb(&init_mm, me);
338 #ifndef CONFIG_XEN
339 set_tss_desc(cpu, t);
340 load_TR_desc();
341 #endif
342 load_LDT(&init_mm.context);
344 /*
345 * Clear all 6 debug registers:
346 */
348 set_debug(0UL, 0);
349 set_debug(0UL, 1);
350 set_debug(0UL, 2);
351 set_debug(0UL, 3);
352 set_debug(0UL, 6);
353 set_debug(0UL, 7);
355 fpu_init();
356 }