ia64/xen-unstable

view extras/mini-os/arch/ia64/__udivdi3.S @ 13907:ac18d251df63

[IA64][MINIOS] Port of mini-os to ia64

ia64 specific parts of mini-os.

Minimal config:

# Kernel image file.
kernel = "mini-os.gz"
# Initial memory allocation (in megabytes) for the new domain.
memory = 64
# A name for your domain.
name = "Mini-OS"

Signed-off-by: Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
author awilliam@xenbuild2.aw
date Thu Feb 15 13:13:36 2007 -0700 (2007-02-15)
parents
children
line source
1 .file "__udivdi3.s"
3 // $FreeBSD: src/sys/libkern/ia64/__udivdi3.S,v 1.1 2000/10/04 17:53:03 dfr Exp $
4 //
5 // Copyright (c) 2000, Intel Corporation
6 // All rights reserved.
7 //
8 // Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache,
9 // Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab,
10 // Intel Corporation.
11 //
12 // WARRANTY DISCLAIMER
13 //
14 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
15 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
16 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
17 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
18 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
21 // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
22 // OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
23 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 //
26 // Intel Corporation is the author of this code, and requests that all
27 // problem reports or change requests be submitted to it directly at
28 // http://developer.intel.com/opensource.
29 //
31 .section .text
32 .proc __udivdi3#
33 .align 32
34 .global __udivdi3#
35 .align 32
37 // 64-bit unsigned integer divide
39 __udivdi3:
41 { .mii
42 alloc r31=ar.pfs,2,0,0,0
43 nop.i 0
44 nop.i 0;;
45 }
47 { .mmi
49 // 64-BIT UNSIGNED INTEGER DIVIDE BEGINS HERE
51 setf.sig f8=r32
52 setf.sig f9=r33
53 nop.i 0;;
54 } { .mfb
55 nop.m 0
56 fma.s1 f6=f8,f1,f0
57 nop.b 0
58 } { .mfb
59 nop.m 0
60 fma.s1 f7=f9,f1,f0
61 nop.b 0;;
62 } { .mfi
63 nop.m 0
64 // Step (1)
65 // y0 = 1 / b in f8
66 frcpa.s1 f8,p6=f6,f7
67 nop.i 0;;
68 } { .mfi
69 nop.m 0
70 // Step (2)
71 // e0 = 1 - b * y0 in f9
72 (p6) fnma.s1 f9=f7,f8,f1
73 nop.i 0
74 } { .mfi
75 nop.m 0
76 // Step (3)
77 // q0 = a * y0 in f10
78 (p6) fma.s1 f10=f6,f8,f0
79 nop.i 0;;
80 } { .mfi
81 nop.m 0
82 // Step (4)
83 // e1 = e0 * e0 in f11
84 (p6) fma.s1 f11=f9,f9,f0
85 nop.i 0
86 } { .mfi
87 nop.m 0
88 // Step (5)
89 // q1 = q0 + e0 * q0 in f10
90 (p6) fma.s1 f10=f9,f10,f10
91 nop.i 0;;
92 } { .mfi
93 nop.m 0
94 // Step (6)
95 // y1 = y0 + e0 * y0 in f8
96 (p6) fma.s1 f8=f9,f8,f8
97 nop.i 0;;
98 } { .mfi
99 nop.m 0
100 // Step (7)
101 // q2 = q1 + e1 * q1 in f9
102 (p6) fma.s1 f9=f11,f10,f10
103 nop.i 0;;
104 } { .mfi
105 nop.m 0
106 // Step (8)
107 // y2 = y1 + e1 * y1 in f8
108 (p6) fma.s1 f8=f11,f8,f8
109 nop.i 0;;
110 } { .mfi
111 nop.m 0
112 // Step (9)
113 // r2 = a - b * q2 in f10
114 (p6) fnma.s1 f10=f7,f9,f6
115 nop.i 0;;
116 } { .mfi
117 nop.m 0
118 // Step (10)
119 // q3 = q2 + r2 * y2 in f8
120 (p6) fma.s1 f8=f10,f8,f9
121 nop.i 0;;
122 } { .mfb
123 nop.m 0
124 // (11) q = trunc(q3)
125 fcvt.fxu.trunc.s1 f8=f8
126 nop.b 0;;
127 } { .mmi
128 // quotient will be in r8 (if b != 0)
129 getf.sig r8=f8
130 nop.m 0
131 nop.i 0;;
132 }
134 // 64-BIT UNSIGNED INTEGER DIVIDE ENDS HERE
136 { .mmb
137 nop.m 0
138 nop.m 0
139 br.ret.sptk b0;;
140 }
142 .endp __udivdi3