ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-xen/asm-x86_64/pgtable.h @ 6697:a9a78ca76cd2

Replace direct_remap_area_pages with direct_remap_pfn_range to help fix PAE domain building.
Signed-off-by: ian@xensource.com
author iap10@freefall.cl.cam.ac.uk
date Wed Sep 07 23:10:49 2005 +0000 (2005-09-07)
parents 8db9c5873b9b
children 4cdf880c9463
line source
1 #ifndef _X86_64_PGTABLE_H
2 #define _X86_64_PGTABLE_H
4 /*
5 * This file contains the functions and defines necessary to modify and use
6 * the x86-64 page table tree.
7 */
8 #include <asm/processor.h>
9 #include <asm/fixmap.h>
10 #include <asm/bitops.h>
11 #include <linux/threads.h>
12 #include <linux/sched.h>
13 #include <asm/pda.h>
14 #ifdef CONFIG_XEN
15 #include <asm-xen/hypervisor.h>
17 extern pud_t level3_user_pgt[512];
18 extern pud_t init_level4_user_pgt[];
20 extern void xen_init_pt(void);
22 #define virt_to_ptep(__va) \
23 ({ \
24 pgd_t *__pgd = pgd_offset_k((unsigned long)(__va)); \
25 pud_t *__pud = pud_offset(__pgd, (unsigned long)(__va)); \
26 pmd_t *__pmd = pmd_offset(__pud, (unsigned long)(__va)); \
27 pte_offset_kernel(__pmd, (unsigned long)(__va)); \
28 })
30 #define arbitrary_virt_to_machine(__va) \
31 ({ \
32 pte_t *__pte = virt_to_ptep(__va); \
33 unsigned long __pa = (*(unsigned long *)__pte) & PAGE_MASK; \
34 __pa | ((unsigned long)(__va) & (PAGE_SIZE-1)); \
35 })
36 #endif
38 extern pud_t level3_kernel_pgt[512];
39 extern pud_t level3_physmem_pgt[512];
40 extern pud_t level3_ident_pgt[512];
41 extern pmd_t level2_kernel_pgt[512];
42 extern pgd_t init_level4_pgt[];
43 extern unsigned long __supported_pte_mask;
45 #define swapper_pg_dir init_level4_pgt
47 extern int nonx_setup(char *str);
48 extern void paging_init(void);
49 extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
51 extern unsigned long pgkern_mask;
53 /*
54 * ZERO_PAGE is a global shared page that is always zero: used
55 * for zero-mapped memory areas etc..
56 */
57 extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
58 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
60 /*
61 * PGDIR_SHIFT determines what a top-level page table entry can map
62 */
63 #define PGDIR_SHIFT 39
64 #define PTRS_PER_PGD 512
66 /*
67 * 3rd level page
68 */
69 #define PUD_SHIFT 30
70 #define PTRS_PER_PUD 512
72 /*
73 * PMD_SHIFT determines the size of the area a middle-level
74 * page table can map
75 */
76 #define PMD_SHIFT 21
77 #define PTRS_PER_PMD 512
79 /*
80 * entries per page directory level
81 */
82 #define PTRS_PER_PTE 512
84 #define pte_ERROR(e) \
85 printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
86 #define pmd_ERROR(e) \
87 printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
88 #define pud_ERROR(e) \
89 printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
90 #define pgd_ERROR(e) \
91 printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
93 #define pgd_none(x) (!pgd_val(x))
94 #define pud_none(x) (!pud_val(x))
96 #define set_pte_batched(pteptr, pteval) \
97 queue_l1_entry_update(pteptr, (pteval))
99 extern inline int pud_present(pud_t pud) { return !pud_none(pud); }
101 static inline void set_pte(pte_t *dst, pte_t val)
102 {
103 *dst = val;
104 }
106 #define set_pmd(pmdptr, pmdval) xen_l2_entry_update(pmdptr, (pmdval))
107 #define set_pud(pudptr, pudval) xen_l3_entry_update(pudptr, (pudval))
108 #define set_pgd(pgdptr, pgdval) xen_l4_entry_update(pgdptr, (pgdval))
110 extern inline void pud_clear (pud_t * pud)
111 {
112 set_pud(pud, __pud(0));
113 }
115 #define __user_pgd(pgd) ((pgd) + PTRS_PER_PGD)
117 extern inline void pgd_clear (pgd_t * pgd)
118 {
119 set_pgd(pgd, __pgd(0));
120 set_pgd(__user_pgd(pgd), __pgd(0));
121 }
123 #define pud_page(pud) \
124 ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
126 /*
127 * A note on implementation of this atomic 'get-and-clear' operation.
128 * This is actually very simple because Xen Linux can only run on a single
129 * processor. Therefore, we cannot race other processors setting the 'accessed'
130 * or 'dirty' bits on a page-table entry.
131 * Even if pages are shared between domains, that is not a problem because
132 * each domain will have separate page tables, with their own versions of
133 * accessed & dirty state.
134 */
135 #define ptep_get_and_clear(mm,addr,xp) __pte_ma(xchg(&(xp)->pte, 0))
137 #if 0
138 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *xp)
139 {
140 pte_t pte = *xp;
141 if (pte.pte)
142 set_pte(xp, __pte_ma(0));
143 return pte;
144 }
145 #endif
147 #define pte_same(a, b) ((a).pte == (b).pte)
149 #define PMD_SIZE (1UL << PMD_SHIFT)
150 #define PMD_MASK (~(PMD_SIZE-1))
151 #define PUD_SIZE (1UL << PUD_SHIFT)
152 #define PUD_MASK (~(PUD_SIZE-1))
153 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
154 #define PGDIR_MASK (~(PGDIR_SIZE-1))
156 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
157 #define FIRST_USER_ADDRESS 0
159 #ifndef __ASSEMBLY__
160 #define MAXMEM 0x3fffffffffffUL
161 #define VMALLOC_START 0xffffc20000000000UL
162 #define VMALLOC_END 0xffffe1ffffffffffUL
163 #define MODULES_VADDR 0xffffffff88000000UL
164 #define MODULES_END 0xfffffffffff00000UL
165 #define MODULES_LEN (MODULES_END - MODULES_VADDR)
167 #define _PAGE_BIT_PRESENT 0
168 #define _PAGE_BIT_RW 1
169 #define _PAGE_BIT_USER 2
170 #define _PAGE_BIT_PWT 3
171 #define _PAGE_BIT_PCD 4
172 #define _PAGE_BIT_ACCESSED 5
173 #define _PAGE_BIT_DIRTY 6
174 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
175 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
176 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
178 #define _PAGE_PRESENT 0x001
179 #define _PAGE_RW 0x002
180 #define _PAGE_USER 0x004
181 #define _PAGE_PWT 0x008
182 #define _PAGE_PCD 0x010
183 #define _PAGE_ACCESSED 0x020
184 #define _PAGE_DIRTY 0x040
185 #define _PAGE_PSE 0x080 /* 2MB page */
186 #define _PAGE_FILE 0x040 /* set:pagecache, unset:swap */
187 #define _PAGE_GLOBAL 0x100 /* Global TLB entry */
189 #define _PAGE_PROTNONE 0x080 /* If not present */
190 #define _PAGE_NX (1UL<<_PAGE_BIT_NX)
192 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
193 #define _KERNPG_TABLE _PAGE_TABLE
195 #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
197 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
198 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
199 #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
200 #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
201 #define PAGE_COPY PAGE_COPY_NOEXEC
202 #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
203 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
204 #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
205 #define __PAGE_KERNEL \
206 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX | _PAGE_USER )
207 #define __PAGE_KERNEL_EXEC \
208 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_USER )
209 #define __PAGE_KERNEL_NOCACHE \
210 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_PCD | _PAGE_ACCESSED | _PAGE_NX | _PAGE_USER )
211 #define __PAGE_KERNEL_RO \
212 (_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX | _PAGE_USER )
213 #define __PAGE_KERNEL_VSYSCALL \
214 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_USER )
215 #define __PAGE_KERNEL_VSYSCALL_NOCACHE \
216 (_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_PCD | _PAGE_USER )
217 #define __PAGE_KERNEL_LARGE \
218 (__PAGE_KERNEL | _PAGE_PSE | _PAGE_USER )
221 /*
222 * We don't support GLOBAL page in xenolinux64
223 */
224 #define MAKE_GLOBAL(x) __pgprot((x))
226 #define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
227 #define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
228 #define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
229 #define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
230 #define PAGE_KERNEL_VSYSCALL32 __pgprot(__PAGE_KERNEL_VSYSCALL)
231 #define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL)
232 #define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
233 #define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE)
235 /* xwr */
236 #define __P000 PAGE_NONE
237 #define __P001 PAGE_READONLY
238 #define __P010 PAGE_COPY
239 #define __P011 PAGE_COPY
240 #define __P100 PAGE_READONLY_EXEC
241 #define __P101 PAGE_READONLY_EXEC
242 #define __P110 PAGE_COPY_EXEC
243 #define __P111 PAGE_COPY_EXEC
245 #define __S000 PAGE_NONE
246 #define __S001 PAGE_READONLY
247 #define __S010 PAGE_SHARED
248 #define __S011 PAGE_SHARED
249 #define __S100 PAGE_READONLY_EXEC
250 #define __S101 PAGE_READONLY_EXEC
251 #define __S110 PAGE_SHARED_EXEC
252 #define __S111 PAGE_SHARED_EXEC
254 static inline unsigned long pgd_bad(pgd_t pgd)
255 {
256 unsigned long val = pgd_val(pgd);
257 val &= ~PTE_MASK;
258 val &= ~(_PAGE_USER | _PAGE_DIRTY);
259 return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED);
260 }
262 static inline unsigned long pud_bad(pud_t pud)
263 {
264 unsigned long val = pud_val(pud);
265 val &= ~PTE_MASK;
266 val &= ~(_PAGE_USER | _PAGE_DIRTY);
267 return val & ~(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED);
268 }
270 inline static void set_pte_at(struct mm_struct *mm, unsigned long addr,
271 pte_t *ptep, pte_t val )
272 {
273 if ( ((mm != current->mm) && (mm != &init_mm)) ||
274 HYPERVISOR_update_va_mapping( (addr), (val), 0 ) )
275 {
276 set_pte(ptep, val);
277 }
278 }
280 #define pte_none(x) (!(x).pte)
281 #define pte_present(x) ((x).pte & (_PAGE_PRESENT | _PAGE_PROTNONE))
282 #define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
284 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
286 /*
287 * We detect special mappings in one of two ways:
288 * 1. If the MFN is an I/O page then Xen will set the m2p entry
289 * to be outside our maximum possible pseudophys range.
290 * 2. If the MFN belongs to a different domain then we will certainly
291 * not have MFN in our p2m table. Conversely, if the page is ours,
292 * then we'll have p2m(m2p(MFN))==MFN.
293 * If we detect a special mapping then it doesn't have a 'struct page'.
294 * We force !pfn_valid() by returning an out-of-range pointer.
295 *
296 * NB. These checks require that, for any MFN that is not in our reservation,
297 * there is no PFN such that p2m(PFN) == MFN. Otherwise we can get confused if
298 * we are foreign-mapping the MFN, and the other domain as m2p(MFN) == PFN.
299 * Yikes! Various places must poke in INVALID_P2M_ENTRY for safety.
300 *
301 * NB2. When deliberately mapping foreign pages into the p2m table, you *must*
302 * use FOREIGN_FRAME(). This will cause pte_pfn() to choke on it, as we
303 * require. In all the cases we care about, the FOREIGN_FRAME bit is
304 * masked (e.g., pfn_to_mfn()) so behaviour there is correct.
305 */
306 #define pte_mfn(_pte) (((_pte).pte & PTE_MASK) >> PAGE_SHIFT)
307 #define pte_pfn(_pte) \
308 ({ \
309 unsigned long mfn = pte_mfn(_pte); \
310 unsigned long pfn = mfn_to_pfn(mfn); \
311 if ((pfn >= max_mapnr) || (phys_to_machine_mapping[pfn] != mfn))\
312 pfn = max_mapnr; /* special: force !pfn_valid() */ \
313 pfn; \
314 })
316 #define pte_page(x) pfn_to_page(pte_pfn(x))
318 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
319 {
320 pte_t pte;
322 (pte).pte = (pfn_to_mfn(page_nr) << PAGE_SHIFT);
323 (pte).pte |= pgprot_val(pgprot);
324 (pte).pte &= __supported_pte_mask;
325 return pte;
326 }
328 #define pfn_pte_ma(pfn, prot) __pte_ma((((pfn) << PAGE_SHIFT) | pgprot_val(prot)) & __supported_pte_mask)
329 /*
330 * The following only work if pte_present() is true.
331 * Undefined behaviour if not..
332 */
333 #define __pte_val(x) ((x).pte)
335 static inline int pte_user(pte_t pte) { return __pte_val(pte) & _PAGE_USER; }
336 extern inline int pte_read(pte_t pte) { return __pte_val(pte) & _PAGE_USER; }
337 extern inline int pte_exec(pte_t pte) { return __pte_val(pte) & _PAGE_USER; }
338 extern inline int pte_dirty(pte_t pte) { return __pte_val(pte) & _PAGE_DIRTY; }
339 extern inline int pte_young(pte_t pte) { return __pte_val(pte) & _PAGE_ACCESSED; }
340 extern inline int pte_write(pte_t pte) { return __pte_val(pte) & _PAGE_RW; }
341 static inline int pte_file(pte_t pte) { return __pte_val(pte) & _PAGE_FILE; }
343 extern inline pte_t pte_rdprotect(pte_t pte) { __pte_val(pte) &= ~_PAGE_USER; return pte; }
344 extern inline pte_t pte_exprotect(pte_t pte) { __pte_val(pte) &= ~_PAGE_USER; return pte; }
345 extern inline pte_t pte_mkclean(pte_t pte) { __pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
346 extern inline pte_t pte_mkold(pte_t pte) { __pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
347 extern inline pte_t pte_wrprotect(pte_t pte) { __pte_val(pte) &= ~_PAGE_RW; return pte; }
348 extern inline pte_t pte_mkread(pte_t pte) { __pte_val(pte) |= _PAGE_USER; return pte; }
349 extern inline pte_t pte_mkexec(pte_t pte) { __pte_val(pte) |= _PAGE_USER; return pte; }
350 extern inline pte_t pte_mkdirty(pte_t pte) { __pte_val(pte) |= _PAGE_DIRTY; return pte; }
351 extern inline pte_t pte_mkyoung(pte_t pte) { __pte_val(pte) |= _PAGE_ACCESSED; return pte; }
352 extern inline pte_t pte_mkwrite(pte_t pte) { __pte_val(pte) |= _PAGE_RW; return pte; }
354 struct vm_area_struct;
356 static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
357 {
358 pte_t pte = *ptep;
359 int ret = pte_dirty(pte);
360 if (ret)
361 set_pte(ptep, pte_mkclean(pte));
362 return ret;
363 }
365 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
366 {
367 pte_t pte = *ptep;
368 int ret = pte_young(pte);
369 if (ret)
370 set_pte(ptep, pte_mkold(pte));
371 return ret;
372 }
374 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
375 {
376 pte_t pte = *ptep;
377 if (pte_write(pte))
378 set_pte(ptep, pte_wrprotect(pte));
379 }
381 /*
382 * Macro to mark a page protection value as "uncacheable".
383 */
384 #define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
386 #define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
387 static inline int pmd_large(pmd_t pte) {
388 return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE;
389 }
392 /*
393 * Conversion functions: convert a page and protection to a page entry,
394 * and a page entry and page directory to the page they refer to.
395 */
397 #define page_pte(page) page_pte_prot(page, __pgprot(0))
399 /*
400 * Level 4 access.
401 * Never use these in the common code.
402 */
403 #define pgd_page(pgd) ((unsigned long) __va(pgd_val(pgd) & PTE_MASK))
404 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
405 #define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
406 #define pgd_offset_k(address) (pgd_t *)(init_level4_pgt + pgd_index(address))
407 #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
408 #define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)
410 /* PUD - Level3 access */
411 /* to find an entry in a page-table-directory. */
412 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
413 #define pud_offset(pgd, address) ((pud_t *) pgd_page(*(pgd)) + pud_index(address))
414 static inline pud_t *__pud_offset_k(pud_t *pud, unsigned long address)
415 {
416 return pud + pud_index(address);
417 }
419 /* Find correct pud via the hidden fourth level page level: */
421 /* This accesses the reference page table of the boot cpu.
422 Other CPUs get synced lazily via the page fault handler. */
423 static inline pud_t *pud_offset_k(unsigned long address)
424 {
425 unsigned long addr;
427 addr = pgd_val(init_level4_pgt[pud_index(address)]);
428 addr &= PHYSICAL_PAGE_MASK; /* machine physical */
429 addr = machine_to_phys(addr);
430 return __pud_offset_k((pud_t *)__va(addr), address);
431 }
433 /* PMD - Level 2 access */
434 #define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
435 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
437 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
438 #define pmd_offset(dir, address) ((pmd_t *) pud_page(*(dir)) + \
439 pmd_index(address))
440 #define pmd_none(x) (!pmd_val(x))
441 /* pmd_present doesn't just test the _PAGE_PRESENT bit since wr.p.t.
442 can temporarily clear it. */
443 #define pmd_present(x) (pmd_val(x))
444 #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
445 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_PRESENT)) != (_KERNPG_TABLE & ~_PAGE_PRESENT))
446 #define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
447 #define pmd_pfn(x) ((pmd_val(x) >> PAGE_SHIFT) & __PHYSICAL_MASK)
449 #define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
450 #define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
451 #define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
453 /* PTE - Level 1 access. */
455 /* page, protection -> pte */
456 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
457 #define mk_pte_huge(entry) (pte_val(entry) |= _PAGE_PRESENT | _PAGE_PSE)
459 /* physical address -> PTE */
460 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
461 {
462 pte_t pte;
463 (pte).pte = physpage | pgprot_val(pgprot);
464 return pte;
465 }
467 /* Change flags of a PTE */
468 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
469 {
470 (pte).pte &= _PAGE_CHG_MASK;
471 (pte).pte |= pgprot_val(newprot);
472 (pte).pte &= __supported_pte_mask;
473 return pte;
474 }
476 #define pte_index(address) \
477 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
478 #define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_kernel(*(dir)) + \
479 pte_index(address))
481 /* x86-64 always has all page tables mapped. */
482 #define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
483 #define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
484 #define pte_unmap(pte) /* NOP */
485 #define pte_unmap_nested(pte) /* NOP */
487 #define update_mmu_cache(vma,address,pte) do { } while (0)
489 /* We only update the dirty/accessed state if we set
490 * the dirty bit by hand in the kernel, since the hardware
491 * will do the accessed bit for us, and we don't want to
492 * race with other CPU's that might be updating the dirty
493 * bit at the same time. */
494 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
495 #if 0
496 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
497 do { \
498 if (__dirty) { \
499 set_pte(__ptep, __entry); \
500 flush_tlb_page(__vma, __address); \
501 } \
502 } while (0)
503 #endif
504 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
505 do { \
506 if (__dirty) { \
507 if ( likely((__vma)->vm_mm == current->mm) ) { \
508 BUG_ON(HYPERVISOR_update_va_mapping((__address), (__entry), UVMF_INVLPG|UVMF_MULTI|(unsigned long)((__vma)->vm_mm->cpu_vm_mask.bits))); \
509 } else { \
510 xen_l1_entry_update((__ptep), (__entry)); \
511 flush_tlb_page((__vma), (__address)); \
512 } \
513 } \
514 } while (0)
516 /* Encode and de-code a swap entry */
517 #define __swp_type(x) (((x).val >> 1) & 0x3f)
518 #define __swp_offset(x) ((x).val >> 8)
519 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
520 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
521 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
523 #endif /* !__ASSEMBLY__ */
525 extern int kern_addr_valid(unsigned long addr);
527 #define DOMID_LOCAL (0xFFFFU)
529 int direct_remap_pfn_range(struct mm_struct *mm,
530 unsigned long address,
531 unsigned long mfn,
532 unsigned long size,
533 pgprot_t prot,
534 domid_t domid);
536 int create_lookup_pte_addr(struct mm_struct *mm,
537 unsigned long address,
538 unsigned long *ptep);
540 int touch_pte_range(struct mm_struct *mm,
541 unsigned long address,
542 unsigned long size);
544 #define io_remap_page_range(vma, vaddr, paddr, size, prot) \
545 direct_remap_pfn_range((vma)->vm_mm,vaddr,paddr>>PAGE_SHIFT,size,prot,DOMID_IO)
547 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
548 direct_remap_pfn_range((vma)->vm_mm,vaddr,pfn,size,prot,DOMID_IO)
550 #define MK_IOSPACE_PFN(space, pfn) (pfn)
551 #define GET_IOSPACE(pfn) 0
552 #define GET_PFN(pfn) (pfn)
554 #define HAVE_ARCH_UNMAPPED_AREA
556 #define pgtable_cache_init() do { } while (0)
557 #define check_pgt_cache() do { } while (0)
559 #define PAGE_AGP PAGE_KERNEL_NOCACHE
560 #define HAVE_PAGE_AGP 1
562 /* fs/proc/kcore.c */
563 #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
564 #define kc_offset_to_vaddr(o) \
565 (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))
567 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
568 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
569 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
570 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
571 #define __HAVE_ARCH_PTE_SAME
572 #include <asm-generic/pgtable.h>
574 #endif /* _X86_64_PGTABLE_H */