ia64/xen-unstable

view xen/include/asm-ia64/privop.h @ 6552:a9873d384da4

Merge.
author adsharma@los-vmm.sc.intel.com
date Thu Aug 25 12:24:48 2005 -0700 (2005-08-25)
parents 112d44270733 fa0754a9f64f
children dfaf788ab18c
line source
1 #ifndef _XEN_IA64_PRIVOP_H
2 #define _XEN_IA64_PRIVOP_H
4 #include <asm/ia64_int.h>
5 #ifdef CONFIG_VTI
6 #include <asm/vmx_vcpu.h>
7 #else //CONFIG_VTI
8 #include <asm/vcpu.h>
9 #endif //CONFIG_VTI
11 typedef unsigned long IA64_INST;
13 extern IA64FAULT priv_emulate(VCPU *vcpu, REGS *regs, UINT64 isr);
15 typedef union U_IA64_BUNDLE {
16 unsigned long i64[2];
17 struct { unsigned long template:5,slot0:41,slot1a:18,slot1b:23,slot2:41; };
18 // NOTE: following doesn't work because bitfields can't cross natural
19 // size boundaries
20 //struct { unsigned long template:5, slot0:41, slot1:41, slot2:41; };
21 } IA64_BUNDLE;
23 typedef enum E_IA64_SLOT_TYPE { I, M, F, B, L, ILLEGAL } IA64_SLOT_TYPE;
25 typedef union U_INST64_A5 {
26 IA64_INST inst;
27 struct { unsigned long qp:6, r1:7, imm7b:7, r3:2, imm5c:5, imm9d:9, s:1, major:4; };
28 } INST64_A5;
30 typedef union U_INST64_B4 {
31 IA64_INST inst;
32 struct { unsigned long qp:6, btype:3, un3:3, p:1, b2:3, un11:11, x6:6, wh:2, d:1, un1:1, major:4; };
33 } INST64_B4;
35 typedef union U_INST64_B8 {
36 IA64_INST inst;
37 struct { unsigned long qp:6, un21:21, x6:6, un4:4, major:4; };
38 } INST64_B8;
40 typedef union U_INST64_B9 {
41 IA64_INST inst;
42 struct { unsigned long qp:6, imm20:20, :1, x6:6, :3, i:1, major:4; };
43 } INST64_B9;
45 typedef union U_INST64_I19 {
46 IA64_INST inst;
47 struct { unsigned long qp:6, imm20:20, :1, x6:6, x3:3, i:1, major:4; };
48 } INST64_I19;
50 typedef union U_INST64_I26 {
51 IA64_INST inst;
52 struct { unsigned long qp:6, :7, r2:7, ar3:7, x6:6, x3:3, :1, major:4;};
53 } INST64_I26;
55 typedef union U_INST64_I27 {
56 IA64_INST inst;
57 struct { unsigned long qp:6, :7, imm:7, ar3:7, x6:6, x3:3, s:1, major:4;};
58 } INST64_I27;
60 typedef union U_INST64_I28 { // not privileged (mov from AR)
61 IA64_INST inst;
62 struct { unsigned long qp:6, r1:7, :7, ar3:7, x6:6, x3:3, :1, major:4;};
63 } INST64_I28;
65 typedef union U_INST64_M28 {
66 IA64_INST inst;
67 struct { unsigned long qp:6, :14, r3:7, x6:6, x3:3, :1, major:4;};
68 } INST64_M28;
70 typedef union U_INST64_M29 {
71 IA64_INST inst;
72 struct { unsigned long qp:6, :7, r2:7, ar3:7, x6:6, x3:3, :1, major:4;};
73 } INST64_M29;
75 typedef union U_INST64_M30 {
76 IA64_INST inst;
77 struct { unsigned long qp:6, :7, imm:7, ar3:7,x4:4,x2:2,x3:3,s:1,major:4;};
78 } INST64_M30;
80 typedef union U_INST64_M31 {
81 IA64_INST inst;
82 struct { unsigned long qp:6, r1:7, :7, ar3:7, x6:6, x3:3, :1, major:4;};
83 } INST64_M31;
85 typedef union U_INST64_M32 {
86 IA64_INST inst;
87 struct { unsigned long qp:6, :7, r2:7, cr3:7, x6:6, x3:3, :1, major:4;};
88 } INST64_M32;
90 typedef union U_INST64_M33 {
91 IA64_INST inst;
92 struct { unsigned long qp:6, r1:7, :7, cr3:7, x6:6, x3:3, :1, major:4; };
93 } INST64_M33;
95 typedef union U_INST64_M35 {
96 IA64_INST inst;
97 struct { unsigned long qp:6, :7, r2:7, :7, x6:6, x3:3, :1, major:4; };
99 } INST64_M35;
101 typedef union U_INST64_M36 {
102 IA64_INST inst;
103 struct { unsigned long qp:6, r1:7, :14, x6:6, x3:3, :1, major:4; };
104 } INST64_M36;
106 typedef union U_INST64_M41 {
107 IA64_INST inst;
108 struct { unsigned long qp:6, :7, r2:7, :7, x6:6, x3:3, :1, major:4; };
109 } INST64_M41;
111 typedef union U_INST64_M42 {
112 IA64_INST inst;
113 struct { unsigned long qp:6, :7, r2:7, r3:7, x6:6, x3:3, :1, major:4; };
114 } INST64_M42;
116 typedef union U_INST64_M43 {
117 IA64_INST inst;
118 struct { unsigned long qp:6, r1:7, :7, r3:7, x6:6, x3:3, :1, major:4; };
119 } INST64_M43;
121 typedef union U_INST64_M44 {
122 IA64_INST inst;
123 struct { unsigned long qp:6, imm:21, x4:4, i2:2, x3:3, i:1, major:4; };
124 } INST64_M44;
126 typedef union U_INST64_M45 {
127 IA64_INST inst;
128 struct { unsigned long qp:6, :7, r2:7, r3:7, x6:6, x3:3, :1, major:4; };
129 } INST64_M45;
131 typedef union U_INST64_M46 {
132 IA64_INST inst;
133 struct { unsigned long qp:6, r1:7, un7:7, r3:7, x6:6, x3:3, un1:1, major:4; };
134 } INST64_M46;
136 #ifdef CONFIG_VTI
137 typedef union U_INST64_M47 {
138 IA64_INST inst;
139 struct { unsigned long qp:6, un14:14, r3:7, x6:6, x3:3, un1:1, major:4; };
140 } INST64_M47;
142 typedef union U_INST64_M1{
143 IA64_INST inst;
144 struct { unsigned long qp:6, r1:7, un7:7, r3:7, x:1, hint:2, x6:6, m:1, major:4; };
145 } INST64_M1;
147 typedef union U_INST64_M2{
148 IA64_INST inst;
149 struct { unsigned long qp:6, r1:7, r2:7, r3:7, x:1, hint:2, x6:6, m:1, major:4; };
150 } INST64_M2;
152 typedef union U_INST64_M3{
153 IA64_INST inst;
154 struct { unsigned long qp:6, r1:7, imm7:7, r3:7, i:1, hint:2, x6:6, s:1, major:4; };
155 } INST64_M3;
157 typedef union U_INST64_M4 {
158 IA64_INST inst;
159 struct { unsigned long qp:6, un7:7, r2:7, r3:7, x:1, hint:2, x6:6, m:1, major:4; };
160 } INST64_M4;
162 typedef union U_INST64_M5 {
163 IA64_INST inst;
164 struct { unsigned long qp:6, imm7:7, r2:7, r3:7, i:1, hint:2, x6:6, s:1, major:4; };
165 } INST64_M5;
167 typedef union U_INST64_M6 {
168 IA64_INST inst;
169 struct { unsigned long qp:6, f1:7, un7:7, r3:7, x:1, hint:2, x6:6, m:1, major:4; };
170 } INST64_M6;
172 #endif // CONFIG_VTI
174 typedef union U_INST64 {
175 IA64_INST inst;
176 struct { unsigned long :37, major:4; } generic;
177 INST64_A5 A5; // used in build_hypercall_bundle only
178 INST64_B4 B4; // used in build_hypercall_bundle only
179 INST64_B8 B8; // rfi, bsw.[01]
180 INST64_B9 B9; // break.b
181 INST64_I19 I19; // used in build_hypercall_bundle only
182 INST64_I26 I26; // mov register to ar (I unit)
183 INST64_I27 I27; // mov immediate to ar (I unit)
184 INST64_I28 I28; // mov from ar (I unit)
185 #ifdef CONFIG_VTI
186 INST64_M1 M1; // ld integer
187 INST64_M2 M2;
188 INST64_M3 M3;
189 INST64_M4 M4; // st integer
190 INST64_M5 M5;
191 INST64_M6 M6; // ldfd floating pointer
192 #endif // CONFIG_VTI
193 INST64_M28 M28; // purge translation cache entry
194 INST64_M29 M29; // mov register to ar (M unit)
195 INST64_M30 M30; // mov immediate to ar (M unit)
196 INST64_M31 M31; // mov from ar (M unit)
197 INST64_M32 M32; // mov reg to cr
198 INST64_M33 M33; // mov from cr
199 INST64_M35 M35; // mov to psr
200 INST64_M36 M36; // mov from psr
201 INST64_M41 M41; // translation cache insert
202 INST64_M42 M42; // mov to indirect reg/translation reg insert
203 INST64_M43 M43; // mov from indirect reg
204 INST64_M44 M44; // set/reset system mask
205 INST64_M45 M45; // translation purge
206 INST64_M46 M46; // translation access (tpa,tak)
207 #ifdef CONFIG_VTI
208 INST64_M47 M47; // purge translation entry
209 #endif // CONFIG_VTI
210 } INST64;
212 #define MASK_41 ((UINT64)0x1ffffffffff)
214 extern void privify_memory(void *start, UINT64 len);
216 #endif