ia64/xen-unstable

view linux-2.6-xen-sparse/include/asm-xen/asm-i386/io.h @ 6552:a9873d384da4

Merge.
author adsharma@los-vmm.sc.intel.com
date Thu Aug 25 12:24:48 2005 -0700 (2005-08-25)
parents 112d44270733 fa0754a9f64f
children dfaf788ab18c
line source
1 #ifndef _ASM_IO_H
2 #define _ASM_IO_H
4 #include <linux/config.h>
5 #include <linux/string.h>
6 #include <linux/compiler.h>
8 /*
9 * This file contains the definitions for the x86 IO instructions
10 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
11 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
12 * versions of the single-IO instructions (inb_p/inw_p/..).
13 *
14 * This file is not meant to be obfuscating: it's just complicated
15 * to (a) handle it all in a way that makes gcc able to optimize it
16 * as well as possible and (b) trying to avoid writing the same thing
17 * over and over again with slight variations and possibly making a
18 * mistake somewhere.
19 */
21 /*
22 * Thanks to James van Artsdalen for a better timing-fix than
23 * the two short jumps: using outb's to a nonexistent port seems
24 * to guarantee better timings even on fast machines.
25 *
26 * On the other hand, I'd like to be sure of a non-existent port:
27 * I feel a bit unsafe about using 0x80 (should be safe, though)
28 *
29 * Linus
30 */
32 /*
33 * Bit simplified and optimized by Jan Hubicka
34 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
35 *
36 * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
37 * isa_read[wl] and isa_write[wl] fixed
38 * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
39 */
41 #define IO_SPACE_LIMIT 0xffff
43 #define XQUAD_PORTIO_BASE 0xfe400000
44 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
46 #ifdef __KERNEL__
48 #include <asm-generic/iomap.h>
50 #include <linux/vmalloc.h>
51 #include <asm/fixmap.h>
53 /*
54 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
55 * access
56 */
57 #define xlate_dev_mem_ptr(p) __va(p)
59 /*
60 * Convert a virtual cached pointer to an uncached pointer
61 */
62 #define xlate_dev_kmem_ptr(p) p
64 /**
65 * virt_to_phys - map virtual addresses to physical
66 * @address: address to remap
67 *
68 * The returned physical address is the physical (CPU) mapping for
69 * the memory address given. It is only valid to use this function on
70 * addresses directly mapped or allocated via kmalloc.
71 *
72 * This function does not give bus mappings for DMA transfers. In
73 * almost all conceivable cases a device driver should not be using
74 * this function
75 */
77 static inline unsigned long virt_to_phys(volatile void * address)
78 {
79 return __pa(address);
80 }
82 /**
83 * phys_to_virt - map physical address to virtual
84 * @address: address to remap
85 *
86 * The returned virtual address is a current CPU mapping for
87 * the memory address given. It is only valid to use this function on
88 * addresses that have a kernel mapping
89 *
90 * This function does not handle bus mappings for DMA transfers. In
91 * almost all conceivable cases a device driver should not be using
92 * this function
93 */
95 static inline void * phys_to_virt(unsigned long address)
96 {
97 return __va(address);
98 }
100 /*
101 * Change "struct page" to physical address.
102 */
103 #define page_to_pseudophys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
104 #define page_to_phys(page) (phys_to_machine(page_to_pseudophys(page)))
106 #define bio_to_pseudophys(bio) (page_to_pseudophys(bio_page((bio))) + \
107 (unsigned long) bio_offset((bio)))
108 #define bvec_to_pseudophys(bv) (page_to_pseudophys((bv)->bv_page) + \
109 (unsigned long) (bv)->bv_offset)
111 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
112 (((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2))) && \
113 ((bvec_to_pseudophys((vec1)) + (vec1)->bv_len) == \
114 bvec_to_pseudophys((vec2))))
116 extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
118 /**
119 * ioremap - map bus memory into CPU space
120 * @offset: bus address of the memory
121 * @size: size of the resource to map
122 *
123 * ioremap performs a platform specific sequence of operations to
124 * make bus memory CPU accessible via the readb/readw/readl/writeb/
125 * writew/writel functions and the other mmio helpers. The returned
126 * address is not guaranteed to be usable directly as a virtual
127 * address.
128 */
130 static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
131 {
132 return __ioremap(offset, size, 0);
133 }
135 extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
136 extern void iounmap(volatile void __iomem *addr);
138 /*
139 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
140 * mappings, before the real ioremap() is functional.
141 * A boot-time mapping is currently limited to at most 16 pages.
142 */
143 extern void *bt_ioremap(unsigned long offset, unsigned long size);
144 extern void bt_iounmap(void *addr, unsigned long size);
146 /*
147 * ISA I/O bus memory addresses are 1:1 with the physical address.
148 */
149 #define isa_virt_to_bus(_x) isa_virt_to_bus_is_UNSUPPORTED->x
150 #define isa_page_to_bus(_x) isa_page_to_bus_is_UNSUPPORTED->x
151 #ifdef CONFIG_XEN_PHYSDEV_ACCESS
152 #define isa_bus_to_virt(_x) (void *)(__fix_to_virt(FIX_ISAMAP_BEGIN) + (_x))
153 #else
154 #define isa_bus_to_virt(_x) isa_bus_to_virt_needs_PRIVILEGED_BUILD
155 #endif
157 /*
158 * However PCI ones are not necessarily 1:1 and therefore these interfaces
159 * are forbidden in portable PCI drivers.
160 *
161 * Allow them on x86 for legacy drivers, though.
162 */
163 #define virt_to_bus(_x) phys_to_machine(__pa(_x))
164 #define bus_to_virt(_x) __va(machine_to_phys(_x))
166 /*
167 * readX/writeX() are used to access memory mapped devices. On some
168 * architectures the memory mapped IO stuff needs to be accessed
169 * differently. On the x86 architecture, we just read/write the
170 * memory location directly.
171 */
173 static inline unsigned char readb(const volatile void __iomem *addr)
174 {
175 return *(volatile unsigned char __force *) addr;
176 }
177 static inline unsigned short readw(const volatile void __iomem *addr)
178 {
179 return *(volatile unsigned short __force *) addr;
180 }
181 static inline unsigned int readl(const volatile void __iomem *addr)
182 {
183 return *(volatile unsigned int __force *) addr;
184 }
185 #define readb_relaxed(addr) readb(addr)
186 #define readw_relaxed(addr) readw(addr)
187 #define readl_relaxed(addr) readl(addr)
188 #define __raw_readb readb
189 #define __raw_readw readw
190 #define __raw_readl readl
192 static inline void writeb(unsigned char b, volatile void __iomem *addr)
193 {
194 *(volatile unsigned char __force *) addr = b;
195 }
196 static inline void writew(unsigned short b, volatile void __iomem *addr)
197 {
198 *(volatile unsigned short __force *) addr = b;
199 }
200 static inline void writel(unsigned int b, volatile void __iomem *addr)
201 {
202 *(volatile unsigned int __force *) addr = b;
203 }
204 #define __raw_writeb writeb
205 #define __raw_writew writew
206 #define __raw_writel writel
208 #define mmiowb()
210 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
211 {
212 memset((void __force *) addr, val, count);
213 }
214 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
215 {
216 __memcpy(dst, (void __force *) src, count);
217 }
218 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
219 {
220 __memcpy((void __force *) dst, src, count);
221 }
223 /*
224 * ISA space is 'always mapped' on a typical x86 system, no need to
225 * explicitly ioremap() it. The fact that the ISA IO space is mapped
226 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
227 * are physical addresses. The following constant pointer can be
228 * used as the IO-area pointer (it can be iounmapped as well, so the
229 * analogy with PCI is quite large):
230 */
231 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
233 #define isa_readb(a) readb(__ISA_IO_base + (a))
234 #define isa_readw(a) readw(__ISA_IO_base + (a))
235 #define isa_readl(a) readl(__ISA_IO_base + (a))
236 #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a))
237 #define isa_writew(w,a) writew(w,__ISA_IO_base + (a))
238 #define isa_writel(l,a) writel(l,__ISA_IO_base + (a))
239 #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c))
240 #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c))
241 #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c))
244 /*
245 * Again, i386 does not require mem IO specific function.
246 */
248 #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d))
249 #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(__ISA_IO_base + (b)),(c),(d))
251 /**
252 * check_signature - find BIOS signatures
253 * @io_addr: mmio address to check
254 * @signature: signature block
255 * @length: length of signature
256 *
257 * Perform a signature comparison with the mmio address io_addr. This
258 * address should have been obtained by ioremap.
259 * Returns 1 on a match.
260 */
262 static inline int check_signature(volatile void __iomem * io_addr,
263 const unsigned char *signature, int length)
264 {
265 int retval = 0;
266 do {
267 if (readb(io_addr) != *signature)
268 goto out;
269 io_addr++;
270 signature++;
271 length--;
272 } while (length);
273 retval = 1;
274 out:
275 return retval;
276 }
278 /*
279 * Cache management
280 *
281 * This needed for two cases
282 * 1. Out of order aware processors
283 * 2. Accidentally out of order processors (PPro errata #51)
284 */
286 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
288 static inline void flush_write_buffers(void)
289 {
290 __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
291 }
293 #define dma_cache_inv(_start,_size) flush_write_buffers()
294 #define dma_cache_wback(_start,_size) flush_write_buffers()
295 #define dma_cache_wback_inv(_start,_size) flush_write_buffers()
297 #else
299 /* Nothing to do */
301 #define dma_cache_inv(_start,_size) do { } while (0)
302 #define dma_cache_wback(_start,_size) do { } while (0)
303 #define dma_cache_wback_inv(_start,_size) do { } while (0)
304 #define flush_write_buffers()
306 #endif
308 #endif /* __KERNEL__ */
310 #ifdef SLOW_IO_BY_JUMPING
311 #define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:"
312 #elif defined(__UNSAFE_IO__)
313 #define __SLOW_DOWN_IO "outb %%al,$0x80;"
314 #else
315 #define __SLOW_DOWN_IO "\n1: outb %%al,$0x80\n" \
316 "2:\n" \
317 ".section __ex_table,\"a\"\n\t" \
318 ".align 4\n\t" \
319 ".long 1b,2b\n" \
320 ".previous"
321 #endif
323 static inline void slow_down_io(void) {
324 __asm__ __volatile__(
325 __SLOW_DOWN_IO
326 #ifdef REALLY_SLOW_IO
327 __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO
328 #endif
329 : : );
330 }
332 #ifdef CONFIG_X86_NUMAQ
333 extern void *xquad_portio; /* Where the IO area was mapped */
334 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
335 #define __BUILDIO(bwl,bw,type) \
336 static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
337 if (xquad_portio) \
338 write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
339 else \
340 out##bwl##_local(value, port); \
341 } \
342 static inline void out##bwl(unsigned type value, int port) { \
343 out##bwl##_quad(value, port, 0); \
344 } \
345 static inline unsigned type in##bwl##_quad(int port, int quad) { \
346 if (xquad_portio) \
347 return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
348 else \
349 return in##bwl##_local(port); \
350 } \
351 static inline unsigned type in##bwl(int port) { \
352 return in##bwl##_quad(port, 0); \
353 }
354 #else
355 #define __BUILDIO(bwl,bw,type) \
356 static inline void out##bwl(unsigned type value, int port) { \
357 out##bwl##_local(value, port); \
358 } \
359 static inline unsigned type in##bwl(int port) { \
360 return in##bwl##_local(port); \
361 }
362 #endif
365 #if __UNSAFE_IO__
366 #define ____BUILDIO(bwl,bw,type) \
367 static inline void out##bwl##_local(unsigned type value, int port) { \
368 __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
369 } \
370 static inline unsigned type in##bwl##_local(int port) { \
371 unsigned type value; \
372 __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
373 return value; \
374 }
375 #else
376 #define ____BUILDIO(bwl,bw,type) \
377 static inline void out##bwl##_local(unsigned type value, int port) { \
378 __asm__ __volatile__("1: out" #bwl " %" #bw "0, %w1\n" \
379 "2:\n" \
380 ".section __ex_table,\"a\"\n\t" \
381 ".align 4\n\t" \
382 ".long 1b,2b\n" \
383 ".previous" : : "a"(value), "Nd"(port)); \
384 } \
385 static inline unsigned type in##bwl##_local(int port) { \
386 unsigned type value; \
387 __asm__ __volatile__("1:in" #bwl " %w1, %" #bw "0\n" \
388 "2:\n" \
389 ".section .fixup,\"ax\"\n" \
390 "3: mov" #bwl " $~0,%" #bw "0\n\t" \
391 "jmp 2b\n" \
392 ".previous\n" \
393 ".section __ex_table,\"a\"\n\t" \
394 ".align 4\n\t" \
395 ".long 1b,3b\n" \
396 ".previous" : "=a"(value) : "Nd"(port)); \
397 return value; \
398 }
399 #endif
401 #define BUILDIO(bwl,bw,type) \
402 ____BUILDIO(bwl,bw,type) \
403 static inline void out##bwl##_local_p(unsigned type value, int port) { \
404 out##bwl##_local(value, port); \
405 slow_down_io(); \
406 } \
407 static inline unsigned type in##bwl##_local_p(int port) { \
408 unsigned type value = in##bwl##_local(port); \
409 slow_down_io(); \
410 return value; \
411 } \
412 __BUILDIO(bwl,bw,type) \
413 static inline void out##bwl##_p(unsigned type value, int port) { \
414 out##bwl(value, port); \
415 slow_down_io(); \
416 } \
417 static inline unsigned type in##bwl##_p(int port) { \
418 unsigned type value = in##bwl(port); \
419 slow_down_io(); \
420 return value; \
421 } \
422 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
423 __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
424 } \
425 static inline void ins##bwl(int port, void *addr, unsigned long count) { \
426 __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
427 }
429 BUILDIO(b,b,char)
430 BUILDIO(w,w,short)
431 BUILDIO(l,,int)
433 /* We will be supplying our own /dev/mem implementation */
434 #define ARCH_HAS_DEV_MEM
436 #endif