ia64/xen-unstable

view linux-2.6.11-xen-sparse/arch/xen/i386/kernel/head.S @ 5597:a81dabf6ba10

bitkeeper revision 1.1765 (42c16e51XwZ3-cKPHI29xhO2Hzk_sQ)

Increase size of xen_start_info_union since start_info structure
size is > 512 bytes.
Signed-off-by: Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
author cl349@firebug.cl.cam.ac.uk
date Tue Jun 28 15:35:45 2005 +0000 (2005-06-28)
parents 65b28c74cec2
children 56a63f9f378f
line source
2 #include <linux/config.h>
4 .section __xen_guest
5 .ascii "GUEST_OS=linux,GUEST_VER=2.6"
6 .ascii ",XEN_VER=3.0"
7 .ascii ",VIRT_BASE=0xC0000000"
8 .ascii ",LOADER=generic"
9 .byte 0
11 .text
12 #include <linux/threads.h>
13 #include <linux/linkage.h>
14 #include <asm/segment.h>
15 #include <asm/thread_info.h>
16 #include <asm/asm_offsets.h>
17 #include <asm-xen/xen-public/arch-x86_32.h>
19 /*
20 * References to members of the new_cpu_data structure.
21 */
23 #define X86 new_cpu_data+CPUINFO_x86
24 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
25 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
26 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
27 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
28 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
29 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
30 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
32 ENTRY(startup_32)
33 cld
35 /* Copy the necessary stuff from xen_start_info structure. */
36 mov $xen_start_info_union,%edi
37 mov $512,%ecx
38 rep movsl
40 #ifdef CONFIG_SMP
41 ENTRY(startup_32_smp)
42 cld
43 #endif /* CONFIG_SMP */
45 /* Set up the stack pointer */
46 lss stack_start,%esp
48 checkCPUtype:
50 /* get vendor info */
51 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
52 cpuid
53 movl %eax,X86_CPUID # save CPUID level
54 movl %ebx,X86_VENDOR_ID # lo 4 chars
55 movl %edx,X86_VENDOR_ID+4 # next 4 chars
56 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
58 movl $1,%eax # Use the CPUID instruction to get CPU type
59 cpuid
60 movb %al,%cl # save reg for future use
61 andb $0x0f,%ah # mask processor family
62 movb %ah,X86
63 andb $0xf0,%al # mask model
64 shrb $4,%al
65 movb %al,X86_MODEL
66 andb $0x0f,%cl # mask mask revision
67 movb %cl,X86_MASK
68 movl %edx,X86_CAPABILITY
70 incb ready
72 xorl %eax,%eax # Clear FS/GS and LDT
73 movl %eax,%fs
74 movl %eax,%gs
75 cld # gcc2 wants the direction flag cleared at all times
77 #ifdef CONFIG_SMP
78 movb ready, %cl
79 cmpb $1,%cl
80 je 1f # the first CPU calls start_kernel
81 # all other CPUs call initialize_secondary
82 call initialize_secondary
83 jmp L6
84 1:
85 #endif /* CONFIG_SMP */
86 call start_kernel
87 L6:
88 jmp L6 # main should never return here, but
89 # just in case, we know what happens.
91 ENTRY(lgdt_finish)
92 movl $(__KERNEL_DS),%eax # reload all the segment registers
93 movw %ax,%ss # after changing gdt.
95 movl $(__USER_DS),%eax # DS/ES contains default USER segment
96 movw %ax,%ds
97 movw %ax,%es
99 popl %eax # reload CS by intersegment return
100 pushl $(__KERNEL_CS)
101 pushl %eax
102 lret
104 ENTRY(stack_start)
105 .long init_thread_union+THREAD_SIZE
106 .long __BOOT_DS
108 ready: .byte 0
110 .globl idt_descr
111 .globl cpu_gdt_descr
113 ALIGN
114 .word 0 # 32-bit align idt_desc.address
115 idt_descr:
116 .word IDT_ENTRIES*8-1 # idt contains 256 entries
117 .long idt_table
119 # boot GDT descriptor (later on used by CPU#0):
120 .word 0 # 32 bit align gdt_desc.address
121 cpu_gdt_descr:
122 .word GDT_SIZE
123 .long cpu_gdt_table
125 .fill NR_CPUS-1,8,0 # space for the other GDT descriptors
127 .org 0x1000
128 ENTRY(empty_zero_page)
130 .org 0x2000
131 ENTRY(swapper_pg_dir)
133 .org 0x3000
134 ENTRY(cpu_gdt_table)
135 .quad 0x0000000000000000 /* NULL descriptor */
136 .quad 0x0000000000000000 /* 0x0b reserved */
137 .quad 0x0000000000000000 /* 0x13 reserved */
138 .quad 0x0000000000000000 /* 0x1b reserved */
139 .quad 0x0000000000000000 /* 0x20 unused */
140 .quad 0x0000000000000000 /* 0x28 unused */
141 .quad 0x0000000000000000 /* 0x33 TLS entry 1 */
142 .quad 0x0000000000000000 /* 0x3b TLS entry 2 */
143 .quad 0x0000000000000000 /* 0x43 TLS entry 3 */
144 .quad 0x0000000000000000 /* 0x4b reserved */
145 .quad 0x0000000000000000 /* 0x53 reserved */
146 .quad 0x0000000000000000 /* 0x5b reserved */
148 .quad 0x00cfbb000000c3ff /* 0x60 kernel 4GB code at 0x00000000 */
149 .quad 0x00cfb3000000c3ff /* 0x68 kernel 4GB data at 0x00000000 */
150 .quad 0x00cffb000000c3ff /* 0x73 user 4GB code at 0x00000000 */
151 .quad 0x00cff3000000c3ff /* 0x7b user 4GB data at 0x00000000 */
153 .quad 0x0000000000000000 /* 0x80 TSS descriptor */
154 .quad 0x0000000000000000 /* 0x88 LDT descriptor */
156 /* Segments used for calling PnP BIOS */
157 .quad 0x0000000000000000 /* 0x90 32-bit code */
158 .quad 0x0000000000000000 /* 0x98 16-bit code */
159 .quad 0x0000000000000000 /* 0xa0 16-bit data */
160 .quad 0x0000000000000000 /* 0xa8 16-bit data */
161 .quad 0x0000000000000000 /* 0xb0 16-bit data */
162 /*
163 * The APM segments have byte granularity and their bases
164 * and limits are set at run time.
165 */
166 .quad 0x0000000000000000 /* 0xb8 APM CS code */
167 .quad 0x0000000000000000 /* 0xc0 APM CS 16 code (16 bit) */
168 .quad 0x0000000000000000 /* 0xc8 APM DS data */
170 .quad 0x0000000000000000 /* 0xd0 - unused */
171 .quad 0x0000000000000000 /* 0xd8 - unused */
172 .quad 0x0000000000000000 /* 0xe0 - unused */
173 .quad 0x0000000000000000 /* 0xe8 - unused */
174 .quad 0x0000000000000000 /* 0xf0 - unused */
175 .quad 0x0000000000000000 /* 0xf8 - GDT entry 31: double-fault TSS */
176 .fill GDT_ENTRIES-32,8,0
178 .org 0x4000
179 ENTRY(default_ldt)
181 .org 0x5000
182 /*
183 * Real beginning of normal "text" segment
184 */
185 ENTRY(stext)
186 ENTRY(_stext)