ia64/xen-unstable

view tools/ioemu/hw/xen_platform.c @ 11905:a77e38f63785

[HVM] Windows HCT requires non-zero subvendor details in platform PCI device.

Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
author kfraser@localhost.localdomain
date Thu Oct 19 16:32:11 2006 +0100 (2006-10-19)
parents f872300b672f
children d1710eb35385
line source
1 /*
2 * XEN platform fake pci device, formerly known as the event channel device
3 *
4 * Copyright (c) 2003-2004 Intel Corp.
5 * Copyright (c) 2006 XenSource
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 #include "vl.h"
27 #include <xenguest.h>
28 #include <xc_private.h>
30 extern FILE *logfile;
32 static void platform_ioport_write(void *opaque, uint32_t addr, uint32_t val)
33 {
34 return;
35 }
37 static uint32_t platform_ioport_read(void *opaque, uint32_t addr)
38 {
39 return 0;
40 }
42 static void platform_ioport_map(PCIDevice *pci_dev, int region_num,
43 uint32_t addr, uint32_t size, int type)
44 {
45 register_ioport_write(addr, 16, 4, platform_ioport_write, NULL);
46 register_ioport_read(addr, 16, 1, platform_ioport_read, NULL);
47 }
49 static uint32_t platform_mmio_read(void *opaque, target_phys_addr_t addr)
50 {
51 fprintf(logfile, "Warning: try read from xen platform mmio space\n");
52 return 0;
53 }
55 static void platform_mmio_write(void *opaque, target_phys_addr_t addr,
56 uint32_t val)
57 {
58 fprintf(logfile, "Warning: try write to xen platform mmio space\n");
59 return;
60 }
62 static CPUReadMemoryFunc *platform_mmio_read_funcs[3] = {
63 platform_mmio_read,
64 platform_mmio_read,
65 platform_mmio_read,
66 };
68 static CPUWriteMemoryFunc *platform_mmio_write_funcs[3] = {
69 platform_mmio_write,
70 platform_mmio_write,
71 platform_mmio_write,
72 };
74 static void platform_mmio_map(PCIDevice *d, int region_num,
75 uint32_t addr, uint32_t size, int type)
76 {
77 int mmio_io_addr;
79 mmio_io_addr = cpu_register_io_memory(0, platform_mmio_read_funcs,
80 platform_mmio_write_funcs, NULL);
82 cpu_register_physical_memory(addr, 0x1000000, mmio_io_addr);
83 }
85 struct pci_config_header {
86 uint16_t vendor_id;
87 uint16_t device_id;
88 uint16_t command;
89 uint16_t status;
90 uint8_t revision;
91 uint8_t api;
92 uint8_t subclass;
93 uint8_t class;
94 uint8_t cache_line_size; /* Units of 32 bit words */
95 uint8_t latency_timer; /* In units of bus cycles */
96 uint8_t header_type; /* Should be 0 */
97 uint8_t bist; /* Built in self test */
98 uint32_t base_address_regs[6];
99 uint32_t reserved1;
100 uint16_t subsystem_vendor_id;
101 uint16_t subsystem_id;
102 uint32_t rom_addr;
103 uint32_t reserved3;
104 uint32_t reserved4;
105 uint8_t interrupt_line;
106 uint8_t interrupt_pin;
107 uint8_t min_gnt;
108 uint8_t max_lat;
109 };
111 void pci_xen_platform_init(PCIBus *bus)
112 {
113 PCIDevice *d;
114 struct pci_config_header *pch;
116 printf("Register xen platform.\n");
117 d = pci_register_device(bus, "xen-platform", sizeof(PCIDevice), -1, NULL,
118 NULL);
119 pch = (struct pci_config_header *)d->config;
120 pch->vendor_id = 0x5853;
121 pch->device_id = 0x0001;
122 pch->command = 3; /* IO and memory access */
123 pch->revision = 1;
124 pch->api = 0;
125 pch->subclass = 0x80; /* Other */
126 pch->class = 0xff; /* Unclassified device class */
127 pch->header_type = 0;
128 pch->interrupt_pin = 1;
130 /* Microsoft WHQL requires non-zero subsystem IDs. */
131 /* http://www.pcisig.com/reflector/msg02205.html. */
132 pch->subsystem_vendor_id = pch->vendor_id; /* Duplicate vendor id. */
133 pch->subsystem_id = 0x0001; /* Hardcode sub-id as 1. */
135 pci_register_io_region(d, 0, 0x100, PCI_ADDRESS_SPACE_IO,
136 platform_ioport_map);
138 /* reserve 16MB mmio address for share memory*/
139 pci_register_io_region(d, 1, 0x1000000, PCI_ADDRESS_SPACE_MEM_PREFETCH,
140 platform_mmio_map);
142 register_savevm("platform", 0, 1, generic_pci_save, generic_pci_load, d);
143 printf("Done register platform.\n");
144 }