ia64/xen-unstable

view xen/include/asm-x86/x86_emulate.h @ 16468:9f61a0add5b6

x86_emulate: Emulate CPUID and HLT.
vmx realmode: Fix decode & emulate loop, add hooks for CPUID, HLT and
WBINVD. Also do not hook realmode entry off of vmentry failure any
more.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Mon Nov 26 15:32:54 2007 +0000 (2007-11-26)
parents f6a587e3d5c9
children a878752a83f9
line source
1 /******************************************************************************
2 * x86_emulate.h
3 *
4 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
5 *
6 * Copyright (c) 2005-2007 Keir Fraser
7 * Copyright (c) 2005-2007 XenSource Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 */
24 #ifndef __X86_EMULATE_H__
25 #define __X86_EMULATE_H__
27 struct x86_emulate_ctxt;
29 /* Comprehensive enumeration of x86 segment registers. */
30 enum x86_segment {
31 /* General purpose. */
32 x86_seg_cs,
33 x86_seg_ss,
34 x86_seg_ds,
35 x86_seg_es,
36 x86_seg_fs,
37 x86_seg_gs,
38 /* System. */
39 x86_seg_tr,
40 x86_seg_ldtr,
41 x86_seg_gdtr,
42 x86_seg_idtr
43 };
45 /*
46 * Attribute for segment selector. This is a copy of bit 40:47 & 52:55 of the
47 * segment descriptor. It happens to match the format of an AMD SVM VMCB.
48 */
49 typedef union segment_attributes {
50 u16 bytes;
51 struct
52 {
53 u16 type:4; /* 0; Bit 40-43 */
54 u16 s: 1; /* 4; Bit 44 */
55 u16 dpl: 2; /* 5; Bit 45-46 */
56 u16 p: 1; /* 7; Bit 47 */
57 u16 avl: 1; /* 8; Bit 52 */
58 u16 l: 1; /* 9; Bit 53 */
59 u16 db: 1; /* 10; Bit 54 */
60 u16 g: 1; /* 11; Bit 55 */
61 } fields;
62 } __attribute__ ((packed)) segment_attributes_t;
64 /*
65 * Full state of a segment register (visible and hidden portions).
66 * Again, this happens to match the format of an AMD SVM VMCB.
67 */
68 struct segment_register {
69 u16 sel;
70 segment_attributes_t attr;
71 u32 limit;
72 u64 base;
73 } __attribute__ ((packed));
75 /*
76 * Return codes from state-accessor functions and from x86_emulate().
77 */
78 /* Completed successfully. State modified appropriately. */
79 #define X86EMUL_OKAY 0
80 /* Unhandleable access or emulation. No state modified. */
81 #define X86EMUL_UNHANDLEABLE 1
82 /* Exception raised and requires delivery. */
83 #define X86EMUL_EXCEPTION 2
84 /* Retry the emulation for some reason. No state modified. */
85 #define X86EMUL_RETRY 3
86 /* (cmpxchg accessor): CMPXCHG failed. Maps to X86EMUL_RETRY in caller. */
87 #define X86EMUL_CMPXCHG_FAILED 3
89 /*
90 * These operations represent the instruction emulator's interface to memory.
91 *
92 * NOTES:
93 * 1. If the access fails (cannot emulate, or a standard access faults) then
94 * it is up to the memop to propagate the fault to the guest VM via
95 * some out-of-band mechanism, unknown to the emulator. The memop signals
96 * failure by returning X86EMUL_EXCEPTION to the emulator, which will
97 * then immediately bail.
98 * 2. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
99 * cmpxchg8b_emulated need support 8-byte accesses.
100 * 3. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
101 */
102 struct x86_emulate_ops
103 {
104 /*
105 * All functions:
106 * @ctxt: [IN ] Emulation context info as passed to the emulator.
107 * All memory-access functions:
108 * @seg: [IN ] Segment being dereferenced (specified as x86_seg_??).
109 * @offset:[IN ] Offset within segment.
110 * Read functions:
111 * @val: [OUT] Value read, zero-extended to 'ulong'.
112 * Write functions:
113 * @val: [IN ] Value to write (low-order bytes used as req'd).
114 * Variable-length access functions:
115 * @bytes: [IN ] Number of bytes to read or write.
116 */
118 /* read: Emulate a memory read. */
119 int (*read)(
120 enum x86_segment seg,
121 unsigned long offset,
122 unsigned long *val,
123 unsigned int bytes,
124 struct x86_emulate_ctxt *ctxt);
126 /*
127 * insn_fetch: Emulate fetch from instruction byte stream.
128 * Parameters are same as for 'read'. @seg is always x86_seg_cs.
129 */
130 int (*insn_fetch)(
131 enum x86_segment seg,
132 unsigned long offset,
133 unsigned long *val,
134 unsigned int bytes,
135 struct x86_emulate_ctxt *ctxt);
137 /* write: Emulate a memory write. */
138 int (*write)(
139 enum x86_segment seg,
140 unsigned long offset,
141 unsigned long val,
142 unsigned int bytes,
143 struct x86_emulate_ctxt *ctxt);
145 /*
146 * cmpxchg: Emulate an atomic (LOCKed) CMPXCHG operation.
147 * @old: [IN ] Value expected to be current at @addr.
148 * @new: [IN ] Value to write to @addr.
149 */
150 int (*cmpxchg)(
151 enum x86_segment seg,
152 unsigned long offset,
153 unsigned long old,
154 unsigned long new,
155 unsigned int bytes,
156 struct x86_emulate_ctxt *ctxt);
158 /*
159 * cmpxchg8b: Emulate an atomic (LOCKed) CMPXCHG8B operation.
160 * @old: [IN ] Value expected to be current at @addr.
161 * @new: [IN ] Value to write to @addr.
162 * NOTES:
163 * 1. This function is only ever called when emulating a real CMPXCHG8B.
164 * 2. This function is *never* called on x86/64 systems.
165 * 2. Not defining this function (i.e., specifying NULL) is equivalent
166 * to defining a function that always returns X86EMUL_UNHANDLEABLE.
167 */
168 int (*cmpxchg8b)(
169 enum x86_segment seg,
170 unsigned long offset,
171 unsigned long old_lo,
172 unsigned long old_hi,
173 unsigned long new_lo,
174 unsigned long new_hi,
175 struct x86_emulate_ctxt *ctxt);
177 /*
178 * read_segment: Emulate a read of full context of a segment register.
179 * @reg: [OUT] Contents of segment register (visible and hidden state).
180 */
181 int (*read_segment)(
182 enum x86_segment seg,
183 struct segment_register *reg,
184 struct x86_emulate_ctxt *ctxt);
186 /*
187 * write_segment: Emulate a read of full context of a segment register.
188 * @reg: [OUT] Contents of segment register (visible and hidden state).
189 */
190 int (*write_segment)(
191 enum x86_segment seg,
192 struct segment_register *reg,
193 struct x86_emulate_ctxt *ctxt);
195 /*
196 * read_io: Read from I/O port(s).
197 * @port: [IN ] Base port for access.
198 */
199 int (*read_io)(
200 unsigned int port,
201 unsigned int bytes,
202 unsigned long *val,
203 struct x86_emulate_ctxt *ctxt);
205 /*
206 * write_io: Write to I/O port(s).
207 * @port: [IN ] Base port for access.
208 */
209 int (*write_io)(
210 unsigned int port,
211 unsigned int bytes,
212 unsigned long val,
213 struct x86_emulate_ctxt *ctxt);
215 /*
216 * read_cr: Read from control register.
217 * @reg: [IN ] Register to read (0-15).
218 */
219 int (*read_cr)(
220 unsigned int reg,
221 unsigned long *val,
222 struct x86_emulate_ctxt *ctxt);
224 /*
225 * write_cr: Write to control register.
226 * @reg: [IN ] Register to write (0-15).
227 */
228 int (*write_cr)(
229 unsigned int reg,
230 unsigned long val,
231 struct x86_emulate_ctxt *ctxt);
233 /*
234 * read_dr: Read from debug register.
235 * @reg: [IN ] Register to read (0-15).
236 */
237 int (*read_dr)(
238 unsigned int reg,
239 unsigned long *val,
240 struct x86_emulate_ctxt *ctxt);
242 /*
243 * write_dr: Write to debug register.
244 * @reg: [IN ] Register to write (0-15).
245 */
246 int (*write_dr)(
247 unsigned int reg,
248 unsigned long val,
249 struct x86_emulate_ctxt *ctxt);
251 /*
252 * read_msr: Read from model-specific register.
253 * @reg: [IN ] Register to read.
254 */
255 int (*read_msr)(
256 unsigned long reg,
257 uint64_t *val,
258 struct x86_emulate_ctxt *ctxt);
260 /*
261 * write_dr: Write to model-specific register.
262 * @reg: [IN ] Register to write.
263 */
264 int (*write_msr)(
265 unsigned long reg,
266 uint64_t val,
267 struct x86_emulate_ctxt *ctxt);
269 /* write_rflags: Modify privileged bits in RFLAGS. */
270 int (*write_rflags)(
271 unsigned long val,
272 struct x86_emulate_ctxt *ctxt);
274 /* wbinvd: Write-back and invalidate cache contents. */
275 int (*wbinvd)(
276 struct x86_emulate_ctxt *ctxt);
278 /* cpuid: Emulate CPUID via given set of EAX-EDX inputs/outputs. */
279 int (*cpuid)(
280 unsigned int *eax,
281 unsigned int *ebx,
282 unsigned int *ecx,
283 unsigned int *edx,
284 struct x86_emulate_ctxt *ctxt);
286 /* hlt: Emulate HLT. */
287 int (*hlt)(
288 struct x86_emulate_ctxt *ctxt);
290 /* inject_hw_exception */
291 int (*inject_hw_exception)(
292 uint8_t vector,
293 struct x86_emulate_ctxt *ctxt);
295 /* inject_sw_interrupt */
296 int (*inject_sw_interrupt)(
297 uint8_t vector,
298 uint8_t insn_len,
299 struct x86_emulate_ctxt *ctxt);
300 };
302 struct cpu_user_regs;
304 struct x86_emulate_ctxt
305 {
306 /* Register state before/after emulation. */
307 struct cpu_user_regs *regs;
309 /* Default address size in current execution mode (16, 32, or 64). */
310 unsigned int addr_size;
312 /* Stack pointer width in bits (16, 32 or 64). */
313 unsigned int sp_size;
314 };
316 /*
317 * x86_emulate: Emulate an instruction.
318 * Returns -1 on failure, 0 on success.
319 */
320 int
321 x86_emulate(
322 struct x86_emulate_ctxt *ctxt,
323 struct x86_emulate_ops *ops);
325 /*
326 * Given the 'reg' portion of a ModRM byte, and a register block, return a
327 * pointer into the block that addresses the relevant register.
328 * @highbyte_regs specifies whether to decode AH,CH,DH,BH.
329 */
330 void *
331 decode_register(
332 uint8_t modrm_reg, struct cpu_user_regs *regs, int highbyte_regs);
334 #endif /* __X86_EMULATE_H__ */