ia64/xen-unstable

view xen/include/asm-ia64/linux/asm/hw_irq.h @ 19197:9e3be0660c1e

Cleanup naming for ia64 and x86 interrupt handling functions

- Append '_IRQ' to AUTO_ASSIGN, NEVER_ASSIGN, and FREE_TO_ASSIGN
- Rename {request,setup}_irq to {request,setup}_irq_vector
- Rename free_irq to release_irq_vector
- Add {request,setup,release}_irq wrappers for their
{request,setup,release}_irq_vector counterparts
- Added generic irq_to_vector inline for ia64
- Changed ia64 to use the new naming scheme

Signed-off-by: Espen Skoglund <espen.skoglund@netronome.com>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Feb 12 10:48:55 2009 +0000 (2009-02-12)
parents 02c8733e2d91
children
line source
1 #ifndef _ASM_IA64_HW_IRQ_H
2 #define _ASM_IA64_HW_IRQ_H
4 /*
5 * Copyright (C) 2001-2003 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
9 #include <linux/interrupt.h>
10 #include <linux/sched.h>
11 #include <linux/types.h>
12 #include <linux/profile.h>
14 #include <asm/machvec.h>
15 #include <asm/ptrace.h>
16 #include <asm/smp.h>
18 typedef u8 ia64_vector;
20 /*
21 * 0 special
22 *
23 * 1,3-14 are reserved from firmware
24 *
25 * 16-255 (vectored external interrupts) are available
26 *
27 * 15 spurious interrupt (see IVR)
28 *
29 * 16 lowest priority, 255 highest priority
30 *
31 * 15 classes of 16 interrupts each.
32 */
33 #define IA64_MIN_VECTORED_IRQ 16
34 #define IA64_MAX_VECTORED_IRQ 255
35 #define IA64_NUM_VECTORS 256
37 #define AUTO_ASSIGN_IRQ (-1)
39 #define IA64_SPURIOUS_INT_VECTOR 0x0f
41 /*
42 * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI.
43 */
44 #define IA64_CPEP_VECTOR 0x1c /* corrected platform error polling vector */
45 #define IA64_CMCP_VECTOR 0x1d /* corrected machine-check polling vector */
46 #define IA64_CPE_VECTOR 0x1e /* corrected platform error interrupt vector */
47 #define IA64_CMC_VECTOR 0x1f /* corrected machine-check interrupt vector */
48 /*
49 * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
50 */
51 #define IA64_FIRST_DEVICE_VECTOR 0x30
52 #define IA64_LAST_DEVICE_VECTOR 0xe7
53 #define IA64_NUM_DEVICE_VECTORS (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1)
55 #define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */
56 #define IA64_PERFMON_VECTOR 0xee /* performanc monitor interrupt vector */
57 #define IA64_TIMER_VECTOR 0xef /* use highest-prio group 15 interrupt for timer */
58 #define IA64_MCA_WAKEUP_VECTOR 0xf0 /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */
59 #define IA64_IPI_RESCHEDULE 0xfd /* SMP reschedule */
60 #define IA64_IPI_VECTOR 0xfe /* inter-processor interrupt vector */
62 /* Used for encoding redirected irqs */
64 #define IA64_IRQ_REDIRECTED (1 << 31)
66 /* IA64 inter-cpu interrupt related definitions */
68 #define IA64_IPI_DEFAULT_BASE_ADDR 0xfee00000
70 /* Delivery modes for inter-cpu interrupts */
71 enum {
72 IA64_IPI_DM_INT = 0x0, /* pend an external interrupt */
73 IA64_IPI_DM_PMI = 0x2, /* pend a PMI */
74 IA64_IPI_DM_NMI = 0x4, /* pend an NMI (vector 2) */
75 IA64_IPI_DM_INIT = 0x5, /* pend an INIT interrupt */
76 IA64_IPI_DM_EXTINT = 0x7, /* pend an 8259-compatible interrupt. */
77 };
79 extern __u8 isa_irq_to_vector_map[16];
80 #define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)]
82 extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */
84 extern int assign_irq_vector (int irq); /* allocate a free vector */
85 extern void free_irq_vector (int vector);
86 extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
87 extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
88 extern int xen_do_IRQ(ia64_vector vector);
90 static inline void
91 hw_resend_irq (struct hw_interrupt_type *h, unsigned int vector)
92 {
93 platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
94 }
96 /*
97 * Default implementations for the irq-descriptor API:
98 */
100 extern irq_desc_t irq_desc[NR_IRQS];
102 #ifndef CONFIG_IA64_GENERIC
103 static inline unsigned int
104 __ia64_local_vector_to_irq (ia64_vector vec)
105 {
106 return (unsigned int) vec;
107 }
108 #endif
110 /*
111 * Next follows the irq descriptor interface. On IA-64, each CPU supports 256 interrupt
112 * vectors. On smaller systems, there is a one-to-one correspondence between interrupt
113 * vectors and the Linux irq numbers. However, larger systems may have multiple interrupt
114 * domains meaning that the translation from vector number to irq number depends on the
115 * interrupt domain that a CPU belongs to. This API abstracts such platform-dependent
116 * differences and provides a uniform means to translate between vector and irq numbers
117 * and to obtain the irq descriptor for a given irq number.
118 */
120 /* Return a pointer to the irq descriptor for IRQ. */
121 static inline irq_desc_t *
122 irq_descp (int irq)
123 {
124 return irq_desc + irq;
125 }
127 /*
128 * Convert the local IA-64 vector to the corresponding irq number. This translation is
129 * done in the context of the interrupt domain that the currently executing CPU belongs
130 * to.
131 */
132 static inline unsigned int
133 local_vector_to_irq (ia64_vector vec)
134 {
135 return platform_local_vector_to_irq(vec);
136 }
138 #endif /* _ASM_IA64_HW_IRQ_H */