ia64/xen-unstable

view extras/mini-os/include/x86/arch_mm.h @ 13878:9d103e5fd471

[XEN] Fix typos in comment describing 32on64 memory layout

Signed-off-by: Ian Campbell <ian.campbell@xensource.com>
author Ian Campbell <ian.campbell@xensource.com>
date Thu Feb 08 12:33:32 2007 +0000 (2007-02-08)
parents a3c6479c87ef
children 8f6640070a86
line source
1 /* -*- Mode:C; c-basic-offset:4; tab-width:4 -*-
2 *
3 * (C) 2003 - Rolf Neugebauer - Intel Research Cambridge
4 * Copyright (c) 2005, Keir A Fraser
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
25 #ifndef _ARCH_MM_H_
26 #define _ARCH_MM_H_
28 #if defined(__i386__)
29 #include <xen/arch-x86_32.h>
30 #elif defined(__x86_64__)
31 #include <xen/arch-x86_64.h>
32 #else
33 #error "Unsupported architecture"
34 #endif
36 #define L1_FRAME 1
37 #define L2_FRAME 2
38 #define L3_FRAME 3
40 #define L1_PAGETABLE_SHIFT 12
42 #if defined(__i386__)
44 #if !defined(CONFIG_X86_PAE)
46 #define L2_PAGETABLE_SHIFT 22
48 #define L1_PAGETABLE_ENTRIES 1024
49 #define L2_PAGETABLE_ENTRIES 1024
51 #define PADDR_BITS 32
52 #define PADDR_MASK (~0UL)
54 #define NOT_L1_FRAMES 1
55 #define PRIpte "08lx"
56 typedef unsigned long pgentry_t;
58 #else /* defined(CONFIG_X86_PAE) */
60 #define L2_PAGETABLE_SHIFT 21
61 #define L3_PAGETABLE_SHIFT 30
63 #define L1_PAGETABLE_ENTRIES 512
64 #define L2_PAGETABLE_ENTRIES 512
65 #define L3_PAGETABLE_ENTRIES 4
67 #define PADDR_BITS 44
68 #define PADDR_MASK ((1ULL << PADDR_BITS)-1)
70 #define L2_MASK ((1UL << L3_PAGETABLE_SHIFT) - 1)
72 /*
73 * If starting from virtual address greater than 0xc0000000,
74 * this value will be 2 to account for final mid-level page
75 * directory which is always mapped in at this location.
76 */
77 #define NOT_L1_FRAMES 3
78 #define PRIpte "016llx"
79 typedef uint64_t pgentry_t;
81 #endif /* !defined(CONFIG_X86_PAE) */
83 #elif defined(__x86_64__)
85 #define L2_PAGETABLE_SHIFT 21
86 #define L3_PAGETABLE_SHIFT 30
87 #define L4_PAGETABLE_SHIFT 39
89 #define L1_PAGETABLE_ENTRIES 512
90 #define L2_PAGETABLE_ENTRIES 512
91 #define L3_PAGETABLE_ENTRIES 512
92 #define L4_PAGETABLE_ENTRIES 512
94 /* These are page-table limitations. Current CPUs support only 40-bit phys. */
95 #define PADDR_BITS 52
96 #define VADDR_BITS 48
97 #define PADDR_MASK ((1UL << PADDR_BITS)-1)
98 #define VADDR_MASK ((1UL << VADDR_BITS)-1)
100 #define L2_MASK ((1UL << L3_PAGETABLE_SHIFT) - 1)
101 #define L3_MASK ((1UL << L4_PAGETABLE_SHIFT) - 1)
103 #define NOT_L1_FRAMES 3
104 #define PRIpte "016lx"
105 typedef unsigned long pgentry_t;
107 #endif
109 #define L1_MASK ((1UL << L2_PAGETABLE_SHIFT) - 1)
111 /* Given a virtual address, get an entry offset into a page table. */
112 #define l1_table_offset(_a) \
113 (((_a) >> L1_PAGETABLE_SHIFT) & (L1_PAGETABLE_ENTRIES - 1))
114 #define l2_table_offset(_a) \
115 (((_a) >> L2_PAGETABLE_SHIFT) & (L2_PAGETABLE_ENTRIES - 1))
116 #if defined(__x86_64__) || defined(CONFIG_X86_PAE)
117 #define l3_table_offset(_a) \
118 (((_a) >> L3_PAGETABLE_SHIFT) & (L3_PAGETABLE_ENTRIES - 1))
119 #endif
120 #if defined(__x86_64__)
121 #define l4_table_offset(_a) \
122 (((_a) >> L4_PAGETABLE_SHIFT) & (L4_PAGETABLE_ENTRIES - 1))
123 #endif
125 #define _PAGE_PRESENT 0x001UL
126 #define _PAGE_RW 0x002UL
127 #define _PAGE_USER 0x004UL
128 #define _PAGE_PWT 0x008UL
129 #define _PAGE_PCD 0x010UL
130 #define _PAGE_ACCESSED 0x020UL
131 #define _PAGE_DIRTY 0x040UL
132 #define _PAGE_PAT 0x080UL
133 #define _PAGE_PSE 0x080UL
134 #define _PAGE_GLOBAL 0x100UL
136 #if defined(__i386__)
137 #define L1_PROT (_PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED)
138 #define L2_PROT (_PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY |_PAGE_USER)
139 #if defined(CONFIG_X86_PAE)
140 #define L3_PROT (_PAGE_PRESENT)
141 #endif /* CONFIG_X86_PAE */
142 #elif defined(__x86_64__)
143 #define L1_PROT (_PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_USER)
144 #define L2_PROT (_PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER)
145 #define L3_PROT (_PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER)
146 #define L4_PROT (_PAGE_PRESENT|_PAGE_RW|_PAGE_ACCESSED|_PAGE_DIRTY|_PAGE_USER)
147 #endif /* __i386__ || __x86_64__ */
149 #ifndef CONFIG_X86_PAE
150 #define PAGE_SIZE (1UL << L1_PAGETABLE_SHIFT)
151 #else
152 #define PAGE_SIZE (1ULL << L1_PAGETABLE_SHIFT)
153 #endif
154 #define PAGE_SHIFT L1_PAGETABLE_SHIFT
155 #define PAGE_MASK (~(PAGE_SIZE-1))
157 #define PFN_UP(x) (((x) + PAGE_SIZE-1) >> L1_PAGETABLE_SHIFT)
158 #define PFN_DOWN(x) ((x) >> L1_PAGETABLE_SHIFT)
159 #define PFN_PHYS(x) ((x) << L1_PAGETABLE_SHIFT)
160 #define PHYS_PFN(x) ((x) >> L1_PAGETABLE_SHIFT)
162 /* to align the pointer to the (next) page boundary */
163 #define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
165 /* Definitions for machine and pseudophysical addresses. */
166 #ifdef CONFIG_X86_PAE
167 typedef unsigned long long paddr_t;
168 typedef unsigned long long maddr_t;
169 #else
170 typedef unsigned long paddr_t;
171 typedef unsigned long maddr_t;
172 #endif
174 extern unsigned long *phys_to_machine_mapping;
175 extern char _text, _etext, _edata, _end;
176 #define pfn_to_mfn(_pfn) (phys_to_machine_mapping[(_pfn)])
177 static __inline__ maddr_t phys_to_machine(paddr_t phys)
178 {
179 maddr_t machine = pfn_to_mfn(phys >> PAGE_SHIFT);
180 machine = (machine << PAGE_SHIFT) | (phys & ~PAGE_MASK);
181 return machine;
182 }
184 #define mfn_to_pfn(_mfn) (machine_to_phys_mapping[(_mfn)])
185 static __inline__ paddr_t machine_to_phys(maddr_t machine)
186 {
187 paddr_t phys = mfn_to_pfn(machine >> PAGE_SHIFT);
188 phys = (phys << PAGE_SHIFT) | (machine & ~PAGE_MASK);
189 return phys;
190 }
192 #define VIRT_START ((unsigned long)&_text)
194 #define to_phys(x) ((unsigned long)(x)-VIRT_START)
195 #define to_virt(x) ((void *)((unsigned long)(x)+VIRT_START))
197 #define virt_to_pfn(_virt) (PFN_DOWN(to_phys(_virt)))
198 #define virt_to_mfn(_virt) (pfn_to_mfn(virt_to_pfn(_virt)))
199 #define mach_to_virt(_mach) (to_virt(machine_to_phys(_mach)))
200 #define virt_to_mach(_virt) (phys_to_machine(to_phys(_virt)))
201 #define mfn_to_virt(_mfn) (to_virt(mfn_to_pfn(_mfn) << PAGE_SHIFT))
202 #define pfn_to_virt(_pfn) (to_virt((_pfn) << PAGE_SHIFT))
204 /* Pagetable walking. */
205 #define pte_to_mfn(_pte) (((_pte) & (PADDR_MASK&PAGE_MASK)) >> L1_PAGETABLE_SHIFT)
206 #define pte_to_virt(_pte) to_virt(mfn_to_pfn(pte_to_mfn(_pte)) << PAGE_SHIFT)
209 #endif /* _ARCH_MM_H_ */