ia64/xen-unstable

view xen/arch/ia64/linux-xen/irq_ia64.c @ 8828:982b9678af2c

[IA64] cleanup extraneous function name change from upstream

irq_exit() was briefly renamed to xen_irq_exit(), but the change
is no longer necessary. Reverting to original name and parameters.

Signed-off-by: Alex Williamson <alex.williamson@hp.com>
author awilliam@xenbuild.aw
date Fri Feb 10 16:16:33 2006 -0700 (2006-02-10)
parents 4ee359893af4
children db2bd8169e9b
line source
1 /*
2 * linux/arch/ia64/kernel/irq.c
3 *
4 * Copyright (C) 1998-2001 Hewlett-Packard Co
5 * Stephane Eranian <eranian@hpl.hp.com>
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 *
8 * 6/10/99: Updated to bring in sync with x86 version to facilitate
9 * support for SMP and different interrupt controllers.
10 *
11 * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
12 * PCI to vector allocation routine.
13 * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
14 * Added CPU Hotplug handling for IPF.
15 */
17 #include <linux/config.h>
18 #include <linux/module.h>
20 #include <linux/jiffies.h>
21 #include <linux/errno.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/ioport.h>
25 #include <linux/kernel_stat.h>
26 #include <linux/slab.h>
27 #include <linux/ptrace.h>
28 #include <linux/random.h> /* for rand_initialize_irq() */
29 #include <linux/signal.h>
30 #include <linux/smp.h>
31 #include <linux/smp_lock.h>
32 #include <linux/threads.h>
33 #include <linux/bitops.h>
35 #include <asm/delay.h>
36 #include <asm/intrinsics.h>
37 #include <asm/io.h>
38 #include <asm/hw_irq.h>
39 #include <asm/machvec.h>
40 #include <asm/pgtable.h>
41 #include <asm/system.h>
43 #ifdef CONFIG_PERFMON
44 # include <asm/perfmon.h>
45 #endif
47 #define IRQ_DEBUG 0
49 /* default base addr of IPI table */
50 void __iomem *ipi_base_addr = ((void __iomem *)
51 (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
53 /*
54 * Legacy IRQ to IA-64 vector translation table.
55 */
56 __u8 isa_irq_to_vector_map[16] = {
57 /* 8259 IRQ translation, first 16 entries */
58 0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
59 0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
60 };
61 EXPORT_SYMBOL(isa_irq_to_vector_map);
63 static unsigned long ia64_vector_mask[BITS_TO_LONGS(IA64_NUM_DEVICE_VECTORS)];
65 int
66 assign_irq_vector (int irq)
67 {
68 int pos, vector;
69 again:
70 pos = find_first_zero_bit(ia64_vector_mask, IA64_NUM_DEVICE_VECTORS);
71 vector = IA64_FIRST_DEVICE_VECTOR + pos;
72 if (vector > IA64_LAST_DEVICE_VECTOR)
73 return -ENOSPC;
74 if (test_and_set_bit(pos, ia64_vector_mask))
75 goto again;
76 return vector;
77 }
79 void
80 free_irq_vector (int vector)
81 {
82 int pos;
84 if (vector < IA64_FIRST_DEVICE_VECTOR || vector > IA64_LAST_DEVICE_VECTOR)
85 return;
87 pos = vector - IA64_FIRST_DEVICE_VECTOR;
88 if (!test_and_clear_bit(pos, ia64_vector_mask))
89 printk(KERN_WARNING "%s: double free!\n", __FUNCTION__);
90 }
92 #ifdef CONFIG_SMP
93 # define IS_RESCHEDULE(vec) (vec == IA64_IPI_RESCHEDULE)
94 #else
95 # define IS_RESCHEDULE(vec) (0)
96 #endif
97 /*
98 * That's where the IVT branches when we get an external
99 * interrupt. This branches to the correct hardware IRQ handler via
100 * function ptr.
101 */
102 void
103 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
104 {
105 unsigned long saved_tpr;
107 #if IRQ_DEBUG
108 #ifdef XEN
109 xen_debug_irq(vector, regs);
110 #endif
111 {
112 unsigned long bsp, sp;
114 /*
115 * Note: if the interrupt happened while executing in
116 * the context switch routine (ia64_switch_to), we may
117 * get a spurious stack overflow here. This is
118 * because the register and the memory stack are not
119 * switched atomically.
120 */
121 bsp = ia64_getreg(_IA64_REG_AR_BSP);
122 sp = ia64_getreg(_IA64_REG_SP);
124 if ((sp - bsp) < 1024) {
125 static unsigned char count;
126 static long last_time;
128 if (jiffies - last_time > 5*HZ)
129 count = 0;
130 if (++count < 5) {
131 last_time = jiffies;
132 printk("ia64_handle_irq: DANGER: less than "
133 "1KB of free stack space!!\n"
134 "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
135 }
136 }
137 }
138 #endif /* IRQ_DEBUG */
140 /*
141 * Always set TPR to limit maximum interrupt nesting depth to
142 * 16 (without this, it would be ~240, which could easily lead
143 * to kernel stack overflows).
144 */
145 irq_enter();
146 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
147 ia64_srlz_d();
148 while (vector != IA64_SPURIOUS_INT_VECTOR) {
149 if (!IS_RESCHEDULE(vector)) {
150 ia64_setreg(_IA64_REG_CR_TPR, vector);
151 ia64_srlz_d();
153 #ifdef XEN
154 if (!xen_do_IRQ(vector))
155 #endif
156 __do_IRQ(local_vector_to_irq(vector), regs);
158 /*
159 * Disable interrupts and send EOI:
160 */
161 local_irq_disable();
162 ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
163 }
164 ia64_eoi();
165 vector = ia64_get_ivr();
166 }
167 /*
168 * This must be done *after* the ia64_eoi(). For example, the keyboard softirq
169 * handler needs to be able to wait for further keyboard interrupts, which can't
170 * come through until ia64_eoi() has been done.
171 */
172 irq_exit();
173 }
175 #ifdef CONFIG_HOTPLUG_CPU
176 /*
177 * This function emulates a interrupt processing when a cpu is about to be
178 * brought down.
179 */
180 void ia64_process_pending_intr(void)
181 {
182 ia64_vector vector;
183 unsigned long saved_tpr;
184 extern unsigned int vectors_in_migration[NR_IRQS];
186 vector = ia64_get_ivr();
188 irq_enter();
189 saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
190 ia64_srlz_d();
192 /*
193 * Perform normal interrupt style processing
194 */
195 while (vector != IA64_SPURIOUS_INT_VECTOR) {
196 if (!IS_RESCHEDULE(vector)) {
197 ia64_setreg(_IA64_REG_CR_TPR, vector);
198 ia64_srlz_d();
200 /*
201 * Now try calling normal ia64_handle_irq as it would have got called
202 * from a real intr handler. Try passing null for pt_regs, hopefully
203 * it will work. I hope it works!.
204 * Probably could shared code.
205 */
206 vectors_in_migration[local_vector_to_irq(vector)]=0;
207 __do_IRQ(local_vector_to_irq(vector), NULL);
209 /*
210 * Disable interrupts and send EOI
211 */
212 local_irq_disable();
213 ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
214 }
215 ia64_eoi();
216 vector = ia64_get_ivr();
217 }
218 irq_exit();
219 }
220 #endif
223 #ifdef CONFIG_SMP
224 extern irqreturn_t handle_IPI (int irq, void *dev_id, struct pt_regs *regs);
226 static struct irqaction ipi_irqaction = {
227 .handler = handle_IPI,
228 #ifndef XEN
229 .flags = SA_INTERRUPT,
230 #endif
231 .name = "IPI"
232 };
233 #endif
235 void
236 register_percpu_irq (ia64_vector vec, struct irqaction *action)
237 {
238 irq_desc_t *desc;
239 unsigned int irq;
241 for (irq = 0; irq < NR_IRQS; ++irq)
242 if (irq_to_vector(irq) == vec) {
243 desc = irq_descp(irq);
244 desc->status |= IRQ_PER_CPU;
245 desc->handler = &irq_type_ia64_lsapic;
246 if (action)
247 setup_irq(irq, action);
248 }
249 }
251 void __init
252 init_IRQ (void)
253 {
254 register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
255 #ifdef CONFIG_SMP
256 register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
257 #endif
258 #ifdef CONFIG_PERFMON
259 pfm_init_percpu();
260 #endif
261 platform_irq_init();
262 }
264 void
265 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
266 {
267 void __iomem *ipi_addr;
268 unsigned long ipi_data;
269 unsigned long phys_cpu_id;
271 #ifdef CONFIG_SMP
272 phys_cpu_id = cpu_physical_id(cpu);
273 #else
274 phys_cpu_id = (ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff;
275 #endif
277 /*
278 * cpu number is in 8bit ID and 8bit EID
279 */
281 ipi_data = (delivery_mode << 8) | (vector & 0xff);
282 ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
284 #ifdef XEN
285 //printf ("send_ipi to %d (%x)\n", cpu, phys_cpu_id);
286 #endif
287 writeq(ipi_data, ipi_addr);
288 }