ia64/xen-unstable

view xen/include/asm-ia64/linux-xen/asm/asmmacro.h @ 14594:96f167771979

xen: Make all performance counter per-cpu, avoiding the need to update
them with atomic (locked) ops.

Conversion here isn't complete in the sense that many places still use
the old per-CPU accessors (which are now redundant). Since the patch
is already rather big, I'd prefer replacing those in a subsequent
patch.

While doing this, I also converted x86's multicall macros to no longer
require inclusion of asm-offsets.h in the respective C file (on IA64
the use of asm-offsets.h in C sources seems more wide spread, hence
there I rather used IA64_ prefixes for the otherwise conflicting
performance counter indices).

On x86, a few counter increments get moved a little, to avoid
duplicate counting of preempted hypercalls.

Also, a few counters are being added.

IA64 changes only compile-tested, hence somebody doing active IA64
work may want to have a close look at those changes.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author kfraser@localhost.localdomain
date Tue Mar 27 16:35:37 2007 +0100 (2007-03-27)
parents 80e04aa530b8
children 35b2c54f59d5
line source
1 #ifndef _ASM_IA64_ASMMACRO_H
2 #define _ASM_IA64_ASMMACRO_H
4 /*
5 * Copyright (C) 2000-2001, 2003-2004 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
9 #include <linux/config.h>
11 #define ENTRY(name) \
12 .align 32; \
13 .proc name; \
14 name:
16 #define ENTRY_MIN_ALIGN(name) \
17 .align 16; \
18 .proc name; \
19 name:
21 #define GLOBAL_ENTRY(name) \
22 .global name; \
23 ENTRY(name)
25 #define END(name) \
26 .endp name
28 /*
29 * Helper macros to make unwind directives more readable:
30 */
32 /* prologue_gr: */
33 #define ASM_UNW_PRLG_RP 0x8
34 #define ASM_UNW_PRLG_PFS 0x4
35 #define ASM_UNW_PRLG_PSP 0x2
36 #define ASM_UNW_PRLG_PR 0x1
37 #define ASM_UNW_PRLG_GRSAVE(ninputs) (32+(ninputs))
39 /*
40 * Helper macros for accessing user memory.
41 */
43 .section "__ex_table", "a" // declare section & section attributes
44 .previous
46 # define EX(y,x...) \
47 .xdata4 "__ex_table", 99f-., y-.; \
48 [99:] x
49 # define EXCLR(y,x...) \
50 .xdata4 "__ex_table", 99f-., y-.+4; \
51 [99:] x
53 /*
54 * Mark instructions that need a load of a virtual address patched to be
55 * a load of a physical address. We use this either in critical performance
56 * path (ivt.S - TLB miss processing) or in places where it might not be
57 * safe to use a "tpa" instruction (mca_asm.S - error recovery).
58 */
59 .section ".data.patch.vtop", "a" // declare section & section attributes
60 .previous
62 #ifdef XEN
63 #define LOAD_PHYSICAL(pr, reg, obj) \
64 [1:](pr)movl reg = obj;; \
65 shl reg = reg,4;; \
66 shr.u reg = reg,4;; \
67 .xdata4 ".data.patch.vtop", 1b-.
68 #else
69 #define LOAD_PHYSICAL(pr, reg, obj) \
70 [1:](pr)movl reg = obj; \
71 .xdata4 ".data.patch.vtop", 1b-.
72 #endif
74 /*
75 * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it,
76 * we'll patch out the work-around bundles with NOPs, so their impact is minimal.
77 */
78 #define DO_MCKINLEY_E9_WORKAROUND
80 #ifdef DO_MCKINLEY_E9_WORKAROUND
81 .section ".data.patch.mckinley_e9", "a"
82 .previous
83 /* workaround for Itanium 2 Errata 9: */
84 # define FSYS_RETURN \
85 .xdata4 ".data.patch.mckinley_e9", 1f-.; \
86 1:{ .mib; \
87 nop.m 0; \
88 mov r16=ar.pfs; \
89 br.call.sptk.many b7=2f;; \
90 }; \
91 2:{ .mib; \
92 nop.m 0; \
93 mov ar.pfs=r16; \
94 br.ret.sptk.many b6;; \
95 }
96 #else
97 # define FSYS_RETURN br.ret.sptk.many b6
98 #endif
100 /*
101 * Up until early 2004, use of .align within a function caused bad unwind info.
102 * TEXT_ALIGN(n) expands into ".align n" if a fixed GAS is available or into nothing
103 * otherwise.
104 */
105 #ifdef HAVE_WORKING_TEXT_ALIGN
106 # define TEXT_ALIGN(n) .align n
107 #else
108 # define TEXT_ALIGN(n)
109 #endif
111 #ifdef HAVE_SERIALIZE_DIRECTIVE
112 # define dv_serialize_data .serialize.data
113 # define dv_serialize_instruction .serialize.instruction
114 #else
115 # define dv_serialize_data
116 # define dv_serialize_instruction
117 #endif
119 #ifdef PERF_COUNTERS
120 #define PERFC(n) (THIS_CPU(perfcounters) + (IA64_PERFC_ ## n) * 4)
121 #endif
123 #endif /* _ASM_IA64_ASMMACRO_H */